1 #ifndef HALIDE_HALIDERUNTIMEHEXAGONDMA_H
2 #define HALIDE_HALIDERUNTIMEHEXAGONDMA_H
3 
4 /** \file
5  *  Routines specific to the Halide Hexagon DMA host-side runtime.
6  */
7 
8 // Don't include HalideRuntime.h if the contents of it were already pasted into a generated header above this one
9 #ifndef HALIDE_HALIDERUNTIME_H
10 
11 #include "HalideRuntime.h"
12 
13 #endif
14 
15 // Don't include HalideRuntimeHexagonHost.h if the contents of it were already pasted into a generated header above this one
16 #ifndef HALIDE_HALIDERUNTIMEHEXAGONHOST_H
17 
18 #include "HalideRuntimeHexagonHost.h"
19 
20 #endif
21 
22 #ifdef __cplusplus
23 extern "C" {
24 #endif
25 
26 /**
27  * \defgroup rt_hexagon_dma Halide Hexagon DMA runtime
28  * @{
29  */
30 
31 /**
32  * Image Formats to prepare the application for DMA Transfer
33  */
34 typedef enum {
35     halide_hexagon_fmt_RawData,
36     halide_hexagon_fmt_NV12,
37     halide_hexagon_fmt_NV12_Y,
38     halide_hexagon_fmt_NV12_UV,
39     halide_hexagon_fmt_P010,
40     halide_hexagon_fmt_P010_Y,
41     halide_hexagon_fmt_P010_UV,
42     halide_hexagon_fmt_TP10,
43     halide_hexagon_fmt_TP10_Y,
44     halide_hexagon_fmt_TP10_UV,
45     halide_hexagon_fmt_NV124R,
46     halide_hexagon_fmt_NV124R_Y,
47     halide_hexagon_fmt_NV124R_UV
48 } halide_hexagon_image_fmt_t;
49 
50 extern const struct halide_device_interface_t *halide_hexagon_dma_device_interface();
51 
52 /** This API is used to set up the DMA device interface to be used for DMA transfer. This also internally
53  * creates the DMA device handle and populates all the Buffer releated parameters (width, height, stride)
54  * to be used for DMA configuration.
55  */
56 extern int halide_hexagon_dma_device_wrap_native(void *user_context, struct halide_buffer_t *buf,
57                                                  uint64_t mem);
58 
59 /** Detach the Input/Output Buffer from DMA device handle and deallocate the DMA device handle buffer allocation
60  * This API also frees up the DMA device and makes it available for another usage.
61  */
62 extern int halide_hexagon_dma_device_detach_native(void *user_context, struct halide_buffer_t *buf);
63 
64 /** This API will allocate a DMA Engine needed for DMA read/write. This is the first step Before
65  * a buffer can be used in a copy operation (i.e. a DMA read/write operation).
66  */
67 extern int halide_hexagon_dma_allocate_engine(void *user_context, void **dma_engine);
68 
69 /** This API free up the allocated DMA engine. This need to be called after a user program ends
70  * all the DMA Operations and make it available for subsequent DMA transfers */
71 extern int halide_hexagon_dma_deallocate_engine(void *user_context, void *dma_engine);
72 
73 /** This API Prepares a buffer for DMA Read Operation. This will setup the DMA format, direction (read).
74  * Will also make necessary adjustments to the DMA frame parameters based on Image format provided.
75  */
76 extern int halide_hexagon_dma_prepare_for_copy_to_host(void *user_context, struct halide_buffer_t *buf,
77                                                        void *dma_engine, bool is_ubwc, halide_hexagon_image_fmt_t fmt);
78 
79 /** This API Prepares a buffer for DMA Write Operation. This will setup the DMA format, direction (write).
80  * Will also make necessary adjustments to the DMA frame parameters based on Image format provided.
81  */
82 extern int halide_hexagon_dma_prepare_for_copy_to_device(void *user_context, struct halide_buffer_t *buf,
83                                                          void *dma_engine, bool is_ubwc,
84                                                          halide_hexagon_image_fmt_t fmt);
85 
86 /** This API is used to frees up the DMA Resources associated with the buffer.
87  * TODO: Currently this API is a dummy as all the necessary freeing is done in an another API.
88  * This will be used in future.
89  */
90 extern int halide_hexagon_dma_unprepare(void *user_context, struct halide_buffer_t *buf);
91 
92 /** This API is used to setup the hexagon Operation modes. We will setup the necessary Operating frequency
93  * based on the power mode choosen. Check the structure halide_hexagon_power_mode_t defined in Halide HalideRuntimeHexagonHost.h
94  * for the supported power modes.
95  */
96 extern int halide_hexagon_dma_power_mode_voting(void *user_context, halide_hexagon_power_mode_t cornercase);
97 
98 ///@}
99 
100 #ifdef __cplusplus
101 }  // End extern "C"
102 #endif
103 
104 #endif  // HALIDE_HALIDERUNTIMEHEXAGONDMA_H
105