1declare <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32>, <4 x i32>) nounwind readnone 2 3define weak_odr <8 x i16> @packusdwx8(<8 x i32> %arg) nounwind alwaysinline { 4 %1 = shufflevector <8 x i32> %arg, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 5 %2 = shufflevector <8 x i32> %arg, <8 x i32> undef, <4 x i32> < i32 4, i32 5, i32 6, i32 7> 6 %3 = tail call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %1, <4 x i32> %2) 7 ret <8 x i16> %3 8} 9 10define weak_odr <4 x float> @floor_f32x4(<4 x float> %x) nounwind uwtable readnone optsize inlinehint alwaysinline { 11 %1 = tail call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %x, i32 1) 12 ret <4 x float> %1 13} 14 15declare <4 x float> @llvm.x86.sse41.round.ps(<4 x float>, i32) nounwind readnone 16 17define weak_odr <2 x double> @floor_f64x2(<2 x double> %x) nounwind uwtable readnone optsize inlinehint alwaysinline { 18 %1 = tail call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %x, i32 1) 19 ret <2 x double> %1 20} 21 22declare <2 x double> @llvm.x86.sse41.round.pd(<2 x double>, i32) nounwind readnone 23 24define weak_odr <4 x float> @ceil_f32x4(<4 x float> %x) nounwind uwtable readnone optsize inlinehint alwaysinline { 25 %1 = tail call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %x, i32 2) 26 ret <4 x float> %1 27} 28 29define weak_odr <2 x double> @ceil_f64x2(<2 x double> %x) nounwind uwtable readnone optsize inlinehint alwaysinline { 30 %1 = tail call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %x, i32 2) 31 ret <2 x double> %1 32} 33 34define weak_odr <4 x float> @round_f32x4(<4 x float> %x) nounwind uwtable readnone optsize inlinehint alwaysinline { 35 %1 = tail call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %x, i32 0) 36 ret <4 x float> %1 37} 38 39define weak_odr <2 x double> @round_f64x2(<2 x double> %x) nounwind uwtable readnone optsize inlinehint alwaysinline { 40 %1 = tail call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %x, i32 0) 41 ret <2 x double> %1 42} 43 44define weak_odr <4 x float> @trunc_f32x4(<4 x float> %x) nounwind uwtable readnone optsize inlinehint alwaysinline { 45 %1 = tail call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %x, i32 3) 46 ret <4 x float> %1 47} 48 49define weak_odr <2 x double> @trunc_f64x2(<2 x double> %x) nounwind uwtable readnone optsize inlinehint alwaysinline { 50 %1 = tail call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %x, i32 3) 51 ret <2 x double> %1 52} 53 54define weak_odr <16 x i8> @abs_i8x16(<16 x i8> %x) nounwind uwtable readnone alwaysinline { 55 %1 = sub <16 x i8> zeroinitializer, %x 56 %2 = icmp sgt <16 x i8> %x, zeroinitializer 57 %3 = select <16 x i1> %2, <16 x i8> %x, <16 x i8> %1 58 ret <16 x i8> %3 59} 60 61define weak_odr <8 x i16> @abs_i16x8(<8 x i16> %x) nounwind uwtable readnone alwaysinline { 62 %1 = sub <8 x i16> zeroinitializer, %x 63 %2 = icmp sgt <8 x i16> %x, zeroinitializer 64 %3 = select <8 x i1> %2, <8 x i16> %x, <8 x i16> %1 65 ret <8 x i16> %3 66} 67 68define weak_odr <4 x i32> @abs_i32x4(<4 x i32> %x) nounwind uwtable readnone alwaysinline { 69 %1 = sub <4 x i32> zeroinitializer, %x 70 %2 = icmp sgt <4 x i32> %x, zeroinitializer 71 %3 = select <4 x i1> %2, <4 x i32> %x, <4 x i32> %1 72 ret <4 x i32> %3 73} 74