1 //****************************************************************************/
2 //!
3 //! \file wizchip_conf.c
4 //! \brief WIZCHIP Config Header File.
5 //! \version 1.0.1
6 //! \date 2013/10/21
7 //! \par Revision history
8 //! <2014/05/01> V1.0.1 Refer to M20140501
9 //! 1. Explicit type casting in wizchip_bus_readbyte() & wizchip_bus_writebyte()
10 // Issued by Mathias ClauBen.
11 //! uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t*
12 //! For remove the warning when pointer type size is not 32bit.
13 //! If ptrdiff_t doesn't support in your complier, You should must replace ptrdiff_t into your suitable pointer type.
14 //! <2013/10/21> 1st Release
15 //! \author MidnightCow
16 //! \copyright
17 //!
18 //! Copyright (c) 2013, WIZnet Co., LTD.
19 //! All rights reserved.
20 //!
21 //! Redistribution and use in source and binary forms, with or without
22 //! modification, are permitted provided that the following conditions
23 //! are met:
24 //!
25 //! * Redistributions of source code must retain the above copyright
26 //! notice, this list of conditions and the following disclaimer.
27 //! * Redistributions in binary form must reproduce the above copyright
28 //! notice, this list of conditions and the following disclaimer in the
29 //! documentation and/or other materials provided with the distribution.
30 //! * Neither the name of the <ORGANIZATION> nor the names of its
31 //! contributors may be used to endorse or promote products derived
32 //! from this software without specific prior written permission.
33 //!
34 //! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
35 //! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
36 //! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
37 //! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
38 //! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
39 //! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
40 //! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
41 //! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
42 //! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
43 //! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
44 //! THE POSSIBILITY OF SUCH DAMAGE.
45 //
46 //*****************************************************************************/
47 //A20140501 : for use the type - ptrdiff_t
48 #include <stddef.h>
49 //
50
51 #include "wizchip_conf.h"
52 #include "socket.h"
53
54 /**
55 * @brief Default function to enable interrupt.
56 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
57 * null function is called.
58 */
wizchip_cris_enter(void)59 void wizchip_cris_enter(void) {};
60 /**
61 * @brief Default function to disable interrupt.
62 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
63 * null function is called.
64 */
wizchip_cris_exit(void)65 void wizchip_cris_exit(void) {};
66 /**
67 * @brief Default function to select chip.
68 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
69 * null function is called.
70 */
wizchip_cs_select(void)71 void wizchip_cs_select(void) {};
72 /**
73 * @brief Default function to deselect chip.
74 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
75 * null function is called.
76 */
wizchip_cs_deselect(void)77 void wizchip_cs_deselect(void) {};
78 /**
79 * @brief Default function to read in direct or indirect interface.
80 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
81 * null function is called.
82 */
83 //M20140501 : Explict pointer type casting
84 //uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *) AddrSel); };
wizchip_bus_readbyte(uint32_t AddrSel)85 uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); };
86 /**
87 * @brief Default function to write in direct or indirect interface.
88 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
89 * null function is called.
90 */
91
92 //M20140501 : Explict pointer type casting
93 //void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*) AddrSel) = wb; };
wizchip_bus_writebyte(uint32_t AddrSel,uint8_t wb)94 void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; };
95
96 /**
97 * @brief Default function to read in SPI interface.
98 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
99 * null function is called.
100 */
wizchip_spi_readbytes(uint8_t * buf,uint32_t len)101 void wizchip_spi_readbytes(uint8_t *buf, uint32_t len) {}
102 /**
103 * @brief Default function to write in SPI interface.
104 * @note This function help not to access wrong address. If you do not describe this function or register any functions,
105 * null function is called.
106 */
wizchip_spi_writebytes(const uint8_t * buf,uint32_t len)107 void wizchip_spi_writebytes(const uint8_t *buf, uint32_t len) {}
108
109 /**
110 * @\ref _WIZCHIP instance
111 */
112 _WIZCHIP WIZCHIP =
113 {
114 .id = _WIZCHIP_ID_,
115 .if_mode = _WIZCHIP_IO_MODE_,
116 .CRIS._enter = wizchip_cris_enter,
117 .CRIS._exit = wizchip_cris_exit,
118 .CS._select = wizchip_cs_select,
119 .CS._deselect = wizchip_cs_deselect,
120 .IF.BUS._read_byte = wizchip_bus_readbyte,
121 .IF.BUS._write_byte = wizchip_bus_writebyte
122 // .IF.SPI._read_byte = wizchip_spi_readbyte,
123 // .IF.SPI._write_byte = wizchip_spi_writebyte
124 };
125
126 #if _WIZCHIP_ == 5200 // for W5200 ARP errata
127 static uint8_t _SUBN_[4]; // subnet
128 #endif
129 static uint8_t _DNS_[4]; // DNS server ip address
130 static dhcp_mode _DHCP_; // DHCP mode
131
reg_wizchip_cris_cbfunc(void (* cris_en)(void),void (* cris_ex)(void))132 void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
133 {
134 if(!cris_en || !cris_ex)
135 {
136 WIZCHIP.CRIS._enter = wizchip_cris_enter;
137 WIZCHIP.CRIS._exit = wizchip_cris_exit;
138 }
139 else
140 {
141 WIZCHIP.CRIS._enter = cris_en;
142 WIZCHIP.CRIS._exit = cris_ex;
143 }
144 }
145
reg_wizchip_cs_cbfunc(void (* cs_sel)(void),void (* cs_desel)(void))146 void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
147 {
148 if(!cs_sel || !cs_desel)
149 {
150 WIZCHIP.CS._select = wizchip_cs_select;
151 WIZCHIP.CS._deselect = wizchip_cs_deselect;
152 }
153 else
154 {
155 WIZCHIP.CS._select = cs_sel;
156 WIZCHIP.CS._deselect = cs_desel;
157 }
158 }
159
reg_wizchip_bus_cbfunc(uint8_t (* bus_rb)(uint32_t addr),void (* bus_wb)(uint32_t addr,uint8_t wb))160 void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb))
161 {
162 while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
163
164 if(!bus_rb || !bus_wb)
165 {
166 WIZCHIP.IF.BUS._read_byte = wizchip_bus_readbyte;
167 WIZCHIP.IF.BUS._write_byte = wizchip_bus_writebyte;
168 }
169 else
170 {
171 WIZCHIP.IF.BUS._read_byte = bus_rb;
172 WIZCHIP.IF.BUS._write_byte = bus_wb;
173 }
174 }
175
reg_wizchip_spi_cbfunc(void (* spi_rb)(uint8_t *,uint32_t),void (* spi_wb)(const uint8_t *,uint32_t))176 void reg_wizchip_spi_cbfunc(void (*spi_rb)(uint8_t *, uint32_t), void (*spi_wb)(const uint8_t *, uint32_t))
177 {
178 while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
179
180 if(!spi_rb || !spi_wb)
181 {
182 WIZCHIP.IF.SPI._read_bytes = wizchip_spi_readbytes;
183 WIZCHIP.IF.SPI._write_bytes = wizchip_spi_writebytes;
184 }
185 else
186 {
187 WIZCHIP.IF.SPI._read_bytes = spi_rb;
188 WIZCHIP.IF.SPI._write_bytes = spi_wb;
189 }
190 }
191
ctlwizchip(ctlwizchip_type cwtype,void * arg)192 int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
193 {
194 uint8_t tmp = 0;
195 uint8_t* ptmp[2] = {0,0};
196 switch(cwtype)
197 {
198 case CW_RESET_WIZCHIP:
199 wizchip_sw_reset();
200 break;
201 case CW_INIT_WIZCHIP:
202 if(arg != 0)
203 {
204 ptmp[0] = (uint8_t*)arg;
205 ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
206 }
207 return wizchip_init(ptmp[0], ptmp[1]);
208 case CW_CLR_INTERRUPT:
209 wizchip_clrinterrupt(*((intr_kind*)arg));
210 break;
211 case CW_GET_INTERRUPT:
212 *((intr_kind*)arg) = wizchip_getinterrupt();
213 break;
214 case CW_SET_INTRMASK:
215 wizchip_setinterruptmask(*((intr_kind*)arg));
216 break;
217 case CW_GET_INTRMASK:
218 *((intr_kind*)arg) = wizchip_getinterruptmask();
219 break;
220 #if _WIZCHIP_ > 5100
221 case CW_SET_INTRTIME:
222 setINTLEVEL(*(uint16_t*)arg);
223 break;
224 case CW_GET_INTRTIME:
225 *(uint16_t*)arg = getINTLEVEL();
226 break;
227 #endif
228 case CW_GET_ID:
229 ((uint8_t*)arg)[0] = WIZCHIP.id[0];
230 ((uint8_t*)arg)[1] = WIZCHIP.id[1];
231 ((uint8_t*)arg)[2] = WIZCHIP.id[2];
232 ((uint8_t*)arg)[3] = WIZCHIP.id[3];
233 ((uint8_t*)arg)[4] = WIZCHIP.id[4];
234 ((uint8_t*)arg)[5] = 0;
235 break;
236 #if _WIZCHIP_ == 5500
237 case CW_RESET_PHY:
238 wizphy_reset();
239 break;
240 case CW_SET_PHYCONF:
241 wizphy_setphyconf((wiz_PhyConf*)arg);
242 break;
243 case CW_GET_PHYCONF:
244 wizphy_getphyconf((wiz_PhyConf*)arg);
245 break;
246 case CW_GET_PHYSTATUS:
247 break;
248 case CW_SET_PHYPOWMODE:
249 return wizphy_setphypmode(*(uint8_t*)arg);
250 #endif
251 case CW_GET_PHYPOWMODE:
252 tmp = wizphy_getphypmode();
253 if((int8_t)tmp == -1) return -1;
254 *(uint8_t*)arg = tmp;
255 break;
256 case CW_GET_PHYLINK:
257 tmp = wizphy_getphylink();
258 if((int8_t)tmp == -1) return -1;
259 *(uint8_t*)arg = tmp;
260 break;
261 default:
262 return -1;
263 }
264 return 0;
265 }
266
267
ctlnetwork(ctlnetwork_type cntype,void * arg)268 int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
269 {
270
271 switch(cntype)
272 {
273 case CN_SET_NETINFO:
274 wizchip_setnetinfo((wiz_NetInfo*)arg);
275 break;
276 case CN_GET_NETINFO:
277 wizchip_getnetinfo((wiz_NetInfo*)arg);
278 break;
279 case CN_SET_NETMODE:
280 return wizchip_setnetmode(*(netmode_type*)arg);
281 case CN_GET_NETMODE:
282 *(netmode_type*)arg = wizchip_getnetmode();
283 break;
284 case CN_SET_TIMEOUT:
285 wizchip_settimeout((wiz_NetTimeout*)arg);
286 break;
287 case CN_GET_TIMEOUT:
288 wizchip_gettimeout((wiz_NetTimeout*)arg);
289 break;
290 default:
291 return -1;
292 }
293 return 0;
294 }
295
wizchip_sw_reset(void)296 void wizchip_sw_reset(void)
297 {
298 uint8_t gw[4], sn[4], sip[4];
299 uint8_t mac[6];
300 getSHAR(mac);
301 getGAR(gw); getSUBR(sn); getSIPR(sip);
302 setMR(MR_RST);
303 getMR(); // for delay
304 setSHAR(mac);
305 setGAR(gw);
306 setSUBR(sn);
307 setSIPR(sip);
308 }
309
wizchip_init(uint8_t * txsize,uint8_t * rxsize)310 int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
311 {
312 int8_t i;
313 int8_t tmp = 0;
314 wizchip_sw_reset();
315 if(txsize)
316 {
317 tmp = 0;
318 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
319 tmp += txsize[i];
320 if(tmp > 16) return -1;
321 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
322 setSn_TXBUF_SIZE(i, txsize[i]);
323 }
324 if(rxsize)
325 {
326 tmp = 0;
327 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
328 tmp += rxsize[i];
329 if(tmp > 16) return -1;
330 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
331 setSn_RXBUF_SIZE(i, rxsize[i]);
332 }
333
334 WIZCHIP_EXPORT(socket_reset)();
335
336 return 0;
337 }
338
wizchip_clrinterrupt(intr_kind intr)339 void wizchip_clrinterrupt(intr_kind intr)
340 {
341 uint8_t ir = (uint8_t)intr;
342 uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
343 #if _WIZCHIP_ < 5500
344 ir |= (1<<4); // IK_WOL
345 #endif
346 #if _WIZCHIP_ == 5200
347 ir |= (1 << 6);
348 #endif
349
350 #if _WIZCHIP_ < 5200
351 sir &= 0x0F;
352 #endif
353
354 #if _WIZCHIP_ == 5100
355 ir |= sir;
356 setIR(ir);
357 #else
358 setIR(ir);
359 setSIR(sir);
360 #endif
361 }
362
wizchip_getinterrupt(void)363 intr_kind wizchip_getinterrupt(void)
364 {
365 uint8_t ir = 0;
366 uint8_t sir = 0;
367 uint16_t ret = 0;
368 #if _WIZCHIP_ == 5100
369 ir = getIR();
370 sir = ir 0x0F;
371 #else
372 ir = getIR();
373 sir = getSIR();
374 #endif
375
376 #if _WIZCHIP_ < 5500
377 ir &= ~(1<<4); // IK_WOL
378 #endif
379 #if _WIZCHIP_ == 5200
380 ir &= ~(1 << 6);
381 #endif
382 ret = sir;
383 ret = (ret << 8) + ir;
384 return (intr_kind)ret;
385 }
386
wizchip_setinterruptmask(intr_kind intr)387 void wizchip_setinterruptmask(intr_kind intr)
388 {
389 uint8_t imr = (uint8_t)intr;
390 uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
391 #if _WIZCHIP_ < 5500
392 imr &= ~(1<<4); // IK_WOL
393 #endif
394 #if _WIZCHIP_ == 5200
395 imr &= ~(1 << 6);
396 #endif
397
398 #if _WIZCHIP_ < 5200
399 simr &= 0x0F;
400 #endif
401
402 #if _WIZCHIP_ == 5100
403 imr |= simr;
404 setIMR(imr);
405 #else
406 setIMR(imr);
407 setSIMR(simr);
408 #endif
409 }
410
wizchip_getinterruptmask(void)411 intr_kind wizchip_getinterruptmask(void)
412 {
413 uint8_t imr = 0;
414 uint8_t simr = 0;
415 uint16_t ret = 0;
416 #if _WIZCHIP_ == 5100
417 imr = getIMR();
418 simr = imr 0x0F;
419 #else
420 imr = getIMR();
421 simr = getSIMR();
422 #endif
423
424 #if _WIZCHIP_ < 5500
425 imr &= ~(1<<4); // IK_WOL
426 #endif
427 #if _WIZCHIP_ == 5200
428 imr &= ~(1 << 6); // IK_DEST_UNREACH
429 #endif
430 ret = simr;
431 ret = (ret << 8) + imr;
432 return (intr_kind)ret;
433 }
434
wizphy_getphylink(void)435 int8_t wizphy_getphylink(void)
436 {
437 int8_t tmp;
438 #if _WIZCHIP_ == 5200
439 if(getPHYSTATUS() & PHYSTATUS_LINK)
440 tmp = PHY_LINK_ON;
441 else
442 tmp = PHY_LINK_OFF;
443 #elif _WIZCHIP_ == 5500
444 if(getPHYCFGR() & PHYCFGR_LNK_ON)
445 tmp = PHY_LINK_ON;
446 else
447 tmp = PHY_LINK_OFF;
448 #else
449 tmp = -1;
450 #endif
451 return tmp;
452 }
453
454 #if _WIZCHIP_ > 5100
455
wizphy_getphypmode(void)456 int8_t wizphy_getphypmode(void)
457 {
458 int8_t tmp = 0;
459 #if _WIZCHIP_ == 5200
460 if(getPHYSTATUS() & PHYSTATUS_POWERDOWN)
461 tmp = PHY_POWER_DOWN;
462 else
463 tmp = PHY_POWER_NORM;
464 #elif _WIZCHIP_ == 5500
465 if(getPHYCFGR() & PHYCFGR_OPMDC_PDOWN)
466 tmp = PHY_POWER_DOWN;
467 else
468 tmp = PHY_POWER_NORM;
469 #else
470 tmp = -1;
471 #endif
472 return tmp;
473 }
474 #endif
475
476 #if _WIZCHIP_ == 5500
wizphy_reset(void)477 void wizphy_reset(void)
478 {
479 uint8_t tmp = getPHYCFGR();
480 tmp &= PHYCFGR_RST;
481 setPHYCFGR(tmp);
482 tmp = getPHYCFGR();
483 tmp |= ~PHYCFGR_RST;
484 setPHYCFGR(tmp);
485 }
486
wizphy_setphyconf(wiz_PhyConf * phyconf)487 void wizphy_setphyconf(wiz_PhyConf* phyconf)
488 {
489 uint8_t tmp = 0;
490 if(phyconf->by == PHY_CONFBY_SW)
491 tmp |= PHYCFGR_OPMD;
492 else
493 tmp &= ~PHYCFGR_OPMD;
494 if(phyconf->mode == PHY_MODE_AUTONEGO)
495 tmp |= PHYCFGR_OPMDC_ALLA;
496 else
497 {
498 if(phyconf->duplex == PHY_DUPLEX_FULL)
499 {
500 if(phyconf->speed == PHY_SPEED_100)
501 tmp |= PHYCFGR_OPMDC_100F;
502 else
503 tmp |= PHYCFGR_OPMDC_10F;
504 }
505 else
506 {
507 if(phyconf->speed == PHY_SPEED_100)
508 tmp |= PHYCFGR_OPMDC_100H;
509 else
510 tmp |= PHYCFGR_OPMDC_10H;
511 }
512 }
513 setPHYCFGR(tmp);
514 wizphy_reset();
515 }
516
wizphy_getphyconf(wiz_PhyConf * phyconf)517 void wizphy_getphyconf(wiz_PhyConf* phyconf)
518 {
519 uint8_t tmp = 0;
520 tmp = getPHYCFGR();
521 phyconf->by = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW;
522 switch(tmp & PHYCFGR_OPMDC_ALLA)
523 {
524 case PHYCFGR_OPMDC_ALLA:
525 case PHYCFGR_OPMDC_100FA:
526 phyconf->mode = PHY_MODE_AUTONEGO;
527 break;
528 default:
529 phyconf->mode = PHY_MODE_MANUAL;
530 break;
531 }
532 switch(tmp & PHYCFGR_OPMDC_ALLA)
533 {
534 case PHYCFGR_OPMDC_100FA:
535 case PHYCFGR_OPMDC_100F:
536 case PHYCFGR_OPMDC_100H:
537 phyconf->speed = PHY_SPEED_100;
538 break;
539 default:
540 phyconf->speed = PHY_SPEED_10;
541 break;
542 }
543 switch(tmp & PHYCFGR_OPMDC_ALLA)
544 {
545 case PHYCFGR_OPMDC_100FA:
546 case PHYCFGR_OPMDC_100F:
547 case PHYCFGR_OPMDC_10F:
548 phyconf->duplex = PHY_DUPLEX_FULL;
549 break;
550 default:
551 phyconf->duplex = PHY_DUPLEX_HALF;
552 break;
553 }
554 }
555
wizphy_getphystat(wiz_PhyConf * phyconf)556 void wizphy_getphystat(wiz_PhyConf* phyconf)
557 {
558 uint8_t tmp = getPHYCFGR();
559 phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
560 phyconf->speed = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10;
561 }
562
wizphy_setphypmode(uint8_t pmode)563 int8_t wizphy_setphypmode(uint8_t pmode)
564 {
565 uint8_t tmp = 0;
566 tmp = getPHYCFGR();
567 if((tmp & PHYCFGR_OPMD)== 0) return -1;
568 tmp &= ~PHYCFGR_OPMDC_ALLA;
569 if( pmode == PHY_POWER_DOWN)
570 tmp |= PHYCFGR_OPMDC_PDOWN;
571 else
572 tmp |= PHYCFGR_OPMDC_ALLA;
573 setPHYCFGR(tmp);
574 wizphy_reset();
575 tmp = getPHYCFGR();
576 if( pmode == PHY_POWER_DOWN)
577 {
578 if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
579 }
580 else
581 {
582 if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
583 }
584 return -1;
585 }
586 #endif
587
588
wizchip_setnetinfo(wiz_NetInfo * pnetinfo)589 void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
590 {
591 setSHAR(pnetinfo->mac);
592 setGAR(pnetinfo->gw);
593 setSUBR(pnetinfo->sn);
594 setSIPR(pnetinfo->ip);
595 #if _WIZCHIP_ == 5200 // for W5200 ARP errata
596 _SUBN_[0] = pnetinfo->sn[0];
597 _SUBN_[1] = pnetinfo->sn[1];
598 _SUBN_[2] = pnetinfo->sn[2];
599 _SUBN_[3] = pnetinfo->sn[3];
600 #endif
601 _DNS_[0] = pnetinfo->dns[0];
602 _DNS_[1] = pnetinfo->dns[1];
603 _DNS_[2] = pnetinfo->dns[2];
604 _DNS_[3] = pnetinfo->dns[3];
605 _DHCP_ = pnetinfo->dhcp;
606 }
607
wizchip_getnetinfo(wiz_NetInfo * pnetinfo)608 void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
609 {
610 getSHAR(pnetinfo->mac);
611 getGAR(pnetinfo->gw);
612 getSUBR(pnetinfo->sn);
613 getSIPR(pnetinfo->ip);
614 #if _WIZCHIP_ == 5200 // for W5200 ARP errata
615 pnetinfo->sn[0] = _SUBN_[0];
616 pnetinfo->sn[1] = _SUBN_[1];
617 pnetinfo->sn[2] = _SUBN_[2];
618 pnetinfo->sn[3] = _SUBN_[3];
619 #endif
620 pnetinfo->dns[0]= _DNS_[0];
621 pnetinfo->dns[1]= _DNS_[1];
622 pnetinfo->dns[2]= _DNS_[2];
623 pnetinfo->dns[3]= _DNS_[3];
624 pnetinfo->dhcp = _DHCP_;
625 }
626
627 #if _WIZCHIP_ == 5200 // for W5200 ARP errata
wizchip_getsubn(void)628 uint8_t *wizchip_getsubn(void) {
629 return _SUBN_;
630 }
631 #endif
632
wizchip_setnetmode(netmode_type netmode)633 int8_t wizchip_setnetmode(netmode_type netmode)
634 {
635 uint8_t tmp = 0;
636 #if _WIZCHIP_ != 5500
637 if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK)) return -1;
638 #else
639 if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1;
640 #endif
641 tmp = getMR();
642 tmp |= (uint8_t)netmode;
643 setMR(tmp);
644 return 0;
645 }
646
wizchip_getnetmode(void)647 netmode_type wizchip_getnetmode(void)
648 {
649 return (netmode_type) getMR();
650 }
651
wizchip_settimeout(wiz_NetTimeout * nettime)652 void wizchip_settimeout(wiz_NetTimeout* nettime)
653 {
654 setRCR(nettime->retry_cnt);
655 setRTR(nettime->time_100us);
656 }
657
wizchip_gettimeout(wiz_NetTimeout * nettime)658 void wizchip_gettimeout(wiz_NetTimeout* nettime)
659 {
660 nettime->retry_cnt = getRCR();
661 nettime->time_100us = getRTR();
662 }
663