1 /**
2 * \file
3 * JIT trampoline code for ARM
4 *
5 * Authors:
6 * Paolo Molaro (lupus@ximian.com)
7 *
8 * (C) 2001-2003 Ximian, Inc.
9 * Copyright 2003-2011 Novell Inc
10 * Copyright 2011 Xamarin Inc
11 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
12 */
13
14 #include <config.h>
15 #include <glib.h>
16
17 #include <mono/metadata/abi-details.h>
18 #include <mono/metadata/appdomain.h>
19 #include <mono/metadata/marshal.h>
20 #include <mono/metadata/tabledefs.h>
21 #include <mono/metadata/profiler-private.h>
22 #include <mono/arch/arm/arm-codegen.h>
23 #include <mono/arch/arm/arm-vfp-codegen.h>
24
25 #include "mini.h"
26 #include "mini-arm.h"
27 #include "mini-runtime.h"
28 #include "debugger-agent.h"
29 #include "jit-icalls.h"
30
31 #ifndef DISABLE_INTERPRETER
32 #include "interp/interp.h"
33 #endif
34
35 #define ALIGN_TO(val,align) ((((guint64)val) + ((align) - 1)) & ~((align) - 1))
36
37 void
mono_arch_patch_callsite(guint8 * method_start,guint8 * code_ptr,guint8 * addr)38 mono_arch_patch_callsite (guint8 *method_start, guint8 *code_ptr, guint8 *addr)
39 {
40 guint32 *code = (guint32*)code_ptr;
41
42 /* This is the 'bl' or the 'mov pc' instruction */
43 --code;
44
45 /*
46 * Note that methods are called also with the bl opcode.
47 */
48 if ((((*code) >> 25) & 7) == 5) {
49 /*g_print ("direct patching\n");*/
50 arm_patch ((guint8*)code, addr);
51 mono_arch_flush_icache ((guint8*)code, 4);
52 return;
53 }
54
55 if ((((*code) >> 20) & 0xFF) == 0x12) {
56 /*g_print ("patching bx\n");*/
57 arm_patch ((guint8*)code, addr);
58 mono_arch_flush_icache ((guint8*)(code - 2), 4);
59 return;
60 }
61
62 g_assert_not_reached ();
63 }
64
65 void
mono_arch_patch_plt_entry(guint8 * code,gpointer * got,mgreg_t * regs,guint8 * addr)66 mono_arch_patch_plt_entry (guint8 *code, gpointer *got, mgreg_t *regs, guint8 *addr)
67 {
68 guint8 *jump_entry;
69
70 /* Patch the jump table entry used by the plt entry */
71 if (*(guint32*)code == 0xe59fc000) {
72 /* ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0); */
73 guint32 offset = ((guint32*)code)[2];
74
75 jump_entry = code + offset + 12;
76 } else if (*(guint16*)(code - 4) == 0xf8df) {
77 /*
78 * Thumb PLT entry, begins with ldr.w ip, [pc, #8], code points to entry + 4, see
79 * mono_arm_get_thumb_plt_entry ().
80 */
81 guint32 offset;
82
83 code -= 4;
84 offset = *(guint32*)(code + 12);
85 jump_entry = code + offset + 8;
86 } else {
87 g_assert_not_reached ();
88 }
89
90 *(guint8**)jump_entry = addr;
91 }
92
93 #ifndef DISABLE_JIT
94
95 #define arm_is_imm12(v) ((int)(v) > -4096 && (int)(v) < 4096)
96
97 /*
98 * Return the instruction to jump from code to target, 0 if not
99 * reachable with a single instruction
100 */
101 static guint32
branch_for_target_reachable(guint8 * branch,guint8 * target)102 branch_for_target_reachable (guint8 *branch, guint8 *target)
103 {
104 gint diff = target - branch - 8;
105 g_assert ((diff & 3) == 0);
106 if (diff >= 0) {
107 if (diff <= 33554431)
108 return (ARMCOND_AL << ARMCOND_SHIFT) | (ARM_BR_TAG) | (diff >> 2);
109 } else {
110 /* diff between 0 and -33554432 */
111 if (diff >= -33554432)
112 return (ARMCOND_AL << ARMCOND_SHIFT) | (ARM_BR_TAG) | ((diff >> 2) & ~0xff000000);
113 }
114 return 0;
115 }
116
117 static inline guint8*
emit_bx(guint8 * code,int reg)118 emit_bx (guint8* code, int reg)
119 {
120 if (mono_arm_thumb_supported ())
121 ARM_BX (code, reg);
122 else
123 ARM_MOV_REG_REG (code, ARMREG_PC, reg);
124 return code;
125 }
126
127 /* Stack size for trampoline function
128 */
129 #define STACK ALIGN_TO (sizeof (MonoLMF), MONO_ARCH_FRAME_ALIGNMENT)
130
131 /* Method-specific trampoline code fragment size */
132 #define METHOD_TRAMPOLINE_SIZE 64
133
134 /* Jump-specific trampoline code fragment size */
135 #define JUMP_TRAMPOLINE_SIZE 64
136
137 guchar*
mono_arch_create_generic_trampoline(MonoTrampolineType tramp_type,MonoTrampInfo ** info,gboolean aot)138 mono_arch_create_generic_trampoline (MonoTrampolineType tramp_type, MonoTrampInfo **info, gboolean aot)
139 {
140 char *tramp_name;
141 guint8 *buf, *code = NULL;
142 guint8 *load_get_lmf_addr = NULL, *load_trampoline = NULL;
143 guint8 *labels [16];
144 gpointer *constants;
145 int i, orig_cfa_offset, cfa_offset, regsave_size, lr_offset;
146 GSList *unwind_ops = NULL;
147 MonoJumpInfo *ji = NULL;
148 int buf_len;
149
150 /* Now we'll create in 'buf' the ARM trampoline code. This
151 is the trampoline code common to all methods */
152
153 buf_len = 272;
154
155 /* Add space for saving/restoring VFP regs. */
156 if (mono_arm_is_hard_float ())
157 buf_len += 8 * 2;
158
159 code = buf = mono_global_codeman_reserve (buf_len);
160
161 /*
162 * At this point lr points to the specific arg and sp points to the saved
163 * regs on the stack (all but PC and SP). The original LR value has been
164 * saved as sp + LR_OFFSET by the push in the specific trampoline
165 */
166
167 /* The size of the area already allocated by the push in the specific trampoline */
168 regsave_size = 14 * sizeof (mgreg_t);
169 /* The offset where lr was saved inside the regsave area */
170 lr_offset = 13 * sizeof (mgreg_t);
171
172 // CFA = SP + (num registers pushed) * 4
173 cfa_offset = 14 * sizeof (mgreg_t);
174 mono_add_unwind_op_def_cfa (unwind_ops, code, buf, ARMREG_SP, cfa_offset);
175 // PC saved at sp+LR_OFFSET
176 mono_add_unwind_op_offset (unwind_ops, code, buf, ARMREG_LR, -4);
177 /* Callee saved regs */
178 for (i = 0; i < 8; ++i)
179 mono_add_unwind_op_offset (unwind_ops, code, buf, ARMREG_R4 + i, -regsave_size + ((4 + i) * 4));
180
181 if (aot) {
182 /*
183 * For page trampolines the data is in r1, so just move it, otherwise use the got slot as below.
184 * The trampoline contains a pc-relative offset to the got slot
185 * preceeding the got slot where the value is stored. The offset can be
186 * found at [lr + 0].
187 */
188 /* See if emit_trampolines () in aot-compiler.c for the '2' */
189 if (aot == 2) {
190 ARM_MOV_REG_REG (code, ARMREG_V2, ARMREG_R1);
191 } else {
192 ARM_LDR_IMM (code, ARMREG_V2, ARMREG_LR, 0);
193 ARM_ADD_REG_IMM (code, ARMREG_V2, ARMREG_V2, 4, 0);
194 ARM_LDR_REG_REG (code, ARMREG_V2, ARMREG_V2, ARMREG_LR);
195 }
196 } else {
197 ARM_LDR_IMM (code, ARMREG_V2, ARMREG_LR, 0);
198 }
199 ARM_LDR_IMM (code, ARMREG_V3, ARMREG_SP, lr_offset);
200
201 /* we build the MonoLMF structure on the stack - see mini-arm.h
202 * The pointer to the struct is put in r1.
203 * the iregs array is already allocated on the stack by push.
204 */
205 code = mono_arm_emit_load_imm (code, ARMREG_R2, STACK - regsave_size);
206 ARM_SUB_REG_REG (code, ARMREG_SP, ARMREG_SP, ARMREG_R2);
207 cfa_offset += STACK - regsave_size;
208 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
209 /* V1 == lmf */
210 code = mono_arm_emit_load_imm (code, ARMREG_R2, STACK - sizeof (MonoLMF));
211 ARM_ADD_REG_REG (code, ARMREG_V1, ARMREG_SP, ARMREG_R2);
212
213 /* ok, now we can continue with the MonoLMF setup, mostly untouched
214 * from emit_prolog in mini-arm.c
215 * This is a synthetized call to mono_get_lmf_addr ()
216 */
217 if (aot) {
218 ji = mono_patch_info_list_prepend (ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, "mono_get_lmf_addr");
219 ARM_LDR_IMM (code, ARMREG_R0, ARMREG_PC, 0);
220 ARM_B (code, 0);
221 *(gpointer*)code = NULL;
222 code += 4;
223 ARM_LDR_REG_REG (code, ARMREG_R0, ARMREG_PC, ARMREG_R0);
224 } else {
225 load_get_lmf_addr = code;
226 code += 4;
227 }
228 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
229 code = emit_bx (code, ARMREG_R0);
230
231 /*
232 * The stack now looks like:
233 * <saved regs>
234 * v1 -> <rest of LMF>
235 * sp -> <alignment>
236 */
237
238 /* r0 is the result from mono_get_lmf_addr () */
239 ARM_STR_IMM (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, lmf_addr));
240 /* new_lmf->previous_lmf = *lmf_addr */
241 ARM_LDR_IMM (code, ARMREG_R2, ARMREG_R0, MONO_STRUCT_OFFSET (MonoLMF, previous_lmf));
242 ARM_STR_IMM (code, ARMREG_R2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, previous_lmf));
243 /* *(lmf_addr) = r1 */
244 ARM_STR_IMM (code, ARMREG_V1, ARMREG_R0, MONO_STRUCT_OFFSET (MonoLMF, previous_lmf));
245 /* save method info (it's in v2) */
246 if ((tramp_type == MONO_TRAMPOLINE_JIT) || (tramp_type == MONO_TRAMPOLINE_JUMP))
247 ARM_STR_IMM (code, ARMREG_V2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, method));
248 else {
249 ARM_MOV_REG_IMM8 (code, ARMREG_R2, 0);
250 ARM_STR_IMM (code, ARMREG_R2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, method));
251 }
252 /* save caller SP */
253 code = mono_arm_emit_load_imm (code, ARMREG_R2, cfa_offset);
254 ARM_ADD_REG_REG (code, ARMREG_R2, ARMREG_SP, ARMREG_R2);
255 ARM_STR_IMM (code, ARMREG_R2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, sp));
256 /* save caller FP */
257 ARM_LDR_IMM (code, ARMREG_R2, ARMREG_V1, (MONO_STRUCT_OFFSET (MonoLMF, iregs) + ARMREG_FP*4));
258 ARM_STR_IMM (code, ARMREG_R2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, fp));
259 /* save the IP (caller ip) */
260 if (tramp_type == MONO_TRAMPOLINE_JUMP) {
261 ARM_MOV_REG_IMM8 (code, ARMREG_R2, 0);
262 } else {
263 ARM_LDR_IMM (code, ARMREG_R2, ARMREG_V1, (MONO_STRUCT_OFFSET (MonoLMF, iregs) + 13*4));
264 }
265 ARM_STR_IMM (code, ARMREG_R2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, ip));
266
267 /* Save VFP registers. */
268 if (mono_arm_is_hard_float ()) {
269 /*
270 * Strictly speaking, we don't have to save d0-d7 in the LMF, but
271 * it's easier than attempting to store them on the stack since
272 * this trampoline code is pretty messy.
273 */
274 ARM_ADD_REG_IMM8 (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, fregs));
275 ARM_FSTMD (code, ARM_VFP_D0, 8, ARMREG_R0);
276 }
277
278 /*
279 * Now we're ready to call xxx_trampoline ().
280 */
281 /* Arg 1: the saved registers */
282 ARM_ADD_REG_IMM (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, iregs), 0);
283
284 /* Arg 2: code (next address to the instruction that called us) */
285 if (tramp_type == MONO_TRAMPOLINE_JUMP) {
286 ARM_MOV_REG_IMM8 (code, ARMREG_R1, 0);
287 } else {
288 ARM_MOV_REG_REG (code, ARMREG_R1, ARMREG_V3);
289 }
290
291 /* Arg 3: the specific argument, stored in v2
292 */
293 ARM_MOV_REG_REG (code, ARMREG_R2, ARMREG_V2);
294
295 if (aot) {
296 char *icall_name = g_strdup_printf ("trampoline_func_%d", tramp_type);
297 ji = mono_patch_info_list_prepend (ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, icall_name);
298 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
299 ARM_B (code, 0);
300 *(gpointer*)code = NULL;
301 code += 4;
302 ARM_LDR_REG_REG (code, ARMREG_IP, ARMREG_PC, ARMREG_IP);
303 } else {
304 load_trampoline = code;
305 code += 4;
306 }
307
308 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
309 code = emit_bx (code, ARMREG_IP);
310
311 /* OK, code address is now on r0. Move it to the place on the stack
312 * where IP was saved (it is now no more useful to us and it can be
313 * clobbered). This way we can just restore all the regs in one inst
314 * and branch to IP.
315 */
316 ARM_STR_IMM (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, iregs) + (ARMREG_R12 * sizeof (mgreg_t)));
317
318 /*
319 * Now we restore the MonoLMF (see emit_epilogue in mini-arm.c)
320 * and the rest of the registers, so the method called will see
321 * the same state as before we executed.
322 */
323 /* ip = previous_lmf */
324 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, previous_lmf));
325 /* lr = lmf_addr */
326 ARM_LDR_IMM (code, ARMREG_LR, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, lmf_addr));
327 /* *(lmf_addr) = previous_lmf */
328 ARM_STR_IMM (code, ARMREG_IP, ARMREG_LR, MONO_STRUCT_OFFSET (MonoLMF, previous_lmf));
329
330 /* Check for thread interruption */
331 /* This is not perf critical code so no need to check the interrupt flag */
332 if (aot) {
333 code = mono_arm_emit_aotconst (&ji, code, buf, ARMREG_IP, MONO_PATCH_INFO_JIT_ICALL_ADDR, "mono_thread_force_interruption_checkpoint_noraise");
334 } else {
335 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
336 ARM_B (code, 0);
337 *(gpointer*)code = mono_thread_force_interruption_checkpoint_noraise;
338 code += 4;
339 }
340 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
341 code = emit_bx (code, ARMREG_IP);
342
343 /* Check whenever an exception needs to be thrown */
344 ARM_CMP_REG_IMM (code, ARMREG_R0, 0, 0);
345 labels [0] = code;
346 ARM_B_COND (code, ARMCOND_NE, 0);
347
348 orig_cfa_offset = cfa_offset;
349
350 /* Normal case */
351
352 /* Restore VFP registers. */
353 if (mono_arm_is_hard_float ()) {
354 ARM_ADD_REG_IMM8 (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, fregs));
355 ARM_FLDMD (code, ARM_VFP_D0, 8, ARMREG_R0);
356 }
357
358 /* Non-standard function epilogue. Instead of doing a proper
359 * return, we just jump to the compiled code.
360 */
361 /* Restore the registers and jump to the code:
362 * Note that IP has been conveniently set to the method addr.
363 */
364 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, STACK - regsave_size);
365 cfa_offset -= STACK - regsave_size;
366 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
367 ARM_POP_NWB (code, 0x5fff);
368 mono_add_unwind_op_same_value (unwind_ops, code, buf, ARMREG_LR);
369 if (tramp_type == MONO_TRAMPOLINE_RGCTX_LAZY_FETCH)
370 ARM_MOV_REG_REG (code, ARMREG_R0, ARMREG_IP);
371 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, regsave_size);
372 cfa_offset -= regsave_size;
373 g_assert (cfa_offset == 0);
374 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
375 if (MONO_TRAMPOLINE_TYPE_MUST_RETURN (tramp_type))
376 code = emit_bx (code, ARMREG_LR);
377 else
378 code = emit_bx (code, ARMREG_IP);
379
380 constants = (gpointer*)code;
381 constants [0] = mono_get_lmf_addr;
382 constants [1] = (gpointer)mono_get_trampoline_func (tramp_type);
383
384 if (!aot) {
385 /* backpatch by emitting the missing instructions skipped above */
386 ARM_LDR_IMM (load_get_lmf_addr, ARMREG_R0, ARMREG_PC, (code - load_get_lmf_addr - 8));
387 ARM_LDR_IMM (load_trampoline, ARMREG_IP, ARMREG_PC, (code + 4 - load_trampoline - 8));
388 }
389
390 code += 8;
391
392 /* Exception case */
393 arm_patch (labels [0], code);
394
395 cfa_offset = orig_cfa_offset;
396
397 /*
398 * We have an exception we want to throw in the caller's frame, so pop
399 * the trampoline frame and throw from the caller.
400 */
401 /* Store the exception in place of IP */
402 ARM_STR_IMM (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, iregs) + (ARMREG_R12 * sizeof (mgreg_t)));
403
404 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, STACK - regsave_size);
405 cfa_offset -= STACK - regsave_size;
406 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
407 /* Restore all regs */
408 ARM_POP_NWB (code, 0x5fff);
409 mono_add_unwind_op_same_value (unwind_ops, code, buf, ARMREG_LR);
410 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, regsave_size);
411 cfa_offset -= regsave_size;
412 g_assert (cfa_offset == 0);
413 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
414 /* We are in the parent frame, the exception is in ip */
415 ARM_MOV_REG_REG (code, ARMREG_R0, ARMREG_IP);
416 /*
417 * EH is initialized after trampolines, so get the address of the variable
418 * which contains throw_exception, and load it from there.
419 */
420 if (aot) {
421 /* Not really a jit icall */
422 code = mono_arm_emit_aotconst (&ji, code, buf, ARMREG_IP, MONO_PATCH_INFO_JIT_ICALL_ADDR, "throw_exception_addr");
423 } else {
424 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
425 ARM_B (code, 0);
426 *(gpointer*)code = mono_get_throw_exception_addr ();
427 code += 4;
428 }
429 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_IP, 0);
430 /* Branch to the throw trampoline */
431 /* lr contains the return address, the trampoline will use it as the throw site */
432 code = emit_bx (code, ARMREG_IP);
433
434 /* Flush instruction cache, since we've generated code */
435 mono_arch_flush_icache (buf, code - buf);
436 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_HELPER, NULL));
437
438 /* Sanity check */
439 g_assert ((code - buf) <= buf_len);
440
441 g_assert (info);
442 tramp_name = mono_get_generic_trampoline_name (tramp_type);
443 *info = mono_tramp_info_create (tramp_name, buf, code - buf, ji, unwind_ops);
444 g_free (tramp_name);
445
446 return buf;
447 }
448
449 #define SPEC_TRAMP_SIZE 24
450
451 gpointer
mono_arch_create_specific_trampoline(gpointer arg1,MonoTrampolineType tramp_type,MonoDomain * domain,guint32 * code_len)452 mono_arch_create_specific_trampoline (gpointer arg1, MonoTrampolineType tramp_type, MonoDomain *domain, guint32 *code_len)
453 {
454 guint8 *code, *buf, *tramp;
455 gpointer *constants;
456 guint32 short_branch = FALSE;
457 guint32 size = SPEC_TRAMP_SIZE;
458
459 tramp = mono_get_trampoline_code (tramp_type);
460
461 if (domain) {
462 mono_domain_lock (domain);
463 code = buf = mono_domain_code_reserve_align (domain, size, 4);
464 if ((short_branch = branch_for_target_reachable (code + 4, tramp))) {
465 size = 12;
466 mono_domain_code_commit (domain, code, SPEC_TRAMP_SIZE, size);
467 }
468 mono_domain_unlock (domain);
469 } else {
470 code = buf = mono_global_codeman_reserve (size);
471 short_branch = FALSE;
472 }
473
474 /* we could reduce this to 12 bytes if tramp is within reach:
475 * ARM_PUSH ()
476 * ARM_BL ()
477 * method-literal
478 * The called code can access method using the lr register
479 * A 20 byte sequence could be:
480 * ARM_PUSH ()
481 * ARM_MOV_REG_REG (lr, pc)
482 * ARM_LDR_IMM (pc, pc, 0)
483 * method-literal
484 * tramp-literal
485 */
486 /* We save all the registers, except PC and SP */
487 ARM_PUSH (code, 0x5fff);
488 if (short_branch) {
489 constants = (gpointer*)code;
490 constants [0] = GUINT_TO_POINTER (short_branch | (1 << 24));
491 constants [1] = arg1;
492 code += 8;
493 } else {
494 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_PC, 8); /* temp reg */
495 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
496 code = emit_bx (code, ARMREG_R1);
497
498 constants = (gpointer*)code;
499 constants [0] = arg1;
500 constants [1] = tramp;
501 code += 8;
502 }
503
504 /* Flush instruction cache, since we've generated code */
505 mono_arch_flush_icache (buf, code - buf);
506 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_SPECIFIC_TRAMPOLINE, mono_get_generic_trampoline_simple_name (tramp_type)));
507
508 g_assert ((code - buf) <= size);
509
510 if (code_len)
511 *code_len = code - buf;
512
513 return buf;
514 }
515
516 /*
517 * mono_arch_get_unbox_trampoline:
518 * @m: method pointer
519 * @addr: pointer to native code for @m
520 *
521 * when value type methods are called through the vtable we need to unbox the
522 * this argument. This method returns a pointer to a trampoline which does
523 * unboxing before calling the method
524 */
525 gpointer
mono_arch_get_unbox_trampoline(MonoMethod * m,gpointer addr)526 mono_arch_get_unbox_trampoline (MonoMethod *m, gpointer addr)
527 {
528 guint8 *code, *start;
529 MonoDomain *domain = mono_domain_get ();
530 GSList *unwind_ops;
531 guint32 size = 16;
532
533 start = code = mono_domain_code_reserve (domain, size);
534
535 unwind_ops = mono_arch_get_cie_program ();
536
537 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 4);
538 ARM_ADD_REG_IMM8 (code, ARMREG_R0, ARMREG_R0, sizeof (MonoObject));
539 code = emit_bx (code, ARMREG_IP);
540 *(guint32*)code = (guint32)addr;
541 code += 4;
542 mono_arch_flush_icache (start, code - start);
543 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_UNBOX_TRAMPOLINE, m));
544 g_assert ((code - start) <= size);
545 /*g_print ("unbox trampoline at %d for %s:%s\n", this_pos, m->klass->name, m->name);
546 g_print ("unbox code is at %p for method at %p\n", start, addr);*/
547
548 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, unwind_ops), domain);
549
550 return start;
551 }
552
553 gpointer
mono_arch_get_static_rgctx_trampoline(gpointer arg,gpointer addr)554 mono_arch_get_static_rgctx_trampoline (gpointer arg, gpointer addr)
555 {
556 guint8 *code, *start;
557 GSList *unwind_ops;
558 int buf_len = 16;
559 MonoDomain *domain = mono_domain_get ();
560
561 start = code = mono_domain_code_reserve (domain, buf_len);
562
563 unwind_ops = mono_arch_get_cie_program ();
564
565 ARM_LDR_IMM (code, MONO_ARCH_RGCTX_REG, ARMREG_PC, 0);
566 ARM_LDR_IMM (code, ARMREG_PC, ARMREG_PC, 0);
567 *(guint32*)code = (guint32)arg;
568 code += 4;
569 *(guint32*)code = (guint32)addr;
570 code += 4;
571
572 g_assert ((code - start) <= buf_len);
573
574 mono_arch_flush_icache (start, code - start);
575 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_GENERICS_TRAMPOLINE, NULL));
576
577 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, unwind_ops), domain);
578
579 return start;
580 }
581
582 gpointer
mono_arch_create_rgctx_lazy_fetch_trampoline(guint32 slot,MonoTrampInfo ** info,gboolean aot)583 mono_arch_create_rgctx_lazy_fetch_trampoline (guint32 slot, MonoTrampInfo **info, gboolean aot)
584 {
585 guint8 *tramp;
586 guint8 *code, *buf;
587 int tramp_size;
588 guint32 code_len;
589 guint8 **rgctx_null_jumps;
590 int depth, index;
591 int i, njumps;
592 gboolean mrgctx;
593 MonoJumpInfo *ji = NULL;
594 GSList *unwind_ops = NULL;
595
596 mrgctx = MONO_RGCTX_SLOT_IS_MRGCTX (slot);
597 index = MONO_RGCTX_SLOT_INDEX (slot);
598 if (mrgctx)
599 index += MONO_SIZEOF_METHOD_RUNTIME_GENERIC_CONTEXT / sizeof (gpointer);
600 for (depth = 0; ; ++depth) {
601 int size = mono_class_rgctx_get_array_size (depth, mrgctx);
602
603 if (index < size - 1)
604 break;
605 index -= size - 1;
606 }
607
608 tramp_size = 64 + 16 * depth;
609
610 code = buf = mono_global_codeman_reserve (tramp_size);
611
612 unwind_ops = mono_arch_get_cie_program ();
613
614 rgctx_null_jumps = g_malloc (sizeof (guint8*) * (depth + 2));
615 njumps = 0;
616
617 /* The vtable/mrgctx is in R0 */
618 g_assert (MONO_ARCH_VTABLE_REG == ARMREG_R0);
619
620 if (mrgctx) {
621 /* get mrgctx ptr */
622 ARM_MOV_REG_REG (code, ARMREG_R1, ARMREG_R0);
623 } else {
624 /* load rgctx ptr from vtable */
625 g_assert (arm_is_imm12 (MONO_STRUCT_OFFSET (MonoVTable, runtime_generic_context)));
626 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_R0, MONO_STRUCT_OFFSET (MonoVTable, runtime_generic_context));
627 /* is the rgctx ptr null? */
628 ARM_CMP_REG_IMM (code, ARMREG_R1, 0, 0);
629 /* if yes, jump to actual trampoline */
630 rgctx_null_jumps [njumps ++] = code;
631 ARM_B_COND (code, ARMCOND_EQ, 0);
632 }
633
634 for (i = 0; i < depth; ++i) {
635 /* load ptr to next array */
636 if (mrgctx && i == 0) {
637 g_assert (arm_is_imm12 (MONO_SIZEOF_METHOD_RUNTIME_GENERIC_CONTEXT));
638 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_R1, MONO_SIZEOF_METHOD_RUNTIME_GENERIC_CONTEXT);
639 } else {
640 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_R1, 0);
641 }
642 /* is the ptr null? */
643 ARM_CMP_REG_IMM (code, ARMREG_R1, 0, 0);
644 /* if yes, jump to actual trampoline */
645 rgctx_null_jumps [njumps ++] = code;
646 ARM_B_COND (code, ARMCOND_EQ, 0);
647 }
648
649 /* fetch slot */
650 code = mono_arm_emit_load_imm (code, ARMREG_R2, sizeof (gpointer) * (index + 1));
651 ARM_LDR_REG_REG (code, ARMREG_R1, ARMREG_R1, ARMREG_R2);
652 /* is the slot null? */
653 ARM_CMP_REG_IMM (code, ARMREG_R1, 0, 0);
654 /* if yes, jump to actual trampoline */
655 rgctx_null_jumps [njumps ++] = code;
656 ARM_B_COND (code, ARMCOND_EQ, 0);
657 /* otherwise return, result is in R1 */
658 ARM_MOV_REG_REG (code, ARMREG_R0, ARMREG_R1);
659 code = emit_bx (code, ARMREG_LR);
660
661 g_assert (njumps <= depth + 2);
662 for (i = 0; i < njumps; ++i)
663 arm_patch (rgctx_null_jumps [i], code);
664
665 g_free (rgctx_null_jumps);
666
667 /* Slowpath */
668
669 /* The vtable/mrgctx is still in R0 */
670
671 if (aot) {
672 ji = mono_patch_info_list_prepend (ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, g_strdup_printf ("specific_trampoline_lazy_fetch_%u", slot));
673 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_PC, 0);
674 ARM_B (code, 0);
675 *(gpointer*)code = NULL;
676 code += 4;
677 ARM_LDR_REG_REG (code, ARMREG_PC, ARMREG_PC, ARMREG_R1);
678 } else {
679 tramp = mono_arch_create_specific_trampoline (GUINT_TO_POINTER (slot), MONO_TRAMPOLINE_RGCTX_LAZY_FETCH, mono_get_root_domain (), &code_len);
680
681 /* Jump to the actual trampoline */
682 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_PC, 0); /* temp reg */
683 code = emit_bx (code, ARMREG_R1);
684 *(gpointer*)code = tramp;
685 code += 4;
686 }
687
688 mono_arch_flush_icache (buf, code - buf);
689 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_GENERICS_TRAMPOLINE, NULL));
690
691 g_assert (code - buf <= tramp_size);
692
693 char *name = mono_get_rgctx_fetch_trampoline_name (slot);
694 *info = mono_tramp_info_create (name, buf, code - buf, ji, unwind_ops);
695 g_free (name);
696
697 return buf;
698 }
699
700 gpointer
mono_arch_create_general_rgctx_lazy_fetch_trampoline(MonoTrampInfo ** info,gboolean aot)701 mono_arch_create_general_rgctx_lazy_fetch_trampoline (MonoTrampInfo **info, gboolean aot)
702 {
703 guint8 *code, *buf;
704 int tramp_size;
705 MonoJumpInfo *ji = NULL;
706 GSList *unwind_ops = NULL;
707
708 g_assert (aot);
709
710 tramp_size = 32;
711
712 code = buf = mono_global_codeman_reserve (tramp_size);
713
714 unwind_ops = mono_arch_get_cie_program ();
715
716 // FIXME: Currently, we always go to the slow path.
717 /* Load trampoline addr */
718 ARM_LDR_IMM (code, ARMREG_R1, MONO_ARCH_RGCTX_REG, 4);
719 /* The vtable/mrgctx is in R0 */
720 g_assert (MONO_ARCH_VTABLE_REG == ARMREG_R0);
721 code = emit_bx (code, ARMREG_R1);
722
723 mono_arch_flush_icache (buf, code - buf);
724 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_GENERICS_TRAMPOLINE, NULL));
725
726 g_assert (code - buf <= tramp_size);
727
728 *info = mono_tramp_info_create ("rgctx_fetch_trampoline_general", buf, code - buf, ji, unwind_ops);
729
730 return buf;
731 }
732
733 guint8*
mono_arch_create_sdb_trampoline(gboolean single_step,MonoTrampInfo ** info,gboolean aot)734 mono_arch_create_sdb_trampoline (gboolean single_step, MonoTrampInfo **info, gboolean aot)
735 {
736 guint8 *buf, *code;
737 GSList *unwind_ops = NULL;
738 MonoJumpInfo *ji = NULL;
739 int frame_size;
740
741 buf = code = mono_global_codeman_reserve (96);
742
743 /*
744 * Construct the MonoContext structure on the stack.
745 */
746
747 frame_size = sizeof (MonoContext);
748 frame_size = ALIGN_TO (frame_size, MONO_ARCH_FRAME_ALIGNMENT);
749 ARM_SUB_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, frame_size);
750
751 /* save ip, lr and pc into their correspodings ctx.regs slots. */
752 ARM_STR_IMM (code, ARMREG_IP, ARMREG_SP, MONO_STRUCT_OFFSET (MonoContext, regs) + sizeof (mgreg_t) * ARMREG_IP);
753 ARM_STR_IMM (code, ARMREG_LR, ARMREG_SP, MONO_STRUCT_OFFSET (MonoContext, regs) + 4 * ARMREG_LR);
754 ARM_STR_IMM (code, ARMREG_LR, ARMREG_SP, MONO_STRUCT_OFFSET (MonoContext, regs) + 4 * ARMREG_PC);
755
756 /* save r0..r10 and fp */
757 ARM_ADD_REG_IMM8 (code, ARMREG_IP, ARMREG_SP, MONO_STRUCT_OFFSET (MonoContext, regs));
758 ARM_STM (code, ARMREG_IP, 0x0fff);
759
760 /* now we can update fp. */
761 ARM_MOV_REG_REG (code, ARMREG_FP, ARMREG_SP);
762
763 /* make ctx.esp hold the actual value of sp at the beginning of this method. */
764 ARM_ADD_REG_IMM8 (code, ARMREG_R0, ARMREG_FP, frame_size);
765 ARM_STR_IMM (code, ARMREG_R0, ARMREG_IP, 4 * ARMREG_SP);
766 ARM_STR_IMM (code, ARMREG_R0, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, regs) + 4 * ARMREG_SP);
767
768 /* make ctx.eip hold the address of the call. */
769 //ARM_SUB_REG_IMM8 (code, ARMREG_LR, ARMREG_LR, 4);
770 ARM_STR_IMM (code, ARMREG_LR, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, pc));
771
772 /* r0 now points to the MonoContext */
773 ARM_MOV_REG_REG (code, ARMREG_R0, ARMREG_FP);
774
775 /* call */
776 if (aot) {
777 if (single_step)
778 ji = mono_patch_info_list_prepend (ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, "debugger_agent_single_step_from_context");
779 else
780 ji = mono_patch_info_list_prepend (ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, "debugger_agent_breakpoint_from_context");
781 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
782 ARM_B (code, 0);
783 *(gpointer*)code = NULL;
784 code += 4;
785 ARM_LDR_REG_REG (code, ARMREG_IP, ARMREG_PC, ARMREG_IP);
786 ARM_BLX_REG (code, ARMREG_IP);
787 } else {
788 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
789 ARM_B (code, 0);
790 if (single_step)
791 *(gpointer*)code = debugger_agent_single_step_from_context;
792 else
793 *(gpointer*)code = debugger_agent_breakpoint_from_context;
794 code += 4;
795 ARM_BLX_REG (code, ARMREG_IP);
796 }
797
798 /* we're back; save ctx.eip and ctx.esp into the corresponding regs slots. */
799 ARM_LDR_IMM (code, ARMREG_R0, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, pc));
800 ARM_STR_IMM (code, ARMREG_R0, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, regs) + 4 * ARMREG_LR);
801 ARM_STR_IMM (code, ARMREG_R0, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, regs) + 4 * ARMREG_PC);
802
803 /* make ip point to the regs array, then restore everything, including pc. */
804 ARM_ADD_REG_IMM8 (code, ARMREG_IP, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, regs));
805 ARM_LDM (code, ARMREG_IP, 0xffff);
806
807 mono_arch_flush_icache (buf, code - buf);
808 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_HELPER, NULL));
809
810 const char *tramp_name = single_step ? "sdb_single_step_trampoline" : "sdb_breakpoint_trampoline";
811 *info = mono_tramp_info_create (tramp_name, buf, code - buf, ji, unwind_ops);
812
813 return buf;
814 }
815
816 /*
817 * mono_arch_get_enter_icall_trampoline:
818 *
819 * See tramp-amd64.c for documentation.
820 */
821 gpointer
mono_arch_get_enter_icall_trampoline(MonoTrampInfo ** info)822 mono_arch_get_enter_icall_trampoline (MonoTrampInfo **info)
823 {
824 #ifndef DISABLE_INTERPRETER
825 const int gregs_num = INTERP_ICALL_TRAMP_IARGS;
826 const int fregs_num = INTERP_ICALL_TRAMP_FARGS;
827
828 guint8 *start = NULL, *code, *label_gexits [gregs_num], *label_fexits [fregs_num], *label_leave_tramp [3], *label_is_float_ret;
829 MonoJumpInfo *ji = NULL;
830 GSList *unwind_ops = NULL;
831 int buf_len, i, framesize, off_methodargs, off_targetaddr;
832 const int fp_reg = ARMREG_R7;
833
834 buf_len = 512 + 1024;
835 start = code = (guint8 *) mono_global_codeman_reserve (buf_len);
836
837 framesize = 5 * sizeof (mgreg_t); /* lr, r4, r8, r6 and plus one */
838
839 off_methodargs = -framesize;
840 framesize += sizeof (mgreg_t);
841
842 off_targetaddr = -framesize;
843 framesize += sizeof (mgreg_t);
844
845 framesize = ALIGN_TO (framesize + 4 * sizeof (mgreg_t), MONO_ARCH_FRAME_ALIGNMENT);
846
847 /* allocate space on stack for argument passing */
848 const int stack_space = ALIGN_TO (((gregs_num - ARMREG_R3) * sizeof (mgreg_t)), MONO_ARCH_FRAME_ALIGNMENT);
849
850 /* iOS ABI */
851 ARM_PUSH (code, (1 << fp_reg) | (1 << ARMREG_LR));
852 ARM_MOV_REG_REG (code, fp_reg, ARMREG_SP);
853
854 /* use r4, r8 and r6 as scratch registers */
855 ARM_PUSH (code, (1 << ARMREG_R4) | (1 << ARMREG_R8) | (1 << ARMREG_R6));
856 ARM_SUB_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, stack_space + framesize);
857
858 /* save InterpMethodArguments* onto stack */
859 ARM_STR_IMM (code, ARMREG_R1, fp_reg, off_methodargs);
860
861 /* save target address onto stack */
862 ARM_STR_IMM (code, ARMREG_R0, fp_reg, off_targetaddr);
863
864 /* load pointer to InterpMethodArguments* into r4 */
865 ARM_MOV_REG_REG (code, ARMREG_R4, ARMREG_R1);
866
867 /* move flen into r8 */
868 ARM_LDR_IMM (code, ARMREG_R8, ARMREG_R4, MONO_STRUCT_OFFSET (InterpMethodArguments, flen));
869 /* load pointer to fargs into r6 */
870 ARM_LDR_IMM (code, ARMREG_R6, ARMREG_R4, MONO_STRUCT_OFFSET (InterpMethodArguments, fargs));
871
872 for (i = 0; i < fregs_num; ++i) {
873 ARM_CMP_REG_IMM (code, ARMREG_R8, 0, 0);
874 label_fexits [i] = code;
875 ARM_B_COND (code, ARMCOND_EQ, 0);
876
877 g_assert (i <= ARM_VFP_D7); /* otherwise, need to pass args on stack */
878 ARM_FLDD (code, i, ARMREG_R6, i * sizeof (double));
879 ARM_SUB_REG_IMM8 (code, ARMREG_R8, ARMREG_R8, 1);
880 }
881
882 for (i = 0; i < fregs_num; i++)
883 arm_patch (label_fexits [i], code);
884
885 /* move ilen into r8 */
886 ARM_LDR_IMM (code, ARMREG_R8, ARMREG_R4, MONO_STRUCT_OFFSET (InterpMethodArguments, ilen));
887 /* load pointer to iargs into r6 */
888 ARM_LDR_IMM (code, ARMREG_R6, ARMREG_R4, MONO_STRUCT_OFFSET (InterpMethodArguments, iargs));
889
890 int stack_offset = 0;
891 for (i = 0; i < gregs_num; i++) {
892 ARM_CMP_REG_IMM (code, ARMREG_R8, 0, 0);
893 label_gexits [i] = code;
894 ARM_B_COND (code, ARMCOND_EQ, 0);
895
896 if (i <= ARMREG_R3) {
897 ARM_LDR_IMM (code, i, ARMREG_R6, i * sizeof (mgreg_t));
898 } else {
899 ARM_LDR_IMM (code, ARMREG_R4, ARMREG_R6, i * sizeof (mgreg_t));
900 ARM_STR_IMM (code, ARMREG_R4, ARMREG_SP, stack_offset);
901 stack_offset += sizeof (mgreg_t);
902 }
903 ARM_SUB_REG_IMM8 (code, ARMREG_R8, ARMREG_R8, 1);
904 }
905
906 for (i = 0; i < gregs_num; i++)
907 arm_patch (label_gexits [i], code);
908
909 /* load target addr */
910 ARM_LDR_IMM (code, ARMREG_R4, fp_reg, off_targetaddr);
911
912 /* call into native function */
913 ARM_BLX_REG (code, ARMREG_R4);
914
915 /* load InterpMethodArguments */
916 ARM_LDR_IMM (code, ARMREG_R4, fp_reg, off_methodargs);
917
918 /* load is_float_ret */
919 ARM_LDR_IMM (code, ARMREG_R8, ARMREG_R4, MONO_STRUCT_OFFSET (InterpMethodArguments, is_float_ret));
920
921 /* check if a float return value is expected */
922 ARM_CMP_REG_IMM (code, ARMREG_R8, 0, 0);
923 label_is_float_ret = code;
924 ARM_B_COND (code, ARMCOND_NE, 0);
925
926 /* greg return */
927 /* load retval */
928 ARM_LDR_IMM (code, ARMREG_R8, ARMREG_R4, MONO_STRUCT_OFFSET (InterpMethodArguments, retval));
929
930 ARM_CMP_REG_IMM (code, ARMREG_R8, 0, 0);
931 label_leave_tramp [0] = code;
932 ARM_B_COND (code, ARMCOND_EQ, 0);
933
934 /* store greg result, always write back 64bit */
935 ARM_STR_IMM (code, ARMREG_R0, ARMREG_R8, 0);
936 ARM_STR_IMM (code, ARMREG_R1, ARMREG_R8, 4);
937
938 label_leave_tramp [1] = code;
939 ARM_B_COND (code, ARMCOND_AL, 0);
940
941 /* freg return */
942 arm_patch (label_is_float_ret, code);
943 /* load retval */
944 ARM_LDR_IMM (code, ARMREG_R8, ARMREG_R4, MONO_STRUCT_OFFSET (InterpMethodArguments, retval));
945
946 ARM_CMP_REG_IMM (code, ARMREG_R8, 0, 0);
947 label_leave_tramp [2] = code;
948 ARM_B_COND (code, ARMCOND_EQ, 0);
949
950 /* store freg result */
951 ARM_FSTD (code, ARM_VFP_F0, ARMREG_R8, 0);
952
953 for (i = 0; i < 3; i++)
954 arm_patch (label_leave_tramp [i], code);
955
956 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, stack_space + framesize);
957 ARM_POP (code, (1 << ARMREG_R4) | (1 << ARMREG_R8) | (1 << ARMREG_R6));
958 ARM_MOV_REG_REG (code, ARMREG_SP, fp_reg);
959 ARM_POP (code, (1 << fp_reg) | (1 << ARMREG_PC));
960
961 g_assert (code - start < buf_len);
962
963 mono_arch_flush_icache (start, code - start);
964 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_EXCEPTION_HANDLING, NULL));
965
966 if (info)
967 *info = mono_tramp_info_create ("enter_icall_trampoline", start, code - start, ji, unwind_ops);
968
969 return start;
970 #else
971 g_assert_not_reached ();
972 return NULL;
973 #endif /* DISABLE_INTERPRETER */
974 }
975
976 #else
977
978 guchar*
mono_arch_create_generic_trampoline(MonoTrampolineType tramp_type,MonoTrampInfo ** info,gboolean aot)979 mono_arch_create_generic_trampoline (MonoTrampolineType tramp_type, MonoTrampInfo **info, gboolean aot)
980 {
981 g_assert_not_reached ();
982 return NULL;
983 }
984
985 gpointer
mono_arch_create_specific_trampoline(gpointer arg1,MonoTrampolineType tramp_type,MonoDomain * domain,guint32 * code_len)986 mono_arch_create_specific_trampoline (gpointer arg1, MonoTrampolineType tramp_type, MonoDomain *domain, guint32 *code_len)
987 {
988 g_assert_not_reached ();
989 return NULL;
990 }
991
992 gpointer
mono_arch_get_unbox_trampoline(MonoMethod * m,gpointer addr)993 mono_arch_get_unbox_trampoline (MonoMethod *m, gpointer addr)
994 {
995 g_assert_not_reached ();
996 return NULL;
997 }
998
999 gpointer
mono_arch_get_static_rgctx_trampoline(gpointer arg,gpointer addr)1000 mono_arch_get_static_rgctx_trampoline (gpointer arg, gpointer addr)
1001 {
1002 g_assert_not_reached ();
1003 return NULL;
1004 }
1005
1006 gpointer
mono_arch_create_rgctx_lazy_fetch_trampoline(guint32 slot,MonoTrampInfo ** info,gboolean aot)1007 mono_arch_create_rgctx_lazy_fetch_trampoline (guint32 slot, MonoTrampInfo **info, gboolean aot)
1008 {
1009 g_assert_not_reached ();
1010 return NULL;
1011 }
1012
1013 guint8*
mono_arch_create_sdb_trampoline(gboolean single_step,MonoTrampInfo ** info,gboolean aot)1014 mono_arch_create_sdb_trampoline (gboolean single_step, MonoTrampInfo **info, gboolean aot)
1015 {
1016 g_assert_not_reached ();
1017 return NULL;
1018 }
1019
1020 gpointer
mono_arch_get_enter_icall_trampoline(MonoTrampInfo ** info)1021 mono_arch_get_enter_icall_trampoline (MonoTrampInfo **info)
1022 {
1023 g_assert_not_reached ();
1024 return NULL;
1025 }
1026 #endif /* DISABLE_JIT */
1027
1028 guint8*
mono_arch_get_call_target(guint8 * code)1029 mono_arch_get_call_target (guint8 *code)
1030 {
1031 guint32 ins = ((guint32*)(gpointer)code) [-1];
1032
1033 /* Should be a 'bl' or a 'b' */
1034 if (((ins >> 25) & 0x7) == 0x5) {
1035 gint32 disp = ((((gint32)ins) & 0xffffff) << 8) >> 8;
1036 guint8 *target = code - 4 + 8 + (disp * 4);
1037
1038 return target;
1039 } else {
1040 return NULL;
1041 }
1042 }
1043
1044 guint32
mono_arch_get_plt_info_offset(guint8 * plt_entry,mgreg_t * regs,guint8 * code)1045 mono_arch_get_plt_info_offset (guint8 *plt_entry, mgreg_t *regs, guint8 *code)
1046 {
1047 /* The offset is stored as the 4th word of the plt entry */
1048 return ((guint32*)plt_entry) [3];
1049 }
1050
1051 /*
1052 * Return the address of the PLT entry called by the thumb code CODE.
1053 */
1054 guint8*
mono_arm_get_thumb_plt_entry(guint8 * code)1055 mono_arm_get_thumb_plt_entry (guint8 *code)
1056 {
1057 int s, j1, j2, imm10, imm11, i1, i2, imm32;
1058 guint8 *bl, *base;
1059 guint16 t1, t2;
1060 guint8 *target;
1061
1062 /* code should be right after a BL */
1063 code = (guint8*)((mgreg_t)code & ~1);
1064 base = (guint8*)((mgreg_t)code & ~3);
1065 bl = code - 4;
1066 t1 = ((guint16*)bl) [0];
1067 t2 = ((guint16*)bl) [1];
1068
1069 g_assert ((t1 >> 11) == 0x1e);
1070
1071 s = (t1 >> 10) & 0x1;
1072 imm10 = (t1 >> 0) & 0x3ff;
1073 j1 = (t2 >> 13) & 0x1;
1074 j2 = (t2 >> 11) & 0x1;
1075 imm11 = t2 & 0x7ff;
1076
1077 i1 = (s ^ j1) ? 0 : 1;
1078 i2 = (s ^ j2) ? 0 : 1;
1079
1080 imm32 = (imm11 << 1) | (imm10 << 12) | (i2 << 22) | (i1 << 23);
1081 if (s)
1082 /* Sign extend from 24 bits to 32 bits */
1083 imm32 = ((gint32)imm32 << 8) >> 8;
1084
1085 target = code + imm32;
1086
1087 /* target now points to the thumb plt entry */
1088 /* ldr.w r12, [pc, #8] */
1089 g_assert (((guint16*)target) [0] == 0xf8df);
1090 g_assert (((guint16*)target) [1] == 0xc008);
1091
1092 /*
1093 * The PLT info offset is at offset 16, but mono_arch_get_plt_entry_offset () returns
1094 * the 3rd word, so compensate by returning a different value.
1095 */
1096 target += 4;
1097
1098 return target;
1099 }
1100
1101 #ifndef DISABLE_JIT
1102
1103 /*
1104 * mono_arch_get_gsharedvt_arg_trampoline:
1105 *
1106 * See tramp-x86.c for documentation.
1107 */
1108 gpointer
mono_arch_get_gsharedvt_arg_trampoline(MonoDomain * domain,gpointer arg,gpointer addr)1109 mono_arch_get_gsharedvt_arg_trampoline (MonoDomain *domain, gpointer arg, gpointer addr)
1110 {
1111 guint8 *code, *buf;
1112 int buf_len;
1113 gpointer *constants;
1114
1115 buf_len = 24;
1116
1117 buf = code = mono_domain_code_reserve (domain, buf_len);
1118
1119 /* Similar to the specialized trampoline code */
1120 ARM_PUSH (code, (1 << ARMREG_R0) | (1 << ARMREG_R1) | (1 << ARMREG_R2) | (1 << ARMREG_R3) | (1 << ARMREG_LR));
1121 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 8);
1122 /* arg is passed in LR */
1123 ARM_LDR_IMM (code, ARMREG_LR, ARMREG_PC, 0);
1124 code = emit_bx (code, ARMREG_IP);
1125 constants = (gpointer*)code;
1126 constants [0] = arg;
1127 constants [1] = addr;
1128 code += 8;
1129
1130 g_assert ((code - buf) <= buf_len);
1131
1132 mono_arch_flush_icache (buf, code - buf);
1133 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_GENERICS_TRAMPOLINE, NULL));
1134
1135 mono_tramp_info_register (mono_tramp_info_create (NULL, buf, code - buf, NULL, NULL), domain);
1136
1137 return buf;
1138 }
1139
1140 #else
1141
1142 gpointer
mono_arch_get_gsharedvt_arg_trampoline(MonoDomain * domain,gpointer arg,gpointer addr)1143 mono_arch_get_gsharedvt_arg_trampoline (MonoDomain *domain, gpointer arg, gpointer addr)
1144 {
1145 g_assert_not_reached ();
1146 return NULL;
1147 }
1148
1149 #endif
1150