1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK4
8 
9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK6
12 
13 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK7
14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
15 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK8
16 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK10
19 
20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK11
21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK12
23 
24 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region)
25 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
26 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK13
27 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
28 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK14
29 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
30 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK15
31 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
32 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK16
33 
34 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
35 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK17
36 
37 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
38 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK18
39 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
40 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK19
41 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
42 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK20
43 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
44 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK21
45 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
46 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK22
47 
48 // expected-no-diagnostics
49 #ifndef HEADER
50 #define HEADER
51 
52 struct St {
53   int a, b;
StSt54   St() : a(0), b(0) {}
StSt55   St(const St &st) : a(st.a + st.b), b(0) {}
~StSt56   ~St() {}
57 };
58 
59 volatile int g = 1212;
60 volatile int &g1 = g;
61 
62 template <class T>
63 struct S {
64   T f;
SS65   S(T a) : f(a + g) {}
SS66   S() : f(g) {}
SS67   S(const S &s, St t = St()) : f(s.f + t.a) {}
operator TS68   operator T() { return T(); }
~SS69   ~S() {}
70 };
71 
72 
73 template <typename T>
tmain()74 T tmain() {
75   S<T> test;
76   T t_var = T();
77   T vec[] = {1, 2};
78   S<T> s_arr[] = {1, 2};
79   S<T> &var = test;
80 #pragma omp target teams distribute parallel for simd private(t_var, vec, s_arr, var)
81   for (int i = 0; i < 2; ++i) {
82     vec[i] = t_var;
83     s_arr[i] = var;
84   }
85   return T();
86 }
87 
88 // HCHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
89 S<float> test;
90 // HCHECK-DAG: [[T_VAR:@.+]] ={{.+}} global i{{[0-9]+}} 333,
91 int t_var = 333;
92 // HCHECK-DAG: [[VEC:@.+]] ={{.+}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
93 int vec[] = {1, 2};
94 // HCHECK-DAG: [[S_ARR:@.+]] ={{.+}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
95 S<float> s_arr[] = {1, 2};
96 // HCHECK-DAG: [[VAR:@.+]] ={{.+}} global [[S_FLOAT_TY]] zeroinitializer,
97 S<float> var(3);
98 // HCHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
99 
main()100 int main() {
101   static int sivar;
102 #ifdef LAMBDA
103   [&]() {
104 #pragma omp target teams distribute parallel for simd private(g, g1, sivar)
105   for (int i = 0; i < 2; ++i) {
106 
107     // Skip global, bound tid and loop vars
108 
109     g = 1;
110     g1 = 1;
111     sivar = 2;
112 
113     // Skip global, bound tid and loop vars
114     [&]() {
115       g = 2;
116       g1 = 2;
117       sivar = 4;
118 
119     }();
120   }
121   }();
122   return 0;
123 #else
124 #pragma omp target teams distribute parallel for simd private(t_var, vec, s_arr, var, sivar)
125   for (int i = 0; i < 2; ++i) {
126     vec[i] = t_var;
127     s_arr[i] = var;
128     sivar += i;
129   }
130   return tmain<int>();
131 #endif
132 }
133 
134 // HCHECK: define {{.*}}i{{[0-9]+}} @main()
135 // HCHECK: call i32 @__tgt_target_teams_mapper(%struct.ident_t* @{{.+}}, i64 -1, i8* @{{[^,]+}}, i32 0, i8** null, i8** null, {{.+}} null, {{.+}} null, i8** null, i8** null, i32 0, i32 0)
136 // HCHECK: call void @[[OFFL1:.+]]()
137 // HCHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]()
138 // HCHECK:  ret
139 
140 // HCHECK: define{{.*}} void @[[OFFL1]]()
141 
142 // Skip global, bound tid and loop vars
143 
144 // private(s_arr)
145 
146 // private(var)
147 
148 
149 // Skip global, bound tid and loop vars
150 
151 // private(s_arr)
152 
153 // private(var)
154 
155 
156 // HCHECK: define{{.*}} i{{[0-9]+}} @[[TMAIN_INT]]()
157 // HCHECK: call i32 @__tgt_target_teams_mapper(%struct.ident_t* @{{.+}}, i64 -1, i8* @{{[^,]+}}, i32 0,
158 // HCHECK: call void @[[TOFFL1:.+]]()
159 // HCHECK: ret
160 
161 // HCHECK: define {{.*}}void @[[TOFFL1]]()
162 
163 // Skip global, bound tid and loop vars
164 
165 // private(s_arr)
166 
167 
168 // private(var)
169 
170 
171 // Skip global, bound tid and loop vars
172 // prev lb and ub
173 // iter variables
174 
175 // private(s_arr)
176 
177 
178 // private(var)
179 
180 
181 
182 #endif
183 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init
184 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
185 // CHECK1-NEXT:  entry:
186 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
187 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
188 // CHECK1-NEXT:    ret void
189 //
190 //
191 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
192 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
193 // CHECK1-NEXT:  entry:
194 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
195 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
196 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
197 // CHECK1-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
198 // CHECK1-NEXT:    ret void
199 //
200 //
201 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
202 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
203 // CHECK1-NEXT:  entry:
204 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
205 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
206 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
207 // CHECK1-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
208 // CHECK1-NEXT:    ret void
209 //
210 //
211 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
212 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
213 // CHECK1-NEXT:  entry:
214 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
215 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
216 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
217 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
218 // CHECK1-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
219 // CHECK1-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
220 // CHECK1-NEXT:    store float [[CONV]], float* [[F]], align 4
221 // CHECK1-NEXT:    ret void
222 //
223 //
224 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
225 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
226 // CHECK1-NEXT:  entry:
227 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
228 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
229 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
230 // CHECK1-NEXT:    ret void
231 //
232 //
233 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
234 // CHECK1-SAME: () #[[ATTR0]] {
235 // CHECK1-NEXT:  entry:
236 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
237 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
238 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
239 // CHECK1-NEXT:    ret void
240 //
241 //
242 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
243 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
244 // CHECK1-NEXT:  entry:
245 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
246 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
247 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
248 // CHECK1-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
249 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
250 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
251 // CHECK1-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
252 // CHECK1-NEXT:    ret void
253 //
254 //
255 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
256 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
257 // CHECK1-NEXT:  entry:
258 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
259 // CHECK1-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
260 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
261 // CHECK1:       arraydestroy.body:
262 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
263 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
264 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
265 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
266 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
267 // CHECK1:       arraydestroy.done1:
268 // CHECK1-NEXT:    ret void
269 //
270 //
271 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
272 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
273 // CHECK1-NEXT:  entry:
274 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
275 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
276 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
277 // CHECK1-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
278 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
279 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
280 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
281 // CHECK1-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
282 // CHECK1-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
283 // CHECK1-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
284 // CHECK1-NEXT:    store float [[ADD]], float* [[F]], align 4
285 // CHECK1-NEXT:    ret void
286 //
287 //
288 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
289 // CHECK1-SAME: () #[[ATTR0]] {
290 // CHECK1-NEXT:  entry:
291 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
292 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
293 // CHECK1-NEXT:    ret void
294 //
295 //
296 // CHECK1-LABEL: define {{[^@]+}}@main
297 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
298 // CHECK1-NEXT:  entry:
299 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
300 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
301 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
302 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
303 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
304 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
305 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
306 // CHECK1:       omp_offload.failed:
307 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124() #[[ATTR2]]
308 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
309 // CHECK1:       omp_offload.cont:
310 // CHECK1-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
311 // CHECK1-NEXT:    ret i32 [[CALL]]
312 //
313 //
314 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124
315 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
316 // CHECK1-NEXT:  entry:
317 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
318 // CHECK1-NEXT:    ret void
319 //
320 //
321 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
322 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {
323 // CHECK1-NEXT:  entry:
324 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
325 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
326 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
327 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
328 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
329 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
330 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
331 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
332 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
333 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
334 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
335 // CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
336 // CHECK1-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
337 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
338 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
339 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
340 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
341 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
342 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
343 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
344 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
345 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
346 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
347 // CHECK1:       arrayctor.loop:
348 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
349 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
350 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
351 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
352 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
353 // CHECK1:       arrayctor.cont:
354 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
355 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
356 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
357 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
358 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
359 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
360 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
361 // CHECK1:       cond.true:
362 // CHECK1-NEXT:    br label [[COND_END:%.*]]
363 // CHECK1:       cond.false:
364 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
365 // CHECK1-NEXT:    br label [[COND_END]]
366 // CHECK1:       cond.end:
367 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
368 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
369 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
370 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
371 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
372 // CHECK1:       omp.inner.for.cond:
373 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
374 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
375 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
376 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
377 // CHECK1:       omp.inner.for.cond.cleanup:
378 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
379 // CHECK1:       omp.inner.for.body:
380 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
381 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
382 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
383 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
384 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
385 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
386 // CHECK1:       omp.inner.for.inc:
387 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
388 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
389 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
390 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
391 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
392 // CHECK1:       omp.inner.for.end:
393 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
394 // CHECK1:       omp.loop.exit:
395 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
396 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
397 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
398 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
399 // CHECK1-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
400 // CHECK1-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
401 // CHECK1:       .omp.final.then:
402 // CHECK1-NEXT:    store i32 2, i32* [[I]], align 4
403 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
404 // CHECK1:       .omp.final.done:
405 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
406 // CHECK1-NEXT:    [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
407 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2
408 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
409 // CHECK1:       arraydestroy.body:
410 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
411 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
412 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
413 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
414 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
415 // CHECK1:       arraydestroy.done3:
416 // CHECK1-NEXT:    ret void
417 //
418 //
419 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
420 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {
421 // CHECK1-NEXT:  entry:
422 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
423 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
424 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
425 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
426 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
427 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
428 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
429 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
430 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
431 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
432 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
433 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
434 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
435 // CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
436 // CHECK1-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
437 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
438 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
439 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
440 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
441 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
442 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
443 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
444 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
445 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
446 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
447 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
448 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
449 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
450 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
451 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
452 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
453 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
454 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
455 // CHECK1:       arrayctor.loop:
456 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
457 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
458 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
459 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
460 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
461 // CHECK1:       arrayctor.cont:
462 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
463 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
464 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
465 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
466 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
467 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
468 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
469 // CHECK1:       cond.true:
470 // CHECK1-NEXT:    br label [[COND_END:%.*]]
471 // CHECK1:       cond.false:
472 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
473 // CHECK1-NEXT:    br label [[COND_END]]
474 // CHECK1:       cond.end:
475 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
476 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
477 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
478 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
479 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
480 // CHECK1:       omp.inner.for.cond:
481 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
482 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
483 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
484 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
485 // CHECK1:       omp.inner.for.cond.cleanup:
486 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
487 // CHECK1:       omp.inner.for.body:
488 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
489 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
490 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
491 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
492 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
493 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
494 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
495 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
496 // CHECK1-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
497 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4
498 // CHECK1-NEXT:    [[IDXPROM3:%.*]] = sext i32 [[TMP12]] to i64
499 // CHECK1-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM3]]
500 // CHECK1-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8*
501 // CHECK1-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[VAR]] to i8*
502 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false)
503 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
504 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[SIVAR]], align 4
505 // CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP15]]
506 // CHECK1-NEXT:    store i32 [[ADD5]], i32* [[SIVAR]], align 4
507 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
508 // CHECK1:       omp.body.continue:
509 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
510 // CHECK1:       omp.inner.for.inc:
511 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
512 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
513 // CHECK1-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
514 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
515 // CHECK1:       omp.inner.for.end:
516 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
517 // CHECK1:       omp.loop.exit:
518 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
519 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
520 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
521 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
522 // CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
523 // CHECK1-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
524 // CHECK1:       .omp.final.then:
525 // CHECK1-NEXT:    store i32 2, i32* [[I]], align 4
526 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
527 // CHECK1:       .omp.final.done:
528 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
529 // CHECK1-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
530 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2
531 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
532 // CHECK1:       arraydestroy.body:
533 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP22]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
534 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
535 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
536 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
537 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
538 // CHECK1:       arraydestroy.done8:
539 // CHECK1-NEXT:    ret void
540 //
541 //
542 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
543 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat {
544 // CHECK1-NEXT:  entry:
545 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
546 // CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
547 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
548 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
549 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
550 // CHECK1-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
551 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
552 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
553 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
554 // CHECK1-NEXT:    store i32 0, i32* [[T_VAR]], align 4
555 // CHECK1-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
556 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
557 // CHECK1-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
558 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
559 // CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
560 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
561 // CHECK1-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
562 // CHECK1-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
563 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
564 // CHECK1-NEXT:    [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
565 // CHECK1-NEXT:    [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
566 // CHECK1-NEXT:    br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
567 // CHECK1:       omp_offload.failed:
568 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80() #[[ATTR2]]
569 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
570 // CHECK1:       omp_offload.cont:
571 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
572 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
573 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
574 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
575 // CHECK1:       arraydestroy.body:
576 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
577 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
578 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
579 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
580 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
581 // CHECK1:       arraydestroy.done2:
582 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
583 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
584 // CHECK1-NEXT:    ret i32 [[TMP4]]
585 //
586 //
587 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
588 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
589 // CHECK1-NEXT:  entry:
590 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
591 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
592 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
593 // CHECK1-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
594 // CHECK1-NEXT:    ret void
595 //
596 //
597 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
598 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
599 // CHECK1-NEXT:  entry:
600 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
601 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
602 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
603 // CHECK1-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
604 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
605 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
606 // CHECK1-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
607 // CHECK1-NEXT:    ret void
608 //
609 //
610 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80
611 // CHECK1-SAME: () #[[ATTR4]] {
612 // CHECK1-NEXT:  entry:
613 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
614 // CHECK1-NEXT:    ret void
615 //
616 //
617 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
618 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {
619 // CHECK1-NEXT:  entry:
620 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
621 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
622 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
623 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
624 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
625 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
626 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
627 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
628 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
629 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
630 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
631 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
632 // CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
633 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 8
634 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
635 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
636 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
637 // CHECK1-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
638 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
639 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
640 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
641 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
642 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
643 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
644 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
645 // CHECK1:       arrayctor.loop:
646 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
647 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
648 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
649 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
650 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
651 // CHECK1:       arrayctor.cont:
652 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
653 // CHECK1-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8
654 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
655 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
656 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
657 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
658 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
659 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
660 // CHECK1:       cond.true:
661 // CHECK1-NEXT:    br label [[COND_END:%.*]]
662 // CHECK1:       cond.false:
663 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
664 // CHECK1-NEXT:    br label [[COND_END]]
665 // CHECK1:       cond.end:
666 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
667 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
668 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
669 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
670 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
671 // CHECK1:       omp.inner.for.cond:
672 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
673 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
674 // CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
675 // CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
676 // CHECK1:       omp.inner.for.cond.cleanup:
677 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
678 // CHECK1:       omp.inner.for.body:
679 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
680 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
681 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
682 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
683 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
684 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
685 // CHECK1:       omp.inner.for.inc:
686 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
687 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
688 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
689 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
690 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
691 // CHECK1:       omp.inner.for.end:
692 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
693 // CHECK1:       omp.loop.exit:
694 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
695 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
696 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
697 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
698 // CHECK1-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
699 // CHECK1-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
700 // CHECK1:       .omp.final.then:
701 // CHECK1-NEXT:    store i32 2, i32* [[I]], align 4
702 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
703 // CHECK1:       .omp.final.done:
704 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
705 // CHECK1-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
706 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2
707 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
708 // CHECK1:       arraydestroy.body:
709 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
710 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
711 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
712 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
713 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
714 // CHECK1:       arraydestroy.done5:
715 // CHECK1-NEXT:    ret void
716 //
717 //
718 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
719 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {
720 // CHECK1-NEXT:  entry:
721 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
722 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
723 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
724 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
725 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
726 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
727 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
728 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
729 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
730 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
731 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
732 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
733 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
734 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
735 // CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
736 // CHECK1-NEXT:    [[_TMP3:%.*]] = alloca %struct.S.0*, align 8
737 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
738 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
739 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
740 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
741 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
742 // CHECK1-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
743 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
744 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
745 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
746 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
747 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
748 // CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
749 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
750 // CHECK1-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
751 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
752 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
753 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
754 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
755 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
756 // CHECK1:       arrayctor.loop:
757 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
758 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
759 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
760 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
761 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
762 // CHECK1:       arrayctor.cont:
763 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
764 // CHECK1-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8
765 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
766 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
767 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
768 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
769 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
770 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
771 // CHECK1:       cond.true:
772 // CHECK1-NEXT:    br label [[COND_END:%.*]]
773 // CHECK1:       cond.false:
774 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
775 // CHECK1-NEXT:    br label [[COND_END]]
776 // CHECK1:       cond.end:
777 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
778 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
779 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
780 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
781 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
782 // CHECK1:       omp.inner.for.cond:
783 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
784 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
785 // CHECK1-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
786 // CHECK1-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
787 // CHECK1:       omp.inner.for.cond.cleanup:
788 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
789 // CHECK1:       omp.inner.for.body:
790 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
791 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
792 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
793 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
794 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
795 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
796 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
797 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
798 // CHECK1-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
799 // CHECK1-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8
800 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
801 // CHECK1-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64
802 // CHECK1-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]]
803 // CHECK1-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8*
804 // CHECK1-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
805 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
806 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
807 // CHECK1:       omp.body.continue:
808 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
809 // CHECK1:       omp.inner.for.inc:
810 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
811 // CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
812 // CHECK1-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
813 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
814 // CHECK1:       omp.inner.for.end:
815 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
816 // CHECK1:       omp.loop.exit:
817 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
818 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
819 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
820 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
821 // CHECK1-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
822 // CHECK1-NEXT:    br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
823 // CHECK1:       .omp.final.then:
824 // CHECK1-NEXT:    store i32 2, i32* [[I]], align 4
825 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
826 // CHECK1:       .omp.final.done:
827 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
828 // CHECK1-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
829 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2
830 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
831 // CHECK1:       arraydestroy.body:
832 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
833 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
834 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
835 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]
836 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]
837 // CHECK1:       arraydestroy.done9:
838 // CHECK1-NEXT:    ret void
839 //
840 //
841 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
842 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
843 // CHECK1-NEXT:  entry:
844 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
845 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
846 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
847 // CHECK1-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
848 // CHECK1-NEXT:    ret void
849 //
850 //
851 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
852 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
853 // CHECK1-NEXT:  entry:
854 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
855 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
856 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
857 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
858 // CHECK1-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
859 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
860 // CHECK1-NEXT:    ret void
861 //
862 //
863 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
864 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
865 // CHECK1-NEXT:  entry:
866 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
867 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
868 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
869 // CHECK1-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
870 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
871 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
872 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
873 // CHECK1-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
874 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
875 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
876 // CHECK1-NEXT:    ret void
877 //
878 //
879 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
880 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
881 // CHECK1-NEXT:  entry:
882 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
883 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
884 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
885 // CHECK1-NEXT:    ret void
886 //
887 //
888 // CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
889 // CHECK1-SAME: () #[[ATTR0]] {
890 // CHECK1-NEXT:  entry:
891 // CHECK1-NEXT:    call void @__cxx_global_var_init()
892 // CHECK1-NEXT:    call void @__cxx_global_var_init.1()
893 // CHECK1-NEXT:    call void @__cxx_global_var_init.2()
894 // CHECK1-NEXT:    ret void
895 //
896 //
897 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
898 // CHECK1-SAME: () #[[ATTR0]] {
899 // CHECK1-NEXT:  entry:
900 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
901 // CHECK1-NEXT:    ret void
902 //
903 //
904 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init
905 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
906 // CHECK2-NEXT:  entry:
907 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
908 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
909 // CHECK2-NEXT:    ret void
910 //
911 //
912 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
913 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
914 // CHECK2-NEXT:  entry:
915 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
916 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
917 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
918 // CHECK2-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
919 // CHECK2-NEXT:    ret void
920 //
921 //
922 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
923 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
924 // CHECK2-NEXT:  entry:
925 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
926 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
927 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
928 // CHECK2-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
929 // CHECK2-NEXT:    ret void
930 //
931 //
932 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
933 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
934 // CHECK2-NEXT:  entry:
935 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
936 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
937 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
938 // CHECK2-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
939 // CHECK2-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
940 // CHECK2-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
941 // CHECK2-NEXT:    store float [[CONV]], float* [[F]], align 4
942 // CHECK2-NEXT:    ret void
943 //
944 //
945 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
946 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
947 // CHECK2-NEXT:  entry:
948 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
949 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
950 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
951 // CHECK2-NEXT:    ret void
952 //
953 //
954 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
955 // CHECK2-SAME: () #[[ATTR0]] {
956 // CHECK2-NEXT:  entry:
957 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
958 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
959 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
960 // CHECK2-NEXT:    ret void
961 //
962 //
963 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
964 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
965 // CHECK2-NEXT:  entry:
966 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
967 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
968 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
969 // CHECK2-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
970 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
971 // CHECK2-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
972 // CHECK2-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
973 // CHECK2-NEXT:    ret void
974 //
975 //
976 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
977 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
978 // CHECK2-NEXT:  entry:
979 // CHECK2-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
980 // CHECK2-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
981 // CHECK2-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
982 // CHECK2:       arraydestroy.body:
983 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
984 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
985 // CHECK2-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
986 // CHECK2-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
987 // CHECK2-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
988 // CHECK2:       arraydestroy.done1:
989 // CHECK2-NEXT:    ret void
990 //
991 //
992 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
993 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
994 // CHECK2-NEXT:  entry:
995 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
996 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
997 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
998 // CHECK2-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
999 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1000 // CHECK2-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1001 // CHECK2-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1002 // CHECK2-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
1003 // CHECK2-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
1004 // CHECK2-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
1005 // CHECK2-NEXT:    store float [[ADD]], float* [[F]], align 4
1006 // CHECK2-NEXT:    ret void
1007 //
1008 //
1009 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
1010 // CHECK2-SAME: () #[[ATTR0]] {
1011 // CHECK2-NEXT:  entry:
1012 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
1013 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
1014 // CHECK2-NEXT:    ret void
1015 //
1016 //
1017 // CHECK2-LABEL: define {{[^@]+}}@main
1018 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
1019 // CHECK2-NEXT:  entry:
1020 // CHECK2-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1021 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1022 // CHECK2-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1023 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
1024 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1025 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1026 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1027 // CHECK2:       omp_offload.failed:
1028 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124() #[[ATTR2]]
1029 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1030 // CHECK2:       omp_offload.cont:
1031 // CHECK2-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
1032 // CHECK2-NEXT:    ret i32 [[CALL]]
1033 //
1034 //
1035 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124
1036 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
1037 // CHECK2-NEXT:  entry:
1038 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1039 // CHECK2-NEXT:    ret void
1040 //
1041 //
1042 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1043 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {
1044 // CHECK2-NEXT:  entry:
1045 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1046 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1047 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1048 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1049 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1050 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1051 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1052 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1053 // CHECK2-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1054 // CHECK2-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1055 // CHECK2-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1056 // CHECK2-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1057 // CHECK2-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
1058 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1059 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1060 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1061 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1062 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1063 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1064 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1065 // CHECK2-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1066 // CHECK2-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1067 // CHECK2-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1068 // CHECK2:       arrayctor.loop:
1069 // CHECK2-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1070 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1071 // CHECK2-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1072 // CHECK2-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1073 // CHECK2-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1074 // CHECK2:       arrayctor.cont:
1075 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
1076 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1077 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1078 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1079 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1080 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1081 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1082 // CHECK2:       cond.true:
1083 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1084 // CHECK2:       cond.false:
1085 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1086 // CHECK2-NEXT:    br label [[COND_END]]
1087 // CHECK2:       cond.end:
1088 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1089 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1090 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1091 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1092 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1093 // CHECK2:       omp.inner.for.cond:
1094 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1095 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1096 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1097 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1098 // CHECK2:       omp.inner.for.cond.cleanup:
1099 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1100 // CHECK2:       omp.inner.for.body:
1101 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1102 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1103 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1104 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1105 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1106 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1107 // CHECK2:       omp.inner.for.inc:
1108 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1109 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1110 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1111 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1112 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1113 // CHECK2:       omp.inner.for.end:
1114 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1115 // CHECK2:       omp.loop.exit:
1116 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1117 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
1118 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
1119 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1120 // CHECK2-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1121 // CHECK2-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1122 // CHECK2:       .omp.final.then:
1123 // CHECK2-NEXT:    store i32 2, i32* [[I]], align 4
1124 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1125 // CHECK2:       .omp.final.done:
1126 // CHECK2-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
1127 // CHECK2-NEXT:    [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1128 // CHECK2-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2
1129 // CHECK2-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1130 // CHECK2:       arraydestroy.body:
1131 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1132 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1133 // CHECK2-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
1134 // CHECK2-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
1135 // CHECK2-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1136 // CHECK2:       arraydestroy.done3:
1137 // CHECK2-NEXT:    ret void
1138 //
1139 //
1140 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1141 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {
1142 // CHECK2-NEXT:  entry:
1143 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1144 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1145 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1146 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1147 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1148 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1149 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1150 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1151 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1152 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1153 // CHECK2-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1154 // CHECK2-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1155 // CHECK2-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1156 // CHECK2-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1157 // CHECK2-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
1158 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1159 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1160 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1161 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1162 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1163 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1164 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1165 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1166 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1167 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1168 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1169 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1170 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1171 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1172 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1173 // CHECK2-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1174 // CHECK2-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1175 // CHECK2-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1176 // CHECK2:       arrayctor.loop:
1177 // CHECK2-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1178 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1179 // CHECK2-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1180 // CHECK2-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1181 // CHECK2-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1182 // CHECK2:       arrayctor.cont:
1183 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
1184 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1185 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1186 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1187 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1188 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
1189 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1190 // CHECK2:       cond.true:
1191 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1192 // CHECK2:       cond.false:
1193 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1194 // CHECK2-NEXT:    br label [[COND_END]]
1195 // CHECK2:       cond.end:
1196 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1197 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1198 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1199 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1200 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1201 // CHECK2:       omp.inner.for.cond:
1202 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1203 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1204 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1205 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1206 // CHECK2:       omp.inner.for.cond.cleanup:
1207 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1208 // CHECK2:       omp.inner.for.body:
1209 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1210 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1211 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1212 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1213 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
1214 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1215 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1216 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
1217 // CHECK2-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
1218 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4
1219 // CHECK2-NEXT:    [[IDXPROM3:%.*]] = sext i32 [[TMP12]] to i64
1220 // CHECK2-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM3]]
1221 // CHECK2-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8*
1222 // CHECK2-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[VAR]] to i8*
1223 // CHECK2-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false)
1224 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1225 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, i32* [[SIVAR]], align 4
1226 // CHECK2-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP15]]
1227 // CHECK2-NEXT:    store i32 [[ADD5]], i32* [[SIVAR]], align 4
1228 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1229 // CHECK2:       omp.body.continue:
1230 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1231 // CHECK2:       omp.inner.for.inc:
1232 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1233 // CHECK2-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1234 // CHECK2-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1235 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1236 // CHECK2:       omp.inner.for.end:
1237 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1238 // CHECK2:       omp.loop.exit:
1239 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1240 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1241 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1242 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1243 // CHECK2-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1244 // CHECK2-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1245 // CHECK2:       .omp.final.then:
1246 // CHECK2-NEXT:    store i32 2, i32* [[I]], align 4
1247 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1248 // CHECK2:       .omp.final.done:
1249 // CHECK2-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
1250 // CHECK2-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1251 // CHECK2-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2
1252 // CHECK2-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1253 // CHECK2:       arraydestroy.body:
1254 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP22]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1255 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1256 // CHECK2-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
1257 // CHECK2-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
1258 // CHECK2-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
1259 // CHECK2:       arraydestroy.done8:
1260 // CHECK2-NEXT:    ret void
1261 //
1262 //
1263 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1264 // CHECK2-SAME: () #[[ATTR6:[0-9]+]] comdat {
1265 // CHECK2-NEXT:  entry:
1266 // CHECK2-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1267 // CHECK2-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1268 // CHECK2-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1269 // CHECK2-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1270 // CHECK2-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1271 // CHECK2-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
1272 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1273 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1274 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1275 // CHECK2-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1276 // CHECK2-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1277 // CHECK2-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1278 // CHECK2-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1279 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
1280 // CHECK2-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1281 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
1282 // CHECK2-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1283 // CHECK2-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
1284 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
1285 // CHECK2-NEXT:    [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1286 // CHECK2-NEXT:    [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
1287 // CHECK2-NEXT:    br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1288 // CHECK2:       omp_offload.failed:
1289 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80() #[[ATTR2]]
1290 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1291 // CHECK2:       omp_offload.cont:
1292 // CHECK2-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1293 // CHECK2-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1294 // CHECK2-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1295 // CHECK2-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1296 // CHECK2:       arraydestroy.body:
1297 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1298 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1299 // CHECK2-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
1300 // CHECK2-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1301 // CHECK2-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1302 // CHECK2:       arraydestroy.done2:
1303 // CHECK2-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
1304 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
1305 // CHECK2-NEXT:    ret i32 [[TMP4]]
1306 //
1307 //
1308 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1309 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1310 // CHECK2-NEXT:  entry:
1311 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1312 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1313 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1314 // CHECK2-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1315 // CHECK2-NEXT:    ret void
1316 //
1317 //
1318 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1319 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1320 // CHECK2-NEXT:  entry:
1321 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1322 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1323 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1324 // CHECK2-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1325 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1326 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1327 // CHECK2-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
1328 // CHECK2-NEXT:    ret void
1329 //
1330 //
1331 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80
1332 // CHECK2-SAME: () #[[ATTR4]] {
1333 // CHECK2-NEXT:  entry:
1334 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
1335 // CHECK2-NEXT:    ret void
1336 //
1337 //
1338 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
1339 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {
1340 // CHECK2-NEXT:  entry:
1341 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1342 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1343 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1344 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1345 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1346 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1347 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1348 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1349 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1350 // CHECK2-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1351 // CHECK2-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1352 // CHECK2-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1353 // CHECK2-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1354 // CHECK2-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 8
1355 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1356 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1357 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1358 // CHECK2-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
1359 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1360 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1361 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1362 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1363 // CHECK2-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1364 // CHECK2-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1365 // CHECK2-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1366 // CHECK2:       arrayctor.loop:
1367 // CHECK2-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1368 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1369 // CHECK2-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1370 // CHECK2-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1371 // CHECK2-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1372 // CHECK2:       arrayctor.cont:
1373 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
1374 // CHECK2-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8
1375 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1376 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1377 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1378 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1379 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1380 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1381 // CHECK2:       cond.true:
1382 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1383 // CHECK2:       cond.false:
1384 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1385 // CHECK2-NEXT:    br label [[COND_END]]
1386 // CHECK2:       cond.end:
1387 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1388 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1389 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1390 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1391 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1392 // CHECK2:       omp.inner.for.cond:
1393 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1394 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1395 // CHECK2-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1396 // CHECK2-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1397 // CHECK2:       omp.inner.for.cond.cleanup:
1398 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1399 // CHECK2:       omp.inner.for.body:
1400 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1401 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1402 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1403 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1404 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1405 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1406 // CHECK2:       omp.inner.for.inc:
1407 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1408 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1409 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1410 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1411 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
1412 // CHECK2:       omp.inner.for.end:
1413 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1414 // CHECK2:       omp.loop.exit:
1415 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1416 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
1417 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
1418 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1419 // CHECK2-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1420 // CHECK2-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1421 // CHECK2:       .omp.final.then:
1422 // CHECK2-NEXT:    store i32 2, i32* [[I]], align 4
1423 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1424 // CHECK2:       .omp.final.done:
1425 // CHECK2-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
1426 // CHECK2-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1427 // CHECK2-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2
1428 // CHECK2-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1429 // CHECK2:       arraydestroy.body:
1430 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1431 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1432 // CHECK2-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
1433 // CHECK2-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
1434 // CHECK2-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
1435 // CHECK2:       arraydestroy.done5:
1436 // CHECK2-NEXT:    ret void
1437 //
1438 //
1439 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5
1440 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {
1441 // CHECK2-NEXT:  entry:
1442 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1443 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1444 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1445 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1446 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1447 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1448 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1449 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1450 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1451 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1452 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1453 // CHECK2-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1454 // CHECK2-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1455 // CHECK2-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1456 // CHECK2-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1457 // CHECK2-NEXT:    [[_TMP3:%.*]] = alloca %struct.S.0*, align 8
1458 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1459 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1460 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1461 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1462 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1463 // CHECK2-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
1464 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1465 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1466 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1467 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1468 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1469 // CHECK2-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
1470 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1471 // CHECK2-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1472 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1473 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1474 // CHECK2-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1475 // CHECK2-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1476 // CHECK2-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1477 // CHECK2:       arrayctor.loop:
1478 // CHECK2-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1479 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1480 // CHECK2-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1481 // CHECK2-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1482 // CHECK2-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1483 // CHECK2:       arrayctor.cont:
1484 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
1485 // CHECK2-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8
1486 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1487 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1488 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1489 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1490 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
1491 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1492 // CHECK2:       cond.true:
1493 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1494 // CHECK2:       cond.false:
1495 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1496 // CHECK2-NEXT:    br label [[COND_END]]
1497 // CHECK2:       cond.end:
1498 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1499 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1500 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1501 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1502 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1503 // CHECK2:       omp.inner.for.cond:
1504 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1505 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1506 // CHECK2-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1507 // CHECK2-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1508 // CHECK2:       omp.inner.for.cond.cleanup:
1509 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1510 // CHECK2:       omp.inner.for.body:
1511 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1512 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1513 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1514 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1515 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
1516 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1517 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1518 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
1519 // CHECK2-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
1520 // CHECK2-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8
1521 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1522 // CHECK2-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64
1523 // CHECK2-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]]
1524 // CHECK2-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8*
1525 // CHECK2-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
1526 // CHECK2-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
1527 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1528 // CHECK2:       omp.body.continue:
1529 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1530 // CHECK2:       omp.inner.for.inc:
1531 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1532 // CHECK2-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
1533 // CHECK2-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1534 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1535 // CHECK2:       omp.inner.for.end:
1536 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1537 // CHECK2:       omp.loop.exit:
1538 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1539 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1540 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
1541 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1542 // CHECK2-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
1543 // CHECK2-NEXT:    br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1544 // CHECK2:       .omp.final.then:
1545 // CHECK2-NEXT:    store i32 2, i32* [[I]], align 4
1546 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1547 // CHECK2:       .omp.final.done:
1548 // CHECK2-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
1549 // CHECK2-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1550 // CHECK2-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2
1551 // CHECK2-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1552 // CHECK2:       arraydestroy.body:
1553 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1554 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1555 // CHECK2-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
1556 // CHECK2-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]
1557 // CHECK2-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]
1558 // CHECK2:       arraydestroy.done9:
1559 // CHECK2-NEXT:    ret void
1560 //
1561 //
1562 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1563 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1564 // CHECK2-NEXT:  entry:
1565 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1566 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1567 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1568 // CHECK2-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
1569 // CHECK2-NEXT:    ret void
1570 //
1571 //
1572 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1573 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1574 // CHECK2-NEXT:  entry:
1575 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1576 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1577 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1578 // CHECK2-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1579 // CHECK2-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
1580 // CHECK2-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
1581 // CHECK2-NEXT:    ret void
1582 //
1583 //
1584 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1585 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1586 // CHECK2-NEXT:  entry:
1587 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1588 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1589 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1590 // CHECK2-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1591 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1592 // CHECK2-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1593 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1594 // CHECK2-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
1595 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
1596 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
1597 // CHECK2-NEXT:    ret void
1598 //
1599 //
1600 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1601 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1602 // CHECK2-NEXT:  entry:
1603 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1604 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1605 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1606 // CHECK2-NEXT:    ret void
1607 //
1608 //
1609 // CHECK2-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
1610 // CHECK2-SAME: () #[[ATTR0]] {
1611 // CHECK2-NEXT:  entry:
1612 // CHECK2-NEXT:    call void @__cxx_global_var_init()
1613 // CHECK2-NEXT:    call void @__cxx_global_var_init.1()
1614 // CHECK2-NEXT:    call void @__cxx_global_var_init.2()
1615 // CHECK2-NEXT:    ret void
1616 //
1617 //
1618 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1619 // CHECK2-SAME: () #[[ATTR0]] {
1620 // CHECK2-NEXT:  entry:
1621 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
1622 // CHECK2-NEXT:    ret void
1623 //
1624 //
1625 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init
1626 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1627 // CHECK3-NEXT:  entry:
1628 // CHECK3-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
1629 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
1630 // CHECK3-NEXT:    ret void
1631 //
1632 //
1633 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1634 // CHECK3-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1635 // CHECK3-NEXT:  entry:
1636 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1637 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1638 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1639 // CHECK3-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
1640 // CHECK3-NEXT:    ret void
1641 //
1642 //
1643 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1644 // CHECK3-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1645 // CHECK3-NEXT:  entry:
1646 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1647 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1648 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1649 // CHECK3-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
1650 // CHECK3-NEXT:    ret void
1651 //
1652 //
1653 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1654 // CHECK3-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1655 // CHECK3-NEXT:  entry:
1656 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1657 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1658 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1659 // CHECK3-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1660 // CHECK3-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
1661 // CHECK3-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
1662 // CHECK3-NEXT:    store float [[CONV]], float* [[F]], align 4
1663 // CHECK3-NEXT:    ret void
1664 //
1665 //
1666 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1667 // CHECK3-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1668 // CHECK3-NEXT:  entry:
1669 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1670 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1671 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1672 // CHECK3-NEXT:    ret void
1673 //
1674 //
1675 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
1676 // CHECK3-SAME: () #[[ATTR0]] {
1677 // CHECK3-NEXT:  entry:
1678 // CHECK3-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), float 1.000000e+00)
1679 // CHECK3-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 1), float 2.000000e+00)
1680 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
1681 // CHECK3-NEXT:    ret void
1682 //
1683 //
1684 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1685 // CHECK3-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1686 // CHECK3-NEXT:  entry:
1687 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1688 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1689 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1690 // CHECK3-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1691 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1692 // CHECK3-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1693 // CHECK3-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
1694 // CHECK3-NEXT:    ret void
1695 //
1696 //
1697 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
1698 // CHECK3-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
1699 // CHECK3-NEXT:  entry:
1700 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
1701 // CHECK3-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1702 // CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1703 // CHECK3:       arraydestroy.body:
1704 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i32 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1705 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1706 // CHECK3-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
1707 // CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
1708 // CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
1709 // CHECK3:       arraydestroy.done1:
1710 // CHECK3-NEXT:    ret void
1711 //
1712 //
1713 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1714 // CHECK3-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1715 // CHECK3-NEXT:  entry:
1716 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1717 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1718 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1719 // CHECK3-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1720 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1721 // CHECK3-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1722 // CHECK3-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1723 // CHECK3-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
1724 // CHECK3-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
1725 // CHECK3-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
1726 // CHECK3-NEXT:    store float [[ADD]], float* [[F]], align 4
1727 // CHECK3-NEXT:    ret void
1728 //
1729 //
1730 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
1731 // CHECK3-SAME: () #[[ATTR0]] {
1732 // CHECK3-NEXT:  entry:
1733 // CHECK3-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
1734 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
1735 // CHECK3-NEXT:    ret void
1736 //
1737 //
1738 // CHECK3-LABEL: define {{[^@]+}}@main
1739 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
1740 // CHECK3-NEXT:  entry:
1741 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1742 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1743 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1744 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
1745 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1746 // CHECK3-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1747 // CHECK3-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1748 // CHECK3:       omp_offload.failed:
1749 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124() #[[ATTR2]]
1750 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1751 // CHECK3:       omp_offload.cont:
1752 // CHECK3-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
1753 // CHECK3-NEXT:    ret i32 [[CALL]]
1754 //
1755 //
1756 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124
1757 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
1758 // CHECK3-NEXT:  entry:
1759 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1760 // CHECK3-NEXT:    ret void
1761 //
1762 //
1763 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1764 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {
1765 // CHECK3-NEXT:  entry:
1766 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1767 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1768 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1769 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1770 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1771 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1772 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1773 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1774 // CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1775 // CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1776 // CHECK3-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1777 // CHECK3-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1778 // CHECK3-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
1779 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1780 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1781 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1782 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1783 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1784 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1785 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1786 // CHECK3-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1787 // CHECK3-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1788 // CHECK3-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1789 // CHECK3:       arrayctor.loop:
1790 // CHECK3-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1791 // CHECK3-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1792 // CHECK3-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
1793 // CHECK3-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1794 // CHECK3-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1795 // CHECK3:       arrayctor.cont:
1796 // CHECK3-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
1797 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1798 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1799 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1800 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1801 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1802 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1803 // CHECK3:       cond.true:
1804 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1805 // CHECK3:       cond.false:
1806 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1807 // CHECK3-NEXT:    br label [[COND_END]]
1808 // CHECK3:       cond.end:
1809 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1810 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1811 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1812 // CHECK3-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1813 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1814 // CHECK3:       omp.inner.for.cond:
1815 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1816 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1817 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1818 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1819 // CHECK3:       omp.inner.for.cond.cleanup:
1820 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1821 // CHECK3:       omp.inner.for.body:
1822 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1823 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1824 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
1825 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1826 // CHECK3:       omp.inner.for.inc:
1827 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1828 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1829 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
1830 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1831 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
1832 // CHECK3:       omp.inner.for.end:
1833 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1834 // CHECK3:       omp.loop.exit:
1835 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1836 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1837 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
1838 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1839 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1840 // CHECK3-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1841 // CHECK3:       .omp.final.then:
1842 // CHECK3-NEXT:    store i32 2, i32* [[I]], align 4
1843 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1844 // CHECK3:       .omp.final.done:
1845 // CHECK3-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
1846 // CHECK3-NEXT:    [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1847 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i32 2
1848 // CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1849 // CHECK3:       arraydestroy.body:
1850 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1851 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1852 // CHECK3-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
1853 // CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
1854 // CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1855 // CHECK3:       arraydestroy.done3:
1856 // CHECK3-NEXT:    ret void
1857 //
1858 //
1859 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1860 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {
1861 // CHECK3-NEXT:  entry:
1862 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1863 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1864 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1865 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1866 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1867 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1868 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1869 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1870 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1871 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1872 // CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1873 // CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1874 // CHECK3-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1875 // CHECK3-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1876 // CHECK3-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
1877 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1878 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1879 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1880 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1881 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1882 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1883 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1884 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1885 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1886 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
1887 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
1888 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1889 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1890 // CHECK3-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1891 // CHECK3-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1892 // CHECK3-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1893 // CHECK3:       arrayctor.loop:
1894 // CHECK3-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1895 // CHECK3-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1896 // CHECK3-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
1897 // CHECK3-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1898 // CHECK3-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1899 // CHECK3:       arrayctor.cont:
1900 // CHECK3-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
1901 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1902 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1903 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1904 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1905 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
1906 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1907 // CHECK3:       cond.true:
1908 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1909 // CHECK3:       cond.false:
1910 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1911 // CHECK3-NEXT:    br label [[COND_END]]
1912 // CHECK3:       cond.end:
1913 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1914 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1915 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1916 // CHECK3-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1917 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1918 // CHECK3:       omp.inner.for.cond:
1919 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1920 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1921 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1922 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1923 // CHECK3:       omp.inner.for.cond.cleanup:
1924 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1925 // CHECK3:       omp.inner.for.body:
1926 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1927 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1928 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1929 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1930 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
1931 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1932 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
1933 // CHECK3-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
1934 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4
1935 // CHECK3-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP12]]
1936 // CHECK3-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8*
1937 // CHECK3-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[VAR]] to i8*
1938 // CHECK3-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false)
1939 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1940 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[SIVAR]], align 4
1941 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP15]]
1942 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[SIVAR]], align 4
1943 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1944 // CHECK3:       omp.body.continue:
1945 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1946 // CHECK3:       omp.inner.for.inc:
1947 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1948 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], 1
1949 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
1950 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1951 // CHECK3:       omp.inner.for.end:
1952 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1953 // CHECK3:       omp.loop.exit:
1954 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1955 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1956 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1957 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1958 // CHECK3-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1959 // CHECK3-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1960 // CHECK3:       .omp.final.then:
1961 // CHECK3-NEXT:    store i32 2, i32* [[I]], align 4
1962 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1963 // CHECK3:       .omp.final.done:
1964 // CHECK3-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
1965 // CHECK3-NEXT:    [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1966 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i32 2
1967 // CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1968 // CHECK3:       arraydestroy.body:
1969 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP22]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1970 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1971 // CHECK3-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
1972 // CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]]
1973 // CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]
1974 // CHECK3:       arraydestroy.done6:
1975 // CHECK3-NEXT:    ret void
1976 //
1977 //
1978 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1979 // CHECK3-SAME: () #[[ATTR6:[0-9]+]] comdat {
1980 // CHECK3-NEXT:  entry:
1981 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1982 // CHECK3-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1983 // CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1984 // CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1985 // CHECK3-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1986 // CHECK3-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
1987 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1988 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
1989 // CHECK3-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1990 // CHECK3-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1991 // CHECK3-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1992 // CHECK3-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
1993 // CHECK3-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1994 // CHECK3-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
1995 // CHECK3-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
1996 // CHECK3-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
1997 // CHECK3-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
1998 // CHECK3-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
1999 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
2000 // CHECK3-NEXT:    [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
2001 // CHECK3-NEXT:    [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
2002 // CHECK3-NEXT:    br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2003 // CHECK3:       omp_offload.failed:
2004 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80() #[[ATTR2]]
2005 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2006 // CHECK3:       omp_offload.cont:
2007 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2008 // CHECK3-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2009 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2010 // CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2011 // CHECK3:       arraydestroy.body:
2012 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2013 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2014 // CHECK3-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
2015 // CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2016 // CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2017 // CHECK3:       arraydestroy.done2:
2018 // CHECK3-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
2019 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
2020 // CHECK3-NEXT:    ret i32 [[TMP4]]
2021 //
2022 //
2023 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2024 // CHECK3-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2025 // CHECK3-NEXT:  entry:
2026 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2027 // CHECK3-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2028 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2029 // CHECK3-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
2030 // CHECK3-NEXT:    ret void
2031 //
2032 //
2033 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2034 // CHECK3-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2035 // CHECK3-NEXT:  entry:
2036 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2037 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2038 // CHECK3-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2039 // CHECK3-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2040 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2041 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2042 // CHECK3-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
2043 // CHECK3-NEXT:    ret void
2044 //
2045 //
2046 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80
2047 // CHECK3-SAME: () #[[ATTR4]] {
2048 // CHECK3-NEXT:  entry:
2049 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2050 // CHECK3-NEXT:    ret void
2051 //
2052 //
2053 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
2054 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {
2055 // CHECK3-NEXT:  entry:
2056 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2057 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2058 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2059 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2060 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2061 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2062 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2063 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2064 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2065 // CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2066 // CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2067 // CHECK3-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2068 // CHECK3-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2069 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
2070 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2071 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2072 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2073 // CHECK3-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
2074 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2075 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2076 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2077 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2078 // CHECK3-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2079 // CHECK3-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2080 // CHECK3-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2081 // CHECK3:       arrayctor.loop:
2082 // CHECK3-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2083 // CHECK3-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2084 // CHECK3-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2085 // CHECK3-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2086 // CHECK3-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2087 // CHECK3:       arrayctor.cont:
2088 // CHECK3-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
2089 // CHECK3-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
2090 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2091 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2092 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2093 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2094 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
2095 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2096 // CHECK3:       cond.true:
2097 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2098 // CHECK3:       cond.false:
2099 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2100 // CHECK3-NEXT:    br label [[COND_END]]
2101 // CHECK3:       cond.end:
2102 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2103 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2104 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2105 // CHECK3-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2106 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2107 // CHECK3:       omp.inner.for.cond:
2108 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2109 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2110 // CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2111 // CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2112 // CHECK3:       omp.inner.for.cond.cleanup:
2113 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2114 // CHECK3:       omp.inner.for.body:
2115 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2116 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2117 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
2118 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2119 // CHECK3:       omp.inner.for.inc:
2120 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2121 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2122 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
2123 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2124 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
2125 // CHECK3:       omp.inner.for.end:
2126 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2127 // CHECK3:       omp.loop.exit:
2128 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2129 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2130 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
2131 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2132 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2133 // CHECK3-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2134 // CHECK3:       .omp.final.then:
2135 // CHECK3-NEXT:    store i32 2, i32* [[I]], align 4
2136 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2137 // CHECK3:       .omp.final.done:
2138 // CHECK3-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
2139 // CHECK3-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2140 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2
2141 // CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2142 // CHECK3:       arraydestroy.body:
2143 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2144 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2145 // CHECK3-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
2146 // CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
2147 // CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
2148 // CHECK3:       arraydestroy.done5:
2149 // CHECK3-NEXT:    ret void
2150 //
2151 //
2152 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5
2153 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {
2154 // CHECK3-NEXT:  entry:
2155 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2156 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2157 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2158 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2159 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2160 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2161 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2162 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2163 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2164 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2165 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2166 // CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2167 // CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2168 // CHECK3-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2169 // CHECK3-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2170 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
2171 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2172 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2173 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2174 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2175 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2176 // CHECK3-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
2177 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2178 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2179 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2180 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2181 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
2182 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
2183 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2184 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2185 // CHECK3-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2186 // CHECK3-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2187 // CHECK3-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2188 // CHECK3:       arrayctor.loop:
2189 // CHECK3-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2190 // CHECK3-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2191 // CHECK3-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2192 // CHECK3-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2193 // CHECK3-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2194 // CHECK3:       arrayctor.cont:
2195 // CHECK3-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
2196 // CHECK3-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
2197 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2198 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2199 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2200 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2201 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
2202 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2203 // CHECK3:       cond.true:
2204 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2205 // CHECK3:       cond.false:
2206 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2207 // CHECK3-NEXT:    br label [[COND_END]]
2208 // CHECK3:       cond.end:
2209 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2210 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2211 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2212 // CHECK3-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2213 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2214 // CHECK3:       omp.inner.for.cond:
2215 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2216 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2217 // CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2218 // CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2219 // CHECK3:       omp.inner.for.cond.cleanup:
2220 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2221 // CHECK3:       omp.inner.for.body:
2222 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2223 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2224 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2225 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2226 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
2227 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2228 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
2229 // CHECK3-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
2230 // CHECK3-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4
2231 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
2232 // CHECK3-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]]
2233 // CHECK3-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8*
2234 // CHECK3-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
2235 // CHECK3-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
2236 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2237 // CHECK3:       omp.body.continue:
2238 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2239 // CHECK3:       omp.inner.for.inc:
2240 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2241 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
2242 // CHECK3-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
2243 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2244 // CHECK3:       omp.inner.for.end:
2245 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2246 // CHECK3:       omp.loop.exit:
2247 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2248 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2249 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
2250 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2251 // CHECK3-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
2252 // CHECK3-NEXT:    br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2253 // CHECK3:       .omp.final.then:
2254 // CHECK3-NEXT:    store i32 2, i32* [[I]], align 4
2255 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2256 // CHECK3:       .omp.final.done:
2257 // CHECK3-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
2258 // CHECK3-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2259 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2
2260 // CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2261 // CHECK3:       arraydestroy.body:
2262 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2263 // CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2264 // CHECK3-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
2265 // CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]
2266 // CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]
2267 // CHECK3:       arraydestroy.done7:
2268 // CHECK3-NEXT:    ret void
2269 //
2270 //
2271 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2272 // CHECK3-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2273 // CHECK3-NEXT:  entry:
2274 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2275 // CHECK3-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2276 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2277 // CHECK3-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
2278 // CHECK3-NEXT:    ret void
2279 //
2280 //
2281 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2282 // CHECK3-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2283 // CHECK3-NEXT:  entry:
2284 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2285 // CHECK3-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2286 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2287 // CHECK3-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2288 // CHECK3-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
2289 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
2290 // CHECK3-NEXT:    ret void
2291 //
2292 //
2293 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2294 // CHECK3-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2295 // CHECK3-NEXT:  entry:
2296 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2297 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2298 // CHECK3-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2299 // CHECK3-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2300 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2301 // CHECK3-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2302 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2303 // CHECK3-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
2304 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
2305 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
2306 // CHECK3-NEXT:    ret void
2307 //
2308 //
2309 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2310 // CHECK3-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2311 // CHECK3-NEXT:  entry:
2312 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2313 // CHECK3-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2314 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2315 // CHECK3-NEXT:    ret void
2316 //
2317 //
2318 // CHECK3-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
2319 // CHECK3-SAME: () #[[ATTR0]] {
2320 // CHECK3-NEXT:  entry:
2321 // CHECK3-NEXT:    call void @__cxx_global_var_init()
2322 // CHECK3-NEXT:    call void @__cxx_global_var_init.1()
2323 // CHECK3-NEXT:    call void @__cxx_global_var_init.2()
2324 // CHECK3-NEXT:    ret void
2325 //
2326 //
2327 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2328 // CHECK3-SAME: () #[[ATTR0]] {
2329 // CHECK3-NEXT:  entry:
2330 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
2331 // CHECK3-NEXT:    ret void
2332 //
2333 //
2334 // CHECK4-LABEL: define {{[^@]+}}@__cxx_global_var_init
2335 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
2336 // CHECK4-NEXT:  entry:
2337 // CHECK4-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
2338 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
2339 // CHECK4-NEXT:    ret void
2340 //
2341 //
2342 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2343 // CHECK4-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2344 // CHECK4-NEXT:  entry:
2345 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2346 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2347 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2348 // CHECK4-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
2349 // CHECK4-NEXT:    ret void
2350 //
2351 //
2352 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2353 // CHECK4-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2354 // CHECK4-NEXT:  entry:
2355 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2356 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2357 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2358 // CHECK4-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
2359 // CHECK4-NEXT:    ret void
2360 //
2361 //
2362 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2363 // CHECK4-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2364 // CHECK4-NEXT:  entry:
2365 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2366 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2367 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2368 // CHECK4-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2369 // CHECK4-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
2370 // CHECK4-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
2371 // CHECK4-NEXT:    store float [[CONV]], float* [[F]], align 4
2372 // CHECK4-NEXT:    ret void
2373 //
2374 //
2375 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2376 // CHECK4-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2377 // CHECK4-NEXT:  entry:
2378 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2379 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2380 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2381 // CHECK4-NEXT:    ret void
2382 //
2383 //
2384 // CHECK4-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
2385 // CHECK4-SAME: () #[[ATTR0]] {
2386 // CHECK4-NEXT:  entry:
2387 // CHECK4-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), float 1.000000e+00)
2388 // CHECK4-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 1), float 2.000000e+00)
2389 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
2390 // CHECK4-NEXT:    ret void
2391 //
2392 //
2393 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2394 // CHECK4-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2395 // CHECK4-NEXT:  entry:
2396 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2397 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2398 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2399 // CHECK4-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
2400 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2401 // CHECK4-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2402 // CHECK4-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
2403 // CHECK4-NEXT:    ret void
2404 //
2405 //
2406 // CHECK4-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
2407 // CHECK4-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
2408 // CHECK4-NEXT:  entry:
2409 // CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
2410 // CHECK4-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
2411 // CHECK4-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2412 // CHECK4:       arraydestroy.body:
2413 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i32 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2414 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2415 // CHECK4-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
2416 // CHECK4-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
2417 // CHECK4-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
2418 // CHECK4:       arraydestroy.done1:
2419 // CHECK4-NEXT:    ret void
2420 //
2421 //
2422 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2423 // CHECK4-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2424 // CHECK4-NEXT:  entry:
2425 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2426 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2427 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2428 // CHECK4-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
2429 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2430 // CHECK4-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2431 // CHECK4-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2432 // CHECK4-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
2433 // CHECK4-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
2434 // CHECK4-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
2435 // CHECK4-NEXT:    store float [[ADD]], float* [[F]], align 4
2436 // CHECK4-NEXT:    ret void
2437 //
2438 //
2439 // CHECK4-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
2440 // CHECK4-SAME: () #[[ATTR0]] {
2441 // CHECK4-NEXT:  entry:
2442 // CHECK4-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
2443 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
2444 // CHECK4-NEXT:    ret void
2445 //
2446 //
2447 // CHECK4-LABEL: define {{[^@]+}}@main
2448 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] {
2449 // CHECK4-NEXT:  entry:
2450 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2451 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2452 // CHECK4-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2453 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
2454 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
2455 // CHECK4-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
2456 // CHECK4-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2457 // CHECK4:       omp_offload.failed:
2458 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124() #[[ATTR2]]
2459 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2460 // CHECK4:       omp_offload.cont:
2461 // CHECK4-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
2462 // CHECK4-NEXT:    ret i32 [[CALL]]
2463 //
2464 //
2465 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124
2466 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
2467 // CHECK4-NEXT:  entry:
2468 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2469 // CHECK4-NEXT:    ret void
2470 //
2471 //
2472 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
2473 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {
2474 // CHECK4-NEXT:  entry:
2475 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2476 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2477 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2478 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2479 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2480 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2481 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2482 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2483 // CHECK4-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2484 // CHECK4-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2485 // CHECK4-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2486 // CHECK4-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2487 // CHECK4-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
2488 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
2489 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2490 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2491 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2492 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2493 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2494 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2495 // CHECK4-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2496 // CHECK4-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2497 // CHECK4-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2498 // CHECK4:       arrayctor.loop:
2499 // CHECK4-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2500 // CHECK4-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2501 // CHECK4-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
2502 // CHECK4-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2503 // CHECK4-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2504 // CHECK4:       arrayctor.cont:
2505 // CHECK4-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
2506 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2507 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2508 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2509 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2510 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
2511 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2512 // CHECK4:       cond.true:
2513 // CHECK4-NEXT:    br label [[COND_END:%.*]]
2514 // CHECK4:       cond.false:
2515 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2516 // CHECK4-NEXT:    br label [[COND_END]]
2517 // CHECK4:       cond.end:
2518 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2519 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2520 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2521 // CHECK4-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2522 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2523 // CHECK4:       omp.inner.for.cond:
2524 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2525 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2526 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2527 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2528 // CHECK4:       omp.inner.for.cond.cleanup:
2529 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2530 // CHECK4:       omp.inner.for.body:
2531 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2532 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2533 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
2534 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2535 // CHECK4:       omp.inner.for.inc:
2536 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2537 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2538 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
2539 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2540 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
2541 // CHECK4:       omp.inner.for.end:
2542 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2543 // CHECK4:       omp.loop.exit:
2544 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2545 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2546 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
2547 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2548 // CHECK4-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2549 // CHECK4-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2550 // CHECK4:       .omp.final.then:
2551 // CHECK4-NEXT:    store i32 2, i32* [[I]], align 4
2552 // CHECK4-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2553 // CHECK4:       .omp.final.done:
2554 // CHECK4-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
2555 // CHECK4-NEXT:    [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2556 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i32 2
2557 // CHECK4-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2558 // CHECK4:       arraydestroy.body:
2559 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2560 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2561 // CHECK4-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
2562 // CHECK4-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
2563 // CHECK4-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
2564 // CHECK4:       arraydestroy.done3:
2565 // CHECK4-NEXT:    ret void
2566 //
2567 //
2568 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
2569 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {
2570 // CHECK4-NEXT:  entry:
2571 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2572 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2573 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2574 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2575 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2576 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2577 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2578 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2579 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2580 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2581 // CHECK4-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2582 // CHECK4-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2583 // CHECK4-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2584 // CHECK4-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2585 // CHECK4-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
2586 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
2587 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2588 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2589 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2590 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2591 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2592 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2593 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2594 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2595 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
2596 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
2597 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2598 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2599 // CHECK4-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2600 // CHECK4-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2601 // CHECK4-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2602 // CHECK4:       arrayctor.loop:
2603 // CHECK4-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2604 // CHECK4-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2605 // CHECK4-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
2606 // CHECK4-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2607 // CHECK4-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2608 // CHECK4:       arrayctor.cont:
2609 // CHECK4-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
2610 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2611 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2612 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2613 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2614 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
2615 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2616 // CHECK4:       cond.true:
2617 // CHECK4-NEXT:    br label [[COND_END:%.*]]
2618 // CHECK4:       cond.false:
2619 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2620 // CHECK4-NEXT:    br label [[COND_END]]
2621 // CHECK4:       cond.end:
2622 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2623 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2624 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2625 // CHECK4-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2626 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2627 // CHECK4:       omp.inner.for.cond:
2628 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2629 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2630 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2631 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2632 // CHECK4:       omp.inner.for.cond.cleanup:
2633 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2634 // CHECK4:       omp.inner.for.body:
2635 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2636 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2637 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2638 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2639 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
2640 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2641 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
2642 // CHECK4-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
2643 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4
2644 // CHECK4-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP12]]
2645 // CHECK4-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8*
2646 // CHECK4-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[VAR]] to i8*
2647 // CHECK4-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false)
2648 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2649 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, i32* [[SIVAR]], align 4
2650 // CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP15]]
2651 // CHECK4-NEXT:    store i32 [[ADD3]], i32* [[SIVAR]], align 4
2652 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2653 // CHECK4:       omp.body.continue:
2654 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2655 // CHECK4:       omp.inner.for.inc:
2656 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2657 // CHECK4-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], 1
2658 // CHECK4-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
2659 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2660 // CHECK4:       omp.inner.for.end:
2661 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2662 // CHECK4:       omp.loop.exit:
2663 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2664 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2665 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
2666 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2667 // CHECK4-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2668 // CHECK4-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2669 // CHECK4:       .omp.final.then:
2670 // CHECK4-NEXT:    store i32 2, i32* [[I]], align 4
2671 // CHECK4-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2672 // CHECK4:       .omp.final.done:
2673 // CHECK4-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
2674 // CHECK4-NEXT:    [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2675 // CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i32 2
2676 // CHECK4-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2677 // CHECK4:       arraydestroy.body:
2678 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP22]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2679 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2680 // CHECK4-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
2681 // CHECK4-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]]
2682 // CHECK4-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]
2683 // CHECK4:       arraydestroy.done6:
2684 // CHECK4-NEXT:    ret void
2685 //
2686 //
2687 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2688 // CHECK4-SAME: () #[[ATTR6:[0-9]+]] comdat {
2689 // CHECK4-NEXT:  entry:
2690 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2691 // CHECK4-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2692 // CHECK4-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2693 // CHECK4-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2694 // CHECK4-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2695 // CHECK4-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
2696 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2697 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2698 // CHECK4-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
2699 // CHECK4-NEXT:    store i32 0, i32* [[T_VAR]], align 4
2700 // CHECK4-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2701 // CHECK4-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2702 // CHECK4-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2703 // CHECK4-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
2704 // CHECK4-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
2705 // CHECK4-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
2706 // CHECK4-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
2707 // CHECK4-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
2708 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
2709 // CHECK4-NEXT:    [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
2710 // CHECK4-NEXT:    [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
2711 // CHECK4-NEXT:    br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2712 // CHECK4:       omp_offload.failed:
2713 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80() #[[ATTR2]]
2714 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2715 // CHECK4:       omp_offload.cont:
2716 // CHECK4-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2717 // CHECK4-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2718 // CHECK4-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2719 // CHECK4-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2720 // CHECK4:       arraydestroy.body:
2721 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2722 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2723 // CHECK4-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
2724 // CHECK4-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2725 // CHECK4-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2726 // CHECK4:       arraydestroy.done2:
2727 // CHECK4-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
2728 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
2729 // CHECK4-NEXT:    ret i32 [[TMP4]]
2730 //
2731 //
2732 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2733 // CHECK4-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2734 // CHECK4-NEXT:  entry:
2735 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2736 // CHECK4-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2737 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2738 // CHECK4-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
2739 // CHECK4-NEXT:    ret void
2740 //
2741 //
2742 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2743 // CHECK4-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2744 // CHECK4-NEXT:  entry:
2745 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2746 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2747 // CHECK4-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2748 // CHECK4-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2749 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2750 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2751 // CHECK4-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
2752 // CHECK4-NEXT:    ret void
2753 //
2754 //
2755 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80
2756 // CHECK4-SAME: () #[[ATTR4]] {
2757 // CHECK4-NEXT:  entry:
2758 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2759 // CHECK4-NEXT:    ret void
2760 //
2761 //
2762 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4
2763 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {
2764 // CHECK4-NEXT:  entry:
2765 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2766 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2767 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2768 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2769 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2770 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2771 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2772 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2773 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2774 // CHECK4-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2775 // CHECK4-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2776 // CHECK4-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2777 // CHECK4-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2778 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
2779 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
2780 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2781 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2782 // CHECK4-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
2783 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2784 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2785 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2786 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2787 // CHECK4-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2788 // CHECK4-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2789 // CHECK4-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2790 // CHECK4:       arrayctor.loop:
2791 // CHECK4-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2792 // CHECK4-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2793 // CHECK4-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2794 // CHECK4-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2795 // CHECK4-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2796 // CHECK4:       arrayctor.cont:
2797 // CHECK4-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
2798 // CHECK4-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
2799 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2800 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2801 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2802 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2803 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
2804 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2805 // CHECK4:       cond.true:
2806 // CHECK4-NEXT:    br label [[COND_END:%.*]]
2807 // CHECK4:       cond.false:
2808 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2809 // CHECK4-NEXT:    br label [[COND_END]]
2810 // CHECK4:       cond.end:
2811 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2812 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2813 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2814 // CHECK4-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2815 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2816 // CHECK4:       omp.inner.for.cond:
2817 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2818 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2819 // CHECK4-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2820 // CHECK4-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2821 // CHECK4:       omp.inner.for.cond.cleanup:
2822 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2823 // CHECK4:       omp.inner.for.body:
2824 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2825 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2826 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
2827 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2828 // CHECK4:       omp.inner.for.inc:
2829 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2830 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2831 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
2832 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2833 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
2834 // CHECK4:       omp.inner.for.end:
2835 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2836 // CHECK4:       omp.loop.exit:
2837 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2838 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2839 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
2840 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2841 // CHECK4-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2842 // CHECK4-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2843 // CHECK4:       .omp.final.then:
2844 // CHECK4-NEXT:    store i32 2, i32* [[I]], align 4
2845 // CHECK4-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2846 // CHECK4:       .omp.final.done:
2847 // CHECK4-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
2848 // CHECK4-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2849 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2
2850 // CHECK4-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2851 // CHECK4:       arraydestroy.body:
2852 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2853 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2854 // CHECK4-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
2855 // CHECK4-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
2856 // CHECK4-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
2857 // CHECK4:       arraydestroy.done5:
2858 // CHECK4-NEXT:    ret void
2859 //
2860 //
2861 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..5
2862 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {
2863 // CHECK4-NEXT:  entry:
2864 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2865 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2866 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2867 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2868 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2869 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2870 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2871 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2872 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2873 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2874 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2875 // CHECK4-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2876 // CHECK4-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2877 // CHECK4-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2878 // CHECK4-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2879 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
2880 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
2881 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2882 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2883 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2884 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2885 // CHECK4-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
2886 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2887 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2888 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2889 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2890 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
2891 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
2892 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2893 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2894 // CHECK4-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2895 // CHECK4-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2896 // CHECK4-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2897 // CHECK4:       arrayctor.loop:
2898 // CHECK4-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2899 // CHECK4-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2900 // CHECK4-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2901 // CHECK4-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2902 // CHECK4-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2903 // CHECK4:       arrayctor.cont:
2904 // CHECK4-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
2905 // CHECK4-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
2906 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2907 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2908 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2909 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2910 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
2911 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2912 // CHECK4:       cond.true:
2913 // CHECK4-NEXT:    br label [[COND_END:%.*]]
2914 // CHECK4:       cond.false:
2915 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2916 // CHECK4-NEXT:    br label [[COND_END]]
2917 // CHECK4:       cond.end:
2918 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2919 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2920 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2921 // CHECK4-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2922 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2923 // CHECK4:       omp.inner.for.cond:
2924 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2925 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2926 // CHECK4-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2927 // CHECK4-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2928 // CHECK4:       omp.inner.for.cond.cleanup:
2929 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2930 // CHECK4:       omp.inner.for.body:
2931 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2932 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2933 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2934 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2935 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
2936 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2937 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
2938 // CHECK4-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
2939 // CHECK4-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4
2940 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
2941 // CHECK4-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]]
2942 // CHECK4-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8*
2943 // CHECK4-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
2944 // CHECK4-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
2945 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2946 // CHECK4:       omp.body.continue:
2947 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2948 // CHECK4:       omp.inner.for.inc:
2949 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2950 // CHECK4-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
2951 // CHECK4-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
2952 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2953 // CHECK4:       omp.inner.for.end:
2954 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2955 // CHECK4:       omp.loop.exit:
2956 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2957 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2958 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
2959 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2960 // CHECK4-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
2961 // CHECK4-NEXT:    br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2962 // CHECK4:       .omp.final.then:
2963 // CHECK4-NEXT:    store i32 2, i32* [[I]], align 4
2964 // CHECK4-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2965 // CHECK4:       .omp.final.done:
2966 // CHECK4-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
2967 // CHECK4-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2968 // CHECK4-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2
2969 // CHECK4-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2970 // CHECK4:       arraydestroy.body:
2971 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2972 // CHECK4-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2973 // CHECK4-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
2974 // CHECK4-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]
2975 // CHECK4-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]
2976 // CHECK4:       arraydestroy.done7:
2977 // CHECK4-NEXT:    ret void
2978 //
2979 //
2980 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2981 // CHECK4-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2982 // CHECK4-NEXT:  entry:
2983 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2984 // CHECK4-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2985 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2986 // CHECK4-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
2987 // CHECK4-NEXT:    ret void
2988 //
2989 //
2990 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2991 // CHECK4-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2992 // CHECK4-NEXT:  entry:
2993 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2994 // CHECK4-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2995 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2996 // CHECK4-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2997 // CHECK4-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
2998 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
2999 // CHECK4-NEXT:    ret void
3000 //
3001 //
3002 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3003 // CHECK4-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3004 // CHECK4-NEXT:  entry:
3005 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3006 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3007 // CHECK4-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3008 // CHECK4-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3009 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3010 // CHECK4-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3011 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3012 // CHECK4-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
3013 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
3014 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
3015 // CHECK4-NEXT:    ret void
3016 //
3017 //
3018 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3019 // CHECK4-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3020 // CHECK4-NEXT:  entry:
3021 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3022 // CHECK4-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3023 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3024 // CHECK4-NEXT:    ret void
3025 //
3026 //
3027 // CHECK4-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
3028 // CHECK4-SAME: () #[[ATTR0]] {
3029 // CHECK4-NEXT:  entry:
3030 // CHECK4-NEXT:    call void @__cxx_global_var_init()
3031 // CHECK4-NEXT:    call void @__cxx_global_var_init.1()
3032 // CHECK4-NEXT:    call void @__cxx_global_var_init.2()
3033 // CHECK4-NEXT:    ret void
3034 //
3035 //
3036 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3037 // CHECK4-SAME: () #[[ATTR0]] {
3038 // CHECK4-NEXT:  entry:
3039 // CHECK4-NEXT:    call void @__tgt_register_requires(i64 1)
3040 // CHECK4-NEXT:    ret void
3041 //
3042 //
3043 // CHECK5-LABEL: define {{[^@]+}}@__cxx_global_var_init
3044 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
3045 // CHECK5-NEXT:  entry:
3046 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
3047 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
3048 // CHECK5-NEXT:    ret void
3049 //
3050 //
3051 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3052 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3053 // CHECK5-NEXT:  entry:
3054 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3055 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3056 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3057 // CHECK5-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
3058 // CHECK5-NEXT:    ret void
3059 //
3060 //
3061 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3062 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3063 // CHECK5-NEXT:  entry:
3064 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3065 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3066 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3067 // CHECK5-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
3068 // CHECK5-NEXT:    ret void
3069 //
3070 //
3071 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3072 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3073 // CHECK5-NEXT:  entry:
3074 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3075 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3076 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3077 // CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3078 // CHECK5-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
3079 // CHECK5-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
3080 // CHECK5-NEXT:    store float [[CONV]], float* [[F]], align 4
3081 // CHECK5-NEXT:    ret void
3082 //
3083 //
3084 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3085 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3086 // CHECK5-NEXT:  entry:
3087 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3088 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3089 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3090 // CHECK5-NEXT:    ret void
3091 //
3092 //
3093 // CHECK5-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
3094 // CHECK5-SAME: () #[[ATTR0]] {
3095 // CHECK5-NEXT:  entry:
3096 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
3097 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
3098 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
3099 // CHECK5-NEXT:    ret void
3100 //
3101 //
3102 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3103 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3104 // CHECK5-NEXT:  entry:
3105 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3106 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3107 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3108 // CHECK5-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3109 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3110 // CHECK5-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3111 // CHECK5-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
3112 // CHECK5-NEXT:    ret void
3113 //
3114 //
3115 // CHECK5-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
3116 // CHECK5-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
3117 // CHECK5-NEXT:  entry:
3118 // CHECK5-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
3119 // CHECK5-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
3120 // CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3121 // CHECK5:       arraydestroy.body:
3122 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3123 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3124 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
3125 // CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
3126 // CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
3127 // CHECK5:       arraydestroy.done1:
3128 // CHECK5-NEXT:    ret void
3129 //
3130 //
3131 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3132 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3133 // CHECK5-NEXT:  entry:
3134 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3135 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3136 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3137 // CHECK5-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3138 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3139 // CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3140 // CHECK5-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3141 // CHECK5-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
3142 // CHECK5-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
3143 // CHECK5-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
3144 // CHECK5-NEXT:    store float [[ADD]], float* [[F]], align 4
3145 // CHECK5-NEXT:    ret void
3146 //
3147 //
3148 // CHECK5-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
3149 // CHECK5-SAME: () #[[ATTR0]] {
3150 // CHECK5-NEXT:  entry:
3151 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
3152 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
3153 // CHECK5-NEXT:    ret void
3154 //
3155 //
3156 // CHECK5-LABEL: define {{[^@]+}}@main
3157 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
3158 // CHECK5-NEXT:  entry:
3159 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3160 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
3161 // CHECK5-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3162 // CHECK5-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
3163 // CHECK5-NEXT:    ret i32 0
3164 //
3165 //
3166 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104
3167 // CHECK5-SAME: () #[[ATTR5:[0-9]+]] {
3168 // CHECK5-NEXT:  entry:
3169 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
3170 // CHECK5-NEXT:    ret void
3171 //
3172 //
3173 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
3174 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR5]] {
3175 // CHECK5-NEXT:  entry:
3176 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3177 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3178 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3179 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3180 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
3181 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3182 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3183 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3184 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3185 // CHECK5-NEXT:    [[G:%.*]] = alloca i32, align 4
3186 // CHECK5-NEXT:    [[G1:%.*]] = alloca i32, align 4
3187 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
3188 // CHECK5-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
3189 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3190 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3191 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3192 // CHECK5-NEXT:    store i32* undef, i32** [[_TMP1]], align 8
3193 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3194 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
3195 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3196 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3197 // CHECK5-NEXT:    store i32* [[G1]], i32** [[_TMP2]], align 8
3198 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3199 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3200 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3201 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3202 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
3203 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3204 // CHECK5:       cond.true:
3205 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3206 // CHECK5:       cond.false:
3207 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3208 // CHECK5-NEXT:    br label [[COND_END]]
3209 // CHECK5:       cond.end:
3210 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3211 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3212 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3213 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3214 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3215 // CHECK5:       omp.inner.for.cond:
3216 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3217 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3218 // CHECK5-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3219 // CHECK5-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3220 // CHECK5:       omp.inner.for.body:
3221 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3222 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3223 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3224 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3225 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3226 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3227 // CHECK5:       omp.inner.for.inc:
3228 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3229 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3230 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3231 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3232 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3233 // CHECK5:       omp.inner.for.end:
3234 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3235 // CHECK5:       omp.loop.exit:
3236 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3237 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3238 // CHECK5-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3239 // CHECK5-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3240 // CHECK5:       .omp.final.then:
3241 // CHECK5-NEXT:    store i32 2, i32* [[I]], align 4
3242 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3243 // CHECK5:       .omp.final.done:
3244 // CHECK5-NEXT:    ret void
3245 //
3246 //
3247 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
3248 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR5]] {
3249 // CHECK5-NEXT:  entry:
3250 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3251 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3252 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3253 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3254 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3255 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3256 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
3257 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3258 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3259 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3260 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3261 // CHECK5-NEXT:    [[G:%.*]] = alloca i32, align 4
3262 // CHECK5-NEXT:    [[G1:%.*]] = alloca i32, align 4
3263 // CHECK5-NEXT:    [[_TMP3:%.*]] = alloca i32*, align 8
3264 // CHECK5-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
3265 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3266 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
3267 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3268 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3269 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3270 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3271 // CHECK5-NEXT:    store i32* undef, i32** [[_TMP1]], align 8
3272 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3273 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3274 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3275 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3276 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3277 // CHECK5-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
3278 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3279 // CHECK5-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
3280 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3281 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3282 // CHECK5-NEXT:    store i32* [[G1]], i32** [[_TMP3]], align 8
3283 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3284 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3285 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3286 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3287 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
3288 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3289 // CHECK5:       cond.true:
3290 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3291 // CHECK5:       cond.false:
3292 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3293 // CHECK5-NEXT:    br label [[COND_END]]
3294 // CHECK5:       cond.end:
3295 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3296 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3297 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3298 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3299 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3300 // CHECK5:       omp.inner.for.cond:
3301 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3302 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3303 // CHECK5-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3304 // CHECK5-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3305 // CHECK5:       omp.inner.for.body:
3306 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3307 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3308 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3309 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3310 // CHECK5-NEXT:    store i32 1, i32* [[G]], align 4
3311 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[_TMP3]], align 8
3312 // CHECK5-NEXT:    store volatile i32 1, i32* [[TMP10]], align 4
3313 // CHECK5-NEXT:    store i32 2, i32* [[SIVAR]], align 4
3314 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
3315 // CHECK5-NEXT:    store i32* [[G]], i32** [[TMP11]], align 8
3316 // CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
3317 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[_TMP3]], align 8
3318 // CHECK5-NEXT:    store i32* [[TMP13]], i32** [[TMP12]], align 8
3319 // CHECK5-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
3320 // CHECK5-NEXT:    store i32* [[SIVAR]], i32** [[TMP14]], align 8
3321 // CHECK5-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(24) [[REF_TMP]])
3322 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3323 // CHECK5:       omp.body.continue:
3324 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3325 // CHECK5:       omp.inner.for.inc:
3326 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3327 // CHECK5-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1
3328 // CHECK5-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
3329 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
3330 // CHECK5:       omp.inner.for.end:
3331 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3332 // CHECK5:       omp.loop.exit:
3333 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3334 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3335 // CHECK5-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3336 // CHECK5-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3337 // CHECK5:       .omp.final.then:
3338 // CHECK5-NEXT:    store i32 2, i32* [[I]], align 4
3339 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3340 // CHECK5:       .omp.final.done:
3341 // CHECK5-NEXT:    ret void
3342 //
3343 //
3344 // CHECK5-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
3345 // CHECK5-SAME: () #[[ATTR0]] {
3346 // CHECK5-NEXT:  entry:
3347 // CHECK5-NEXT:    call void @__cxx_global_var_init()
3348 // CHECK5-NEXT:    call void @__cxx_global_var_init.1()
3349 // CHECK5-NEXT:    call void @__cxx_global_var_init.2()
3350 // CHECK5-NEXT:    ret void
3351 //
3352 //
3353 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3354 // CHECK5-SAME: () #[[ATTR0]] {
3355 // CHECK5-NEXT:  entry:
3356 // CHECK5-NEXT:    call void @__tgt_register_requires(i64 1)
3357 // CHECK5-NEXT:    ret void
3358 //
3359 //
3360 // CHECK6-LABEL: define {{[^@]+}}@__cxx_global_var_init
3361 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
3362 // CHECK6-NEXT:  entry:
3363 // CHECK6-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
3364 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
3365 // CHECK6-NEXT:    ret void
3366 //
3367 //
3368 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3369 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3370 // CHECK6-NEXT:  entry:
3371 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3372 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3373 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3374 // CHECK6-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
3375 // CHECK6-NEXT:    ret void
3376 //
3377 //
3378 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3379 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3380 // CHECK6-NEXT:  entry:
3381 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3382 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3383 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3384 // CHECK6-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
3385 // CHECK6-NEXT:    ret void
3386 //
3387 //
3388 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3389 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3390 // CHECK6-NEXT:  entry:
3391 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3392 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3393 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3394 // CHECK6-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3395 // CHECK6-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
3396 // CHECK6-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
3397 // CHECK6-NEXT:    store float [[CONV]], float* [[F]], align 4
3398 // CHECK6-NEXT:    ret void
3399 //
3400 //
3401 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3402 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3403 // CHECK6-NEXT:  entry:
3404 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3405 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3406 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3407 // CHECK6-NEXT:    ret void
3408 //
3409 //
3410 // CHECK6-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
3411 // CHECK6-SAME: () #[[ATTR0]] {
3412 // CHECK6-NEXT:  entry:
3413 // CHECK6-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
3414 // CHECK6-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
3415 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
3416 // CHECK6-NEXT:    ret void
3417 //
3418 //
3419 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3420 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3421 // CHECK6-NEXT:  entry:
3422 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3423 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3424 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3425 // CHECK6-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3426 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3427 // CHECK6-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3428 // CHECK6-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
3429 // CHECK6-NEXT:    ret void
3430 //
3431 //
3432 // CHECK6-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
3433 // CHECK6-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
3434 // CHECK6-NEXT:  entry:
3435 // CHECK6-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
3436 // CHECK6-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
3437 // CHECK6-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3438 // CHECK6:       arraydestroy.body:
3439 // CHECK6-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3440 // CHECK6-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3441 // CHECK6-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
3442 // CHECK6-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
3443 // CHECK6-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
3444 // CHECK6:       arraydestroy.done1:
3445 // CHECK6-NEXT:    ret void
3446 //
3447 //
3448 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3449 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3450 // CHECK6-NEXT:  entry:
3451 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3452 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3453 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3454 // CHECK6-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3455 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3456 // CHECK6-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3457 // CHECK6-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3458 // CHECK6-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
3459 // CHECK6-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
3460 // CHECK6-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
3461 // CHECK6-NEXT:    store float [[ADD]], float* [[F]], align 4
3462 // CHECK6-NEXT:    ret void
3463 //
3464 //
3465 // CHECK6-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
3466 // CHECK6-SAME: () #[[ATTR0]] {
3467 // CHECK6-NEXT:  entry:
3468 // CHECK6-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
3469 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
3470 // CHECK6-NEXT:    ret void
3471 //
3472 //
3473 // CHECK6-LABEL: define {{[^@]+}}@main
3474 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] {
3475 // CHECK6-NEXT:  entry:
3476 // CHECK6-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3477 // CHECK6-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
3478 // CHECK6-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3479 // CHECK6-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
3480 // CHECK6-NEXT:    ret i32 0
3481 //
3482 //
3483 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104
3484 // CHECK6-SAME: () #[[ATTR5:[0-9]+]] {
3485 // CHECK6-NEXT:  entry:
3486 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
3487 // CHECK6-NEXT:    ret void
3488 //
3489 //
3490 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
3491 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR5]] {
3492 // CHECK6-NEXT:  entry:
3493 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3494 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3495 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3496 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3497 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
3498 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3499 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3500 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3501 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3502 // CHECK6-NEXT:    [[G:%.*]] = alloca i32, align 4
3503 // CHECK6-NEXT:    [[G1:%.*]] = alloca i32, align 4
3504 // CHECK6-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
3505 // CHECK6-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
3506 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
3507 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3508 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3509 // CHECK6-NEXT:    store i32* undef, i32** [[_TMP1]], align 8
3510 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3511 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
3512 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3513 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3514 // CHECK6-NEXT:    store i32* [[G1]], i32** [[_TMP2]], align 8
3515 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3516 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3517 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3518 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3519 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
3520 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3521 // CHECK6:       cond.true:
3522 // CHECK6-NEXT:    br label [[COND_END:%.*]]
3523 // CHECK6:       cond.false:
3524 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3525 // CHECK6-NEXT:    br label [[COND_END]]
3526 // CHECK6:       cond.end:
3527 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3528 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3529 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3530 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3531 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3532 // CHECK6:       omp.inner.for.cond:
3533 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3534 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3535 // CHECK6-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3536 // CHECK6-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3537 // CHECK6:       omp.inner.for.body:
3538 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3539 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3540 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3541 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3542 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3543 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3544 // CHECK6:       omp.inner.for.inc:
3545 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3546 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3547 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3548 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3549 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3550 // CHECK6:       omp.inner.for.end:
3551 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3552 // CHECK6:       omp.loop.exit:
3553 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3554 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3555 // CHECK6-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3556 // CHECK6-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3557 // CHECK6:       .omp.final.then:
3558 // CHECK6-NEXT:    store i32 2, i32* [[I]], align 4
3559 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3560 // CHECK6:       .omp.final.done:
3561 // CHECK6-NEXT:    ret void
3562 //
3563 //
3564 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3
3565 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR5]] {
3566 // CHECK6-NEXT:  entry:
3567 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3568 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3569 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3570 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3571 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3572 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3573 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
3574 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3575 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3576 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3577 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3578 // CHECK6-NEXT:    [[G:%.*]] = alloca i32, align 4
3579 // CHECK6-NEXT:    [[G1:%.*]] = alloca i32, align 4
3580 // CHECK6-NEXT:    [[_TMP3:%.*]] = alloca i32*, align 8
3581 // CHECK6-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
3582 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
3583 // CHECK6-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
3584 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3585 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3586 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3587 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3588 // CHECK6-NEXT:    store i32* undef, i32** [[_TMP1]], align 8
3589 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3590 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3591 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3592 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3593 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3594 // CHECK6-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
3595 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3596 // CHECK6-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
3597 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3598 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3599 // CHECK6-NEXT:    store i32* [[G1]], i32** [[_TMP3]], align 8
3600 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3601 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3602 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3603 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3604 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
3605 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3606 // CHECK6:       cond.true:
3607 // CHECK6-NEXT:    br label [[COND_END:%.*]]
3608 // CHECK6:       cond.false:
3609 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3610 // CHECK6-NEXT:    br label [[COND_END]]
3611 // CHECK6:       cond.end:
3612 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3613 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3614 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3615 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3616 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3617 // CHECK6:       omp.inner.for.cond:
3618 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3619 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3620 // CHECK6-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3621 // CHECK6-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3622 // CHECK6:       omp.inner.for.body:
3623 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3624 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3625 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3626 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3627 // CHECK6-NEXT:    store i32 1, i32* [[G]], align 4
3628 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[_TMP3]], align 8
3629 // CHECK6-NEXT:    store volatile i32 1, i32* [[TMP10]], align 4
3630 // CHECK6-NEXT:    store i32 2, i32* [[SIVAR]], align 4
3631 // CHECK6-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
3632 // CHECK6-NEXT:    store i32* [[G]], i32** [[TMP11]], align 8
3633 // CHECK6-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
3634 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[_TMP3]], align 8
3635 // CHECK6-NEXT:    store i32* [[TMP13]], i32** [[TMP12]], align 8
3636 // CHECK6-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
3637 // CHECK6-NEXT:    store i32* [[SIVAR]], i32** [[TMP14]], align 8
3638 // CHECK6-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(24) [[REF_TMP]])
3639 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3640 // CHECK6:       omp.body.continue:
3641 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3642 // CHECK6:       omp.inner.for.inc:
3643 // CHECK6-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3644 // CHECK6-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1
3645 // CHECK6-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
3646 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
3647 // CHECK6:       omp.inner.for.end:
3648 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3649 // CHECK6:       omp.loop.exit:
3650 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3651 // CHECK6-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3652 // CHECK6-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3653 // CHECK6-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3654 // CHECK6:       .omp.final.then:
3655 // CHECK6-NEXT:    store i32 2, i32* [[I]], align 4
3656 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3657 // CHECK6:       .omp.final.done:
3658 // CHECK6-NEXT:    ret void
3659 //
3660 //
3661 // CHECK6-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
3662 // CHECK6-SAME: () #[[ATTR0]] {
3663 // CHECK6-NEXT:  entry:
3664 // CHECK6-NEXT:    call void @__cxx_global_var_init()
3665 // CHECK6-NEXT:    call void @__cxx_global_var_init.1()
3666 // CHECK6-NEXT:    call void @__cxx_global_var_init.2()
3667 // CHECK6-NEXT:    ret void
3668 //
3669 //
3670 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3671 // CHECK6-SAME: () #[[ATTR0]] {
3672 // CHECK6-NEXT:  entry:
3673 // CHECK6-NEXT:    call void @__tgt_register_requires(i64 1)
3674 // CHECK6-NEXT:    ret void
3675 //
3676 //
3677 // CHECK7-LABEL: define {{[^@]+}}@__cxx_global_var_init
3678 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3679 // CHECK7-NEXT:  entry:
3680 // CHECK7-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
3681 // CHECK7-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
3682 // CHECK7-NEXT:    ret void
3683 //
3684 //
3685 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3686 // CHECK7-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3687 // CHECK7-NEXT:  entry:
3688 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3689 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3690 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3691 // CHECK7-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
3692 // CHECK7-NEXT:    ret void
3693 //
3694 //
3695 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3696 // CHECK7-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3697 // CHECK7-NEXT:  entry:
3698 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3699 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3700 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3701 // CHECK7-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
3702 // CHECK7-NEXT:    ret void
3703 //
3704 //
3705 // CHECK7-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
3706 // CHECK7-SAME: () #[[ATTR0]] {
3707 // CHECK7-NEXT:  entry:
3708 // CHECK7-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
3709 // CHECK7-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
3710 // CHECK7-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
3711 // CHECK7-NEXT:    ret void
3712 //
3713 //
3714 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3715 // CHECK7-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3716 // CHECK7-NEXT:  entry:
3717 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3718 // CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3719 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3720 // CHECK7-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3721 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3722 // CHECK7-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3723 // CHECK7-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
3724 // CHECK7-NEXT:    ret void
3725 //
3726 //
3727 // CHECK7-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
3728 // CHECK7-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
3729 // CHECK7-NEXT:  entry:
3730 // CHECK7-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
3731 // CHECK7-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
3732 // CHECK7-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3733 // CHECK7:       arraydestroy.body:
3734 // CHECK7-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3735 // CHECK7-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3736 // CHECK7-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
3737 // CHECK7-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
3738 // CHECK7-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
3739 // CHECK7:       arraydestroy.done1:
3740 // CHECK7-NEXT:    ret void
3741 //
3742 //
3743 // CHECK7-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
3744 // CHECK7-SAME: () #[[ATTR0]] {
3745 // CHECK7-NEXT:  entry:
3746 // CHECK7-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
3747 // CHECK7-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
3748 // CHECK7-NEXT:    ret void
3749 //
3750 //
3751 // CHECK7-LABEL: define {{[^@]+}}@main
3752 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] {
3753 // CHECK7-NEXT:  entry:
3754 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3755 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3756 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3757 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3758 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3759 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3760 // CHECK7-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3761 // CHECK7-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3762 // CHECK7-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3763 // CHECK7-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3764 // CHECK7-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
3765 // CHECK7-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3766 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3767 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3768 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3769 // CHECK7-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3770 // CHECK7-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3771 // CHECK7-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
3772 // CHECK7-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3773 // CHECK7:       arrayctor.loop:
3774 // CHECK7-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3775 // CHECK7-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3776 // CHECK7-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
3777 // CHECK7-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3778 // CHECK7-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3779 // CHECK7:       arrayctor.cont:
3780 // CHECK7-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
3781 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3782 // CHECK7:       omp.inner.for.cond:
3783 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3784 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
3785 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3786 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3787 // CHECK7:       omp.inner.for.cond.cleanup:
3788 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3789 // CHECK7:       omp.inner.for.body:
3790 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3791 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3792 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3793 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
3794 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !2
3795 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
3796 // CHECK7-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
3797 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
3798 // CHECK7-NEXT:    store i32 [[TMP4]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
3799 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
3800 // CHECK7-NEXT:    [[IDXPROM1:%.*]] = sext i32 [[TMP6]] to i64
3801 // CHECK7-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM1]]
3802 // CHECK7-NEXT:    [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8*
3803 // CHECK7-NEXT:    [[TMP8:%.*]] = bitcast %struct.S* [[VAR]] to i8*
3804 // CHECK7-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 4, i1 false), !llvm.access.group !2
3805 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
3806 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !2
3807 // CHECK7-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
3808 // CHECK7-NEXT:    store i32 [[ADD3]], i32* [[SIVAR]], align 4, !llvm.access.group !2
3809 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3810 // CHECK7:       omp.body.continue:
3811 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3812 // CHECK7:       omp.inner.for.inc:
3813 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3814 // CHECK7-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
3815 // CHECK7-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3816 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3817 // CHECK7:       omp.inner.for.end:
3818 // CHECK7-NEXT:    store i32 2, i32* [[I]], align 4
3819 // CHECK7-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
3820 // CHECK7-NEXT:    [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3821 // CHECK7-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i64 2
3822 // CHECK7-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3823 // CHECK7:       arraydestroy.body:
3824 // CHECK7-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3825 // CHECK7-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3826 // CHECK7-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
3827 // CHECK7-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]]
3828 // CHECK7-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]
3829 // CHECK7:       arraydestroy.done6:
3830 // CHECK7-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
3831 // CHECK7-NEXT:    ret i32 [[CALL]]
3832 //
3833 //
3834 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3835 // CHECK7-SAME: () #[[ATTR5:[0-9]+]] comdat {
3836 // CHECK7-NEXT:  entry:
3837 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3838 // CHECK7-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3839 // CHECK7-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3840 // CHECK7-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3841 // CHECK7-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3842 // CHECK7-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
3843 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3844 // CHECK7-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
3845 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3846 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3847 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3848 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3849 // CHECK7-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
3850 // CHECK7-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
3851 // CHECK7-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
3852 // CHECK7-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
3853 // CHECK7-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 8
3854 // CHECK7-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
3855 // CHECK7-NEXT:    store i32 0, i32* [[T_VAR]], align 4
3856 // CHECK7-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3857 // CHECK7-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
3858 // CHECK7-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
3859 // CHECK7-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
3860 // CHECK7-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
3861 // CHECK7-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
3862 // CHECK7-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
3863 // CHECK7-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
3864 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3865 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3866 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3867 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
3868 // CHECK7-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
3869 // CHECK7-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
3870 // CHECK7-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3871 // CHECK7:       arrayctor.loop:
3872 // CHECK7-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3873 // CHECK7-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3874 // CHECK7-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
3875 // CHECK7-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3876 // CHECK7-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3877 // CHECK7:       arrayctor.cont:
3878 // CHECK7-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]])
3879 // CHECK7-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8
3880 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3881 // CHECK7:       omp.inner.for.cond:
3882 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3883 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
3884 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
3885 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3886 // CHECK7:       omp.inner.for.cond.cleanup:
3887 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3888 // CHECK7:       omp.inner.for.body:
3889 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3890 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
3891 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3892 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
3893 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6
3894 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
3895 // CHECK7-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
3896 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
3897 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
3898 // CHECK7-NEXT:    [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !6
3899 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
3900 // CHECK7-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64
3901 // CHECK7-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]]
3902 // CHECK7-NEXT:    [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
3903 // CHECK7-NEXT:    [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8*
3904 // CHECK7-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !6
3905 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3906 // CHECK7:       omp.body.continue:
3907 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3908 // CHECK7:       omp.inner.for.inc:
3909 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3910 // CHECK7-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1
3911 // CHECK7-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3912 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3913 // CHECK7:       omp.inner.for.end:
3914 // CHECK7-NEXT:    store i32 2, i32* [[I]], align 4
3915 // CHECK7-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR2]]
3916 // CHECK7-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
3917 // CHECK7-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2
3918 // CHECK7-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3919 // CHECK7:       arraydestroy.body:
3920 // CHECK7-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3921 // CHECK7-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3922 // CHECK7-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
3923 // CHECK7-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
3924 // CHECK7-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
3925 // CHECK7:       arraydestroy.done11:
3926 // CHECK7-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3927 // CHECK7-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3928 // CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
3929 // CHECK7-NEXT:    br label [[ARRAYDESTROY_BODY13:%.*]]
3930 // CHECK7:       arraydestroy.body13:
3931 // CHECK7-NEXT:    [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ]
3932 // CHECK7-NEXT:    [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1
3933 // CHECK7-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR2]]
3934 // CHECK7-NEXT:    [[ARRAYDESTROY_DONE16:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]]
3935 // CHECK7-NEXT:    br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]]
3936 // CHECK7:       arraydestroy.done17:
3937 // CHECK7-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
3938 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
3939 // CHECK7-NEXT:    ret i32 [[TMP14]]
3940 //
3941 //
3942 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3943 // CHECK7-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3944 // CHECK7-NEXT:  entry:
3945 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3946 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3947 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3948 // CHECK7-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3949 // CHECK7-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
3950 // CHECK7-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
3951 // CHECK7-NEXT:    store float [[CONV]], float* [[F]], align 4
3952 // CHECK7-NEXT:    ret void
3953 //
3954 //
3955 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3956 // CHECK7-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3957 // CHECK7-NEXT:  entry:
3958 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3959 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3960 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3961 // CHECK7-NEXT:    ret void
3962 //
3963 //
3964 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3965 // CHECK7-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3966 // CHECK7-NEXT:  entry:
3967 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3968 // CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3969 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3970 // CHECK7-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3971 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3972 // CHECK7-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3973 // CHECK7-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3974 // CHECK7-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
3975 // CHECK7-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
3976 // CHECK7-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
3977 // CHECK7-NEXT:    store float [[ADD]], float* [[F]], align 4
3978 // CHECK7-NEXT:    ret void
3979 //
3980 //
3981 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3982 // CHECK7-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3983 // CHECK7-NEXT:  entry:
3984 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3985 // CHECK7-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3986 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3987 // CHECK7-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
3988 // CHECK7-NEXT:    ret void
3989 //
3990 //
3991 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3992 // CHECK7-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3993 // CHECK7-NEXT:  entry:
3994 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3995 // CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3996 // CHECK7-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3997 // CHECK7-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3998 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3999 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4000 // CHECK7-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
4001 // CHECK7-NEXT:    ret void
4002 //
4003 //
4004 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4005 // CHECK7-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4006 // CHECK7-NEXT:  entry:
4007 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4008 // CHECK7-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4009 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4010 // CHECK7-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
4011 // CHECK7-NEXT:    ret void
4012 //
4013 //
4014 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4015 // CHECK7-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4016 // CHECK7-NEXT:  entry:
4017 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4018 // CHECK7-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4019 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4020 // CHECK7-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4021 // CHECK7-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
4022 // CHECK7-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
4023 // CHECK7-NEXT:    ret void
4024 //
4025 //
4026 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4027 // CHECK7-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4028 // CHECK7-NEXT:  entry:
4029 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4030 // CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4031 // CHECK7-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4032 // CHECK7-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4033 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4034 // CHECK7-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4035 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4036 // CHECK7-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
4037 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
4038 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
4039 // CHECK7-NEXT:    ret void
4040 //
4041 //
4042 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4043 // CHECK7-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4044 // CHECK7-NEXT:  entry:
4045 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4046 // CHECK7-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4047 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4048 // CHECK7-NEXT:    ret void
4049 //
4050 //
4051 // CHECK7-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
4052 // CHECK7-SAME: () #[[ATTR0]] {
4053 // CHECK7-NEXT:  entry:
4054 // CHECK7-NEXT:    call void @__cxx_global_var_init()
4055 // CHECK7-NEXT:    call void @__cxx_global_var_init.1()
4056 // CHECK7-NEXT:    call void @__cxx_global_var_init.2()
4057 // CHECK7-NEXT:    ret void
4058 //
4059 //
4060 // CHECK8-LABEL: define {{[^@]+}}@__cxx_global_var_init
4061 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
4062 // CHECK8-NEXT:  entry:
4063 // CHECK8-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
4064 // CHECK8-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
4065 // CHECK8-NEXT:    ret void
4066 //
4067 //
4068 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
4069 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4070 // CHECK8-NEXT:  entry:
4071 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4072 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4073 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4074 // CHECK8-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
4075 // CHECK8-NEXT:    ret void
4076 //
4077 //
4078 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
4079 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4080 // CHECK8-NEXT:  entry:
4081 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4082 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4083 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4084 // CHECK8-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
4085 // CHECK8-NEXT:    ret void
4086 //
4087 //
4088 // CHECK8-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
4089 // CHECK8-SAME: () #[[ATTR0]] {
4090 // CHECK8-NEXT:  entry:
4091 // CHECK8-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
4092 // CHECK8-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
4093 // CHECK8-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
4094 // CHECK8-NEXT:    ret void
4095 //
4096 //
4097 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
4098 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4099 // CHECK8-NEXT:  entry:
4100 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4101 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4102 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4103 // CHECK8-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4104 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4105 // CHECK8-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4106 // CHECK8-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
4107 // CHECK8-NEXT:    ret void
4108 //
4109 //
4110 // CHECK8-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
4111 // CHECK8-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
4112 // CHECK8-NEXT:  entry:
4113 // CHECK8-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
4114 // CHECK8-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
4115 // CHECK8-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4116 // CHECK8:       arraydestroy.body:
4117 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4118 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4119 // CHECK8-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
4120 // CHECK8-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
4121 // CHECK8-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
4122 // CHECK8:       arraydestroy.done1:
4123 // CHECK8-NEXT:    ret void
4124 //
4125 //
4126 // CHECK8-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
4127 // CHECK8-SAME: () #[[ATTR0]] {
4128 // CHECK8-NEXT:  entry:
4129 // CHECK8-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
4130 // CHECK8-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
4131 // CHECK8-NEXT:    ret void
4132 //
4133 //
4134 // CHECK8-LABEL: define {{[^@]+}}@main
4135 // CHECK8-SAME: () #[[ATTR3:[0-9]+]] {
4136 // CHECK8-NEXT:  entry:
4137 // CHECK8-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4138 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4139 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4140 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4141 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4142 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
4143 // CHECK8-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4144 // CHECK8-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4145 // CHECK8-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4146 // CHECK8-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4147 // CHECK8-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
4148 // CHECK8-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4149 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4150 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4151 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4152 // CHECK8-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4153 // CHECK8-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4154 // CHECK8-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
4155 // CHECK8-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4156 // CHECK8:       arrayctor.loop:
4157 // CHECK8-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4158 // CHECK8-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4159 // CHECK8-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
4160 // CHECK8-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4161 // CHECK8-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4162 // CHECK8:       arrayctor.cont:
4163 // CHECK8-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
4164 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4165 // CHECK8:       omp.inner.for.cond:
4166 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4167 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
4168 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4169 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4170 // CHECK8:       omp.inner.for.cond.cleanup:
4171 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4172 // CHECK8:       omp.inner.for.body:
4173 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4174 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4175 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4176 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
4177 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !2
4178 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
4179 // CHECK8-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
4180 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
4181 // CHECK8-NEXT:    store i32 [[TMP4]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
4182 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
4183 // CHECK8-NEXT:    [[IDXPROM1:%.*]] = sext i32 [[TMP6]] to i64
4184 // CHECK8-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM1]]
4185 // CHECK8-NEXT:    [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8*
4186 // CHECK8-NEXT:    [[TMP8:%.*]] = bitcast %struct.S* [[VAR]] to i8*
4187 // CHECK8-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 4, i1 false), !llvm.access.group !2
4188 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
4189 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !2
4190 // CHECK8-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
4191 // CHECK8-NEXT:    store i32 [[ADD3]], i32* [[SIVAR]], align 4, !llvm.access.group !2
4192 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4193 // CHECK8:       omp.body.continue:
4194 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4195 // CHECK8:       omp.inner.for.inc:
4196 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4197 // CHECK8-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
4198 // CHECK8-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4199 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
4200 // CHECK8:       omp.inner.for.end:
4201 // CHECK8-NEXT:    store i32 2, i32* [[I]], align 4
4202 // CHECK8-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
4203 // CHECK8-NEXT:    [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4204 // CHECK8-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i64 2
4205 // CHECK8-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4206 // CHECK8:       arraydestroy.body:
4207 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4208 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4209 // CHECK8-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
4210 // CHECK8-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]]
4211 // CHECK8-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]
4212 // CHECK8:       arraydestroy.done6:
4213 // CHECK8-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
4214 // CHECK8-NEXT:    ret i32 [[CALL]]
4215 //
4216 //
4217 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
4218 // CHECK8-SAME: () #[[ATTR5:[0-9]+]] comdat {
4219 // CHECK8-NEXT:  entry:
4220 // CHECK8-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4221 // CHECK8-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4222 // CHECK8-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4223 // CHECK8-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4224 // CHECK8-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
4225 // CHECK8-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
4226 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4227 // CHECK8-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
4228 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4229 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4230 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4231 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
4232 // CHECK8-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
4233 // CHECK8-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
4234 // CHECK8-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
4235 // CHECK8-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
4236 // CHECK8-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 8
4237 // CHECK8-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
4238 // CHECK8-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4239 // CHECK8-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4240 // CHECK8-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
4241 // CHECK8-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
4242 // CHECK8-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
4243 // CHECK8-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
4244 // CHECK8-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
4245 // CHECK8-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
4246 // CHECK8-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
4247 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4248 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4249 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4250 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
4251 // CHECK8-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
4252 // CHECK8-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
4253 // CHECK8-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4254 // CHECK8:       arrayctor.loop:
4255 // CHECK8-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4256 // CHECK8-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4257 // CHECK8-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
4258 // CHECK8-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4259 // CHECK8-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4260 // CHECK8:       arrayctor.cont:
4261 // CHECK8-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]])
4262 // CHECK8-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8
4263 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4264 // CHECK8:       omp.inner.for.cond:
4265 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4266 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
4267 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
4268 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4269 // CHECK8:       omp.inner.for.cond.cleanup:
4270 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4271 // CHECK8:       omp.inner.for.body:
4272 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4273 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
4274 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4275 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
4276 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6
4277 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
4278 // CHECK8-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
4279 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
4280 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
4281 // CHECK8-NEXT:    [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !6
4282 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
4283 // CHECK8-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64
4284 // CHECK8-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]]
4285 // CHECK8-NEXT:    [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
4286 // CHECK8-NEXT:    [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8*
4287 // CHECK8-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !6
4288 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4289 // CHECK8:       omp.body.continue:
4290 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4291 // CHECK8:       omp.inner.for.inc:
4292 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4293 // CHECK8-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1
4294 // CHECK8-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4295 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
4296 // CHECK8:       omp.inner.for.end:
4297 // CHECK8-NEXT:    store i32 2, i32* [[I]], align 4
4298 // CHECK8-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR2]]
4299 // CHECK8-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
4300 // CHECK8-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2
4301 // CHECK8-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4302 // CHECK8:       arraydestroy.body:
4303 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4304 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4305 // CHECK8-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
4306 // CHECK8-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
4307 // CHECK8-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
4308 // CHECK8:       arraydestroy.done11:
4309 // CHECK8-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4310 // CHECK8-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4311 // CHECK8-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
4312 // CHECK8-NEXT:    br label [[ARRAYDESTROY_BODY13:%.*]]
4313 // CHECK8:       arraydestroy.body13:
4314 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ]
4315 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1
4316 // CHECK8-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR2]]
4317 // CHECK8-NEXT:    [[ARRAYDESTROY_DONE16:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]]
4318 // CHECK8-NEXT:    br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]]
4319 // CHECK8:       arraydestroy.done17:
4320 // CHECK8-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
4321 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
4322 // CHECK8-NEXT:    ret i32 [[TMP14]]
4323 //
4324 //
4325 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4326 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4327 // CHECK8-NEXT:  entry:
4328 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4329 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4330 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4331 // CHECK8-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4332 // CHECK8-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
4333 // CHECK8-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
4334 // CHECK8-NEXT:    store float [[CONV]], float* [[F]], align 4
4335 // CHECK8-NEXT:    ret void
4336 //
4337 //
4338 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4339 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4340 // CHECK8-NEXT:  entry:
4341 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4342 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4343 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4344 // CHECK8-NEXT:    ret void
4345 //
4346 //
4347 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4348 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4349 // CHECK8-NEXT:  entry:
4350 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4351 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4352 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4353 // CHECK8-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4354 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4355 // CHECK8-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4356 // CHECK8-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4357 // CHECK8-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
4358 // CHECK8-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
4359 // CHECK8-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
4360 // CHECK8-NEXT:    store float [[ADD]], float* [[F]], align 4
4361 // CHECK8-NEXT:    ret void
4362 //
4363 //
4364 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4365 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4366 // CHECK8-NEXT:  entry:
4367 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4368 // CHECK8-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4369 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4370 // CHECK8-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
4371 // CHECK8-NEXT:    ret void
4372 //
4373 //
4374 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4375 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4376 // CHECK8-NEXT:  entry:
4377 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4378 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4379 // CHECK8-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4380 // CHECK8-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4381 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4382 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4383 // CHECK8-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
4384 // CHECK8-NEXT:    ret void
4385 //
4386 //
4387 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4388 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4389 // CHECK8-NEXT:  entry:
4390 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4391 // CHECK8-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4392 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4393 // CHECK8-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
4394 // CHECK8-NEXT:    ret void
4395 //
4396 //
4397 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4398 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4399 // CHECK8-NEXT:  entry:
4400 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4401 // CHECK8-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4402 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4403 // CHECK8-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4404 // CHECK8-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
4405 // CHECK8-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
4406 // CHECK8-NEXT:    ret void
4407 //
4408 //
4409 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4410 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4411 // CHECK8-NEXT:  entry:
4412 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4413 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4414 // CHECK8-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4415 // CHECK8-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4416 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4417 // CHECK8-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4418 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4419 // CHECK8-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
4420 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
4421 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
4422 // CHECK8-NEXT:    ret void
4423 //
4424 //
4425 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4426 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4427 // CHECK8-NEXT:  entry:
4428 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4429 // CHECK8-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4430 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4431 // CHECK8-NEXT:    ret void
4432 //
4433 //
4434 // CHECK8-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
4435 // CHECK8-SAME: () #[[ATTR0]] {
4436 // CHECK8-NEXT:  entry:
4437 // CHECK8-NEXT:    call void @__cxx_global_var_init()
4438 // CHECK8-NEXT:    call void @__cxx_global_var_init.1()
4439 // CHECK8-NEXT:    call void @__cxx_global_var_init.2()
4440 // CHECK8-NEXT:    ret void
4441 //
4442 //
4443 // CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init
4444 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
4445 // CHECK9-NEXT:  entry:
4446 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
4447 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
4448 // CHECK9-NEXT:    ret void
4449 //
4450 //
4451 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
4452 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4453 // CHECK9-NEXT:  entry:
4454 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4455 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4456 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4457 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
4458 // CHECK9-NEXT:    ret void
4459 //
4460 //
4461 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
4462 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4463 // CHECK9-NEXT:  entry:
4464 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4465 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4466 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4467 // CHECK9-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
4468 // CHECK9-NEXT:    ret void
4469 //
4470 //
4471 // CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
4472 // CHECK9-SAME: () #[[ATTR0]] {
4473 // CHECK9-NEXT:  entry:
4474 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), float 1.000000e+00)
4475 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 1), float 2.000000e+00)
4476 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
4477 // CHECK9-NEXT:    ret void
4478 //
4479 //
4480 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
4481 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4482 // CHECK9-NEXT:  entry:
4483 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4484 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4485 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4486 // CHECK9-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4487 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4488 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4489 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
4490 // CHECK9-NEXT:    ret void
4491 //
4492 //
4493 // CHECK9-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
4494 // CHECK9-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
4495 // CHECK9-NEXT:  entry:
4496 // CHECK9-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
4497 // CHECK9-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
4498 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4499 // CHECK9:       arraydestroy.body:
4500 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i32 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4501 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4502 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
4503 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
4504 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
4505 // CHECK9:       arraydestroy.done1:
4506 // CHECK9-NEXT:    ret void
4507 //
4508 //
4509 // CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
4510 // CHECK9-SAME: () #[[ATTR0]] {
4511 // CHECK9-NEXT:  entry:
4512 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
4513 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
4514 // CHECK9-NEXT:    ret void
4515 //
4516 //
4517 // CHECK9-LABEL: define {{[^@]+}}@main
4518 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
4519 // CHECK9-NEXT:  entry:
4520 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4521 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4522 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4523 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4524 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4525 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4526 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4527 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4528 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4529 // CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4530 // CHECK9-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
4531 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4532 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4533 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4534 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4535 // CHECK9-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4536 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4537 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
4538 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4539 // CHECK9:       arrayctor.loop:
4540 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4541 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4542 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
4543 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4544 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4545 // CHECK9:       arrayctor.cont:
4546 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
4547 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4548 // CHECK9:       omp.inner.for.cond:
4549 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4550 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
4551 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4552 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4553 // CHECK9:       omp.inner.for.cond.cleanup:
4554 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4555 // CHECK9:       omp.inner.for.body:
4556 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4557 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4558 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4559 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
4560 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !3
4561 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4562 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP5]]
4563 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
4564 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4565 // CHECK9-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP6]]
4566 // CHECK9-NEXT:    [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8*
4567 // CHECK9-NEXT:    [[TMP8:%.*]] = bitcast %struct.S* [[VAR]] to i8*
4568 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 4, i1 false), !llvm.access.group !3
4569 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4570 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !3
4571 // CHECK9-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
4572 // CHECK9-NEXT:    store i32 [[ADD2]], i32* [[SIVAR]], align 4, !llvm.access.group !3
4573 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4574 // CHECK9:       omp.body.continue:
4575 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4576 // CHECK9:       omp.inner.for.inc:
4577 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4578 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
4579 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4580 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
4581 // CHECK9:       omp.inner.for.end:
4582 // CHECK9-NEXT:    store i32 2, i32* [[I]], align 4
4583 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
4584 // CHECK9-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4585 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2
4586 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4587 // CHECK9:       arraydestroy.body:
4588 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4589 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4590 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
4591 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
4592 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
4593 // CHECK9:       arraydestroy.done5:
4594 // CHECK9-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
4595 // CHECK9-NEXT:    ret i32 [[CALL]]
4596 //
4597 //
4598 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
4599 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
4600 // CHECK9-NEXT:  entry:
4601 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4602 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4603 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4604 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4605 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
4606 // CHECK9-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
4607 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4608 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
4609 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4610 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4611 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4612 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4613 // CHECK9-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
4614 // CHECK9-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
4615 // CHECK9-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
4616 // CHECK9-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
4617 // CHECK9-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
4618 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
4619 // CHECK9-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4620 // CHECK9-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4621 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
4622 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4623 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
4624 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
4625 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
4626 // CHECK9-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
4627 // CHECK9-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
4628 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4629 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4630 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4631 // CHECK9-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
4632 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
4633 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
4634 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4635 // CHECK9:       arrayctor.loop:
4636 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4637 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4638 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
4639 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4640 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4641 // CHECK9:       arrayctor.cont:
4642 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]])
4643 // CHECK9-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
4644 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4645 // CHECK9:       omp.inner.for.cond:
4646 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4647 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
4648 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
4649 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4650 // CHECK9:       omp.inner.for.cond.cleanup:
4651 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4652 // CHECK9:       omp.inner.for.body:
4653 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4654 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
4655 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4656 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
4657 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !7
4658 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
4659 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]]
4660 // CHECK9-NEXT:    store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
4661 // CHECK9-NEXT:    [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !7
4662 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
4663 // CHECK9-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP8]]
4664 // CHECK9-NEXT:    [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8*
4665 // CHECK9-NEXT:    [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8*
4666 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !7
4667 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4668 // CHECK9:       omp.body.continue:
4669 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4670 // CHECK9:       omp.inner.for.inc:
4671 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4672 // CHECK9-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1
4673 // CHECK9-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4674 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
4675 // CHECK9:       omp.inner.for.end:
4676 // CHECK9-NEXT:    store i32 2, i32* [[I]], align 4
4677 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR2]]
4678 // CHECK9-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
4679 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2
4680 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4681 // CHECK9:       arraydestroy.body:
4682 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4683 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4684 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
4685 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]
4686 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]
4687 // CHECK9:       arraydestroy.done10:
4688 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4689 // CHECK9-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4690 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
4691 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY12:%.*]]
4692 // CHECK9:       arraydestroy.body12:
4693 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ]
4694 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1
4695 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR2]]
4696 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE15:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]]
4697 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]]
4698 // CHECK9:       arraydestroy.done16:
4699 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
4700 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
4701 // CHECK9-NEXT:    ret i32 [[TMP14]]
4702 //
4703 //
4704 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4705 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4706 // CHECK9-NEXT:  entry:
4707 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4708 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4709 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4710 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4711 // CHECK9-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
4712 // CHECK9-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
4713 // CHECK9-NEXT:    store float [[CONV]], float* [[F]], align 4
4714 // CHECK9-NEXT:    ret void
4715 //
4716 //
4717 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4718 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4719 // CHECK9-NEXT:  entry:
4720 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4721 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4722 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4723 // CHECK9-NEXT:    ret void
4724 //
4725 //
4726 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4727 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4728 // CHECK9-NEXT:  entry:
4729 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4730 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4731 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4732 // CHECK9-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4733 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4734 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4735 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4736 // CHECK9-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
4737 // CHECK9-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
4738 // CHECK9-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
4739 // CHECK9-NEXT:    store float [[ADD]], float* [[F]], align 4
4740 // CHECK9-NEXT:    ret void
4741 //
4742 //
4743 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4744 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4745 // CHECK9-NEXT:  entry:
4746 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4747 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4748 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4749 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
4750 // CHECK9-NEXT:    ret void
4751 //
4752 //
4753 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4754 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4755 // CHECK9-NEXT:  entry:
4756 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4757 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4758 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4759 // CHECK9-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4760 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4761 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4762 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
4763 // CHECK9-NEXT:    ret void
4764 //
4765 //
4766 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4767 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4768 // CHECK9-NEXT:  entry:
4769 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4770 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4771 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4772 // CHECK9-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
4773 // CHECK9-NEXT:    ret void
4774 //
4775 //
4776 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4777 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4778 // CHECK9-NEXT:  entry:
4779 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4780 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4781 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4782 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4783 // CHECK9-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
4784 // CHECK9-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
4785 // CHECK9-NEXT:    ret void
4786 //
4787 //
4788 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4789 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4790 // CHECK9-NEXT:  entry:
4791 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4792 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4793 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4794 // CHECK9-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4795 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4796 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4797 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4798 // CHECK9-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
4799 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
4800 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
4801 // CHECK9-NEXT:    ret void
4802 //
4803 //
4804 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4805 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4806 // CHECK9-NEXT:  entry:
4807 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4808 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4809 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4810 // CHECK9-NEXT:    ret void
4811 //
4812 //
4813 // CHECK9-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
4814 // CHECK9-SAME: () #[[ATTR0]] {
4815 // CHECK9-NEXT:  entry:
4816 // CHECK9-NEXT:    call void @__cxx_global_var_init()
4817 // CHECK9-NEXT:    call void @__cxx_global_var_init.1()
4818 // CHECK9-NEXT:    call void @__cxx_global_var_init.2()
4819 // CHECK9-NEXT:    ret void
4820 //
4821 //
4822 // CHECK10-LABEL: define {{[^@]+}}@__cxx_global_var_init
4823 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
4824 // CHECK10-NEXT:  entry:
4825 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
4826 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
4827 // CHECK10-NEXT:    ret void
4828 //
4829 //
4830 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
4831 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4832 // CHECK10-NEXT:  entry:
4833 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4834 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4835 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4836 // CHECK10-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
4837 // CHECK10-NEXT:    ret void
4838 //
4839 //
4840 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
4841 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4842 // CHECK10-NEXT:  entry:
4843 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4844 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4845 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4846 // CHECK10-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
4847 // CHECK10-NEXT:    ret void
4848 //
4849 //
4850 // CHECK10-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
4851 // CHECK10-SAME: () #[[ATTR0]] {
4852 // CHECK10-NEXT:  entry:
4853 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), float 1.000000e+00)
4854 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 1), float 2.000000e+00)
4855 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
4856 // CHECK10-NEXT:    ret void
4857 //
4858 //
4859 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
4860 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4861 // CHECK10-NEXT:  entry:
4862 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4863 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4864 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4865 // CHECK10-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4866 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4867 // CHECK10-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4868 // CHECK10-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
4869 // CHECK10-NEXT:    ret void
4870 //
4871 //
4872 // CHECK10-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
4873 // CHECK10-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
4874 // CHECK10-NEXT:  entry:
4875 // CHECK10-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
4876 // CHECK10-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
4877 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4878 // CHECK10:       arraydestroy.body:
4879 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i32 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4880 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4881 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
4882 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
4883 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
4884 // CHECK10:       arraydestroy.done1:
4885 // CHECK10-NEXT:    ret void
4886 //
4887 //
4888 // CHECK10-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
4889 // CHECK10-SAME: () #[[ATTR0]] {
4890 // CHECK10-NEXT:  entry:
4891 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
4892 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
4893 // CHECK10-NEXT:    ret void
4894 //
4895 //
4896 // CHECK10-LABEL: define {{[^@]+}}@main
4897 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] {
4898 // CHECK10-NEXT:  entry:
4899 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4900 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4901 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4902 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4903 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4904 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
4905 // CHECK10-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4906 // CHECK10-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4907 // CHECK10-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4908 // CHECK10-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4909 // CHECK10-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
4910 // CHECK10-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4911 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4912 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4913 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4914 // CHECK10-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4915 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4916 // CHECK10-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
4917 // CHECK10-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4918 // CHECK10:       arrayctor.loop:
4919 // CHECK10-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4920 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4921 // CHECK10-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
4922 // CHECK10-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4923 // CHECK10-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4924 // CHECK10:       arrayctor.cont:
4925 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
4926 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4927 // CHECK10:       omp.inner.for.cond:
4928 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4929 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
4930 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4931 // CHECK10-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4932 // CHECK10:       omp.inner.for.cond.cleanup:
4933 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4934 // CHECK10:       omp.inner.for.body:
4935 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4936 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4937 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4938 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
4939 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !3
4940 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4941 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP5]]
4942 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
4943 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4944 // CHECK10-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP6]]
4945 // CHECK10-NEXT:    [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8*
4946 // CHECK10-NEXT:    [[TMP8:%.*]] = bitcast %struct.S* [[VAR]] to i8*
4947 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 4, i1 false), !llvm.access.group !3
4948 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4949 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !3
4950 // CHECK10-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
4951 // CHECK10-NEXT:    store i32 [[ADD2]], i32* [[SIVAR]], align 4, !llvm.access.group !3
4952 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4953 // CHECK10:       omp.body.continue:
4954 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4955 // CHECK10:       omp.inner.for.inc:
4956 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4957 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
4958 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4959 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
4960 // CHECK10:       omp.inner.for.end:
4961 // CHECK10-NEXT:    store i32 2, i32* [[I]], align 4
4962 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
4963 // CHECK10-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4964 // CHECK10-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2
4965 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4966 // CHECK10:       arraydestroy.body:
4967 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4968 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4969 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
4970 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
4971 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
4972 // CHECK10:       arraydestroy.done5:
4973 // CHECK10-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
4974 // CHECK10-NEXT:    ret i32 [[CALL]]
4975 //
4976 //
4977 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
4978 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat {
4979 // CHECK10-NEXT:  entry:
4980 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4981 // CHECK10-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4982 // CHECK10-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4983 // CHECK10-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4984 // CHECK10-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
4985 // CHECK10-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
4986 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4987 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
4988 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4989 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4990 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4991 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
4992 // CHECK10-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
4993 // CHECK10-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
4994 // CHECK10-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
4995 // CHECK10-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
4996 // CHECK10-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
4997 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
4998 // CHECK10-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4999 // CHECK10-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
5000 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
5001 // CHECK10-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5002 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
5003 // CHECK10-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
5004 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
5005 // CHECK10-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
5006 // CHECK10-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
5007 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5008 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5009 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5010 // CHECK10-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
5011 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
5012 // CHECK10-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
5013 // CHECK10-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
5014 // CHECK10:       arrayctor.loop:
5015 // CHECK10-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5016 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
5017 // CHECK10-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
5018 // CHECK10-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5019 // CHECK10-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5020 // CHECK10:       arrayctor.cont:
5021 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]])
5022 // CHECK10-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
5023 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5024 // CHECK10:       omp.inner.for.cond:
5025 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5026 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
5027 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
5028 // CHECK10-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5029 // CHECK10:       omp.inner.for.cond.cleanup:
5030 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5031 // CHECK10:       omp.inner.for.body:
5032 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5033 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
5034 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5035 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
5036 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !7
5037 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
5038 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]]
5039 // CHECK10-NEXT:    store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
5040 // CHECK10-NEXT:    [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !7
5041 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
5042 // CHECK10-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP8]]
5043 // CHECK10-NEXT:    [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8*
5044 // CHECK10-NEXT:    [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8*
5045 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !7
5046 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5047 // CHECK10:       omp.body.continue:
5048 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5049 // CHECK10:       omp.inner.for.inc:
5050 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5051 // CHECK10-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1
5052 // CHECK10-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5053 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
5054 // CHECK10:       omp.inner.for.end:
5055 // CHECK10-NEXT:    store i32 2, i32* [[I]], align 4
5056 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR2]]
5057 // CHECK10-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
5058 // CHECK10-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2
5059 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5060 // CHECK10:       arraydestroy.body:
5061 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5062 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
5063 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
5064 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]
5065 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]
5066 // CHECK10:       arraydestroy.done10:
5067 // CHECK10-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5068 // CHECK10-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5069 // CHECK10-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
5070 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY12:%.*]]
5071 // CHECK10:       arraydestroy.body12:
5072 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ]
5073 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1
5074 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR2]]
5075 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE15:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]]
5076 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]]
5077 // CHECK10:       arraydestroy.done16:
5078 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
5079 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
5080 // CHECK10-NEXT:    ret i32 [[TMP14]]
5081 //
5082 //
5083 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
5084 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5085 // CHECK10-NEXT:  entry:
5086 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5087 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5088 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5089 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5090 // CHECK10-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
5091 // CHECK10-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
5092 // CHECK10-NEXT:    store float [[CONV]], float* [[F]], align 4
5093 // CHECK10-NEXT:    ret void
5094 //
5095 //
5096 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
5097 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5098 // CHECK10-NEXT:  entry:
5099 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5100 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5101 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5102 // CHECK10-NEXT:    ret void
5103 //
5104 //
5105 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
5106 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5107 // CHECK10-NEXT:  entry:
5108 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5109 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
5110 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5111 // CHECK10-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
5112 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5113 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5114 // CHECK10-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
5115 // CHECK10-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
5116 // CHECK10-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
5117 // CHECK10-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
5118 // CHECK10-NEXT:    store float [[ADD]], float* [[F]], align 4
5119 // CHECK10-NEXT:    ret void
5120 //
5121 //
5122 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
5123 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5124 // CHECK10-NEXT:  entry:
5125 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5126 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5127 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5128 // CHECK10-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
5129 // CHECK10-NEXT:    ret void
5130 //
5131 //
5132 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
5133 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5134 // CHECK10-NEXT:  entry:
5135 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5136 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5137 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5138 // CHECK10-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5139 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5140 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5141 // CHECK10-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
5142 // CHECK10-NEXT:    ret void
5143 //
5144 //
5145 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
5146 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5147 // CHECK10-NEXT:  entry:
5148 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5149 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5150 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5151 // CHECK10-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
5152 // CHECK10-NEXT:    ret void
5153 //
5154 //
5155 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
5156 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5157 // CHECK10-NEXT:  entry:
5158 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5159 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5160 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5161 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5162 // CHECK10-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
5163 // CHECK10-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
5164 // CHECK10-NEXT:    ret void
5165 //
5166 //
5167 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
5168 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5169 // CHECK10-NEXT:  entry:
5170 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5171 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5172 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5173 // CHECK10-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5174 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5175 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5176 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5177 // CHECK10-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
5178 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
5179 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
5180 // CHECK10-NEXT:    ret void
5181 //
5182 //
5183 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
5184 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5185 // CHECK10-NEXT:  entry:
5186 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5187 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5188 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5189 // CHECK10-NEXT:    ret void
5190 //
5191 //
5192 // CHECK10-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
5193 // CHECK10-SAME: () #[[ATTR0]] {
5194 // CHECK10-NEXT:  entry:
5195 // CHECK10-NEXT:    call void @__cxx_global_var_init()
5196 // CHECK10-NEXT:    call void @__cxx_global_var_init.1()
5197 // CHECK10-NEXT:    call void @__cxx_global_var_init.2()
5198 // CHECK10-NEXT:    ret void
5199 //
5200 //
5201 // CHECK11-LABEL: define {{[^@]+}}@__cxx_global_var_init
5202 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
5203 // CHECK11-NEXT:  entry:
5204 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
5205 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
5206 // CHECK11-NEXT:    ret void
5207 //
5208 //
5209 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
5210 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
5211 // CHECK11-NEXT:  entry:
5212 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5213 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5214 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5215 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
5216 // CHECK11-NEXT:    ret void
5217 //
5218 //
5219 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
5220 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5221 // CHECK11-NEXT:  entry:
5222 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5223 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5224 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5225 // CHECK11-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
5226 // CHECK11-NEXT:    ret void
5227 //
5228 //
5229 // CHECK11-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
5230 // CHECK11-SAME: () #[[ATTR0]] {
5231 // CHECK11-NEXT:  entry:
5232 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
5233 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
5234 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
5235 // CHECK11-NEXT:    ret void
5236 //
5237 //
5238 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
5239 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5240 // CHECK11-NEXT:  entry:
5241 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5242 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
5243 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5244 // CHECK11-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
5245 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5246 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
5247 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
5248 // CHECK11-NEXT:    ret void
5249 //
5250 //
5251 // CHECK11-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
5252 // CHECK11-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
5253 // CHECK11-NEXT:  entry:
5254 // CHECK11-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
5255 // CHECK11-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
5256 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5257 // CHECK11:       arraydestroy.body:
5258 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5259 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
5260 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
5261 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
5262 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
5263 // CHECK11:       arraydestroy.done1:
5264 // CHECK11-NEXT:    ret void
5265 //
5266 //
5267 // CHECK11-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
5268 // CHECK11-SAME: () #[[ATTR0]] {
5269 // CHECK11-NEXT:  entry:
5270 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
5271 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
5272 // CHECK11-NEXT:    ret void
5273 //
5274 //
5275 // CHECK11-LABEL: define {{[^@]+}}@main
5276 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
5277 // CHECK11-NEXT:  entry:
5278 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5279 // CHECK11-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
5280 // CHECK11-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5281 // CHECK11-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
5282 // CHECK11-NEXT:    ret i32 0
5283 //
5284 //
5285 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
5286 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5287 // CHECK11-NEXT:  entry:
5288 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5289 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5290 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5291 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5292 // CHECK11-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
5293 // CHECK11-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
5294 // CHECK11-NEXT:    store float [[CONV]], float* [[F]], align 4
5295 // CHECK11-NEXT:    ret void
5296 //
5297 //
5298 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
5299 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5300 // CHECK11-NEXT:  entry:
5301 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5302 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5303 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5304 // CHECK11-NEXT:    ret void
5305 //
5306 //
5307 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
5308 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5309 // CHECK11-NEXT:  entry:
5310 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5311 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
5312 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5313 // CHECK11-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
5314 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5315 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5316 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
5317 // CHECK11-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
5318 // CHECK11-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
5319 // CHECK11-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
5320 // CHECK11-NEXT:    store float [[ADD]], float* [[F]], align 4
5321 // CHECK11-NEXT:    ret void
5322 //
5323 //
5324 // CHECK11-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
5325 // CHECK11-SAME: () #[[ATTR0]] {
5326 // CHECK11-NEXT:  entry:
5327 // CHECK11-NEXT:    call void @__cxx_global_var_init()
5328 // CHECK11-NEXT:    call void @__cxx_global_var_init.1()
5329 // CHECK11-NEXT:    call void @__cxx_global_var_init.2()
5330 // CHECK11-NEXT:    ret void
5331 //
5332 //
5333 // CHECK12-LABEL: define {{[^@]+}}@__cxx_global_var_init
5334 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
5335 // CHECK12-NEXT:  entry:
5336 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
5337 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
5338 // CHECK12-NEXT:    ret void
5339 //
5340 //
5341 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
5342 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
5343 // CHECK12-NEXT:  entry:
5344 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5345 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5346 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5347 // CHECK12-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
5348 // CHECK12-NEXT:    ret void
5349 //
5350 //
5351 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
5352 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5353 // CHECK12-NEXT:  entry:
5354 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5355 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5356 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5357 // CHECK12-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
5358 // CHECK12-NEXT:    ret void
5359 //
5360 //
5361 // CHECK12-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
5362 // CHECK12-SAME: () #[[ATTR0]] {
5363 // CHECK12-NEXT:  entry:
5364 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
5365 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
5366 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
5367 // CHECK12-NEXT:    ret void
5368 //
5369 //
5370 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
5371 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5372 // CHECK12-NEXT:  entry:
5373 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5374 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
5375 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5376 // CHECK12-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
5377 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5378 // CHECK12-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
5379 // CHECK12-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
5380 // CHECK12-NEXT:    ret void
5381 //
5382 //
5383 // CHECK12-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
5384 // CHECK12-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
5385 // CHECK12-NEXT:  entry:
5386 // CHECK12-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
5387 // CHECK12-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
5388 // CHECK12-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5389 // CHECK12:       arraydestroy.body:
5390 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5391 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
5392 // CHECK12-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
5393 // CHECK12-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
5394 // CHECK12-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
5395 // CHECK12:       arraydestroy.done1:
5396 // CHECK12-NEXT:    ret void
5397 //
5398 //
5399 // CHECK12-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
5400 // CHECK12-SAME: () #[[ATTR0]] {
5401 // CHECK12-NEXT:  entry:
5402 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
5403 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
5404 // CHECK12-NEXT:    ret void
5405 //
5406 //
5407 // CHECK12-LABEL: define {{[^@]+}}@main
5408 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] {
5409 // CHECK12-NEXT:  entry:
5410 // CHECK12-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5411 // CHECK12-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
5412 // CHECK12-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5413 // CHECK12-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
5414 // CHECK12-NEXT:    ret i32 0
5415 //
5416 //
5417 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
5418 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5419 // CHECK12-NEXT:  entry:
5420 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5421 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5422 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5423 // CHECK12-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5424 // CHECK12-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
5425 // CHECK12-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
5426 // CHECK12-NEXT:    store float [[CONV]], float* [[F]], align 4
5427 // CHECK12-NEXT:    ret void
5428 //
5429 //
5430 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
5431 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5432 // CHECK12-NEXT:  entry:
5433 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5434 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5435 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5436 // CHECK12-NEXT:    ret void
5437 //
5438 //
5439 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
5440 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5441 // CHECK12-NEXT:  entry:
5442 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5443 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
5444 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5445 // CHECK12-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
5446 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5447 // CHECK12-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5448 // CHECK12-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
5449 // CHECK12-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
5450 // CHECK12-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
5451 // CHECK12-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
5452 // CHECK12-NEXT:    store float [[ADD]], float* [[F]], align 4
5453 // CHECK12-NEXT:    ret void
5454 //
5455 //
5456 // CHECK12-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
5457 // CHECK12-SAME: () #[[ATTR0]] {
5458 // CHECK12-NEXT:  entry:
5459 // CHECK12-NEXT:    call void @__cxx_global_var_init()
5460 // CHECK12-NEXT:    call void @__cxx_global_var_init.1()
5461 // CHECK12-NEXT:    call void @__cxx_global_var_init.2()
5462 // CHECK12-NEXT:    ret void
5463 //
5464 //
5465 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124
5466 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
5467 // CHECK13-NEXT:  entry:
5468 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
5469 // CHECK13-NEXT:    ret void
5470 //
5471 //
5472 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
5473 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
5474 // CHECK13-NEXT:  entry:
5475 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5476 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5477 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5478 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5479 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5480 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5481 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5482 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5483 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
5484 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
5485 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
5486 // CHECK13-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
5487 // CHECK13-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
5488 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5489 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5490 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5491 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5492 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
5493 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5494 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5495 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
5496 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
5497 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
5498 // CHECK13:       arrayctor.loop:
5499 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5500 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4:[0-9]+]]
5501 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
5502 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5503 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5504 // CHECK13:       arrayctor.cont:
5505 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
5506 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5507 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5508 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5509 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5510 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
5511 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5512 // CHECK13:       cond.true:
5513 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5514 // CHECK13:       cond.false:
5515 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5516 // CHECK13-NEXT:    br label [[COND_END]]
5517 // CHECK13:       cond.end:
5518 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5519 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5520 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5521 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5522 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5523 // CHECK13:       omp.inner.for.cond:
5524 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5525 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5526 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5527 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5528 // CHECK13:       omp.inner.for.cond.cleanup:
5529 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5530 // CHECK13:       omp.inner.for.body:
5531 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5532 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5533 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5534 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5535 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
5536 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5537 // CHECK13:       omp.inner.for.inc:
5538 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5539 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5540 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5541 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5542 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
5543 // CHECK13:       omp.inner.for.end:
5544 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5545 // CHECK13:       omp.loop.exit:
5546 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5547 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
5548 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
5549 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5550 // CHECK13-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5551 // CHECK13-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5552 // CHECK13:       .omp.final.then:
5553 // CHECK13-NEXT:    store i32 2, i32* [[I]], align 4
5554 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5555 // CHECK13:       .omp.final.done:
5556 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
5557 // CHECK13-NEXT:    [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
5558 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2
5559 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5560 // CHECK13:       arraydestroy.body:
5561 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5562 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
5563 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
5564 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
5565 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
5566 // CHECK13:       arraydestroy.done3:
5567 // CHECK13-NEXT:    ret void
5568 //
5569 //
5570 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
5571 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
5572 // CHECK13-NEXT:  entry:
5573 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5574 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5575 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5576 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
5577 // CHECK13-NEXT:    ret void
5578 //
5579 //
5580 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
5581 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] {
5582 // CHECK13-NEXT:  entry:
5583 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5584 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5585 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5586 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5587 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5588 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5589 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5590 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5591 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5592 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5593 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
5594 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
5595 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
5596 // CHECK13-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
5597 // CHECK13-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
5598 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5599 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5600 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5601 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5602 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5603 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5604 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5605 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5606 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5607 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5608 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5609 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5610 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5611 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5612 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5613 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
5614 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
5615 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
5616 // CHECK13:       arrayctor.loop:
5617 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5618 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
5619 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
5620 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5621 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5622 // CHECK13:       arrayctor.cont:
5623 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
5624 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5625 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5626 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5627 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5628 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
5629 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5630 // CHECK13:       cond.true:
5631 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5632 // CHECK13:       cond.false:
5633 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5634 // CHECK13-NEXT:    br label [[COND_END]]
5635 // CHECK13:       cond.end:
5636 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5637 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5638 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5639 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5640 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5641 // CHECK13:       omp.inner.for.cond:
5642 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5643 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5644 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5645 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5646 // CHECK13:       omp.inner.for.cond.cleanup:
5647 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5648 // CHECK13:       omp.inner.for.body:
5649 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5650 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5651 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5652 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5653 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
5654 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
5655 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
5656 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
5657 // CHECK13-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
5658 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4
5659 // CHECK13-NEXT:    [[IDXPROM3:%.*]] = sext i32 [[TMP12]] to i64
5660 // CHECK13-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM3]]
5661 // CHECK13-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8*
5662 // CHECK13-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[VAR]] to i8*
5663 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false)
5664 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
5665 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[SIVAR]], align 4
5666 // CHECK13-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP15]]
5667 // CHECK13-NEXT:    store i32 [[ADD5]], i32* [[SIVAR]], align 4
5668 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5669 // CHECK13:       omp.body.continue:
5670 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5671 // CHECK13:       omp.inner.for.inc:
5672 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5673 // CHECK13-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
5674 // CHECK13-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
5675 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
5676 // CHECK13:       omp.inner.for.end:
5677 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5678 // CHECK13:       omp.loop.exit:
5679 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5680 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
5681 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
5682 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5683 // CHECK13-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
5684 // CHECK13-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5685 // CHECK13:       .omp.final.then:
5686 // CHECK13-NEXT:    store i32 2, i32* [[I]], align 4
5687 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5688 // CHECK13:       .omp.final.done:
5689 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
5690 // CHECK13-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
5691 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2
5692 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5693 // CHECK13:       arraydestroy.body:
5694 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP22]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5695 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
5696 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
5697 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
5698 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
5699 // CHECK13:       arraydestroy.done8:
5700 // CHECK13-NEXT:    ret void
5701 //
5702 //
5703 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
5704 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5705 // CHECK13-NEXT:  entry:
5706 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5707 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5708 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5709 // CHECK13-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
5710 // CHECK13-NEXT:    ret void
5711 //
5712 //
5713 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80
5714 // CHECK13-SAME: () #[[ATTR0]] {
5715 // CHECK13-NEXT:  entry:
5716 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
5717 // CHECK13-NEXT:    ret void
5718 //
5719 //
5720 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
5721 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
5722 // CHECK13-NEXT:  entry:
5723 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5724 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5725 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5726 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5727 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
5728 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5729 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5730 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5731 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5732 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
5733 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
5734 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
5735 // CHECK13-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
5736 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 8
5737 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5738 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5739 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5740 // CHECK13-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
5741 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5742 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
5743 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5744 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5745 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5746 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
5747 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
5748 // CHECK13:       arrayctor.loop:
5749 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5750 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
5751 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
5752 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5753 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5754 // CHECK13:       arrayctor.cont:
5755 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
5756 // CHECK13-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8
5757 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5758 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5759 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5760 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5761 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
5762 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5763 // CHECK13:       cond.true:
5764 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5765 // CHECK13:       cond.false:
5766 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5767 // CHECK13-NEXT:    br label [[COND_END]]
5768 // CHECK13:       cond.end:
5769 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5770 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5771 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5772 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5773 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5774 // CHECK13:       omp.inner.for.cond:
5775 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5776 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5777 // CHECK13-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5778 // CHECK13-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5779 // CHECK13:       omp.inner.for.cond.cleanup:
5780 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5781 // CHECK13:       omp.inner.for.body:
5782 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5783 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5784 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5785 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5786 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
5787 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5788 // CHECK13:       omp.inner.for.inc:
5789 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5790 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5791 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5792 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5793 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
5794 // CHECK13:       omp.inner.for.end:
5795 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5796 // CHECK13:       omp.loop.exit:
5797 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5798 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
5799 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
5800 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5801 // CHECK13-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5802 // CHECK13-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5803 // CHECK13:       .omp.final.then:
5804 // CHECK13-NEXT:    store i32 2, i32* [[I]], align 4
5805 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5806 // CHECK13:       .omp.final.done:
5807 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
5808 // CHECK13-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5809 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2
5810 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5811 // CHECK13:       arraydestroy.body:
5812 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5813 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
5814 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
5815 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
5816 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
5817 // CHECK13:       arraydestroy.done5:
5818 // CHECK13-NEXT:    ret void
5819 //
5820 //
5821 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
5822 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5823 // CHECK13-NEXT:  entry:
5824 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
5825 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
5826 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
5827 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
5828 // CHECK13-NEXT:    ret void
5829 //
5830 //
5831 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
5832 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] {
5833 // CHECK13-NEXT:  entry:
5834 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5835 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5836 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5837 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5838 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5839 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5840 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
5841 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5842 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5843 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5844 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5845 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
5846 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
5847 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
5848 // CHECK13-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
5849 // CHECK13-NEXT:    [[_TMP3:%.*]] = alloca %struct.S.0*, align 8
5850 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5851 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5852 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5853 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5854 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5855 // CHECK13-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
5856 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5857 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5858 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5859 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5860 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5861 // CHECK13-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
5862 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5863 // CHECK13-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
5864 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5865 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5866 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5867 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
5868 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
5869 // CHECK13:       arrayctor.loop:
5870 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5871 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
5872 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
5873 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5874 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5875 // CHECK13:       arrayctor.cont:
5876 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
5877 // CHECK13-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8
5878 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5879 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5880 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5881 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5882 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
5883 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5884 // CHECK13:       cond.true:
5885 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5886 // CHECK13:       cond.false:
5887 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5888 // CHECK13-NEXT:    br label [[COND_END]]
5889 // CHECK13:       cond.end:
5890 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5891 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5892 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5893 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5894 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5895 // CHECK13:       omp.inner.for.cond:
5896 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5897 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5898 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5899 // CHECK13-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5900 // CHECK13:       omp.inner.for.cond.cleanup:
5901 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5902 // CHECK13:       omp.inner.for.body:
5903 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5904 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5905 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5906 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5907 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
5908 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
5909 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
5910 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
5911 // CHECK13-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
5912 // CHECK13-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8
5913 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
5914 // CHECK13-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64
5915 // CHECK13-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]]
5916 // CHECK13-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8*
5917 // CHECK13-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
5918 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
5919 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5920 // CHECK13:       omp.body.continue:
5921 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5922 // CHECK13:       omp.inner.for.inc:
5923 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5924 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
5925 // CHECK13-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
5926 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
5927 // CHECK13:       omp.inner.for.end:
5928 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5929 // CHECK13:       omp.loop.exit:
5930 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5931 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
5932 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
5933 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5934 // CHECK13-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
5935 // CHECK13-NEXT:    br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5936 // CHECK13:       .omp.final.then:
5937 // CHECK13-NEXT:    store i32 2, i32* [[I]], align 4
5938 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5939 // CHECK13:       .omp.final.done:
5940 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
5941 // CHECK13-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5942 // CHECK13-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2
5943 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5944 // CHECK13:       arraydestroy.body:
5945 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5946 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
5947 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
5948 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]
5949 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]
5950 // CHECK13:       arraydestroy.done9:
5951 // CHECK13-NEXT:    ret void
5952 //
5953 //
5954 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
5955 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5956 // CHECK13-NEXT:  entry:
5957 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
5958 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
5959 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
5960 // CHECK13-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
5961 // CHECK13-NEXT:    ret void
5962 //
5963 //
5964 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
5965 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5966 // CHECK13-NEXT:  entry:
5967 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5968 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5969 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5970 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5971 // CHECK13-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
5972 // CHECK13-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
5973 // CHECK13-NEXT:    store float [[CONV]], float* [[F]], align 4
5974 // CHECK13-NEXT:    ret void
5975 //
5976 //
5977 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
5978 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5979 // CHECK13-NEXT:  entry:
5980 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5981 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5982 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5983 // CHECK13-NEXT:    ret void
5984 //
5985 //
5986 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
5987 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5988 // CHECK13-NEXT:  entry:
5989 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
5990 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
5991 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
5992 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5993 // CHECK13-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
5994 // CHECK13-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
5995 // CHECK13-NEXT:    ret void
5996 //
5997 //
5998 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
5999 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
6000 // CHECK13-NEXT:  entry:
6001 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6002 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6003 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6004 // CHECK13-NEXT:    ret void
6005 //
6006 //
6007 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124
6008 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] {
6009 // CHECK14-NEXT:  entry:
6010 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
6011 // CHECK14-NEXT:    ret void
6012 //
6013 //
6014 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined.
6015 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
6016 // CHECK14-NEXT:  entry:
6017 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6018 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6019 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6020 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6021 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6022 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6023 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6024 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6025 // CHECK14-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
6026 // CHECK14-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
6027 // CHECK14-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
6028 // CHECK14-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
6029 // CHECK14-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
6030 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
6031 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6032 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6033 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6034 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
6035 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6036 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6037 // CHECK14-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
6038 // CHECK14-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
6039 // CHECK14-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
6040 // CHECK14:       arrayctor.loop:
6041 // CHECK14-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
6042 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4:[0-9]+]]
6043 // CHECK14-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
6044 // CHECK14-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
6045 // CHECK14-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
6046 // CHECK14:       arrayctor.cont:
6047 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
6048 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6049 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6050 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6051 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6052 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
6053 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6054 // CHECK14:       cond.true:
6055 // CHECK14-NEXT:    br label [[COND_END:%.*]]
6056 // CHECK14:       cond.false:
6057 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6058 // CHECK14-NEXT:    br label [[COND_END]]
6059 // CHECK14:       cond.end:
6060 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6061 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6062 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6063 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6064 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6065 // CHECK14:       omp.inner.for.cond:
6066 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6067 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6068 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6069 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
6070 // CHECK14:       omp.inner.for.cond.cleanup:
6071 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
6072 // CHECK14:       omp.inner.for.body:
6073 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6074 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6075 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6076 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6077 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
6078 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6079 // CHECK14:       omp.inner.for.inc:
6080 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6081 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6082 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6083 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6084 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
6085 // CHECK14:       omp.inner.for.end:
6086 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6087 // CHECK14:       omp.loop.exit:
6088 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6089 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
6090 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
6091 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6092 // CHECK14-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
6093 // CHECK14-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6094 // CHECK14:       .omp.final.then:
6095 // CHECK14-NEXT:    store i32 2, i32* [[I]], align 4
6096 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6097 // CHECK14:       .omp.final.done:
6098 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
6099 // CHECK14-NEXT:    [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
6100 // CHECK14-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2
6101 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
6102 // CHECK14:       arraydestroy.body:
6103 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
6104 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
6105 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
6106 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
6107 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
6108 // CHECK14:       arraydestroy.done3:
6109 // CHECK14-NEXT:    ret void
6110 //
6111 //
6112 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
6113 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
6114 // CHECK14-NEXT:  entry:
6115 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6116 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6117 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6118 // CHECK14-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
6119 // CHECK14-NEXT:    ret void
6120 //
6121 //
6122 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1
6123 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] {
6124 // CHECK14-NEXT:  entry:
6125 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6126 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6127 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6128 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6129 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6130 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6131 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6132 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6133 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6134 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6135 // CHECK14-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
6136 // CHECK14-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
6137 // CHECK14-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
6138 // CHECK14-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
6139 // CHECK14-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
6140 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
6141 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6142 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6143 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6144 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6145 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6146 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6147 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6148 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6149 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6150 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6151 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6152 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6153 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6154 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6155 // CHECK14-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
6156 // CHECK14-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
6157 // CHECK14-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
6158 // CHECK14:       arrayctor.loop:
6159 // CHECK14-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
6160 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
6161 // CHECK14-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
6162 // CHECK14-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
6163 // CHECK14-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
6164 // CHECK14:       arrayctor.cont:
6165 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
6166 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6167 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6168 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6169 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6170 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
6171 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6172 // CHECK14:       cond.true:
6173 // CHECK14-NEXT:    br label [[COND_END:%.*]]
6174 // CHECK14:       cond.false:
6175 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6176 // CHECK14-NEXT:    br label [[COND_END]]
6177 // CHECK14:       cond.end:
6178 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6179 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6180 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6181 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6182 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6183 // CHECK14:       omp.inner.for.cond:
6184 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6185 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6186 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6187 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
6188 // CHECK14:       omp.inner.for.cond.cleanup:
6189 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
6190 // CHECK14:       omp.inner.for.body:
6191 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6192 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6193 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6194 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6195 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
6196 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6197 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6198 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
6199 // CHECK14-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
6200 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4
6201 // CHECK14-NEXT:    [[IDXPROM3:%.*]] = sext i32 [[TMP12]] to i64
6202 // CHECK14-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM3]]
6203 // CHECK14-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8*
6204 // CHECK14-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[VAR]] to i8*
6205 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false)
6206 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
6207 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[SIVAR]], align 4
6208 // CHECK14-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP15]]
6209 // CHECK14-NEXT:    store i32 [[ADD5]], i32* [[SIVAR]], align 4
6210 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6211 // CHECK14:       omp.body.continue:
6212 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6213 // CHECK14:       omp.inner.for.inc:
6214 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6215 // CHECK14-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
6216 // CHECK14-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
6217 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
6218 // CHECK14:       omp.inner.for.end:
6219 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6220 // CHECK14:       omp.loop.exit:
6221 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6222 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
6223 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
6224 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6225 // CHECK14-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
6226 // CHECK14-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6227 // CHECK14:       .omp.final.then:
6228 // CHECK14-NEXT:    store i32 2, i32* [[I]], align 4
6229 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6230 // CHECK14:       .omp.final.done:
6231 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
6232 // CHECK14-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
6233 // CHECK14-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2
6234 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
6235 // CHECK14:       arraydestroy.body:
6236 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP22]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
6237 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
6238 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
6239 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
6240 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
6241 // CHECK14:       arraydestroy.done8:
6242 // CHECK14-NEXT:    ret void
6243 //
6244 //
6245 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
6246 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
6247 // CHECK14-NEXT:  entry:
6248 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6249 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6250 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6251 // CHECK14-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
6252 // CHECK14-NEXT:    ret void
6253 //
6254 //
6255 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80
6256 // CHECK14-SAME: () #[[ATTR0]] {
6257 // CHECK14-NEXT:  entry:
6258 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
6259 // CHECK14-NEXT:    ret void
6260 //
6261 //
6262 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2
6263 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
6264 // CHECK14-NEXT:  entry:
6265 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6266 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6267 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6268 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6269 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
6270 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6271 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6272 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6273 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6274 // CHECK14-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
6275 // CHECK14-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
6276 // CHECK14-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
6277 // CHECK14-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
6278 // CHECK14-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 8
6279 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
6280 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6281 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6282 // CHECK14-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
6283 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6284 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
6285 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6286 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6287 // CHECK14-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
6288 // CHECK14-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
6289 // CHECK14-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
6290 // CHECK14:       arrayctor.loop:
6291 // CHECK14-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
6292 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
6293 // CHECK14-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
6294 // CHECK14-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
6295 // CHECK14-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
6296 // CHECK14:       arrayctor.cont:
6297 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
6298 // CHECK14-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8
6299 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6300 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6301 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6302 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6303 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
6304 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6305 // CHECK14:       cond.true:
6306 // CHECK14-NEXT:    br label [[COND_END:%.*]]
6307 // CHECK14:       cond.false:
6308 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6309 // CHECK14-NEXT:    br label [[COND_END]]
6310 // CHECK14:       cond.end:
6311 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6312 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6313 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6314 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6315 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6316 // CHECK14:       omp.inner.for.cond:
6317 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6318 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6319 // CHECK14-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6320 // CHECK14-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
6321 // CHECK14:       omp.inner.for.cond.cleanup:
6322 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
6323 // CHECK14:       omp.inner.for.body:
6324 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6325 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6326 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6327 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6328 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
6329 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6330 // CHECK14:       omp.inner.for.inc:
6331 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6332 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6333 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6334 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6335 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
6336 // CHECK14:       omp.inner.for.end:
6337 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6338 // CHECK14:       omp.loop.exit:
6339 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6340 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
6341 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
6342 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6343 // CHECK14-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
6344 // CHECK14-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6345 // CHECK14:       .omp.final.then:
6346 // CHECK14-NEXT:    store i32 2, i32* [[I]], align 4
6347 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6348 // CHECK14:       .omp.final.done:
6349 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
6350 // CHECK14-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
6351 // CHECK14-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2
6352 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
6353 // CHECK14:       arraydestroy.body:
6354 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
6355 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
6356 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
6357 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
6358 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
6359 // CHECK14:       arraydestroy.done5:
6360 // CHECK14-NEXT:    ret void
6361 //
6362 //
6363 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
6364 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
6365 // CHECK14-NEXT:  entry:
6366 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6367 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6368 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6369 // CHECK14-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
6370 // CHECK14-NEXT:    ret void
6371 //
6372 //
6373 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3
6374 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] {
6375 // CHECK14-NEXT:  entry:
6376 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6377 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6378 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6379 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6380 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6381 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6382 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
6383 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6384 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6385 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6386 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6387 // CHECK14-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
6388 // CHECK14-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
6389 // CHECK14-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
6390 // CHECK14-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
6391 // CHECK14-NEXT:    [[_TMP3:%.*]] = alloca %struct.S.0*, align 8
6392 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
6393 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6394 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6395 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6396 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6397 // CHECK14-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
6398 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6399 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6400 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6401 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6402 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6403 // CHECK14-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
6404 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6405 // CHECK14-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6406 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6407 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6408 // CHECK14-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
6409 // CHECK14-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
6410 // CHECK14-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
6411 // CHECK14:       arrayctor.loop:
6412 // CHECK14-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
6413 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
6414 // CHECK14-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
6415 // CHECK14-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
6416 // CHECK14-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
6417 // CHECK14:       arrayctor.cont:
6418 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
6419 // CHECK14-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8
6420 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6421 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6422 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6423 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6424 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
6425 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6426 // CHECK14:       cond.true:
6427 // CHECK14-NEXT:    br label [[COND_END:%.*]]
6428 // CHECK14:       cond.false:
6429 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6430 // CHECK14-NEXT:    br label [[COND_END]]
6431 // CHECK14:       cond.end:
6432 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6433 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6434 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6435 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6436 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6437 // CHECK14:       omp.inner.for.cond:
6438 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6439 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6440 // CHECK14-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6441 // CHECK14-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
6442 // CHECK14:       omp.inner.for.cond.cleanup:
6443 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
6444 // CHECK14:       omp.inner.for.body:
6445 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6446 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6447 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6448 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6449 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
6450 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6451 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6452 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
6453 // CHECK14-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
6454 // CHECK14-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8
6455 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
6456 // CHECK14-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64
6457 // CHECK14-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]]
6458 // CHECK14-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8*
6459 // CHECK14-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
6460 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
6461 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6462 // CHECK14:       omp.body.continue:
6463 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6464 // CHECK14:       omp.inner.for.inc:
6465 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6466 // CHECK14-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
6467 // CHECK14-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
6468 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
6469 // CHECK14:       omp.inner.for.end:
6470 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6471 // CHECK14:       omp.loop.exit:
6472 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6473 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
6474 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
6475 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6476 // CHECK14-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
6477 // CHECK14-NEXT:    br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6478 // CHECK14:       .omp.final.then:
6479 // CHECK14-NEXT:    store i32 2, i32* [[I]], align 4
6480 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6481 // CHECK14:       .omp.final.done:
6482 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
6483 // CHECK14-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
6484 // CHECK14-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2
6485 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
6486 // CHECK14:       arraydestroy.body:
6487 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
6488 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
6489 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
6490 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]
6491 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]
6492 // CHECK14:       arraydestroy.done9:
6493 // CHECK14-NEXT:    ret void
6494 //
6495 //
6496 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
6497 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
6498 // CHECK14-NEXT:  entry:
6499 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6500 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6501 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6502 // CHECK14-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
6503 // CHECK14-NEXT:    ret void
6504 //
6505 //
6506 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
6507 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
6508 // CHECK14-NEXT:  entry:
6509 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6510 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6511 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6512 // CHECK14-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
6513 // CHECK14-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
6514 // CHECK14-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
6515 // CHECK14-NEXT:    store float [[CONV]], float* [[F]], align 4
6516 // CHECK14-NEXT:    ret void
6517 //
6518 //
6519 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
6520 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
6521 // CHECK14-NEXT:  entry:
6522 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6523 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6524 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6525 // CHECK14-NEXT:    ret void
6526 //
6527 //
6528 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
6529 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
6530 // CHECK14-NEXT:  entry:
6531 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6532 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6533 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6534 // CHECK14-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
6535 // CHECK14-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
6536 // CHECK14-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
6537 // CHECK14-NEXT:    ret void
6538 //
6539 //
6540 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
6541 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
6542 // CHECK14-NEXT:  entry:
6543 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6544 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6545 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6546 // CHECK14-NEXT:    ret void
6547 //
6548 //
6549 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124
6550 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
6551 // CHECK15-NEXT:  entry:
6552 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
6553 // CHECK15-NEXT:    ret void
6554 //
6555 //
6556 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined.
6557 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
6558 // CHECK15-NEXT:  entry:
6559 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6560 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6561 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6562 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6563 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6564 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6565 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6566 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6567 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
6568 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
6569 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
6570 // CHECK15-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
6571 // CHECK15-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
6572 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
6573 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6574 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6575 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6576 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
6577 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6578 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6579 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
6580 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
6581 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
6582 // CHECK15:       arrayctor.loop:
6583 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
6584 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4:[0-9]+]]
6585 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
6586 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
6587 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
6588 // CHECK15:       arrayctor.cont:
6589 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
6590 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6591 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6592 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6593 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6594 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
6595 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6596 // CHECK15:       cond.true:
6597 // CHECK15-NEXT:    br label [[COND_END:%.*]]
6598 // CHECK15:       cond.false:
6599 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6600 // CHECK15-NEXT:    br label [[COND_END]]
6601 // CHECK15:       cond.end:
6602 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6603 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6604 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6605 // CHECK15-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6606 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6607 // CHECK15:       omp.inner.for.cond:
6608 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6609 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6610 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6611 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
6612 // CHECK15:       omp.inner.for.cond.cleanup:
6613 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
6614 // CHECK15:       omp.inner.for.body:
6615 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6616 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6617 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
6618 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6619 // CHECK15:       omp.inner.for.inc:
6620 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6621 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6622 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
6623 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6624 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
6625 // CHECK15:       omp.inner.for.end:
6626 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6627 // CHECK15:       omp.loop.exit:
6628 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6629 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
6630 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
6631 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6632 // CHECK15-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6633 // CHECK15-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6634 // CHECK15:       .omp.final.then:
6635 // CHECK15-NEXT:    store i32 2, i32* [[I]], align 4
6636 // CHECK15-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6637 // CHECK15:       .omp.final.done:
6638 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
6639 // CHECK15-NEXT:    [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
6640 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i32 2
6641 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
6642 // CHECK15:       arraydestroy.body:
6643 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
6644 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
6645 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
6646 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
6647 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
6648 // CHECK15:       arraydestroy.done3:
6649 // CHECK15-NEXT:    ret void
6650 //
6651 //
6652 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
6653 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
6654 // CHECK15-NEXT:  entry:
6655 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
6656 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
6657 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
6658 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
6659 // CHECK15-NEXT:    ret void
6660 //
6661 //
6662 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1
6663 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] {
6664 // CHECK15-NEXT:  entry:
6665 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6666 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6667 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6668 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6669 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6670 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6671 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6672 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6673 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6674 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6675 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
6676 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
6677 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
6678 // CHECK15-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
6679 // CHECK15-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
6680 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
6681 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6682 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6683 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6684 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6685 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6686 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6687 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6688 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6689 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
6690 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
6691 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6692 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6693 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
6694 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
6695 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
6696 // CHECK15:       arrayctor.loop:
6697 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
6698 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
6699 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
6700 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
6701 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
6702 // CHECK15:       arrayctor.cont:
6703 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
6704 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6705 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6706 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6707 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6708 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
6709 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6710 // CHECK15:       cond.true:
6711 // CHECK15-NEXT:    br label [[COND_END:%.*]]
6712 // CHECK15:       cond.false:
6713 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6714 // CHECK15-NEXT:    br label [[COND_END]]
6715 // CHECK15:       cond.end:
6716 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6717 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6718 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6719 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6720 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6721 // CHECK15:       omp.inner.for.cond:
6722 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6723 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6724 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6725 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
6726 // CHECK15:       omp.inner.for.cond.cleanup:
6727 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
6728 // CHECK15:       omp.inner.for.body:
6729 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6730 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6731 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6732 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6733 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
6734 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6735 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
6736 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
6737 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4
6738 // CHECK15-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP12]]
6739 // CHECK15-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8*
6740 // CHECK15-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[VAR]] to i8*
6741 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false)
6742 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
6743 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[SIVAR]], align 4
6744 // CHECK15-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP15]]
6745 // CHECK15-NEXT:    store i32 [[ADD3]], i32* [[SIVAR]], align 4
6746 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6747 // CHECK15:       omp.body.continue:
6748 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6749 // CHECK15:       omp.inner.for.inc:
6750 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6751 // CHECK15-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], 1
6752 // CHECK15-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
6753 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
6754 // CHECK15:       omp.inner.for.end:
6755 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6756 // CHECK15:       omp.loop.exit:
6757 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6758 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
6759 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
6760 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6761 // CHECK15-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
6762 // CHECK15-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6763 // CHECK15:       .omp.final.then:
6764 // CHECK15-NEXT:    store i32 2, i32* [[I]], align 4
6765 // CHECK15-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6766 // CHECK15:       .omp.final.done:
6767 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
6768 // CHECK15-NEXT:    [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
6769 // CHECK15-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i32 2
6770 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
6771 // CHECK15:       arraydestroy.body:
6772 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP22]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
6773 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
6774 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
6775 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]]
6776 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]
6777 // CHECK15:       arraydestroy.done6:
6778 // CHECK15-NEXT:    ret void
6779 //
6780 //
6781 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
6782 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
6783 // CHECK15-NEXT:  entry:
6784 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
6785 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
6786 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
6787 // CHECK15-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
6788 // CHECK15-NEXT:    ret void
6789 //
6790 //
6791 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80
6792 // CHECK15-SAME: () #[[ATTR0]] {
6793 // CHECK15-NEXT:  entry:
6794 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
6795 // CHECK15-NEXT:    ret void
6796 //
6797 //
6798 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2
6799 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
6800 // CHECK15-NEXT:  entry:
6801 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6802 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6803 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6804 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6805 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
6806 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6807 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6808 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6809 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6810 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
6811 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
6812 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
6813 // CHECK15-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
6814 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
6815 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
6816 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6817 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6818 // CHECK15-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
6819 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6820 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
6821 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6822 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6823 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
6824 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
6825 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
6826 // CHECK15:       arrayctor.loop:
6827 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
6828 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
6829 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
6830 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
6831 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
6832 // CHECK15:       arrayctor.cont:
6833 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
6834 // CHECK15-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
6835 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6836 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6837 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6838 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6839 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
6840 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6841 // CHECK15:       cond.true:
6842 // CHECK15-NEXT:    br label [[COND_END:%.*]]
6843 // CHECK15:       cond.false:
6844 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6845 // CHECK15-NEXT:    br label [[COND_END]]
6846 // CHECK15:       cond.end:
6847 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6848 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6849 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6850 // CHECK15-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6851 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6852 // CHECK15:       omp.inner.for.cond:
6853 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6854 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6855 // CHECK15-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6856 // CHECK15-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
6857 // CHECK15:       omp.inner.for.cond.cleanup:
6858 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
6859 // CHECK15:       omp.inner.for.body:
6860 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6861 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6862 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
6863 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6864 // CHECK15:       omp.inner.for.inc:
6865 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6866 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6867 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
6868 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6869 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
6870 // CHECK15:       omp.inner.for.end:
6871 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6872 // CHECK15:       omp.loop.exit:
6873 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6874 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
6875 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
6876 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6877 // CHECK15-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6878 // CHECK15-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6879 // CHECK15:       .omp.final.then:
6880 // CHECK15-NEXT:    store i32 2, i32* [[I]], align 4
6881 // CHECK15-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6882 // CHECK15:       .omp.final.done:
6883 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
6884 // CHECK15-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
6885 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2
6886 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
6887 // CHECK15:       arraydestroy.body:
6888 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
6889 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
6890 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
6891 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
6892 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
6893 // CHECK15:       arraydestroy.done5:
6894 // CHECK15-NEXT:    ret void
6895 //
6896 //
6897 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
6898 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
6899 // CHECK15-NEXT:  entry:
6900 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
6901 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
6902 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
6903 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
6904 // CHECK15-NEXT:    ret void
6905 //
6906 //
6907 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3
6908 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] {
6909 // CHECK15-NEXT:  entry:
6910 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6911 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6912 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6913 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6914 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6915 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6916 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
6917 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6918 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6919 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6920 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6921 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
6922 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
6923 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
6924 // CHECK15-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
6925 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
6926 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
6927 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6928 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6929 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6930 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6931 // CHECK15-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
6932 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6933 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6934 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6935 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6936 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
6937 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
6938 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6939 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6940 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
6941 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
6942 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
6943 // CHECK15:       arrayctor.loop:
6944 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
6945 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
6946 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
6947 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
6948 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
6949 // CHECK15:       arrayctor.cont:
6950 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
6951 // CHECK15-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
6952 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6953 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6954 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6955 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6956 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
6957 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6958 // CHECK15:       cond.true:
6959 // CHECK15-NEXT:    br label [[COND_END:%.*]]
6960 // CHECK15:       cond.false:
6961 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6962 // CHECK15-NEXT:    br label [[COND_END]]
6963 // CHECK15:       cond.end:
6964 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6965 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6966 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6967 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6968 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6969 // CHECK15:       omp.inner.for.cond:
6970 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6971 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6972 // CHECK15-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6973 // CHECK15-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
6974 // CHECK15:       omp.inner.for.cond.cleanup:
6975 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
6976 // CHECK15:       omp.inner.for.body:
6977 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6978 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6979 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6980 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6981 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
6982 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6983 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
6984 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
6985 // CHECK15-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4
6986 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
6987 // CHECK15-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]]
6988 // CHECK15-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8*
6989 // CHECK15-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
6990 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
6991 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6992 // CHECK15:       omp.body.continue:
6993 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6994 // CHECK15:       omp.inner.for.inc:
6995 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6996 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
6997 // CHECK15-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
6998 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
6999 // CHECK15:       omp.inner.for.end:
7000 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7001 // CHECK15:       omp.loop.exit:
7002 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7003 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
7004 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
7005 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7006 // CHECK15-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
7007 // CHECK15-NEXT:    br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7008 // CHECK15:       .omp.final.then:
7009 // CHECK15-NEXT:    store i32 2, i32* [[I]], align 4
7010 // CHECK15-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7011 // CHECK15:       .omp.final.done:
7012 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
7013 // CHECK15-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
7014 // CHECK15-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2
7015 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
7016 // CHECK15:       arraydestroy.body:
7017 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
7018 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
7019 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
7020 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]
7021 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]
7022 // CHECK15:       arraydestroy.done7:
7023 // CHECK15-NEXT:    ret void
7024 //
7025 //
7026 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
7027 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7028 // CHECK15-NEXT:  entry:
7029 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
7030 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
7031 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
7032 // CHECK15-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
7033 // CHECK15-NEXT:    ret void
7034 //
7035 //
7036 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
7037 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7038 // CHECK15-NEXT:  entry:
7039 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
7040 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
7041 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
7042 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
7043 // CHECK15-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
7044 // CHECK15-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
7045 // CHECK15-NEXT:    store float [[CONV]], float* [[F]], align 4
7046 // CHECK15-NEXT:    ret void
7047 //
7048 //
7049 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
7050 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7051 // CHECK15-NEXT:  entry:
7052 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
7053 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
7054 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
7055 // CHECK15-NEXT:    ret void
7056 //
7057 //
7058 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
7059 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7060 // CHECK15-NEXT:  entry:
7061 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
7062 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
7063 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
7064 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
7065 // CHECK15-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
7066 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
7067 // CHECK15-NEXT:    ret void
7068 //
7069 //
7070 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
7071 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7072 // CHECK15-NEXT:  entry:
7073 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
7074 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
7075 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
7076 // CHECK15-NEXT:    ret void
7077 //
7078 //
7079 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124
7080 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] {
7081 // CHECK16-NEXT:  entry:
7082 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
7083 // CHECK16-NEXT:    ret void
7084 //
7085 //
7086 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined.
7087 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
7088 // CHECK16-NEXT:  entry:
7089 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7090 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7091 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7092 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7093 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7094 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7095 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7096 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7097 // CHECK16-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
7098 // CHECK16-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
7099 // CHECK16-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
7100 // CHECK16-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
7101 // CHECK16-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
7102 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
7103 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7104 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7105 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7106 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
7107 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7108 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7109 // CHECK16-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
7110 // CHECK16-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
7111 // CHECK16-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
7112 // CHECK16:       arrayctor.loop:
7113 // CHECK16-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
7114 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4:[0-9]+]]
7115 // CHECK16-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
7116 // CHECK16-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
7117 // CHECK16-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
7118 // CHECK16:       arrayctor.cont:
7119 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
7120 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7121 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7122 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7123 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7124 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
7125 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7126 // CHECK16:       cond.true:
7127 // CHECK16-NEXT:    br label [[COND_END:%.*]]
7128 // CHECK16:       cond.false:
7129 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7130 // CHECK16-NEXT:    br label [[COND_END]]
7131 // CHECK16:       cond.end:
7132 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7133 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7134 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7135 // CHECK16-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7136 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7137 // CHECK16:       omp.inner.for.cond:
7138 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7139 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7140 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7141 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
7142 // CHECK16:       omp.inner.for.cond.cleanup:
7143 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
7144 // CHECK16:       omp.inner.for.body:
7145 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7146 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7147 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
7148 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7149 // CHECK16:       omp.inner.for.inc:
7150 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7151 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7152 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
7153 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7154 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
7155 // CHECK16:       omp.inner.for.end:
7156 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7157 // CHECK16:       omp.loop.exit:
7158 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7159 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
7160 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
7161 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7162 // CHECK16-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7163 // CHECK16-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7164 // CHECK16:       .omp.final.then:
7165 // CHECK16-NEXT:    store i32 2, i32* [[I]], align 4
7166 // CHECK16-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7167 // CHECK16:       .omp.final.done:
7168 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
7169 // CHECK16-NEXT:    [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
7170 // CHECK16-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i32 2
7171 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
7172 // CHECK16:       arraydestroy.body:
7173 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
7174 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
7175 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
7176 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
7177 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
7178 // CHECK16:       arraydestroy.done3:
7179 // CHECK16-NEXT:    ret void
7180 //
7181 //
7182 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
7183 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
7184 // CHECK16-NEXT:  entry:
7185 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
7186 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
7187 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
7188 // CHECK16-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
7189 // CHECK16-NEXT:    ret void
7190 //
7191 //
7192 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..1
7193 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] {
7194 // CHECK16-NEXT:  entry:
7195 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7196 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7197 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7198 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7199 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7200 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7201 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7202 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7203 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7204 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7205 // CHECK16-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
7206 // CHECK16-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
7207 // CHECK16-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
7208 // CHECK16-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
7209 // CHECK16-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
7210 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
7211 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7212 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7213 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7214 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7215 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7216 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7217 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7218 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7219 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
7220 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
7221 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7222 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7223 // CHECK16-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
7224 // CHECK16-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
7225 // CHECK16-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
7226 // CHECK16:       arrayctor.loop:
7227 // CHECK16-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
7228 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
7229 // CHECK16-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
7230 // CHECK16-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
7231 // CHECK16-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
7232 // CHECK16:       arrayctor.cont:
7233 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
7234 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7235 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7236 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7237 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7238 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
7239 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7240 // CHECK16:       cond.true:
7241 // CHECK16-NEXT:    br label [[COND_END:%.*]]
7242 // CHECK16:       cond.false:
7243 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7244 // CHECK16-NEXT:    br label [[COND_END]]
7245 // CHECK16:       cond.end:
7246 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7247 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7248 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7249 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7250 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7251 // CHECK16:       omp.inner.for.cond:
7252 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7253 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7254 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7255 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
7256 // CHECK16:       omp.inner.for.cond.cleanup:
7257 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
7258 // CHECK16:       omp.inner.for.body:
7259 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7260 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7261 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7262 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7263 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
7264 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
7265 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
7266 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
7267 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4
7268 // CHECK16-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP12]]
7269 // CHECK16-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8*
7270 // CHECK16-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[VAR]] to i8*
7271 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false)
7272 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
7273 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[SIVAR]], align 4
7274 // CHECK16-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP15]]
7275 // CHECK16-NEXT:    store i32 [[ADD3]], i32* [[SIVAR]], align 4
7276 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7277 // CHECK16:       omp.body.continue:
7278 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7279 // CHECK16:       omp.inner.for.inc:
7280 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7281 // CHECK16-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], 1
7282 // CHECK16-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
7283 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
7284 // CHECK16:       omp.inner.for.end:
7285 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7286 // CHECK16:       omp.loop.exit:
7287 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7288 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
7289 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
7290 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7291 // CHECK16-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
7292 // CHECK16-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7293 // CHECK16:       .omp.final.then:
7294 // CHECK16-NEXT:    store i32 2, i32* [[I]], align 4
7295 // CHECK16-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7296 // CHECK16:       .omp.final.done:
7297 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
7298 // CHECK16-NEXT:    [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
7299 // CHECK16-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i32 2
7300 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
7301 // CHECK16:       arraydestroy.body:
7302 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP22]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
7303 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
7304 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
7305 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]]
7306 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]
7307 // CHECK16:       arraydestroy.done6:
7308 // CHECK16-NEXT:    ret void
7309 //
7310 //
7311 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
7312 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7313 // CHECK16-NEXT:  entry:
7314 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
7315 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
7316 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
7317 // CHECK16-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
7318 // CHECK16-NEXT:    ret void
7319 //
7320 //
7321 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80
7322 // CHECK16-SAME: () #[[ATTR0]] {
7323 // CHECK16-NEXT:  entry:
7324 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
7325 // CHECK16-NEXT:    ret void
7326 //
7327 //
7328 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..2
7329 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
7330 // CHECK16-NEXT:  entry:
7331 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7332 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7333 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7334 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7335 // CHECK16-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
7336 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7337 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7338 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7339 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7340 // CHECK16-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
7341 // CHECK16-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
7342 // CHECK16-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
7343 // CHECK16-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
7344 // CHECK16-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
7345 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
7346 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7347 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7348 // CHECK16-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
7349 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7350 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
7351 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7352 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7353 // CHECK16-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
7354 // CHECK16-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
7355 // CHECK16-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
7356 // CHECK16:       arrayctor.loop:
7357 // CHECK16-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
7358 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
7359 // CHECK16-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
7360 // CHECK16-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
7361 // CHECK16-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
7362 // CHECK16:       arrayctor.cont:
7363 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
7364 // CHECK16-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
7365 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7366 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7367 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7368 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7369 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
7370 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7371 // CHECK16:       cond.true:
7372 // CHECK16-NEXT:    br label [[COND_END:%.*]]
7373 // CHECK16:       cond.false:
7374 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7375 // CHECK16-NEXT:    br label [[COND_END]]
7376 // CHECK16:       cond.end:
7377 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7378 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7379 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7380 // CHECK16-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7381 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7382 // CHECK16:       omp.inner.for.cond:
7383 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7384 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7385 // CHECK16-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7386 // CHECK16-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
7387 // CHECK16:       omp.inner.for.cond.cleanup:
7388 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
7389 // CHECK16:       omp.inner.for.body:
7390 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7391 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7392 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
7393 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7394 // CHECK16:       omp.inner.for.inc:
7395 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7396 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7397 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
7398 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7399 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7400 // CHECK16:       omp.inner.for.end:
7401 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7402 // CHECK16:       omp.loop.exit:
7403 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7404 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
7405 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
7406 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7407 // CHECK16-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7408 // CHECK16-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7409 // CHECK16:       .omp.final.then:
7410 // CHECK16-NEXT:    store i32 2, i32* [[I]], align 4
7411 // CHECK16-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7412 // CHECK16:       .omp.final.done:
7413 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
7414 // CHECK16-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
7415 // CHECK16-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2
7416 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
7417 // CHECK16:       arraydestroy.body:
7418 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
7419 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
7420 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
7421 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
7422 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
7423 // CHECK16:       arraydestroy.done5:
7424 // CHECK16-NEXT:    ret void
7425 //
7426 //
7427 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
7428 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7429 // CHECK16-NEXT:  entry:
7430 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
7431 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
7432 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
7433 // CHECK16-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
7434 // CHECK16-NEXT:    ret void
7435 //
7436 //
7437 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..3
7438 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] {
7439 // CHECK16-NEXT:  entry:
7440 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7441 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7442 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7443 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7444 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7445 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7446 // CHECK16-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
7447 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7448 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7449 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7450 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7451 // CHECK16-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
7452 // CHECK16-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
7453 // CHECK16-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
7454 // CHECK16-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
7455 // CHECK16-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
7456 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
7457 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7458 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7459 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7460 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7461 // CHECK16-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
7462 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7463 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7464 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7465 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7466 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
7467 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
7468 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7469 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7470 // CHECK16-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
7471 // CHECK16-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
7472 // CHECK16-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
7473 // CHECK16:       arrayctor.loop:
7474 // CHECK16-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
7475 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) #[[ATTR4]]
7476 // CHECK16-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
7477 // CHECK16-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
7478 // CHECK16-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
7479 // CHECK16:       arrayctor.cont:
7480 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
7481 // CHECK16-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
7482 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7483 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7484 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7485 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7486 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
7487 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7488 // CHECK16:       cond.true:
7489 // CHECK16-NEXT:    br label [[COND_END:%.*]]
7490 // CHECK16:       cond.false:
7491 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7492 // CHECK16-NEXT:    br label [[COND_END]]
7493 // CHECK16:       cond.end:
7494 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7495 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7496 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7497 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7498 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7499 // CHECK16:       omp.inner.for.cond:
7500 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7501 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7502 // CHECK16-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7503 // CHECK16-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
7504 // CHECK16:       omp.inner.for.cond.cleanup:
7505 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
7506 // CHECK16:       omp.inner.for.body:
7507 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7508 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7509 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7510 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7511 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
7512 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
7513 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
7514 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
7515 // CHECK16-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4
7516 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
7517 // CHECK16-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]]
7518 // CHECK16-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8*
7519 // CHECK16-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
7520 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
7521 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7522 // CHECK16:       omp.body.continue:
7523 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7524 // CHECK16:       omp.inner.for.inc:
7525 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7526 // CHECK16-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
7527 // CHECK16-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
7528 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
7529 // CHECK16:       omp.inner.for.end:
7530 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7531 // CHECK16:       omp.loop.exit:
7532 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7533 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
7534 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
7535 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7536 // CHECK16-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
7537 // CHECK16-NEXT:    br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7538 // CHECK16:       .omp.final.then:
7539 // CHECK16-NEXT:    store i32 2, i32* [[I]], align 4
7540 // CHECK16-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7541 // CHECK16:       .omp.final.done:
7542 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
7543 // CHECK16-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
7544 // CHECK16-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2
7545 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
7546 // CHECK16:       arraydestroy.body:
7547 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
7548 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
7549 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
7550 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]
7551 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]
7552 // CHECK16:       arraydestroy.done7:
7553 // CHECK16-NEXT:    ret void
7554 //
7555 //
7556 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
7557 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7558 // CHECK16-NEXT:  entry:
7559 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
7560 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
7561 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
7562 // CHECK16-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
7563 // CHECK16-NEXT:    ret void
7564 //
7565 //
7566 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
7567 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7568 // CHECK16-NEXT:  entry:
7569 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
7570 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
7571 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
7572 // CHECK16-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
7573 // CHECK16-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
7574 // CHECK16-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
7575 // CHECK16-NEXT:    store float [[CONV]], float* [[F]], align 4
7576 // CHECK16-NEXT:    ret void
7577 //
7578 //
7579 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
7580 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7581 // CHECK16-NEXT:  entry:
7582 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
7583 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
7584 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
7585 // CHECK16-NEXT:    ret void
7586 //
7587 //
7588 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
7589 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7590 // CHECK16-NEXT:  entry:
7591 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
7592 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
7593 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
7594 // CHECK16-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
7595 // CHECK16-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
7596 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
7597 // CHECK16-NEXT:    ret void
7598 //
7599 //
7600 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
7601 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7602 // CHECK16-NEXT:  entry:
7603 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
7604 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
7605 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
7606 // CHECK16-NEXT:    ret void
7607 //
7608 //
7609 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104
7610 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] {
7611 // CHECK17-NEXT:  entry:
7612 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
7613 // CHECK17-NEXT:    ret void
7614 //
7615 //
7616 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
7617 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
7618 // CHECK17-NEXT:  entry:
7619 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7620 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7621 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7622 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7623 // CHECK17-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
7624 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7625 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7626 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7627 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7628 // CHECK17-NEXT:    [[G:%.*]] = alloca i32, align 4
7629 // CHECK17-NEXT:    [[G1:%.*]] = alloca i32, align 4
7630 // CHECK17-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
7631 // CHECK17-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
7632 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
7633 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7634 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7635 // CHECK17-NEXT:    store i32* undef, i32** [[_TMP1]], align 8
7636 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7637 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
7638 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7639 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7640 // CHECK17-NEXT:    store i32* [[G1]], i32** [[_TMP2]], align 8
7641 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7642 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7643 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7644 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7645 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
7646 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7647 // CHECK17:       cond.true:
7648 // CHECK17-NEXT:    br label [[COND_END:%.*]]
7649 // CHECK17:       cond.false:
7650 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7651 // CHECK17-NEXT:    br label [[COND_END]]
7652 // CHECK17:       cond.end:
7653 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7654 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7655 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7656 // CHECK17-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7657 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7658 // CHECK17:       omp.inner.for.cond:
7659 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7660 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7661 // CHECK17-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7662 // CHECK17-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7663 // CHECK17:       omp.inner.for.body:
7664 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7665 // CHECK17-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7666 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7667 // CHECK17-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7668 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
7669 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7670 // CHECK17:       omp.inner.for.inc:
7671 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7672 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7673 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7674 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7675 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7676 // CHECK17:       omp.inner.for.end:
7677 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7678 // CHECK17:       omp.loop.exit:
7679 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7680 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7681 // CHECK17-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7682 // CHECK17-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7683 // CHECK17:       .omp.final.then:
7684 // CHECK17-NEXT:    store i32 2, i32* [[I]], align 4
7685 // CHECK17-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7686 // CHECK17:       .omp.final.done:
7687 // CHECK17-NEXT:    ret void
7688 //
7689 //
7690 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
7691 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] {
7692 // CHECK17-NEXT:  entry:
7693 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7694 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7695 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7696 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7697 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7698 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7699 // CHECK17-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
7700 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7701 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7702 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7703 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7704 // CHECK17-NEXT:    [[G:%.*]] = alloca i32, align 4
7705 // CHECK17-NEXT:    [[G1:%.*]] = alloca i32, align 4
7706 // CHECK17-NEXT:    [[_TMP3:%.*]] = alloca i32*, align 8
7707 // CHECK17-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
7708 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
7709 // CHECK17-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
7710 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7711 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7712 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7713 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7714 // CHECK17-NEXT:    store i32* undef, i32** [[_TMP1]], align 8
7715 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7716 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7717 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7718 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7719 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7720 // CHECK17-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
7721 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7722 // CHECK17-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
7723 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7724 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7725 // CHECK17-NEXT:    store i32* [[G1]], i32** [[_TMP3]], align 8
7726 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7727 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7728 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7729 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7730 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
7731 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7732 // CHECK17:       cond.true:
7733 // CHECK17-NEXT:    br label [[COND_END:%.*]]
7734 // CHECK17:       cond.false:
7735 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7736 // CHECK17-NEXT:    br label [[COND_END]]
7737 // CHECK17:       cond.end:
7738 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7739 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7740 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7741 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7742 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7743 // CHECK17:       omp.inner.for.cond:
7744 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7745 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7746 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7747 // CHECK17-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7748 // CHECK17:       omp.inner.for.body:
7749 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7750 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7751 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7752 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7753 // CHECK17-NEXT:    store i32 1, i32* [[G]], align 4
7754 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[_TMP3]], align 8
7755 // CHECK17-NEXT:    store volatile i32 1, i32* [[TMP10]], align 4
7756 // CHECK17-NEXT:    store i32 2, i32* [[SIVAR]], align 4
7757 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
7758 // CHECK17-NEXT:    store i32* [[G]], i32** [[TMP11]], align 8
7759 // CHECK17-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
7760 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[_TMP3]], align 8
7761 // CHECK17-NEXT:    store i32* [[TMP13]], i32** [[TMP12]], align 8
7762 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 2
7763 // CHECK17-NEXT:    store i32* [[SIVAR]], i32** [[TMP14]], align 8
7764 // CHECK17-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR3:[0-9]+]]
7765 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7766 // CHECK17:       omp.body.continue:
7767 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7768 // CHECK17:       omp.inner.for.inc:
7769 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7770 // CHECK17-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1
7771 // CHECK17-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
7772 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
7773 // CHECK17:       omp.inner.for.end:
7774 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7775 // CHECK17:       omp.loop.exit:
7776 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7777 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7778 // CHECK17-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
7779 // CHECK17-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7780 // CHECK17:       .omp.final.then:
7781 // CHECK17-NEXT:    store i32 2, i32* [[I]], align 4
7782 // CHECK17-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7783 // CHECK17:       .omp.final.done:
7784 // CHECK17-NEXT:    ret void
7785 //
7786 //
7787 // CHECK18-LABEL: define {{[^@]+}}@__cxx_global_var_init
7788 // CHECK18-SAME: () #[[ATTR0:[0-9]+]] {
7789 // CHECK18-NEXT:  entry:
7790 // CHECK18-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
7791 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
7792 // CHECK18-NEXT:    ret void
7793 //
7794 //
7795 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
7796 // CHECK18-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
7797 // CHECK18-NEXT:  entry:
7798 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
7799 // CHECK18-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
7800 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
7801 // CHECK18-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
7802 // CHECK18-NEXT:    ret void
7803 //
7804 //
7805 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
7806 // CHECK18-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7807 // CHECK18-NEXT:  entry:
7808 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
7809 // CHECK18-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
7810 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
7811 // CHECK18-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
7812 // CHECK18-NEXT:    ret void
7813 //
7814 //
7815 // CHECK18-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
7816 // CHECK18-SAME: () #[[ATTR0]] {
7817 // CHECK18-NEXT:  entry:
7818 // CHECK18-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
7819 // CHECK18-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
7820 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
7821 // CHECK18-NEXT:    ret void
7822 //
7823 //
7824 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
7825 // CHECK18-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
7826 // CHECK18-NEXT:  entry:
7827 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
7828 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
7829 // CHECK18-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
7830 // CHECK18-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
7831 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
7832 // CHECK18-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
7833 // CHECK18-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
7834 // CHECK18-NEXT:    ret void
7835 //
7836 //
7837 // CHECK18-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
7838 // CHECK18-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
7839 // CHECK18-NEXT:  entry:
7840 // CHECK18-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
7841 // CHECK18-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
7842 // CHECK18-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
7843 // CHECK18:       arraydestroy.body:
7844 // CHECK18-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
7845 // CHECK18-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
7846 // CHECK18-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
7847 // CHECK18-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
7848 // CHECK18-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
7849 // CHECK18:       arraydestroy.done1:
7850 // CHECK18-NEXT:    ret void
7851 //
7852 //
7853 // CHECK18-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
7854 // CHECK18-SAME: () #[[ATTR0]] {
7855 // CHECK18-NEXT:  entry:
7856 // CHECK18-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
7857 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
7858 // CHECK18-NEXT:    ret void
7859 //
7860 //
7861 // CHECK18-LABEL: define {{[^@]+}}@main
7862 // CHECK18-SAME: () #[[ATTR3:[0-9]+]] {
7863 // CHECK18-NEXT:  entry:
7864 // CHECK18-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7865 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7866 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7867 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7868 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7869 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
7870 // CHECK18-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
7871 // CHECK18-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
7872 // CHECK18-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
7873 // CHECK18-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
7874 // CHECK18-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
7875 // CHECK18-NEXT:    store i32 0, i32* [[RETVAL]], align 4
7876 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7877 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7878 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7879 // CHECK18-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7880 // CHECK18-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
7881 // CHECK18-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
7882 // CHECK18-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
7883 // CHECK18:       arrayctor.loop:
7884 // CHECK18-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
7885 // CHECK18-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
7886 // CHECK18-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
7887 // CHECK18-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
7888 // CHECK18-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
7889 // CHECK18:       arrayctor.cont:
7890 // CHECK18-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
7891 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7892 // CHECK18:       omp.inner.for.cond:
7893 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7894 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
7895 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7896 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
7897 // CHECK18:       omp.inner.for.cond.cleanup:
7898 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
7899 // CHECK18:       omp.inner.for.body:
7900 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7901 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7902 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7903 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
7904 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !2
7905 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
7906 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
7907 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
7908 // CHECK18-NEXT:    store i32 [[TMP4]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
7909 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
7910 // CHECK18-NEXT:    [[IDXPROM1:%.*]] = sext i32 [[TMP6]] to i64
7911 // CHECK18-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM1]]
7912 // CHECK18-NEXT:    [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8*
7913 // CHECK18-NEXT:    [[TMP8:%.*]] = bitcast %struct.S* [[VAR]] to i8*
7914 // CHECK18-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 4, i1 false), !llvm.access.group !2
7915 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
7916 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !2
7917 // CHECK18-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
7918 // CHECK18-NEXT:    store i32 [[ADD3]], i32* [[SIVAR]], align 4, !llvm.access.group !2
7919 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7920 // CHECK18:       omp.body.continue:
7921 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7922 // CHECK18:       omp.inner.for.inc:
7923 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7924 // CHECK18-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
7925 // CHECK18-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7926 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7927 // CHECK18:       omp.inner.for.end:
7928 // CHECK18-NEXT:    store i32 2, i32* [[I]], align 4
7929 // CHECK18-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
7930 // CHECK18-NEXT:    [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
7931 // CHECK18-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i64 2
7932 // CHECK18-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
7933 // CHECK18:       arraydestroy.body:
7934 // CHECK18-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
7935 // CHECK18-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
7936 // CHECK18-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
7937 // CHECK18-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]]
7938 // CHECK18-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]
7939 // CHECK18:       arraydestroy.done6:
7940 // CHECK18-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
7941 // CHECK18-NEXT:    ret i32 [[CALL]]
7942 //
7943 //
7944 // CHECK18-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
7945 // CHECK18-SAME: () #[[ATTR5:[0-9]+]] comdat {
7946 // CHECK18-NEXT:  entry:
7947 // CHECK18-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7948 // CHECK18-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
7949 // CHECK18-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
7950 // CHECK18-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
7951 // CHECK18-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
7952 // CHECK18-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
7953 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7954 // CHECK18-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
7955 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7956 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7957 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7958 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
7959 // CHECK18-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
7960 // CHECK18-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
7961 // CHECK18-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
7962 // CHECK18-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
7963 // CHECK18-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 8
7964 // CHECK18-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
7965 // CHECK18-NEXT:    store i32 0, i32* [[T_VAR]], align 4
7966 // CHECK18-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
7967 // CHECK18-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
7968 // CHECK18-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
7969 // CHECK18-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
7970 // CHECK18-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
7971 // CHECK18-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
7972 // CHECK18-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
7973 // CHECK18-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
7974 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7975 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7976 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7977 // CHECK18-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
7978 // CHECK18-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
7979 // CHECK18-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
7980 // CHECK18-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
7981 // CHECK18:       arrayctor.loop:
7982 // CHECK18-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
7983 // CHECK18-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
7984 // CHECK18-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
7985 // CHECK18-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
7986 // CHECK18-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
7987 // CHECK18:       arrayctor.cont:
7988 // CHECK18-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]])
7989 // CHECK18-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8
7990 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7991 // CHECK18:       omp.inner.for.cond:
7992 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
7993 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
7994 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
7995 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
7996 // CHECK18:       omp.inner.for.cond.cleanup:
7997 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
7998 // CHECK18:       omp.inner.for.body:
7999 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8000 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
8001 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8002 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
8003 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6
8004 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
8005 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
8006 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
8007 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
8008 // CHECK18-NEXT:    [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !6
8009 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
8010 // CHECK18-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64
8011 // CHECK18-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]]
8012 // CHECK18-NEXT:    [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
8013 // CHECK18-NEXT:    [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8*
8014 // CHECK18-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !6
8015 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8016 // CHECK18:       omp.body.continue:
8017 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8018 // CHECK18:       omp.inner.for.inc:
8019 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8020 // CHECK18-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1
8021 // CHECK18-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8022 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
8023 // CHECK18:       omp.inner.for.end:
8024 // CHECK18-NEXT:    store i32 2, i32* [[I]], align 4
8025 // CHECK18-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR2]]
8026 // CHECK18-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
8027 // CHECK18-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2
8028 // CHECK18-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
8029 // CHECK18:       arraydestroy.body:
8030 // CHECK18-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
8031 // CHECK18-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
8032 // CHECK18-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
8033 // CHECK18-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
8034 // CHECK18-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
8035 // CHECK18:       arraydestroy.done11:
8036 // CHECK18-NEXT:    store i32 0, i32* [[RETVAL]], align 4
8037 // CHECK18-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
8038 // CHECK18-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
8039 // CHECK18-NEXT:    br label [[ARRAYDESTROY_BODY13:%.*]]
8040 // CHECK18:       arraydestroy.body13:
8041 // CHECK18-NEXT:    [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ]
8042 // CHECK18-NEXT:    [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1
8043 // CHECK18-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR2]]
8044 // CHECK18-NEXT:    [[ARRAYDESTROY_DONE16:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]]
8045 // CHECK18-NEXT:    br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]]
8046 // CHECK18:       arraydestroy.done17:
8047 // CHECK18-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
8048 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
8049 // CHECK18-NEXT:    ret i32 [[TMP14]]
8050 //
8051 //
8052 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
8053 // CHECK18-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8054 // CHECK18-NEXT:  entry:
8055 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8056 // CHECK18-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8057 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8058 // CHECK18-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
8059 // CHECK18-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
8060 // CHECK18-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
8061 // CHECK18-NEXT:    store float [[CONV]], float* [[F]], align 4
8062 // CHECK18-NEXT:    ret void
8063 //
8064 //
8065 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
8066 // CHECK18-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8067 // CHECK18-NEXT:  entry:
8068 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8069 // CHECK18-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8070 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8071 // CHECK18-NEXT:    ret void
8072 //
8073 //
8074 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
8075 // CHECK18-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8076 // CHECK18-NEXT:  entry:
8077 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8078 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
8079 // CHECK18-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8080 // CHECK18-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
8081 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8082 // CHECK18-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
8083 // CHECK18-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
8084 // CHECK18-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
8085 // CHECK18-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
8086 // CHECK18-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
8087 // CHECK18-NEXT:    store float [[ADD]], float* [[F]], align 4
8088 // CHECK18-NEXT:    ret void
8089 //
8090 //
8091 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
8092 // CHECK18-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8093 // CHECK18-NEXT:  entry:
8094 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8095 // CHECK18-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8096 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8097 // CHECK18-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
8098 // CHECK18-NEXT:    ret void
8099 //
8100 //
8101 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
8102 // CHECK18-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8103 // CHECK18-NEXT:  entry:
8104 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8105 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
8106 // CHECK18-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8107 // CHECK18-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
8108 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8109 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
8110 // CHECK18-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
8111 // CHECK18-NEXT:    ret void
8112 //
8113 //
8114 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
8115 // CHECK18-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8116 // CHECK18-NEXT:  entry:
8117 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8118 // CHECK18-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8119 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8120 // CHECK18-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
8121 // CHECK18-NEXT:    ret void
8122 //
8123 //
8124 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
8125 // CHECK18-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8126 // CHECK18-NEXT:  entry:
8127 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8128 // CHECK18-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8129 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8130 // CHECK18-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
8131 // CHECK18-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
8132 // CHECK18-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
8133 // CHECK18-NEXT:    ret void
8134 //
8135 //
8136 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
8137 // CHECK18-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8138 // CHECK18-NEXT:  entry:
8139 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8140 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
8141 // CHECK18-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8142 // CHECK18-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
8143 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8144 // CHECK18-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
8145 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
8146 // CHECK18-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
8147 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
8148 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
8149 // CHECK18-NEXT:    ret void
8150 //
8151 //
8152 // CHECK18-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
8153 // CHECK18-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8154 // CHECK18-NEXT:  entry:
8155 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8156 // CHECK18-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8157 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8158 // CHECK18-NEXT:    ret void
8159 //
8160 //
8161 // CHECK18-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
8162 // CHECK18-SAME: () #[[ATTR0]] {
8163 // CHECK18-NEXT:  entry:
8164 // CHECK18-NEXT:    call void @__cxx_global_var_init()
8165 // CHECK18-NEXT:    call void @__cxx_global_var_init.1()
8166 // CHECK18-NEXT:    call void @__cxx_global_var_init.2()
8167 // CHECK18-NEXT:    ret void
8168 //
8169 //
8170 // CHECK19-LABEL: define {{[^@]+}}@__cxx_global_var_init
8171 // CHECK19-SAME: () #[[ATTR0:[0-9]+]] {
8172 // CHECK19-NEXT:  entry:
8173 // CHECK19-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
8174 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
8175 // CHECK19-NEXT:    ret void
8176 //
8177 //
8178 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
8179 // CHECK19-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
8180 // CHECK19-NEXT:  entry:
8181 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8182 // CHECK19-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8183 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8184 // CHECK19-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
8185 // CHECK19-NEXT:    ret void
8186 //
8187 //
8188 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
8189 // CHECK19-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8190 // CHECK19-NEXT:  entry:
8191 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8192 // CHECK19-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8193 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8194 // CHECK19-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
8195 // CHECK19-NEXT:    ret void
8196 //
8197 //
8198 // CHECK19-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
8199 // CHECK19-SAME: () #[[ATTR0]] {
8200 // CHECK19-NEXT:  entry:
8201 // CHECK19-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
8202 // CHECK19-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
8203 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
8204 // CHECK19-NEXT:    ret void
8205 //
8206 //
8207 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
8208 // CHECK19-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8209 // CHECK19-NEXT:  entry:
8210 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8211 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
8212 // CHECK19-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8213 // CHECK19-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
8214 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8215 // CHECK19-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
8216 // CHECK19-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
8217 // CHECK19-NEXT:    ret void
8218 //
8219 //
8220 // CHECK19-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
8221 // CHECK19-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
8222 // CHECK19-NEXT:  entry:
8223 // CHECK19-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
8224 // CHECK19-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
8225 // CHECK19-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
8226 // CHECK19:       arraydestroy.body:
8227 // CHECK19-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
8228 // CHECK19-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
8229 // CHECK19-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
8230 // CHECK19-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
8231 // CHECK19-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
8232 // CHECK19:       arraydestroy.done1:
8233 // CHECK19-NEXT:    ret void
8234 //
8235 //
8236 // CHECK19-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
8237 // CHECK19-SAME: () #[[ATTR0]] {
8238 // CHECK19-NEXT:  entry:
8239 // CHECK19-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
8240 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
8241 // CHECK19-NEXT:    ret void
8242 //
8243 //
8244 // CHECK19-LABEL: define {{[^@]+}}@main
8245 // CHECK19-SAME: () #[[ATTR3:[0-9]+]] {
8246 // CHECK19-NEXT:  entry:
8247 // CHECK19-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
8248 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8249 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8250 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8251 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8252 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
8253 // CHECK19-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
8254 // CHECK19-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
8255 // CHECK19-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
8256 // CHECK19-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
8257 // CHECK19-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
8258 // CHECK19-NEXT:    store i32 0, i32* [[RETVAL]], align 4
8259 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8260 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
8261 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8262 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8263 // CHECK19-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
8264 // CHECK19-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
8265 // CHECK19-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
8266 // CHECK19:       arrayctor.loop:
8267 // CHECK19-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
8268 // CHECK19-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
8269 // CHECK19-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
8270 // CHECK19-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
8271 // CHECK19-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
8272 // CHECK19:       arrayctor.cont:
8273 // CHECK19-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
8274 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8275 // CHECK19:       omp.inner.for.cond:
8276 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8277 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
8278 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8279 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
8280 // CHECK19:       omp.inner.for.cond.cleanup:
8281 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
8282 // CHECK19:       omp.inner.for.body:
8283 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8284 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8285 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8286 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
8287 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !2
8288 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
8289 // CHECK19-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
8290 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
8291 // CHECK19-NEXT:    store i32 [[TMP4]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
8292 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
8293 // CHECK19-NEXT:    [[IDXPROM1:%.*]] = sext i32 [[TMP6]] to i64
8294 // CHECK19-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM1]]
8295 // CHECK19-NEXT:    [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8*
8296 // CHECK19-NEXT:    [[TMP8:%.*]] = bitcast %struct.S* [[VAR]] to i8*
8297 // CHECK19-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 4, i1 false), !llvm.access.group !2
8298 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
8299 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !2
8300 // CHECK19-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
8301 // CHECK19-NEXT:    store i32 [[ADD3]], i32* [[SIVAR]], align 4, !llvm.access.group !2
8302 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8303 // CHECK19:       omp.body.continue:
8304 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8305 // CHECK19:       omp.inner.for.inc:
8306 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8307 // CHECK19-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
8308 // CHECK19-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8309 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
8310 // CHECK19:       omp.inner.for.end:
8311 // CHECK19-NEXT:    store i32 2, i32* [[I]], align 4
8312 // CHECK19-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
8313 // CHECK19-NEXT:    [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
8314 // CHECK19-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i64 2
8315 // CHECK19-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
8316 // CHECK19:       arraydestroy.body:
8317 // CHECK19-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
8318 // CHECK19-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
8319 // CHECK19-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
8320 // CHECK19-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]]
8321 // CHECK19-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]
8322 // CHECK19:       arraydestroy.done6:
8323 // CHECK19-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
8324 // CHECK19-NEXT:    ret i32 [[CALL]]
8325 //
8326 //
8327 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
8328 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] comdat {
8329 // CHECK19-NEXT:  entry:
8330 // CHECK19-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
8331 // CHECK19-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
8332 // CHECK19-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
8333 // CHECK19-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
8334 // CHECK19-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
8335 // CHECK19-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
8336 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8337 // CHECK19-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
8338 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8339 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8340 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8341 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
8342 // CHECK19-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
8343 // CHECK19-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
8344 // CHECK19-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
8345 // CHECK19-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
8346 // CHECK19-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 8
8347 // CHECK19-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
8348 // CHECK19-NEXT:    store i32 0, i32* [[T_VAR]], align 4
8349 // CHECK19-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
8350 // CHECK19-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
8351 // CHECK19-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
8352 // CHECK19-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
8353 // CHECK19-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
8354 // CHECK19-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
8355 // CHECK19-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
8356 // CHECK19-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
8357 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8358 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
8359 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8360 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
8361 // CHECK19-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
8362 // CHECK19-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
8363 // CHECK19-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
8364 // CHECK19:       arrayctor.loop:
8365 // CHECK19-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
8366 // CHECK19-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
8367 // CHECK19-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
8368 // CHECK19-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
8369 // CHECK19-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
8370 // CHECK19:       arrayctor.cont:
8371 // CHECK19-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]])
8372 // CHECK19-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8
8373 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8374 // CHECK19:       omp.inner.for.cond:
8375 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8376 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
8377 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
8378 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
8379 // CHECK19:       omp.inner.for.cond.cleanup:
8380 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
8381 // CHECK19:       omp.inner.for.body:
8382 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8383 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
8384 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8385 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
8386 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6
8387 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
8388 // CHECK19-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
8389 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
8390 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
8391 // CHECK19-NEXT:    [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !6
8392 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
8393 // CHECK19-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64
8394 // CHECK19-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]]
8395 // CHECK19-NEXT:    [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
8396 // CHECK19-NEXT:    [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8*
8397 // CHECK19-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !6
8398 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8399 // CHECK19:       omp.body.continue:
8400 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8401 // CHECK19:       omp.inner.for.inc:
8402 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8403 // CHECK19-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1
8404 // CHECK19-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8405 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
8406 // CHECK19:       omp.inner.for.end:
8407 // CHECK19-NEXT:    store i32 2, i32* [[I]], align 4
8408 // CHECK19-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR2]]
8409 // CHECK19-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
8410 // CHECK19-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2
8411 // CHECK19-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
8412 // CHECK19:       arraydestroy.body:
8413 // CHECK19-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
8414 // CHECK19-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
8415 // CHECK19-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
8416 // CHECK19-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
8417 // CHECK19-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
8418 // CHECK19:       arraydestroy.done11:
8419 // CHECK19-NEXT:    store i32 0, i32* [[RETVAL]], align 4
8420 // CHECK19-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
8421 // CHECK19-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
8422 // CHECK19-NEXT:    br label [[ARRAYDESTROY_BODY13:%.*]]
8423 // CHECK19:       arraydestroy.body13:
8424 // CHECK19-NEXT:    [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ]
8425 // CHECK19-NEXT:    [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1
8426 // CHECK19-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR2]]
8427 // CHECK19-NEXT:    [[ARRAYDESTROY_DONE16:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]]
8428 // CHECK19-NEXT:    br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]]
8429 // CHECK19:       arraydestroy.done17:
8430 // CHECK19-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
8431 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
8432 // CHECK19-NEXT:    ret i32 [[TMP14]]
8433 //
8434 //
8435 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
8436 // CHECK19-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8437 // CHECK19-NEXT:  entry:
8438 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8439 // CHECK19-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8440 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8441 // CHECK19-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
8442 // CHECK19-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
8443 // CHECK19-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
8444 // CHECK19-NEXT:    store float [[CONV]], float* [[F]], align 4
8445 // CHECK19-NEXT:    ret void
8446 //
8447 //
8448 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
8449 // CHECK19-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8450 // CHECK19-NEXT:  entry:
8451 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8452 // CHECK19-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8453 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8454 // CHECK19-NEXT:    ret void
8455 //
8456 //
8457 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
8458 // CHECK19-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8459 // CHECK19-NEXT:  entry:
8460 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8461 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
8462 // CHECK19-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8463 // CHECK19-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
8464 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8465 // CHECK19-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
8466 // CHECK19-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
8467 // CHECK19-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
8468 // CHECK19-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
8469 // CHECK19-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
8470 // CHECK19-NEXT:    store float [[ADD]], float* [[F]], align 4
8471 // CHECK19-NEXT:    ret void
8472 //
8473 //
8474 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
8475 // CHECK19-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8476 // CHECK19-NEXT:  entry:
8477 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8478 // CHECK19-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8479 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8480 // CHECK19-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
8481 // CHECK19-NEXT:    ret void
8482 //
8483 //
8484 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
8485 // CHECK19-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8486 // CHECK19-NEXT:  entry:
8487 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8488 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
8489 // CHECK19-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8490 // CHECK19-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
8491 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8492 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
8493 // CHECK19-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
8494 // CHECK19-NEXT:    ret void
8495 //
8496 //
8497 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
8498 // CHECK19-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8499 // CHECK19-NEXT:  entry:
8500 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8501 // CHECK19-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8502 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8503 // CHECK19-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
8504 // CHECK19-NEXT:    ret void
8505 //
8506 //
8507 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
8508 // CHECK19-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8509 // CHECK19-NEXT:  entry:
8510 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8511 // CHECK19-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8512 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8513 // CHECK19-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
8514 // CHECK19-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
8515 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
8516 // CHECK19-NEXT:    ret void
8517 //
8518 //
8519 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
8520 // CHECK19-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8521 // CHECK19-NEXT:  entry:
8522 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8523 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
8524 // CHECK19-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8525 // CHECK19-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
8526 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8527 // CHECK19-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
8528 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
8529 // CHECK19-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
8530 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
8531 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
8532 // CHECK19-NEXT:    ret void
8533 //
8534 //
8535 // CHECK19-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
8536 // CHECK19-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8537 // CHECK19-NEXT:  entry:
8538 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
8539 // CHECK19-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
8540 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
8541 // CHECK19-NEXT:    ret void
8542 //
8543 //
8544 // CHECK19-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
8545 // CHECK19-SAME: () #[[ATTR0]] {
8546 // CHECK19-NEXT:  entry:
8547 // CHECK19-NEXT:    call void @__cxx_global_var_init()
8548 // CHECK19-NEXT:    call void @__cxx_global_var_init.1()
8549 // CHECK19-NEXT:    call void @__cxx_global_var_init.2()
8550 // CHECK19-NEXT:    ret void
8551 //
8552 //
8553 // CHECK20-LABEL: define {{[^@]+}}@__cxx_global_var_init
8554 // CHECK20-SAME: () #[[ATTR0:[0-9]+]] {
8555 // CHECK20-NEXT:  entry:
8556 // CHECK20-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
8557 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
8558 // CHECK20-NEXT:    ret void
8559 //
8560 //
8561 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
8562 // CHECK20-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
8563 // CHECK20-NEXT:  entry:
8564 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
8565 // CHECK20-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
8566 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
8567 // CHECK20-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
8568 // CHECK20-NEXT:    ret void
8569 //
8570 //
8571 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
8572 // CHECK20-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8573 // CHECK20-NEXT:  entry:
8574 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
8575 // CHECK20-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
8576 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
8577 // CHECK20-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
8578 // CHECK20-NEXT:    ret void
8579 //
8580 //
8581 // CHECK20-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
8582 // CHECK20-SAME: () #[[ATTR0]] {
8583 // CHECK20-NEXT:  entry:
8584 // CHECK20-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), float 1.000000e+00)
8585 // CHECK20-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 1), float 2.000000e+00)
8586 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
8587 // CHECK20-NEXT:    ret void
8588 //
8589 //
8590 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
8591 // CHECK20-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8592 // CHECK20-NEXT:  entry:
8593 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
8594 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
8595 // CHECK20-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
8596 // CHECK20-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
8597 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
8598 // CHECK20-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
8599 // CHECK20-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
8600 // CHECK20-NEXT:    ret void
8601 //
8602 //
8603 // CHECK20-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
8604 // CHECK20-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
8605 // CHECK20-NEXT:  entry:
8606 // CHECK20-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
8607 // CHECK20-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
8608 // CHECK20-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
8609 // CHECK20:       arraydestroy.body:
8610 // CHECK20-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i32 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
8611 // CHECK20-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
8612 // CHECK20-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
8613 // CHECK20-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
8614 // CHECK20-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
8615 // CHECK20:       arraydestroy.done1:
8616 // CHECK20-NEXT:    ret void
8617 //
8618 //
8619 // CHECK20-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
8620 // CHECK20-SAME: () #[[ATTR0]] {
8621 // CHECK20-NEXT:  entry:
8622 // CHECK20-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
8623 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
8624 // CHECK20-NEXT:    ret void
8625 //
8626 //
8627 // CHECK20-LABEL: define {{[^@]+}}@main
8628 // CHECK20-SAME: () #[[ATTR3:[0-9]+]] {
8629 // CHECK20-NEXT:  entry:
8630 // CHECK20-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
8631 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8632 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8633 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8634 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8635 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
8636 // CHECK20-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
8637 // CHECK20-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
8638 // CHECK20-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
8639 // CHECK20-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
8640 // CHECK20-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
8641 // CHECK20-NEXT:    store i32 0, i32* [[RETVAL]], align 4
8642 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8643 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
8644 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8645 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8646 // CHECK20-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
8647 // CHECK20-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
8648 // CHECK20-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
8649 // CHECK20:       arrayctor.loop:
8650 // CHECK20-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
8651 // CHECK20-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
8652 // CHECK20-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
8653 // CHECK20-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
8654 // CHECK20-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
8655 // CHECK20:       arrayctor.cont:
8656 // CHECK20-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
8657 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8658 // CHECK20:       omp.inner.for.cond:
8659 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8660 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
8661 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8662 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
8663 // CHECK20:       omp.inner.for.cond.cleanup:
8664 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
8665 // CHECK20:       omp.inner.for.body:
8666 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8667 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8668 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8669 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
8670 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !3
8671 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
8672 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP5]]
8673 // CHECK20-NEXT:    store i32 [[TMP4]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
8674 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
8675 // CHECK20-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP6]]
8676 // CHECK20-NEXT:    [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8*
8677 // CHECK20-NEXT:    [[TMP8:%.*]] = bitcast %struct.S* [[VAR]] to i8*
8678 // CHECK20-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 4, i1 false), !llvm.access.group !3
8679 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
8680 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !3
8681 // CHECK20-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
8682 // CHECK20-NEXT:    store i32 [[ADD2]], i32* [[SIVAR]], align 4, !llvm.access.group !3
8683 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8684 // CHECK20:       omp.body.continue:
8685 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8686 // CHECK20:       omp.inner.for.inc:
8687 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8688 // CHECK20-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
8689 // CHECK20-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8690 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
8691 // CHECK20:       omp.inner.for.end:
8692 // CHECK20-NEXT:    store i32 2, i32* [[I]], align 4
8693 // CHECK20-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
8694 // CHECK20-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
8695 // CHECK20-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2
8696 // CHECK20-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
8697 // CHECK20:       arraydestroy.body:
8698 // CHECK20-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
8699 // CHECK20-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
8700 // CHECK20-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
8701 // CHECK20-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
8702 // CHECK20-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
8703 // CHECK20:       arraydestroy.done5:
8704 // CHECK20-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
8705 // CHECK20-NEXT:    ret i32 [[CALL]]
8706 //
8707 //
8708 // CHECK20-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
8709 // CHECK20-SAME: () #[[ATTR5:[0-9]+]] comdat {
8710 // CHECK20-NEXT:  entry:
8711 // CHECK20-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
8712 // CHECK20-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
8713 // CHECK20-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
8714 // CHECK20-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
8715 // CHECK20-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
8716 // CHECK20-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
8717 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8718 // CHECK20-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
8719 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8720 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8721 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8722 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
8723 // CHECK20-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
8724 // CHECK20-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
8725 // CHECK20-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
8726 // CHECK20-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
8727 // CHECK20-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
8728 // CHECK20-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
8729 // CHECK20-NEXT:    store i32 0, i32* [[T_VAR]], align 4
8730 // CHECK20-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
8731 // CHECK20-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
8732 // CHECK20-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
8733 // CHECK20-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
8734 // CHECK20-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
8735 // CHECK20-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
8736 // CHECK20-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
8737 // CHECK20-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
8738 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8739 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
8740 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8741 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
8742 // CHECK20-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
8743 // CHECK20-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
8744 // CHECK20-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
8745 // CHECK20:       arrayctor.loop:
8746 // CHECK20-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
8747 // CHECK20-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
8748 // CHECK20-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
8749 // CHECK20-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
8750 // CHECK20-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
8751 // CHECK20:       arrayctor.cont:
8752 // CHECK20-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]])
8753 // CHECK20-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
8754 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8755 // CHECK20:       omp.inner.for.cond:
8756 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
8757 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
8758 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
8759 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
8760 // CHECK20:       omp.inner.for.cond.cleanup:
8761 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
8762 // CHECK20:       omp.inner.for.body:
8763 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
8764 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
8765 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8766 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
8767 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !7
8768 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
8769 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]]
8770 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
8771 // CHECK20-NEXT:    [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !7
8772 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
8773 // CHECK20-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP8]]
8774 // CHECK20-NEXT:    [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8*
8775 // CHECK20-NEXT:    [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8*
8776 // CHECK20-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !7
8777 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8778 // CHECK20:       omp.body.continue:
8779 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8780 // CHECK20:       omp.inner.for.inc:
8781 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
8782 // CHECK20-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1
8783 // CHECK20-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
8784 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
8785 // CHECK20:       omp.inner.for.end:
8786 // CHECK20-NEXT:    store i32 2, i32* [[I]], align 4
8787 // CHECK20-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR2]]
8788 // CHECK20-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
8789 // CHECK20-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2
8790 // CHECK20-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
8791 // CHECK20:       arraydestroy.body:
8792 // CHECK20-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
8793 // CHECK20-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
8794 // CHECK20-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
8795 // CHECK20-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]
8796 // CHECK20-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]
8797 // CHECK20:       arraydestroy.done10:
8798 // CHECK20-NEXT:    store i32 0, i32* [[RETVAL]], align 4
8799 // CHECK20-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
8800 // CHECK20-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
8801 // CHECK20-NEXT:    br label [[ARRAYDESTROY_BODY12:%.*]]
8802 // CHECK20:       arraydestroy.body12:
8803 // CHECK20-NEXT:    [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ]
8804 // CHECK20-NEXT:    [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1
8805 // CHECK20-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR2]]
8806 // CHECK20-NEXT:    [[ARRAYDESTROY_DONE15:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]]
8807 // CHECK20-NEXT:    br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]]
8808 // CHECK20:       arraydestroy.done16:
8809 // CHECK20-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
8810 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
8811 // CHECK20-NEXT:    ret i32 [[TMP14]]
8812 //
8813 //
8814 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
8815 // CHECK20-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8816 // CHECK20-NEXT:  entry:
8817 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
8818 // CHECK20-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
8819 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
8820 // CHECK20-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
8821 // CHECK20-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
8822 // CHECK20-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
8823 // CHECK20-NEXT:    store float [[CONV]], float* [[F]], align 4
8824 // CHECK20-NEXT:    ret void
8825 //
8826 //
8827 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
8828 // CHECK20-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8829 // CHECK20-NEXT:  entry:
8830 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
8831 // CHECK20-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
8832 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
8833 // CHECK20-NEXT:    ret void
8834 //
8835 //
8836 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
8837 // CHECK20-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8838 // CHECK20-NEXT:  entry:
8839 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
8840 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
8841 // CHECK20-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
8842 // CHECK20-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
8843 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
8844 // CHECK20-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
8845 // CHECK20-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
8846 // CHECK20-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
8847 // CHECK20-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
8848 // CHECK20-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
8849 // CHECK20-NEXT:    store float [[ADD]], float* [[F]], align 4
8850 // CHECK20-NEXT:    ret void
8851 //
8852 //
8853 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
8854 // CHECK20-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8855 // CHECK20-NEXT:  entry:
8856 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
8857 // CHECK20-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
8858 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
8859 // CHECK20-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
8860 // CHECK20-NEXT:    ret void
8861 //
8862 //
8863 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
8864 // CHECK20-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8865 // CHECK20-NEXT:  entry:
8866 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
8867 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
8868 // CHECK20-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
8869 // CHECK20-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
8870 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
8871 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
8872 // CHECK20-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
8873 // CHECK20-NEXT:    ret void
8874 //
8875 //
8876 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
8877 // CHECK20-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8878 // CHECK20-NEXT:  entry:
8879 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
8880 // CHECK20-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
8881 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
8882 // CHECK20-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
8883 // CHECK20-NEXT:    ret void
8884 //
8885 //
8886 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
8887 // CHECK20-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8888 // CHECK20-NEXT:  entry:
8889 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
8890 // CHECK20-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
8891 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
8892 // CHECK20-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
8893 // CHECK20-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
8894 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
8895 // CHECK20-NEXT:    ret void
8896 //
8897 //
8898 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
8899 // CHECK20-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8900 // CHECK20-NEXT:  entry:
8901 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
8902 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
8903 // CHECK20-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
8904 // CHECK20-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
8905 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
8906 // CHECK20-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
8907 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
8908 // CHECK20-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
8909 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
8910 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
8911 // CHECK20-NEXT:    ret void
8912 //
8913 //
8914 // CHECK20-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
8915 // CHECK20-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8916 // CHECK20-NEXT:  entry:
8917 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
8918 // CHECK20-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
8919 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
8920 // CHECK20-NEXT:    ret void
8921 //
8922 //
8923 // CHECK20-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
8924 // CHECK20-SAME: () #[[ATTR0]] {
8925 // CHECK20-NEXT:  entry:
8926 // CHECK20-NEXT:    call void @__cxx_global_var_init()
8927 // CHECK20-NEXT:    call void @__cxx_global_var_init.1()
8928 // CHECK20-NEXT:    call void @__cxx_global_var_init.2()
8929 // CHECK20-NEXT:    ret void
8930 //
8931 //
8932 // CHECK21-LABEL: define {{[^@]+}}@__cxx_global_var_init
8933 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] {
8934 // CHECK21-NEXT:  entry:
8935 // CHECK21-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
8936 // CHECK21-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
8937 // CHECK21-NEXT:    ret void
8938 //
8939 //
8940 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
8941 // CHECK21-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
8942 // CHECK21-NEXT:  entry:
8943 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
8944 // CHECK21-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
8945 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
8946 // CHECK21-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
8947 // CHECK21-NEXT:    ret void
8948 //
8949 //
8950 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
8951 // CHECK21-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8952 // CHECK21-NEXT:  entry:
8953 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
8954 // CHECK21-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
8955 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
8956 // CHECK21-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
8957 // CHECK21-NEXT:    ret void
8958 //
8959 //
8960 // CHECK21-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
8961 // CHECK21-SAME: () #[[ATTR0]] {
8962 // CHECK21-NEXT:  entry:
8963 // CHECK21-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), float 1.000000e+00)
8964 // CHECK21-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 1), float 2.000000e+00)
8965 // CHECK21-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
8966 // CHECK21-NEXT:    ret void
8967 //
8968 //
8969 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
8970 // CHECK21-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
8971 // CHECK21-NEXT:  entry:
8972 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
8973 // CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
8974 // CHECK21-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
8975 // CHECK21-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
8976 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
8977 // CHECK21-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
8978 // CHECK21-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
8979 // CHECK21-NEXT:    ret void
8980 //
8981 //
8982 // CHECK21-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
8983 // CHECK21-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
8984 // CHECK21-NEXT:  entry:
8985 // CHECK21-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
8986 // CHECK21-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
8987 // CHECK21-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
8988 // CHECK21:       arraydestroy.body:
8989 // CHECK21-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i32 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
8990 // CHECK21-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
8991 // CHECK21-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
8992 // CHECK21-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
8993 // CHECK21-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
8994 // CHECK21:       arraydestroy.done1:
8995 // CHECK21-NEXT:    ret void
8996 //
8997 //
8998 // CHECK21-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
8999 // CHECK21-SAME: () #[[ATTR0]] {
9000 // CHECK21-NEXT:  entry:
9001 // CHECK21-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
9002 // CHECK21-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
9003 // CHECK21-NEXT:    ret void
9004 //
9005 //
9006 // CHECK21-LABEL: define {{[^@]+}}@main
9007 // CHECK21-SAME: () #[[ATTR3:[0-9]+]] {
9008 // CHECK21-NEXT:  entry:
9009 // CHECK21-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
9010 // CHECK21-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9011 // CHECK21-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9012 // CHECK21-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9013 // CHECK21-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9014 // CHECK21-NEXT:    [[I:%.*]] = alloca i32, align 4
9015 // CHECK21-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
9016 // CHECK21-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
9017 // CHECK21-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
9018 // CHECK21-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
9019 // CHECK21-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
9020 // CHECK21-NEXT:    store i32 0, i32* [[RETVAL]], align 4
9021 // CHECK21-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9022 // CHECK21-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
9023 // CHECK21-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9024 // CHECK21-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9025 // CHECK21-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
9026 // CHECK21-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
9027 // CHECK21-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
9028 // CHECK21:       arrayctor.loop:
9029 // CHECK21-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
9030 // CHECK21-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
9031 // CHECK21-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
9032 // CHECK21-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
9033 // CHECK21-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
9034 // CHECK21:       arrayctor.cont:
9035 // CHECK21-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
9036 // CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9037 // CHECK21:       omp.inner.for.cond:
9038 // CHECK21-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9039 // CHECK21-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
9040 // CHECK21-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9041 // CHECK21-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
9042 // CHECK21:       omp.inner.for.cond.cleanup:
9043 // CHECK21-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
9044 // CHECK21:       omp.inner.for.body:
9045 // CHECK21-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9046 // CHECK21-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9047 // CHECK21-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9048 // CHECK21-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
9049 // CHECK21-NEXT:    [[TMP4:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !3
9050 // CHECK21-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
9051 // CHECK21-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP5]]
9052 // CHECK21-NEXT:    store i32 [[TMP4]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
9053 // CHECK21-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
9054 // CHECK21-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP6]]
9055 // CHECK21-NEXT:    [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8*
9056 // CHECK21-NEXT:    [[TMP8:%.*]] = bitcast %struct.S* [[VAR]] to i8*
9057 // CHECK21-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 4, i1 false), !llvm.access.group !3
9058 // CHECK21-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
9059 // CHECK21-NEXT:    [[TMP10:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !3
9060 // CHECK21-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
9061 // CHECK21-NEXT:    store i32 [[ADD2]], i32* [[SIVAR]], align 4, !llvm.access.group !3
9062 // CHECK21-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9063 // CHECK21:       omp.body.continue:
9064 // CHECK21-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9065 // CHECK21:       omp.inner.for.inc:
9066 // CHECK21-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9067 // CHECK21-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
9068 // CHECK21-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9069 // CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
9070 // CHECK21:       omp.inner.for.end:
9071 // CHECK21-NEXT:    store i32 2, i32* [[I]], align 4
9072 // CHECK21-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]
9073 // CHECK21-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
9074 // CHECK21-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2
9075 // CHECK21-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
9076 // CHECK21:       arraydestroy.body:
9077 // CHECK21-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
9078 // CHECK21-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
9079 // CHECK21-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
9080 // CHECK21-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
9081 // CHECK21-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
9082 // CHECK21:       arraydestroy.done5:
9083 // CHECK21-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
9084 // CHECK21-NEXT:    ret i32 [[CALL]]
9085 //
9086 //
9087 // CHECK21-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
9088 // CHECK21-SAME: () #[[ATTR5:[0-9]+]] comdat {
9089 // CHECK21-NEXT:  entry:
9090 // CHECK21-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
9091 // CHECK21-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
9092 // CHECK21-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
9093 // CHECK21-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
9094 // CHECK21-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
9095 // CHECK21-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
9096 // CHECK21-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9097 // CHECK21-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
9098 // CHECK21-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9099 // CHECK21-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9100 // CHECK21-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9101 // CHECK21-NEXT:    [[I:%.*]] = alloca i32, align 4
9102 // CHECK21-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
9103 // CHECK21-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
9104 // CHECK21-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
9105 // CHECK21-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
9106 // CHECK21-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
9107 // CHECK21-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
9108 // CHECK21-NEXT:    store i32 0, i32* [[T_VAR]], align 4
9109 // CHECK21-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
9110 // CHECK21-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
9111 // CHECK21-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
9112 // CHECK21-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
9113 // CHECK21-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
9114 // CHECK21-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
9115 // CHECK21-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
9116 // CHECK21-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
9117 // CHECK21-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9118 // CHECK21-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
9119 // CHECK21-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9120 // CHECK21-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
9121 // CHECK21-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
9122 // CHECK21-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
9123 // CHECK21-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
9124 // CHECK21:       arrayctor.loop:
9125 // CHECK21-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
9126 // CHECK21-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
9127 // CHECK21-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
9128 // CHECK21-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
9129 // CHECK21-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
9130 // CHECK21:       arrayctor.cont:
9131 // CHECK21-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]])
9132 // CHECK21-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
9133 // CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9134 // CHECK21:       omp.inner.for.cond:
9135 // CHECK21-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9136 // CHECK21-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
9137 // CHECK21-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
9138 // CHECK21-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
9139 // CHECK21:       omp.inner.for.cond.cleanup:
9140 // CHECK21-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
9141 // CHECK21:       omp.inner.for.body:
9142 // CHECK21-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9143 // CHECK21-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
9144 // CHECK21-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9145 // CHECK21-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
9146 // CHECK21-NEXT:    [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !7
9147 // CHECK21-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
9148 // CHECK21-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]]
9149 // CHECK21-NEXT:    store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
9150 // CHECK21-NEXT:    [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !7
9151 // CHECK21-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
9152 // CHECK21-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP8]]
9153 // CHECK21-NEXT:    [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8*
9154 // CHECK21-NEXT:    [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8*
9155 // CHECK21-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !7
9156 // CHECK21-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9157 // CHECK21:       omp.body.continue:
9158 // CHECK21-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9159 // CHECK21:       omp.inner.for.inc:
9160 // CHECK21-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9161 // CHECK21-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1
9162 // CHECK21-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9163 // CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
9164 // CHECK21:       omp.inner.for.end:
9165 // CHECK21-NEXT:    store i32 2, i32* [[I]], align 4
9166 // CHECK21-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR2]]
9167 // CHECK21-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
9168 // CHECK21-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2
9169 // CHECK21-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
9170 // CHECK21:       arraydestroy.body:
9171 // CHECK21-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
9172 // CHECK21-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
9173 // CHECK21-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
9174 // CHECK21-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]
9175 // CHECK21-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]
9176 // CHECK21:       arraydestroy.done10:
9177 // CHECK21-NEXT:    store i32 0, i32* [[RETVAL]], align 4
9178 // CHECK21-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
9179 // CHECK21-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
9180 // CHECK21-NEXT:    br label [[ARRAYDESTROY_BODY12:%.*]]
9181 // CHECK21:       arraydestroy.body12:
9182 // CHECK21-NEXT:    [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ]
9183 // CHECK21-NEXT:    [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1
9184 // CHECK21-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR2]]
9185 // CHECK21-NEXT:    [[ARRAYDESTROY_DONE15:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]]
9186 // CHECK21-NEXT:    br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]]
9187 // CHECK21:       arraydestroy.done16:
9188 // CHECK21-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]
9189 // CHECK21-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
9190 // CHECK21-NEXT:    ret i32 [[TMP14]]
9191 //
9192 //
9193 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
9194 // CHECK21-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9195 // CHECK21-NEXT:  entry:
9196 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
9197 // CHECK21-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
9198 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
9199 // CHECK21-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
9200 // CHECK21-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
9201 // CHECK21-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
9202 // CHECK21-NEXT:    store float [[CONV]], float* [[F]], align 4
9203 // CHECK21-NEXT:    ret void
9204 //
9205 //
9206 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
9207 // CHECK21-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9208 // CHECK21-NEXT:  entry:
9209 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
9210 // CHECK21-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
9211 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
9212 // CHECK21-NEXT:    ret void
9213 //
9214 //
9215 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
9216 // CHECK21-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9217 // CHECK21-NEXT:  entry:
9218 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
9219 // CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
9220 // CHECK21-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
9221 // CHECK21-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
9222 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
9223 // CHECK21-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
9224 // CHECK21-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
9225 // CHECK21-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
9226 // CHECK21-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
9227 // CHECK21-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
9228 // CHECK21-NEXT:    store float [[ADD]], float* [[F]], align 4
9229 // CHECK21-NEXT:    ret void
9230 //
9231 //
9232 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
9233 // CHECK21-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9234 // CHECK21-NEXT:  entry:
9235 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
9236 // CHECK21-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
9237 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
9238 // CHECK21-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
9239 // CHECK21-NEXT:    ret void
9240 //
9241 //
9242 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
9243 // CHECK21-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9244 // CHECK21-NEXT:  entry:
9245 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
9246 // CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
9247 // CHECK21-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
9248 // CHECK21-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
9249 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
9250 // CHECK21-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
9251 // CHECK21-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
9252 // CHECK21-NEXT:    ret void
9253 //
9254 //
9255 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
9256 // CHECK21-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9257 // CHECK21-NEXT:  entry:
9258 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
9259 // CHECK21-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
9260 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
9261 // CHECK21-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
9262 // CHECK21-NEXT:    ret void
9263 //
9264 //
9265 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
9266 // CHECK21-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9267 // CHECK21-NEXT:  entry:
9268 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
9269 // CHECK21-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
9270 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
9271 // CHECK21-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
9272 // CHECK21-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
9273 // CHECK21-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
9274 // CHECK21-NEXT:    ret void
9275 //
9276 //
9277 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
9278 // CHECK21-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9279 // CHECK21-NEXT:  entry:
9280 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
9281 // CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
9282 // CHECK21-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
9283 // CHECK21-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
9284 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
9285 // CHECK21-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
9286 // CHECK21-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
9287 // CHECK21-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
9288 // CHECK21-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
9289 // CHECK21-NEXT:    store i32 [[ADD]], i32* [[F]], align 4
9290 // CHECK21-NEXT:    ret void
9291 //
9292 //
9293 // CHECK21-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
9294 // CHECK21-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9295 // CHECK21-NEXT:  entry:
9296 // CHECK21-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
9297 // CHECK21-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
9298 // CHECK21-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
9299 // CHECK21-NEXT:    ret void
9300 //
9301 //
9302 // CHECK21-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
9303 // CHECK21-SAME: () #[[ATTR0]] {
9304 // CHECK21-NEXT:  entry:
9305 // CHECK21-NEXT:    call void @__cxx_global_var_init()
9306 // CHECK21-NEXT:    call void @__cxx_global_var_init.1()
9307 // CHECK21-NEXT:    call void @__cxx_global_var_init.2()
9308 // CHECK21-NEXT:    ret void
9309 //
9310 //
9311 // CHECK22-LABEL: define {{[^@]+}}@__cxx_global_var_init
9312 // CHECK22-SAME: () #[[ATTR0:[0-9]+]] {
9313 // CHECK22-NEXT:  entry:
9314 // CHECK22-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) @test)
9315 // CHECK22-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @test to i8*), i8* @__dso_handle) #[[ATTR2:[0-9]+]]
9316 // CHECK22-NEXT:    ret void
9317 //
9318 //
9319 // CHECK22-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
9320 // CHECK22-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
9321 // CHECK22-NEXT:  entry:
9322 // CHECK22-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9323 // CHECK22-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9324 // CHECK22-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9325 // CHECK22-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
9326 // CHECK22-NEXT:    ret void
9327 //
9328 //
9329 // CHECK22-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
9330 // CHECK22-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9331 // CHECK22-NEXT:  entry:
9332 // CHECK22-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9333 // CHECK22-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9334 // CHECK22-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9335 // CHECK22-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
9336 // CHECK22-NEXT:    ret void
9337 //
9338 //
9339 // CHECK22-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
9340 // CHECK22-SAME: () #[[ATTR0]] {
9341 // CHECK22-NEXT:  entry:
9342 // CHECK22-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 0), float 1.000000e+00)
9343 // CHECK22-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i64 0, i64 1), float 2.000000e+00)
9344 // CHECK22-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) #[[ATTR2]]
9345 // CHECK22-NEXT:    ret void
9346 //
9347 //
9348 // CHECK22-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
9349 // CHECK22-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9350 // CHECK22-NEXT:  entry:
9351 // CHECK22-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9352 // CHECK22-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
9353 // CHECK22-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9354 // CHECK22-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
9355 // CHECK22-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9356 // CHECK22-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
9357 // CHECK22-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
9358 // CHECK22-NEXT:    ret void
9359 //
9360 //
9361 // CHECK22-LABEL: define {{[^@]+}}@__cxx_global_array_dtor
9362 // CHECK22-SAME: (i8* [[TMP0:%.*]]) #[[ATTR0]] {
9363 // CHECK22-NEXT:  entry:
9364 // CHECK22-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
9365 // CHECK22-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
9366 // CHECK22-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
9367 // CHECK22:       arraydestroy.body:
9368 // CHECK22-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ getelementptr inbounds ([[STRUCT_S:%.*]], %struct.S* getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0), i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
9369 // CHECK22-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
9370 // CHECK22-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]
9371 // CHECK22-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], getelementptr inbounds ([2 x %struct.S], [2 x %struct.S]* @s_arr, i32 0, i32 0)
9372 // CHECK22-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
9373 // CHECK22:       arraydestroy.done1:
9374 // CHECK22-NEXT:    ret void
9375 //
9376 //
9377 // CHECK22-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
9378 // CHECK22-SAME: () #[[ATTR0]] {
9379 // CHECK22-NEXT:  entry:
9380 // CHECK22-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) @var, float 3.000000e+00)
9381 // CHECK22-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.S*)* @_ZN1SIfED1Ev to void (i8*)*), i8* bitcast (%struct.S* @var to i8*), i8* @__dso_handle) #[[ATTR2]]
9382 // CHECK22-NEXT:    ret void
9383 //
9384 //
9385 // CHECK22-LABEL: define {{[^@]+}}@main
9386 // CHECK22-SAME: () #[[ATTR3:[0-9]+]] {
9387 // CHECK22-NEXT:  entry:
9388 // CHECK22-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
9389 // CHECK22-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
9390 // CHECK22-NEXT:    store i32 0, i32* [[RETVAL]], align 4
9391 // CHECK22-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
9392 // CHECK22-NEXT:    ret i32 0
9393 //
9394 //
9395 // CHECK22-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
9396 // CHECK22-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9397 // CHECK22-NEXT:  entry:
9398 // CHECK22-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9399 // CHECK22-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9400 // CHECK22-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9401 // CHECK22-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
9402 // CHECK22-NEXT:    [[TMP0:%.*]] = load volatile i32, i32* @g, align 4
9403 // CHECK22-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
9404 // CHECK22-NEXT:    store float [[CONV]], float* [[F]], align 4
9405 // CHECK22-NEXT:    ret void
9406 //
9407 //
9408 // CHECK22-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
9409 // CHECK22-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9410 // CHECK22-NEXT:  entry:
9411 // CHECK22-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9412 // CHECK22-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9413 // CHECK22-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9414 // CHECK22-NEXT:    ret void
9415 //
9416 //
9417 // CHECK22-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
9418 // CHECK22-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
9419 // CHECK22-NEXT:  entry:
9420 // CHECK22-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9421 // CHECK22-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
9422 // CHECK22-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9423 // CHECK22-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
9424 // CHECK22-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9425 // CHECK22-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
9426 // CHECK22-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
9427 // CHECK22-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* @g, align 4
9428 // CHECK22-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
9429 // CHECK22-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
9430 // CHECK22-NEXT:    store float [[ADD]], float* [[F]], align 4
9431 // CHECK22-NEXT:    ret void
9432 //
9433 //
9434 // CHECK22-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_simd_private_codegen.cpp
9435 // CHECK22-SAME: () #[[ATTR0]] {
9436 // CHECK22-NEXT:  entry:
9437 // CHECK22-NEXT:    call void @__cxx_global_var_init()
9438 // CHECK22-NEXT:    call void @__cxx_global_var_init.1()
9439 // CHECK22-NEXT:    call void @__cxx_global_var_init.2()
9440 // CHECK22-NEXT:    ret void
9441 //
9442