1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
8
9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15
16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
19
20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23
24 // expected-no-diagnostics
25 #ifndef HEADER
26 #define HEADER
27
28 template <typename T>
tmain()29 T tmain() {
30 T t_var = T();
31 T vec[] = {1, 2};
32 #pragma omp target
33 #pragma omp teams distribute reduction(+: t_var)
34 for (int i = 0; i < 2; ++i) {
35 t_var += (T) i;
36 }
37 return T();
38 }
39
main()40 int main() {
41 static int sivar;
42 #ifdef LAMBDA
43
44 [&]() {
45 #pragma omp target
46 #pragma omp teams distribute reduction(+: sivar)
47 for (int i = 0; i < 2; ++i) {
48
49 // Skip global and bound tid vars
50
51
52 sivar += i;
53
54 [&]() {
55
56 sivar += 4;
57
58 }();
59 }
60 }();
61 return 0;
62 #else
63 #pragma omp target
64 #pragma omp teams distribute reduction(+: sivar)
65 for (int i = 0; i < 2; ++i) {
66 sivar += i;
67 }
68 return tmain<int>();
69 #endif
70 }
71
72
73
74
75 // Skip global and bound tid vars
76
77
78
79
80
81 // Skip global and bound tid vars
82
83
84 #endif
85 // CHECK1-LABEL: define {{[^@]+}}@main
86 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
87 // CHECK1-NEXT: entry:
88 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
89 // CHECK1-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8
90 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
91 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
92 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
93 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
94 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
95 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
96 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
97 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
98 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
99 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
100 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
101 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
102 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
103 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
104 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
105 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
106 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8
107 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
108 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
109 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
110 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
111 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
112 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
113 // CHECK1: omp_offload.failed:
114 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
115 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
116 // CHECK1: omp_offload.cont:
117 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
118 // CHECK1-NEXT: ret i32 [[CALL]]
119 //
120 //
121 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63
122 // CHECK1-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
123 // CHECK1-NEXT: entry:
124 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
125 // CHECK1-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
126 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
127 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
128 // CHECK1-NEXT: ret void
129 //
130 //
131 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
132 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
133 // CHECK1-NEXT: entry:
134 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
135 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
136 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
137 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
138 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
139 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
140 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
141 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
142 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
143 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
144 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
145 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
146 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
147 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
148 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
149 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
150 // CHECK1-NEXT: store i32 0, i32* [[SIVAR1]], align 4
151 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
152 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
153 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
154 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
155 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
156 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
157 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
158 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
159 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
160 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
161 // CHECK1: cond.true:
162 // CHECK1-NEXT: br label [[COND_END:%.*]]
163 // CHECK1: cond.false:
164 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
165 // CHECK1-NEXT: br label [[COND_END]]
166 // CHECK1: cond.end:
167 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
168 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
169 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
170 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
171 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
172 // CHECK1: omp.inner.for.cond:
173 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
174 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
175 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
176 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
177 // CHECK1: omp.inner.for.body:
178 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
179 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
180 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
181 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
182 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
183 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4
184 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
185 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4
186 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
187 // CHECK1: omp.body.continue:
188 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
189 // CHECK1: omp.inner.for.inc:
190 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
191 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
192 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
193 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
194 // CHECK1: omp.inner.for.end:
195 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
196 // CHECK1: omp.loop.exit:
197 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
198 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
199 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8*
200 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8
201 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
202 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
203 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
204 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
205 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
206 // CHECK1-NEXT: ]
207 // CHECK1: .omp.reduction.case1:
208 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
209 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4
210 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
211 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
212 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
213 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
214 // CHECK1: .omp.reduction.case2:
215 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4
216 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
217 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
218 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
219 // CHECK1: .omp.reduction.default:
220 // CHECK1-NEXT: ret void
221 //
222 //
223 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
224 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
225 // CHECK1-NEXT: entry:
226 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
227 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
228 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
229 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
230 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
231 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
232 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
233 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
234 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
235 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
236 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
237 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
238 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
239 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
240 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
241 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
242 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
243 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
244 // CHECK1-NEXT: ret void
245 //
246 //
247 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
248 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat {
249 // CHECK1-NEXT: entry:
250 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
251 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
252 // CHECK1-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
253 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
254 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
255 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
256 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
257 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4
258 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
259 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
260 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
261 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
262 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4
263 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
264 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
265 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
266 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8
267 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
268 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
269 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8
270 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
271 // CHECK1-NEXT: store i8* null, i8** [[TMP7]], align 8
272 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
273 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
274 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
275 // CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
276 // CHECK1-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
277 // CHECK1-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
278 // CHECK1: omp_offload.failed:
279 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]]
280 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
281 // CHECK1: omp_offload.cont:
282 // CHECK1-NEXT: ret i32 0
283 //
284 //
285 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
286 // CHECK1-SAME: (i64 [[T_VAR:%.*]]) #[[ATTR1]] {
287 // CHECK1-NEXT: entry:
288 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
289 // CHECK1-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
290 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
291 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]])
292 // CHECK1-NEXT: ret void
293 //
294 //
295 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
296 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
297 // CHECK1-NEXT: entry:
298 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
299 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
300 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
301 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
302 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
303 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
304 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
305 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
306 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
307 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
308 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
309 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
310 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
311 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
312 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
313 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
314 // CHECK1-NEXT: store i32 0, i32* [[T_VAR1]], align 4
315 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
316 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
317 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
318 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
319 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
320 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
321 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
322 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
323 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
324 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
325 // CHECK1: cond.true:
326 // CHECK1-NEXT: br label [[COND_END:%.*]]
327 // CHECK1: cond.false:
328 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
329 // CHECK1-NEXT: br label [[COND_END]]
330 // CHECK1: cond.end:
331 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
332 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
333 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
334 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
335 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
336 // CHECK1: omp.inner.for.cond:
337 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
338 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
339 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
340 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
341 // CHECK1: omp.inner.for.body:
342 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
343 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
344 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
345 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
346 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
347 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4
348 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
349 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4
350 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
351 // CHECK1: omp.body.continue:
352 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
353 // CHECK1: omp.inner.for.inc:
354 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
355 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
356 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
357 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
358 // CHECK1: omp.inner.for.end:
359 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
360 // CHECK1: omp.loop.exit:
361 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
362 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
363 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8*
364 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8
365 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
366 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
367 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
368 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
369 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
370 // CHECK1-NEXT: ]
371 // CHECK1: .omp.reduction.case1:
372 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
373 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4
374 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
375 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
376 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
377 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
378 // CHECK1: .omp.reduction.case2:
379 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4
380 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
381 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
382 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
383 // CHECK1: .omp.reduction.default:
384 // CHECK1-NEXT: ret void
385 //
386 //
387 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
388 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
389 // CHECK1-NEXT: entry:
390 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
391 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
392 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
393 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
394 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
395 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
396 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
397 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
398 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
399 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
400 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
401 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
402 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
403 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
404 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
405 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
406 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
407 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
408 // CHECK1-NEXT: ret void
409 //
410 //
411 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
412 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] {
413 // CHECK1-NEXT: entry:
414 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
415 // CHECK1-NEXT: ret void
416 //
417 //
418 // CHECK2-LABEL: define {{[^@]+}}@main
419 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
420 // CHECK2-NEXT: entry:
421 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
422 // CHECK2-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8
423 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
424 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
425 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
426 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
427 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
428 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
429 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
430 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
431 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
432 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
433 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
434 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
435 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
436 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
437 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
438 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
439 // CHECK2-NEXT: store i8* null, i8** [[TMP6]], align 8
440 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
441 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
442 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
443 // CHECK2-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
444 // CHECK2-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
445 // CHECK2-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
446 // CHECK2: omp_offload.failed:
447 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
448 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
449 // CHECK2: omp_offload.cont:
450 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
451 // CHECK2-NEXT: ret i32 [[CALL]]
452 //
453 //
454 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63
455 // CHECK2-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
456 // CHECK2-NEXT: entry:
457 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
458 // CHECK2-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
459 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
460 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
461 // CHECK2-NEXT: ret void
462 //
463 //
464 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
465 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
466 // CHECK2-NEXT: entry:
467 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
468 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
469 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
470 // CHECK2-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
471 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
472 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
473 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
474 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
475 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
476 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
477 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
478 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
479 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
480 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
481 // CHECK2-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
482 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
483 // CHECK2-NEXT: store i32 0, i32* [[SIVAR1]], align 4
484 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
485 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
486 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
487 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
488 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
489 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
490 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
491 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
492 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
493 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
494 // CHECK2: cond.true:
495 // CHECK2-NEXT: br label [[COND_END:%.*]]
496 // CHECK2: cond.false:
497 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
498 // CHECK2-NEXT: br label [[COND_END]]
499 // CHECK2: cond.end:
500 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
501 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
502 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
503 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
504 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
505 // CHECK2: omp.inner.for.cond:
506 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
507 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
508 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
509 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
510 // CHECK2: omp.inner.for.body:
511 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
512 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
513 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
514 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
515 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
516 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4
517 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
518 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4
519 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
520 // CHECK2: omp.body.continue:
521 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
522 // CHECK2: omp.inner.for.inc:
523 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
524 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
525 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
526 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
527 // CHECK2: omp.inner.for.end:
528 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
529 // CHECK2: omp.loop.exit:
530 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
531 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
532 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8*
533 // CHECK2-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8
534 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
535 // CHECK2-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
536 // CHECK2-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
537 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
538 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
539 // CHECK2-NEXT: ]
540 // CHECK2: .omp.reduction.case1:
541 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
542 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4
543 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
544 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
545 // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
546 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
547 // CHECK2: .omp.reduction.case2:
548 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4
549 // CHECK2-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
550 // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
551 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
552 // CHECK2: .omp.reduction.default:
553 // CHECK2-NEXT: ret void
554 //
555 //
556 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
557 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
558 // CHECK2-NEXT: entry:
559 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
560 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
561 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
562 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
563 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
564 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
565 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
566 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
567 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
568 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
569 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
570 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
571 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
572 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
573 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
574 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
575 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
576 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
577 // CHECK2-NEXT: ret void
578 //
579 //
580 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
581 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] comdat {
582 // CHECK2-NEXT: entry:
583 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
584 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
585 // CHECK2-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
586 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
587 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
588 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
589 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
590 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4
591 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
592 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
593 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
594 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
595 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4
596 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
597 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
598 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
599 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8
600 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
601 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
602 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8
603 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
604 // CHECK2-NEXT: store i8* null, i8** [[TMP7]], align 8
605 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
606 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
607 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
608 // CHECK2-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
609 // CHECK2-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
610 // CHECK2-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
611 // CHECK2: omp_offload.failed:
612 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]]
613 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
614 // CHECK2: omp_offload.cont:
615 // CHECK2-NEXT: ret i32 0
616 //
617 //
618 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
619 // CHECK2-SAME: (i64 [[T_VAR:%.*]]) #[[ATTR1]] {
620 // CHECK2-NEXT: entry:
621 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
622 // CHECK2-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
623 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
624 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]])
625 // CHECK2-NEXT: ret void
626 //
627 //
628 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
629 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
630 // CHECK2-NEXT: entry:
631 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
632 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
633 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
634 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
635 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
636 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
637 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
638 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
639 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
640 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
641 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
642 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
643 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
644 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
645 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
646 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
647 // CHECK2-NEXT: store i32 0, i32* [[T_VAR1]], align 4
648 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
649 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
650 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
651 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
652 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
653 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
654 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
655 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
656 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
657 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
658 // CHECK2: cond.true:
659 // CHECK2-NEXT: br label [[COND_END:%.*]]
660 // CHECK2: cond.false:
661 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
662 // CHECK2-NEXT: br label [[COND_END]]
663 // CHECK2: cond.end:
664 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
665 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
666 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
667 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
668 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
669 // CHECK2: omp.inner.for.cond:
670 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
671 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
672 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
673 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
674 // CHECK2: omp.inner.for.body:
675 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
676 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
677 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
678 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
679 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
680 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4
681 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
682 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4
683 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
684 // CHECK2: omp.body.continue:
685 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
686 // CHECK2: omp.inner.for.inc:
687 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
688 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
689 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
690 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
691 // CHECK2: omp.inner.for.end:
692 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
693 // CHECK2: omp.loop.exit:
694 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
695 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
696 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8*
697 // CHECK2-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8
698 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
699 // CHECK2-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
700 // CHECK2-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
701 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
702 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
703 // CHECK2-NEXT: ]
704 // CHECK2: .omp.reduction.case1:
705 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
706 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4
707 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
708 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
709 // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
710 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
711 // CHECK2: .omp.reduction.case2:
712 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4
713 // CHECK2-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
714 // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
715 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
716 // CHECK2: .omp.reduction.default:
717 // CHECK2-NEXT: ret void
718 //
719 //
720 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
721 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
722 // CHECK2-NEXT: entry:
723 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
724 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
725 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
726 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
727 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
728 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
729 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
730 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
731 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
732 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
733 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
734 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
735 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
736 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
737 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
738 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
739 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
740 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
741 // CHECK2-NEXT: ret void
742 //
743 //
744 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
745 // CHECK2-SAME: () #[[ATTR7:[0-9]+]] {
746 // CHECK2-NEXT: entry:
747 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
748 // CHECK2-NEXT: ret void
749 //
750 //
751 // CHECK3-LABEL: define {{[^@]+}}@main
752 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
753 // CHECK3-NEXT: entry:
754 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
755 // CHECK3-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4
756 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
757 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
758 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
759 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
760 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
761 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
762 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4
763 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4
764 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
765 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
766 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4
767 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
768 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
769 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
770 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
771 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4
772 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
773 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
774 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
775 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
776 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
777 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
778 // CHECK3: omp_offload.failed:
779 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63(i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
780 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
781 // CHECK3: omp_offload.cont:
782 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
783 // CHECK3-NEXT: ret i32 [[CALL]]
784 //
785 //
786 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63
787 // CHECK3-SAME: (i32 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
788 // CHECK3-NEXT: entry:
789 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4
790 // CHECK3-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4
791 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]])
792 // CHECK3-NEXT: ret void
793 //
794 //
795 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
796 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
797 // CHECK3-NEXT: entry:
798 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
799 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
800 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
801 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
802 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
803 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
804 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
805 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
806 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
807 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
808 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
809 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
810 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
811 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
812 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
813 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
814 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4
815 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
816 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
817 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
818 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
819 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
820 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
821 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
822 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
823 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
824 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
825 // CHECK3: cond.true:
826 // CHECK3-NEXT: br label [[COND_END:%.*]]
827 // CHECK3: cond.false:
828 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
829 // CHECK3-NEXT: br label [[COND_END]]
830 // CHECK3: cond.end:
831 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
832 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
833 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
834 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
835 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
836 // CHECK3: omp.inner.for.cond:
837 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
838 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
839 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
840 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
841 // CHECK3: omp.inner.for.body:
842 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
843 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
844 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
845 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
846 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
847 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4
848 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
849 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4
850 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
851 // CHECK3: omp.body.continue:
852 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
853 // CHECK3: omp.inner.for.inc:
854 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
855 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
856 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
857 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
858 // CHECK3: omp.inner.for.end:
859 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
860 // CHECK3: omp.loop.exit:
861 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
862 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
863 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8*
864 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4
865 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
866 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
867 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
868 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
869 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
870 // CHECK3-NEXT: ]
871 // CHECK3: .omp.reduction.case1:
872 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
873 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4
874 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
875 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
876 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
877 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
878 // CHECK3: .omp.reduction.case2:
879 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4
880 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
881 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
882 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
883 // CHECK3: .omp.reduction.default:
884 // CHECK3-NEXT: ret void
885 //
886 //
887 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
888 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
889 // CHECK3-NEXT: entry:
890 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
891 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
892 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
893 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
894 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
895 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
896 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
897 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
898 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
899 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
900 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
901 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
902 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
903 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
904 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
905 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
906 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
907 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
908 // CHECK3-NEXT: ret void
909 //
910 //
911 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
912 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat {
913 // CHECK3-NEXT: entry:
914 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
915 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
916 // CHECK3-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
917 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
918 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
919 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
920 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
921 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4
922 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
923 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
924 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
925 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4
926 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
927 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
928 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
929 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4
930 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
931 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
932 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4
933 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
934 // CHECK3-NEXT: store i8* null, i8** [[TMP7]], align 4
935 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
936 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
937 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
938 // CHECK3-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
939 // CHECK3-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
940 // CHECK3-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
941 // CHECK3: omp_offload.failed:
942 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]]
943 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
944 // CHECK3: omp_offload.cont:
945 // CHECK3-NEXT: ret i32 0
946 //
947 //
948 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
949 // CHECK3-SAME: (i32 [[T_VAR:%.*]]) #[[ATTR1]] {
950 // CHECK3-NEXT: entry:
951 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
952 // CHECK3-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
953 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]])
954 // CHECK3-NEXT: ret void
955 //
956 //
957 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
958 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
959 // CHECK3-NEXT: entry:
960 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
961 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
962 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
963 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
964 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
965 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
966 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
967 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
968 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
969 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
970 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
971 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
972 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
973 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
974 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
975 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
976 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4
977 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
978 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
979 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
980 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
981 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
982 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
983 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
984 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
985 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
986 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
987 // CHECK3: cond.true:
988 // CHECK3-NEXT: br label [[COND_END:%.*]]
989 // CHECK3: cond.false:
990 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
991 // CHECK3-NEXT: br label [[COND_END]]
992 // CHECK3: cond.end:
993 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
994 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
995 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
996 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
997 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
998 // CHECK3: omp.inner.for.cond:
999 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1000 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1001 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1002 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1003 // CHECK3: omp.inner.for.body:
1004 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1005 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1006 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1007 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1008 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1009 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4
1010 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
1011 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4
1012 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1013 // CHECK3: omp.body.continue:
1014 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1015 // CHECK3: omp.inner.for.inc:
1016 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1017 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
1018 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
1019 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1020 // CHECK3: omp.inner.for.end:
1021 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1022 // CHECK3: omp.loop.exit:
1023 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1024 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1025 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1026 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4
1027 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1028 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
1029 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1030 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1031 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1032 // CHECK3-NEXT: ]
1033 // CHECK3: .omp.reduction.case1:
1034 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
1035 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4
1036 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1037 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
1038 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1039 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1040 // CHECK3: .omp.reduction.case2:
1041 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4
1042 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
1043 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1044 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1045 // CHECK3: .omp.reduction.default:
1046 // CHECK3-NEXT: ret void
1047 //
1048 //
1049 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
1050 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
1051 // CHECK3-NEXT: entry:
1052 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1053 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1054 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1055 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1056 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1057 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1058 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1059 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1060 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1061 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1062 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1063 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1064 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1065 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1066 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1067 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1068 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1069 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1070 // CHECK3-NEXT: ret void
1071 //
1072 //
1073 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1074 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] {
1075 // CHECK3-NEXT: entry:
1076 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1077 // CHECK3-NEXT: ret void
1078 //
1079 //
1080 // CHECK4-LABEL: define {{[^@]+}}@main
1081 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
1082 // CHECK4-NEXT: entry:
1083 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1084 // CHECK4-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4
1085 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1086 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1087 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1088 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1089 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4
1090 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
1091 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4
1092 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4
1093 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1094 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
1095 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4
1096 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1097 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
1098 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
1099 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1100 // CHECK4-NEXT: store i8* null, i8** [[TMP6]], align 4
1101 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1102 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1103 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
1104 // CHECK4-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1105 // CHECK4-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1106 // CHECK4-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1107 // CHECK4: omp_offload.failed:
1108 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63(i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
1109 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
1110 // CHECK4: omp_offload.cont:
1111 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
1112 // CHECK4-NEXT: ret i32 [[CALL]]
1113 //
1114 //
1115 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63
1116 // CHECK4-SAME: (i32 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
1117 // CHECK4-NEXT: entry:
1118 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4
1119 // CHECK4-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4
1120 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]])
1121 // CHECK4-NEXT: ret void
1122 //
1123 //
1124 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1125 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
1126 // CHECK4-NEXT: entry:
1127 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1128 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1129 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
1130 // CHECK4-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
1131 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1132 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1133 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1134 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1135 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1136 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1137 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1138 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1139 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1140 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1141 // CHECK4-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
1142 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
1143 // CHECK4-NEXT: store i32 0, i32* [[SIVAR1]], align 4
1144 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1145 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1146 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1147 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1148 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1149 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1150 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1151 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1152 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1153 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1154 // CHECK4: cond.true:
1155 // CHECK4-NEXT: br label [[COND_END:%.*]]
1156 // CHECK4: cond.false:
1157 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1158 // CHECK4-NEXT: br label [[COND_END]]
1159 // CHECK4: cond.end:
1160 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1161 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1162 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1163 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1164 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1165 // CHECK4: omp.inner.for.cond:
1166 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1167 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1168 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1169 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1170 // CHECK4: omp.inner.for.body:
1171 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1172 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1173 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1174 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1175 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1176 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4
1177 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
1178 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4
1179 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1180 // CHECK4: omp.body.continue:
1181 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1182 // CHECK4: omp.inner.for.inc:
1183 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1184 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
1185 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
1186 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1187 // CHECK4: omp.inner.for.end:
1188 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1189 // CHECK4: omp.loop.exit:
1190 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1191 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1192 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8*
1193 // CHECK4-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4
1194 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1195 // CHECK4-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1196 // CHECK4-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1197 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1198 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1199 // CHECK4-NEXT: ]
1200 // CHECK4: .omp.reduction.case1:
1201 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
1202 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4
1203 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1204 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
1205 // CHECK4-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1206 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1207 // CHECK4: .omp.reduction.case2:
1208 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4
1209 // CHECK4-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
1210 // CHECK4-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1211 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1212 // CHECK4: .omp.reduction.default:
1213 // CHECK4-NEXT: ret void
1214 //
1215 //
1216 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1217 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
1218 // CHECK4-NEXT: entry:
1219 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1220 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1221 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1222 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1223 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1224 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1225 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1226 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1227 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1228 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1229 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1230 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1231 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1232 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1233 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1234 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1235 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1236 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1237 // CHECK4-NEXT: ret void
1238 //
1239 //
1240 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1241 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] comdat {
1242 // CHECK4-NEXT: entry:
1243 // CHECK4-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1244 // CHECK4-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1245 // CHECK4-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1246 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1247 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1248 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1249 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1250 // CHECK4-NEXT: store i32 0, i32* [[T_VAR]], align 4
1251 // CHECK4-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1252 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
1253 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
1254 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4
1255 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1256 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1257 // CHECK4-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
1258 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4
1259 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1260 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
1261 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4
1262 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1263 // CHECK4-NEXT: store i8* null, i8** [[TMP7]], align 4
1264 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1265 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1266 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
1267 // CHECK4-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1268 // CHECK4-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
1269 // CHECK4-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1270 // CHECK4: omp_offload.failed:
1271 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]]
1272 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
1273 // CHECK4: omp_offload.cont:
1274 // CHECK4-NEXT: ret i32 0
1275 //
1276 //
1277 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
1278 // CHECK4-SAME: (i32 [[T_VAR:%.*]]) #[[ATTR1]] {
1279 // CHECK4-NEXT: entry:
1280 // CHECK4-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1281 // CHECK4-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1282 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]])
1283 // CHECK4-NEXT: ret void
1284 //
1285 //
1286 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
1287 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1288 // CHECK4-NEXT: entry:
1289 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1290 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1291 // CHECK4-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1292 // CHECK4-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1293 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1294 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1295 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1296 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1297 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1298 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1299 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1300 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1301 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1302 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1303 // CHECK4-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1304 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1305 // CHECK4-NEXT: store i32 0, i32* [[T_VAR1]], align 4
1306 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1307 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1308 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1309 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1310 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1311 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1312 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1313 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1314 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1315 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1316 // CHECK4: cond.true:
1317 // CHECK4-NEXT: br label [[COND_END:%.*]]
1318 // CHECK4: cond.false:
1319 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1320 // CHECK4-NEXT: br label [[COND_END]]
1321 // CHECK4: cond.end:
1322 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1323 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1324 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1325 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1326 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1327 // CHECK4: omp.inner.for.cond:
1328 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1329 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1330 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1331 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1332 // CHECK4: omp.inner.for.body:
1333 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1334 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1335 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1336 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1337 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1338 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4
1339 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
1340 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4
1341 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1342 // CHECK4: omp.body.continue:
1343 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1344 // CHECK4: omp.inner.for.inc:
1345 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1346 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
1347 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
1348 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1349 // CHECK4: omp.inner.for.end:
1350 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1351 // CHECK4: omp.loop.exit:
1352 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1353 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1354 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1355 // CHECK4-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4
1356 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1357 // CHECK4-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
1358 // CHECK4-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1359 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1360 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1361 // CHECK4-NEXT: ]
1362 // CHECK4: .omp.reduction.case1:
1363 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
1364 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4
1365 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1366 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
1367 // CHECK4-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1368 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1369 // CHECK4: .omp.reduction.case2:
1370 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4
1371 // CHECK4-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
1372 // CHECK4-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1373 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1374 // CHECK4: .omp.reduction.default:
1375 // CHECK4-NEXT: ret void
1376 //
1377 //
1378 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
1379 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
1380 // CHECK4-NEXT: entry:
1381 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1382 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1383 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1384 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1385 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1386 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1387 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1388 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1389 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1390 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1391 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1392 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1393 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1394 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1395 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1396 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1397 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1398 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1399 // CHECK4-NEXT: ret void
1400 //
1401 //
1402 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1403 // CHECK4-SAME: () #[[ATTR7:[0-9]+]] {
1404 // CHECK4-NEXT: entry:
1405 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
1406 // CHECK4-NEXT: ret void
1407 //
1408 //
1409 // CHECK9-LABEL: define {{[^@]+}}@main
1410 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
1411 // CHECK9-NEXT: entry:
1412 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1413 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1414 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1415 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
1416 // CHECK9-NEXT: ret i32 0
1417 //
1418 //
1419 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45
1420 // CHECK9-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1421 // CHECK9-NEXT: entry:
1422 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
1423 // CHECK9-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
1424 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
1425 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
1426 // CHECK9-NEXT: ret void
1427 //
1428 //
1429 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1430 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
1431 // CHECK9-NEXT: entry:
1432 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1433 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1434 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1435 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
1436 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1437 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1438 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1439 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1440 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1441 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1442 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1443 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1444 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1445 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1446 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1447 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1448 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1449 // CHECK9-NEXT: store i32 0, i32* [[SIVAR1]], align 4
1450 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1451 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1452 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1453 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1454 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1455 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1456 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1457 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1458 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1459 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1460 // CHECK9: cond.true:
1461 // CHECK9-NEXT: br label [[COND_END:%.*]]
1462 // CHECK9: cond.false:
1463 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1464 // CHECK9-NEXT: br label [[COND_END]]
1465 // CHECK9: cond.end:
1466 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1467 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1468 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1469 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1470 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1471 // CHECK9: omp.inner.for.cond:
1472 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1473 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1474 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1475 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1476 // CHECK9: omp.inner.for.body:
1477 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1478 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1479 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1480 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1481 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1482 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4
1483 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
1484 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4
1485 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1486 // CHECK9-NEXT: store i32* [[SIVAR1]], i32** [[TMP11]], align 8
1487 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(8) [[REF_TMP]])
1488 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1489 // CHECK9: omp.body.continue:
1490 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1491 // CHECK9: omp.inner.for.inc:
1492 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1493 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1
1494 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
1495 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1496 // CHECK9: omp.inner.for.end:
1497 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1498 // CHECK9: omp.loop.exit:
1499 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1500 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1501 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i32* [[SIVAR1]] to i8*
1502 // CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
1503 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1504 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP15]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1505 // CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1506 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1507 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1508 // CHECK9-NEXT: ]
1509 // CHECK9: .omp.reduction.case1:
1510 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP0]], align 4
1511 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4
1512 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1513 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
1514 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1515 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1516 // CHECK9: .omp.reduction.case2:
1517 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
1518 // CHECK9-NEXT: [[TMP20:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP19]] monotonic, align 4
1519 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1520 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1521 // CHECK9: .omp.reduction.default:
1522 // CHECK9-NEXT: ret void
1523 //
1524 //
1525 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1526 // CHECK9-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
1527 // CHECK9-NEXT: entry:
1528 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1529 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1530 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1531 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1532 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1533 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1534 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1535 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1536 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1537 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1538 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1539 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1540 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1541 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1542 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1543 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1544 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1545 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1546 // CHECK9-NEXT: ret void
1547 //
1548 //
1549 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1550 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1551 // CHECK9-NEXT: entry:
1552 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1553 // CHECK9-NEXT: ret void
1554 //
1555 //
1556 // CHECK10-LABEL: define {{[^@]+}}@main
1557 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
1558 // CHECK10-NEXT: entry:
1559 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1560 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1561 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
1562 // CHECK10-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
1563 // CHECK10-NEXT: ret i32 0
1564 //
1565 //
1566 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45
1567 // CHECK10-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1568 // CHECK10-NEXT: entry:
1569 // CHECK10-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
1570 // CHECK10-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
1571 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
1572 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
1573 // CHECK10-NEXT: ret void
1574 //
1575 //
1576 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
1577 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
1578 // CHECK10-NEXT: entry:
1579 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1580 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1581 // CHECK10-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1582 // CHECK10-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
1583 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1584 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
1585 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1586 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1587 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1588 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1589 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1590 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1591 // CHECK10-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1592 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1593 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1594 // CHECK10-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1595 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1596 // CHECK10-NEXT: store i32 0, i32* [[SIVAR1]], align 4
1597 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1598 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1599 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1600 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1601 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1602 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1603 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1604 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1605 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1606 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1607 // CHECK10: cond.true:
1608 // CHECK10-NEXT: br label [[COND_END:%.*]]
1609 // CHECK10: cond.false:
1610 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1611 // CHECK10-NEXT: br label [[COND_END]]
1612 // CHECK10: cond.end:
1613 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1614 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1615 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1616 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1617 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1618 // CHECK10: omp.inner.for.cond:
1619 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1620 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1621 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1622 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1623 // CHECK10: omp.inner.for.body:
1624 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1625 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1626 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1627 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1628 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1629 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4
1630 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
1631 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4
1632 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1633 // CHECK10-NEXT: store i32* [[SIVAR1]], i32** [[TMP11]], align 8
1634 // CHECK10-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(8) [[REF_TMP]])
1635 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1636 // CHECK10: omp.body.continue:
1637 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1638 // CHECK10: omp.inner.for.inc:
1639 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1640 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1
1641 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
1642 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
1643 // CHECK10: omp.inner.for.end:
1644 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1645 // CHECK10: omp.loop.exit:
1646 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1647 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1648 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast i32* [[SIVAR1]] to i8*
1649 // CHECK10-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
1650 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1651 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP15]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1652 // CHECK10-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1653 // CHECK10-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1654 // CHECK10-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1655 // CHECK10-NEXT: ]
1656 // CHECK10: .omp.reduction.case1:
1657 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP0]], align 4
1658 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4
1659 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1660 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
1661 // CHECK10-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1662 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1663 // CHECK10: .omp.reduction.case2:
1664 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
1665 // CHECK10-NEXT: [[TMP20:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP19]] monotonic, align 4
1666 // CHECK10-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1667 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1668 // CHECK10: .omp.reduction.default:
1669 // CHECK10-NEXT: ret void
1670 //
1671 //
1672 // CHECK10-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1673 // CHECK10-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
1674 // CHECK10-NEXT: entry:
1675 // CHECK10-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1676 // CHECK10-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1677 // CHECK10-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1678 // CHECK10-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1679 // CHECK10-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1680 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1681 // CHECK10-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1682 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1683 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1684 // CHECK10-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1685 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1686 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1687 // CHECK10-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1688 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1689 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1690 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1691 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1692 // CHECK10-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1693 // CHECK10-NEXT: ret void
1694 //
1695 //
1696 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1697 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
1698 // CHECK10-NEXT: entry:
1699 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
1700 // CHECK10-NEXT: ret void
1701 //
1702 //