1 /* 2 * This declarations of the PIC16F631 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC16F631_H__ 26 #define __PIC16F631_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF_ADDR 0x0000 37 #define TMR0_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR_ADDR 0x0004 41 #define PORTA_ADDR 0x0005 42 #define PORTB_ADDR 0x0006 43 #define PORTC_ADDR 0x0007 44 #define PCLATH_ADDR 0x000A 45 #define INTCON_ADDR 0x000B 46 #define PIR1_ADDR 0x000C 47 #define PIR2_ADDR 0x000D 48 #define TMR1_ADDR 0x000E 49 #define TMR1L_ADDR 0x000E 50 #define TMR1H_ADDR 0x000F 51 #define T1CON_ADDR 0x0010 52 #define OPTION_REG_ADDR 0x0081 53 #define TRISA_ADDR 0x0085 54 #define TRISB_ADDR 0x0086 55 #define TRISC_ADDR 0x0087 56 #define PIE1_ADDR 0x008C 57 #define PIE2_ADDR 0x008D 58 #define PCON_ADDR 0x008E 59 #define OSCCON_ADDR 0x008F 60 #define OSCTUNE_ADDR 0x0090 61 #define WPU_ADDR 0x0095 62 #define WPUA_ADDR 0x0095 63 #define IOC_ADDR 0x0096 64 #define IOCA_ADDR 0x0096 65 #define WDTCON_ADDR 0x0097 66 #define EEDAT_ADDR 0x010C 67 #define EEDATA_ADDR 0x010C 68 #define EEADR_ADDR 0x010D 69 #define WPUB_ADDR 0x0115 70 #define IOCB_ADDR 0x0116 71 #define VRCON_ADDR 0x0118 72 #define CM1CON0_ADDR 0x0119 73 #define CM2CON0_ADDR 0x011A 74 #define CM2CON1_ADDR 0x011B 75 #define ANSEL_ADDR 0x011E 76 #define EECON1_ADDR 0x018C 77 #define EECON2_ADDR 0x018D 78 #define SRCON_ADDR 0x019E 79 80 #endif // #ifndef NO_ADDR_DEFINES 81 82 //============================================================================== 83 // 84 // Register Definitions 85 // 86 //============================================================================== 87 88 extern __at(0x0000) __sfr INDF; 89 extern __at(0x0001) __sfr TMR0; 90 extern __at(0x0002) __sfr PCL; 91 92 //============================================================================== 93 // STATUS Bits 94 95 extern __at(0x0003) __sfr STATUS; 96 97 typedef union 98 { 99 struct 100 { 101 unsigned C : 1; 102 unsigned DC : 1; 103 unsigned Z : 1; 104 unsigned NOT_PD : 1; 105 unsigned NOT_TO : 1; 106 unsigned RP0 : 1; 107 unsigned RP1 : 1; 108 unsigned IRP : 1; 109 }; 110 111 struct 112 { 113 unsigned : 5; 114 unsigned RP : 2; 115 unsigned : 1; 116 }; 117 } __STATUSbits_t; 118 119 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 120 121 #define _C 0x01 122 #define _DC 0x02 123 #define _Z 0x04 124 #define _NOT_PD 0x08 125 #define _NOT_TO 0x10 126 #define _RP0 0x20 127 #define _RP1 0x40 128 #define _IRP 0x80 129 130 //============================================================================== 131 132 extern __at(0x0004) __sfr FSR; 133 134 //============================================================================== 135 // PORTA Bits 136 137 extern __at(0x0005) __sfr PORTA; 138 139 typedef union 140 { 141 struct 142 { 143 unsigned RA0 : 1; 144 unsigned RA1 : 1; 145 unsigned RA2 : 1; 146 unsigned RA3 : 1; 147 unsigned RA4 : 1; 148 unsigned RA5 : 1; 149 unsigned : 1; 150 unsigned : 1; 151 }; 152 153 struct 154 { 155 unsigned RA : 6; 156 unsigned : 2; 157 }; 158 } __PORTAbits_t; 159 160 extern __at(0x0005) volatile __PORTAbits_t PORTAbits; 161 162 #define _RA0 0x01 163 #define _RA1 0x02 164 #define _RA2 0x04 165 #define _RA3 0x08 166 #define _RA4 0x10 167 #define _RA5 0x20 168 169 //============================================================================== 170 171 172 //============================================================================== 173 // PORTB Bits 174 175 extern __at(0x0006) __sfr PORTB; 176 177 typedef struct 178 { 179 unsigned : 1; 180 unsigned : 1; 181 unsigned : 1; 182 unsigned : 1; 183 unsigned RB4 : 1; 184 unsigned RB5 : 1; 185 unsigned RB6 : 1; 186 unsigned RB7 : 1; 187 } __PORTBbits_t; 188 189 extern __at(0x0006) volatile __PORTBbits_t PORTBbits; 190 191 #define _RB4 0x10 192 #define _RB5 0x20 193 #define _RB6 0x40 194 #define _RB7 0x80 195 196 //============================================================================== 197 198 199 //============================================================================== 200 // PORTC Bits 201 202 extern __at(0x0007) __sfr PORTC; 203 204 typedef struct 205 { 206 unsigned RC0 : 1; 207 unsigned RC1 : 1; 208 unsigned RC2 : 1; 209 unsigned RC3 : 1; 210 unsigned RC4 : 1; 211 unsigned RC5 : 1; 212 unsigned RC6 : 1; 213 unsigned RC7 : 1; 214 } __PORTCbits_t; 215 216 extern __at(0x0007) volatile __PORTCbits_t PORTCbits; 217 218 #define _RC0 0x01 219 #define _RC1 0x02 220 #define _RC2 0x04 221 #define _RC3 0x08 222 #define _RC4 0x10 223 #define _RC5 0x20 224 #define _RC6 0x40 225 #define _RC7 0x80 226 227 //============================================================================== 228 229 extern __at(0x000A) __sfr PCLATH; 230 231 //============================================================================== 232 // INTCON Bits 233 234 extern __at(0x000B) __sfr INTCON; 235 236 typedef struct 237 { 238 unsigned RABIF : 1; 239 unsigned INTF : 1; 240 unsigned T0IF : 1; 241 unsigned RABIE : 1; 242 unsigned INTE : 1; 243 unsigned T0IE : 1; 244 unsigned PEIE : 1; 245 unsigned GIE : 1; 246 } __INTCONbits_t; 247 248 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 249 250 #define _RABIF 0x01 251 #define _INTF 0x02 252 #define _T0IF 0x04 253 #define _RABIE 0x08 254 #define _INTE 0x10 255 #define _T0IE 0x20 256 #define _PEIE 0x40 257 #define _GIE 0x80 258 259 //============================================================================== 260 261 262 //============================================================================== 263 // PIR1 Bits 264 265 extern __at(0x000C) __sfr PIR1; 266 267 typedef union 268 { 269 struct 270 { 271 unsigned TMR1IF : 1; 272 unsigned : 1; 273 unsigned : 1; 274 unsigned : 1; 275 unsigned : 1; 276 unsigned : 1; 277 unsigned : 1; 278 unsigned : 1; 279 }; 280 281 struct 282 { 283 unsigned T1IF : 1; 284 unsigned : 1; 285 unsigned : 1; 286 unsigned : 1; 287 unsigned : 1; 288 unsigned : 1; 289 unsigned : 1; 290 unsigned : 1; 291 }; 292 } __PIR1bits_t; 293 294 extern __at(0x000C) volatile __PIR1bits_t PIR1bits; 295 296 #define _TMR1IF 0x01 297 #define _T1IF 0x01 298 299 //============================================================================== 300 301 302 //============================================================================== 303 // PIR2 Bits 304 305 extern __at(0x000D) __sfr PIR2; 306 307 typedef struct 308 { 309 unsigned : 1; 310 unsigned : 1; 311 unsigned : 1; 312 unsigned : 1; 313 unsigned EEIF : 1; 314 unsigned C1IF : 1; 315 unsigned C2IF : 1; 316 unsigned OSFIF : 1; 317 } __PIR2bits_t; 318 319 extern __at(0x000D) volatile __PIR2bits_t PIR2bits; 320 321 #define _EEIF 0x10 322 #define _C1IF 0x20 323 #define _C2IF 0x40 324 #define _OSFIF 0x80 325 326 //============================================================================== 327 328 extern __at(0x000E) __sfr TMR1; 329 extern __at(0x000E) __sfr TMR1L; 330 extern __at(0x000F) __sfr TMR1H; 331 332 //============================================================================== 333 // T1CON Bits 334 335 extern __at(0x0010) __sfr T1CON; 336 337 typedef union 338 { 339 struct 340 { 341 unsigned TMR1ON : 1; 342 unsigned TMR1CS : 1; 343 unsigned NOT_T1SYNC : 1; 344 unsigned T1OSCEN : 1; 345 unsigned T1CKPS0 : 1; 346 unsigned T1CKPS1 : 1; 347 unsigned TMR1GE : 1; 348 unsigned T1GINV : 1; 349 }; 350 351 struct 352 { 353 unsigned : 4; 354 unsigned T1CKPS : 2; 355 unsigned : 2; 356 }; 357 } __T1CONbits_t; 358 359 extern __at(0x0010) volatile __T1CONbits_t T1CONbits; 360 361 #define _TMR1ON 0x01 362 #define _TMR1CS 0x02 363 #define _NOT_T1SYNC 0x04 364 #define _T1OSCEN 0x08 365 #define _T1CKPS0 0x10 366 #define _T1CKPS1 0x20 367 #define _TMR1GE 0x40 368 #define _T1GINV 0x80 369 370 //============================================================================== 371 372 373 //============================================================================== 374 // OPTION_REG Bits 375 376 extern __at(0x0081) __sfr OPTION_REG; 377 378 typedef union 379 { 380 struct 381 { 382 unsigned PS0 : 1; 383 unsigned PS1 : 1; 384 unsigned PS2 : 1; 385 unsigned PSA : 1; 386 unsigned T0SE : 1; 387 unsigned T0CS : 1; 388 unsigned INTEDG : 1; 389 unsigned NOT_RABPU : 1; 390 }; 391 392 struct 393 { 394 unsigned PS : 3; 395 unsigned : 5; 396 }; 397 } __OPTION_REGbits_t; 398 399 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits; 400 401 #define _PS0 0x01 402 #define _PS1 0x02 403 #define _PS2 0x04 404 #define _PSA 0x08 405 #define _T0SE 0x10 406 #define _T0CS 0x20 407 #define _INTEDG 0x40 408 #define _NOT_RABPU 0x80 409 410 //============================================================================== 411 412 413 //============================================================================== 414 // TRISA Bits 415 416 extern __at(0x0085) __sfr TRISA; 417 418 typedef union 419 { 420 struct 421 { 422 unsigned TRISA0 : 1; 423 unsigned TRISA1 : 1; 424 unsigned TRISA2 : 1; 425 unsigned TRISA3 : 1; 426 unsigned TRISA4 : 1; 427 unsigned TRISA5 : 1; 428 unsigned : 1; 429 unsigned : 1; 430 }; 431 432 struct 433 { 434 unsigned TRISA : 6; 435 unsigned : 2; 436 }; 437 } __TRISAbits_t; 438 439 extern __at(0x0085) volatile __TRISAbits_t TRISAbits; 440 441 #define _TRISA0 0x01 442 #define _TRISA1 0x02 443 #define _TRISA2 0x04 444 #define _TRISA3 0x08 445 #define _TRISA4 0x10 446 #define _TRISA5 0x20 447 448 //============================================================================== 449 450 451 //============================================================================== 452 // TRISB Bits 453 454 extern __at(0x0086) __sfr TRISB; 455 456 typedef struct 457 { 458 unsigned : 1; 459 unsigned : 1; 460 unsigned : 1; 461 unsigned : 1; 462 unsigned TRISB4 : 1; 463 unsigned TRISB5 : 1; 464 unsigned TRISB6 : 1; 465 unsigned TRISB7 : 1; 466 } __TRISBbits_t; 467 468 extern __at(0x0086) volatile __TRISBbits_t TRISBbits; 469 470 #define _TRISB4 0x10 471 #define _TRISB5 0x20 472 #define _TRISB6 0x40 473 #define _TRISB7 0x80 474 475 //============================================================================== 476 477 478 //============================================================================== 479 // TRISC Bits 480 481 extern __at(0x0087) __sfr TRISC; 482 483 typedef struct 484 { 485 unsigned TRISC0 : 1; 486 unsigned TRISC1 : 1; 487 unsigned TRISC2 : 1; 488 unsigned TRISC3 : 1; 489 unsigned TRISC4 : 1; 490 unsigned TRISC5 : 1; 491 unsigned TRISC6 : 1; 492 unsigned TRISC7 : 1; 493 } __TRISCbits_t; 494 495 extern __at(0x0087) volatile __TRISCbits_t TRISCbits; 496 497 #define _TRISC0 0x01 498 #define _TRISC1 0x02 499 #define _TRISC2 0x04 500 #define _TRISC3 0x08 501 #define _TRISC4 0x10 502 #define _TRISC5 0x20 503 #define _TRISC6 0x40 504 #define _TRISC7 0x80 505 506 //============================================================================== 507 508 509 //============================================================================== 510 // PIE1 Bits 511 512 extern __at(0x008C) __sfr PIE1; 513 514 typedef union 515 { 516 struct 517 { 518 unsigned TMR1IE : 1; 519 unsigned : 1; 520 unsigned : 1; 521 unsigned : 1; 522 unsigned : 1; 523 unsigned : 1; 524 unsigned : 1; 525 unsigned : 1; 526 }; 527 528 struct 529 { 530 unsigned T1IE : 1; 531 unsigned : 1; 532 unsigned : 1; 533 unsigned : 1; 534 unsigned : 1; 535 unsigned : 1; 536 unsigned : 1; 537 unsigned : 1; 538 }; 539 } __PIE1bits_t; 540 541 extern __at(0x008C) volatile __PIE1bits_t PIE1bits; 542 543 #define _TMR1IE 0x01 544 #define _T1IE 0x01 545 546 //============================================================================== 547 548 549 //============================================================================== 550 // PIE2 Bits 551 552 extern __at(0x008D) __sfr PIE2; 553 554 typedef struct 555 { 556 unsigned : 1; 557 unsigned : 1; 558 unsigned : 1; 559 unsigned : 1; 560 unsigned EEIE : 1; 561 unsigned C1IE : 1; 562 unsigned C2IE : 1; 563 unsigned OSFIE : 1; 564 } __PIE2bits_t; 565 566 extern __at(0x008D) volatile __PIE2bits_t PIE2bits; 567 568 #define _EEIE 0x10 569 #define _C1IE 0x20 570 #define _C2IE 0x40 571 #define _OSFIE 0x80 572 573 //============================================================================== 574 575 576 //============================================================================== 577 // PCON Bits 578 579 extern __at(0x008E) __sfr PCON; 580 581 typedef union 582 { 583 struct 584 { 585 unsigned NOT_BOR : 1; 586 unsigned NOT_POR : 1; 587 unsigned : 1; 588 unsigned : 1; 589 unsigned SBOREN : 1; 590 unsigned ULPWUE : 1; 591 unsigned : 1; 592 unsigned : 1; 593 }; 594 595 struct 596 { 597 unsigned BOR : 1; 598 unsigned POR : 1; 599 unsigned : 1; 600 unsigned : 1; 601 unsigned : 1; 602 unsigned : 1; 603 unsigned : 1; 604 unsigned : 1; 605 }; 606 } __PCONbits_t; 607 608 extern __at(0x008E) volatile __PCONbits_t PCONbits; 609 610 #define _NOT_BOR 0x01 611 #define _BOR 0x01 612 #define _NOT_POR 0x02 613 #define _POR 0x02 614 #define _SBOREN 0x10 615 #define _ULPWUE 0x20 616 617 //============================================================================== 618 619 620 //============================================================================== 621 // OSCCON Bits 622 623 extern __at(0x008F) __sfr OSCCON; 624 625 typedef union 626 { 627 struct 628 { 629 unsigned SCS : 1; 630 unsigned LTS : 1; 631 unsigned HTS : 1; 632 unsigned OSTS : 1; 633 unsigned IRCF0 : 1; 634 unsigned IRCF1 : 1; 635 unsigned IRCF2 : 1; 636 unsigned : 1; 637 }; 638 639 struct 640 { 641 unsigned : 4; 642 unsigned IRCF : 3; 643 unsigned : 1; 644 }; 645 } __OSCCONbits_t; 646 647 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits; 648 649 #define _SCS 0x01 650 #define _LTS 0x02 651 #define _HTS 0x04 652 #define _OSTS 0x08 653 #define _IRCF0 0x10 654 #define _IRCF1 0x20 655 #define _IRCF2 0x40 656 657 //============================================================================== 658 659 660 //============================================================================== 661 // OSCTUNE Bits 662 663 extern __at(0x0090) __sfr OSCTUNE; 664 665 typedef union 666 { 667 struct 668 { 669 unsigned TUN0 : 1; 670 unsigned TUN1 : 1; 671 unsigned TUN2 : 1; 672 unsigned TUN3 : 1; 673 unsigned TUN4 : 1; 674 unsigned : 1; 675 unsigned : 1; 676 unsigned : 1; 677 }; 678 679 struct 680 { 681 unsigned TUN : 5; 682 unsigned : 3; 683 }; 684 } __OSCTUNEbits_t; 685 686 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits; 687 688 #define _TUN0 0x01 689 #define _TUN1 0x02 690 #define _TUN2 0x04 691 #define _TUN3 0x08 692 #define _TUN4 0x10 693 694 //============================================================================== 695 696 697 //============================================================================== 698 // WPU Bits 699 700 extern __at(0x0095) __sfr WPU; 701 702 typedef union 703 { 704 struct 705 { 706 unsigned WPUA0 : 1; 707 unsigned WPUA1 : 1; 708 unsigned WPUA2 : 1; 709 unsigned : 1; 710 unsigned WPUA4 : 1; 711 unsigned WPUA5 : 1; 712 unsigned : 1; 713 unsigned : 1; 714 }; 715 716 struct 717 { 718 unsigned WPU0 : 1; 719 unsigned WPU1 : 1; 720 unsigned WPU2 : 1; 721 unsigned : 1; 722 unsigned WPU4 : 1; 723 unsigned WPU5 : 1; 724 unsigned : 1; 725 unsigned : 1; 726 }; 727 } __WPUbits_t; 728 729 extern __at(0x0095) volatile __WPUbits_t WPUbits; 730 731 #define _WPUA0 0x01 732 #define _WPU0 0x01 733 #define _WPUA1 0x02 734 #define _WPU1 0x02 735 #define _WPUA2 0x04 736 #define _WPU2 0x04 737 #define _WPUA4 0x10 738 #define _WPU4 0x10 739 #define _WPUA5 0x20 740 #define _WPU5 0x20 741 742 //============================================================================== 743 744 745 //============================================================================== 746 // WPUA Bits 747 748 extern __at(0x0095) __sfr WPUA; 749 750 typedef union 751 { 752 struct 753 { 754 unsigned WPUA0 : 1; 755 unsigned WPUA1 : 1; 756 unsigned WPUA2 : 1; 757 unsigned : 1; 758 unsigned WPUA4 : 1; 759 unsigned WPUA5 : 1; 760 unsigned : 1; 761 unsigned : 1; 762 }; 763 764 struct 765 { 766 unsigned WPU0 : 1; 767 unsigned WPU1 : 1; 768 unsigned WPU2 : 1; 769 unsigned : 1; 770 unsigned WPU4 : 1; 771 unsigned WPU5 : 1; 772 unsigned : 1; 773 unsigned : 1; 774 }; 775 } __WPUAbits_t; 776 777 extern __at(0x0095) volatile __WPUAbits_t WPUAbits; 778 779 #define _WPUA_WPUA0 0x01 780 #define _WPUA_WPU0 0x01 781 #define _WPUA_WPUA1 0x02 782 #define _WPUA_WPU1 0x02 783 #define _WPUA_WPUA2 0x04 784 #define _WPUA_WPU2 0x04 785 #define _WPUA_WPUA4 0x10 786 #define _WPUA_WPU4 0x10 787 #define _WPUA_WPUA5 0x20 788 #define _WPUA_WPU5 0x20 789 790 //============================================================================== 791 792 793 //============================================================================== 794 // IOC Bits 795 796 extern __at(0x0096) __sfr IOC; 797 798 typedef union 799 { 800 struct 801 { 802 unsigned IOCA0 : 1; 803 unsigned IOCA1 : 1; 804 unsigned IOCA2 : 1; 805 unsigned IOCA3 : 1; 806 unsigned IOCA4 : 1; 807 unsigned IOCA5 : 1; 808 unsigned : 1; 809 unsigned : 1; 810 }; 811 812 struct 813 { 814 unsigned IOC0 : 1; 815 unsigned IOC1 : 1; 816 unsigned IOC2 : 1; 817 unsigned IOC3 : 1; 818 unsigned IOC4 : 1; 819 unsigned IOC5 : 1; 820 unsigned : 1; 821 unsigned : 1; 822 }; 823 824 struct 825 { 826 unsigned IOC : 6; 827 unsigned : 2; 828 }; 829 830 struct 831 { 832 unsigned IOCA : 6; 833 unsigned : 2; 834 }; 835 } __IOCbits_t; 836 837 extern __at(0x0096) volatile __IOCbits_t IOCbits; 838 839 #define _IOCA0 0x01 840 #define _IOC0 0x01 841 #define _IOCA1 0x02 842 #define _IOC1 0x02 843 #define _IOCA2 0x04 844 #define _IOC2 0x04 845 #define _IOCA3 0x08 846 #define _IOC3 0x08 847 #define _IOCA4 0x10 848 #define _IOC4 0x10 849 #define _IOCA5 0x20 850 #define _IOC5 0x20 851 852 //============================================================================== 853 854 855 //============================================================================== 856 // IOCA Bits 857 858 extern __at(0x0096) __sfr IOCA; 859 860 typedef union 861 { 862 struct 863 { 864 unsigned IOCA0 : 1; 865 unsigned IOCA1 : 1; 866 unsigned IOCA2 : 1; 867 unsigned IOCA3 : 1; 868 unsigned IOCA4 : 1; 869 unsigned IOCA5 : 1; 870 unsigned : 1; 871 unsigned : 1; 872 }; 873 874 struct 875 { 876 unsigned IOC0 : 1; 877 unsigned IOC1 : 1; 878 unsigned IOC2 : 1; 879 unsigned IOC3 : 1; 880 unsigned IOC4 : 1; 881 unsigned IOC5 : 1; 882 unsigned : 1; 883 unsigned : 1; 884 }; 885 886 struct 887 { 888 unsigned IOCA : 6; 889 unsigned : 2; 890 }; 891 892 struct 893 { 894 unsigned IOC : 6; 895 unsigned : 2; 896 }; 897 } __IOCAbits_t; 898 899 extern __at(0x0096) volatile __IOCAbits_t IOCAbits; 900 901 #define _IOCA_IOCA0 0x01 902 #define _IOCA_IOC0 0x01 903 #define _IOCA_IOCA1 0x02 904 #define _IOCA_IOC1 0x02 905 #define _IOCA_IOCA2 0x04 906 #define _IOCA_IOC2 0x04 907 #define _IOCA_IOCA3 0x08 908 #define _IOCA_IOC3 0x08 909 #define _IOCA_IOCA4 0x10 910 #define _IOCA_IOC4 0x10 911 #define _IOCA_IOCA5 0x20 912 #define _IOCA_IOC5 0x20 913 914 //============================================================================== 915 916 917 //============================================================================== 918 // WDTCON Bits 919 920 extern __at(0x0097) __sfr WDTCON; 921 922 typedef union 923 { 924 struct 925 { 926 unsigned SWDTEN : 1; 927 unsigned WDTPS0 : 1; 928 unsigned WDTPS1 : 1; 929 unsigned WDTPS2 : 1; 930 unsigned WDTPS3 : 1; 931 unsigned : 1; 932 unsigned : 1; 933 unsigned : 1; 934 }; 935 936 struct 937 { 938 unsigned : 1; 939 unsigned WDTPS : 4; 940 unsigned : 3; 941 }; 942 } __WDTCONbits_t; 943 944 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits; 945 946 #define _SWDTEN 0x01 947 #define _WDTPS0 0x02 948 #define _WDTPS1 0x04 949 #define _WDTPS2 0x08 950 #define _WDTPS3 0x10 951 952 //============================================================================== 953 954 extern __at(0x010C) __sfr EEDAT; 955 extern __at(0x010C) __sfr EEDATA; 956 extern __at(0x010D) __sfr EEADR; 957 958 //============================================================================== 959 // WPUB Bits 960 961 extern __at(0x0115) __sfr WPUB; 962 963 typedef struct 964 { 965 unsigned : 1; 966 unsigned : 1; 967 unsigned : 1; 968 unsigned : 1; 969 unsigned WPUB4 : 1; 970 unsigned WPUB5 : 1; 971 unsigned WPUB6 : 1; 972 unsigned WPUB7 : 1; 973 } __WPUBbits_t; 974 975 extern __at(0x0115) volatile __WPUBbits_t WPUBbits; 976 977 #define _WPUB4 0x10 978 #define _WPUB5 0x20 979 #define _WPUB6 0x40 980 #define _WPUB7 0x80 981 982 //============================================================================== 983 984 985 //============================================================================== 986 // IOCB Bits 987 988 extern __at(0x0116) __sfr IOCB; 989 990 typedef struct 991 { 992 unsigned : 1; 993 unsigned : 1; 994 unsigned : 1; 995 unsigned : 1; 996 unsigned IOCB4 : 1; 997 unsigned IOCB5 : 1; 998 unsigned IOCB6 : 1; 999 unsigned IOCB7 : 1; 1000 } __IOCBbits_t; 1001 1002 extern __at(0x0116) volatile __IOCBbits_t IOCBbits; 1003 1004 #define _IOCB4 0x10 1005 #define _IOCB5 0x20 1006 #define _IOCB6 0x40 1007 #define _IOCB7 0x80 1008 1009 //============================================================================== 1010 1011 1012 //============================================================================== 1013 // VRCON Bits 1014 1015 extern __at(0x0118) __sfr VRCON; 1016 1017 typedef union 1018 { 1019 struct 1020 { 1021 unsigned VR0 : 1; 1022 unsigned VR1 : 1; 1023 unsigned VR2 : 1; 1024 unsigned VR3 : 1; 1025 unsigned VP6EN : 1; 1026 unsigned VRR : 1; 1027 unsigned C2VREN : 1; 1028 unsigned C1VREN : 1; 1029 }; 1030 1031 struct 1032 { 1033 unsigned VR : 4; 1034 unsigned : 4; 1035 }; 1036 } __VRCONbits_t; 1037 1038 extern __at(0x0118) volatile __VRCONbits_t VRCONbits; 1039 1040 #define _VR0 0x01 1041 #define _VR1 0x02 1042 #define _VR2 0x04 1043 #define _VR3 0x08 1044 #define _VP6EN 0x10 1045 #define _VRR 0x20 1046 #define _C2VREN 0x40 1047 #define _C1VREN 0x80 1048 1049 //============================================================================== 1050 1051 1052 //============================================================================== 1053 // CM1CON0 Bits 1054 1055 extern __at(0x0119) __sfr CM1CON0; 1056 1057 typedef union 1058 { 1059 struct 1060 { 1061 unsigned C1CH0 : 1; 1062 unsigned C1CH1 : 1; 1063 unsigned C1R : 1; 1064 unsigned : 1; 1065 unsigned C1POL : 1; 1066 unsigned C1OE : 1; 1067 unsigned C1OUT : 1; 1068 unsigned C1ON : 1; 1069 }; 1070 1071 struct 1072 { 1073 unsigned C1CH : 2; 1074 unsigned : 6; 1075 }; 1076 } __CM1CON0bits_t; 1077 1078 extern __at(0x0119) volatile __CM1CON0bits_t CM1CON0bits; 1079 1080 #define _C1CH0 0x01 1081 #define _C1CH1 0x02 1082 #define _C1R 0x04 1083 #define _C1POL 0x10 1084 #define _C1OE 0x20 1085 #define _C1OUT 0x40 1086 #define _C1ON 0x80 1087 1088 //============================================================================== 1089 1090 1091 //============================================================================== 1092 // CM2CON0 Bits 1093 1094 extern __at(0x011A) __sfr CM2CON0; 1095 1096 typedef union 1097 { 1098 struct 1099 { 1100 unsigned C2CH0 : 1; 1101 unsigned C2CH1 : 1; 1102 unsigned C2R : 1; 1103 unsigned : 1; 1104 unsigned C2POL : 1; 1105 unsigned C2OE : 1; 1106 unsigned C2OUT : 1; 1107 unsigned C2ON : 1; 1108 }; 1109 1110 struct 1111 { 1112 unsigned C2CH : 2; 1113 unsigned : 6; 1114 }; 1115 } __CM2CON0bits_t; 1116 1117 extern __at(0x011A) volatile __CM2CON0bits_t CM2CON0bits; 1118 1119 #define _C2CH0 0x01 1120 #define _C2CH1 0x02 1121 #define _C2R 0x04 1122 #define _C2POL 0x10 1123 #define _C2OE 0x20 1124 #define _C2OUT 0x40 1125 #define _C2ON 0x80 1126 1127 //============================================================================== 1128 1129 1130 //============================================================================== 1131 // CM2CON1 Bits 1132 1133 extern __at(0x011B) __sfr CM2CON1; 1134 1135 typedef struct 1136 { 1137 unsigned C2SYNC : 1; 1138 unsigned T1GSS : 1; 1139 unsigned : 1; 1140 unsigned : 1; 1141 unsigned : 1; 1142 unsigned : 1; 1143 unsigned MC2OUT : 1; 1144 unsigned MC1OUT : 1; 1145 } __CM2CON1bits_t; 1146 1147 extern __at(0x011B) volatile __CM2CON1bits_t CM2CON1bits; 1148 1149 #define _C2SYNC 0x01 1150 #define _T1GSS 0x02 1151 #define _MC2OUT 0x40 1152 #define _MC1OUT 0x80 1153 1154 //============================================================================== 1155 1156 1157 //============================================================================== 1158 // ANSEL Bits 1159 1160 extern __at(0x011E) __sfr ANSEL; 1161 1162 typedef struct 1163 { 1164 unsigned ANS0 : 1; 1165 unsigned ANS1 : 1; 1166 unsigned : 1; 1167 unsigned : 1; 1168 unsigned ANS4 : 1; 1169 unsigned ANS5 : 1; 1170 unsigned ANS6 : 1; 1171 unsigned ANS7 : 1; 1172 } __ANSELbits_t; 1173 1174 extern __at(0x011E) volatile __ANSELbits_t ANSELbits; 1175 1176 #define _ANS0 0x01 1177 #define _ANS1 0x02 1178 #define _ANS4 0x10 1179 #define _ANS5 0x20 1180 #define _ANS6 0x40 1181 #define _ANS7 0x80 1182 1183 //============================================================================== 1184 1185 1186 //============================================================================== 1187 // EECON1 Bits 1188 1189 extern __at(0x018C) __sfr EECON1; 1190 1191 typedef struct 1192 { 1193 unsigned RD : 1; 1194 unsigned WR : 1; 1195 unsigned WREN : 1; 1196 unsigned WRERR : 1; 1197 unsigned : 1; 1198 unsigned : 1; 1199 unsigned : 1; 1200 unsigned : 1; 1201 } __EECON1bits_t; 1202 1203 extern __at(0x018C) volatile __EECON1bits_t EECON1bits; 1204 1205 #define _RD 0x01 1206 #define _WR 0x02 1207 #define _WREN 0x04 1208 #define _WRERR 0x08 1209 1210 //============================================================================== 1211 1212 extern __at(0x018D) __sfr EECON2; 1213 1214 //============================================================================== 1215 // SRCON Bits 1216 1217 extern __at(0x019E) __sfr SRCON; 1218 1219 typedef union 1220 { 1221 struct 1222 { 1223 unsigned : 1; 1224 unsigned : 1; 1225 unsigned PULSR : 1; 1226 unsigned PULSS : 1; 1227 unsigned C2REN : 1; 1228 unsigned C1SEN : 1; 1229 unsigned SR0 : 1; 1230 unsigned SR1 : 1; 1231 }; 1232 1233 struct 1234 { 1235 unsigned : 6; 1236 unsigned SR : 2; 1237 }; 1238 } __SRCONbits_t; 1239 1240 extern __at(0x019E) volatile __SRCONbits_t SRCONbits; 1241 1242 #define _PULSR 0x04 1243 #define _PULSS 0x08 1244 #define _C2REN 0x10 1245 #define _C1SEN 0x20 1246 #define _SR0 0x40 1247 #define _SR1 0x80 1248 1249 //============================================================================== 1250 1251 1252 //============================================================================== 1253 // 1254 // Configuration Bits 1255 // 1256 //============================================================================== 1257 1258 #define _CONFIG 0x2007 1259 1260 //----------------------------- CONFIG Options ------------------------------- 1261 1262 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN. 1263 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN. 1264 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN. 1265 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN. 1266 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN. 1267 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN. 1268 #define _FOSC_EC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN. 1269 #define _EC_OSC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN. 1270 #define _FOSC_INTRCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN. 1271 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN. 1272 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN. 1273 #define _FOSC_INTRCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN. 1274 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN. 1275 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN. 1276 #define _FOSC_EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN. 1277 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN. 1278 #define _EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN. 1279 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN. 1280 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN. 1281 #define _EXTRC 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN. 1282 #define _WDTE_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register. 1283 #define _WDT_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register. 1284 #define _WDTE_ON 0x3FFF // WDT enabled. 1285 #define _WDT_ON 0x3FFF // WDT enabled. 1286 #define _PWRTE_ON 0x3FEF // PWRT enabled. 1287 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 1288 #define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD. 1289 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR. 1290 #define _CP_ON 0x3FBF // Program memory code protection is enabled. 1291 #define _CP_OFF 0x3FFF // Program memory code protection is disabled. 1292 #define _CPD_ON 0x3F7F // Data memory code protection is enabled. 1293 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled. 1294 #define _BOREN_OFF 0x3CFF // BOR disabled. 1295 #define _BOD_OFF 0x3CFF // BOR disabled. 1296 #define _BOR_OFF 0x3CFF // BOR disabled. 1297 #define _BOREN_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register. 1298 #define _BOD_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register. 1299 #define _BOR_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register. 1300 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep. 1301 #define _BOD_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep. 1302 #define _BOR_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep. 1303 #define _BOREN_ON 0x3FFF // BOR enabled. 1304 #define _BOD_ON 0x3FFF // BOR enabled. 1305 #define _BOR_ON 0x3FFF // BOR enabled. 1306 #define _IESO_OFF 0x3BFF // Internal External Switchover mode is disabled. 1307 #define _IESO_ON 0x3FFF // Internal External Switchover mode is enabled. 1308 #define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor is disabled. 1309 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled. 1310 1311 //============================================================================== 1312 1313 #define _DEVID1 0x2006 1314 1315 #define _IDLOC0 0x2000 1316 #define _IDLOC1 0x2001 1317 #define _IDLOC2 0x2002 1318 #define _IDLOC3 0x2003 1319 1320 //============================================================================== 1321 1322 #ifndef NO_BIT_DEFINES 1323 1324 #define ANS0 ANSELbits.ANS0 // bit 0 1325 #define ANS1 ANSELbits.ANS1 // bit 1 1326 #define ANS4 ANSELbits.ANS4 // bit 4 1327 #define ANS5 ANSELbits.ANS5 // bit 5 1328 #define ANS6 ANSELbits.ANS6 // bit 6 1329 #define ANS7 ANSELbits.ANS7 // bit 7 1330 1331 #define C1CH0 CM1CON0bits.C1CH0 // bit 0 1332 #define C1CH1 CM1CON0bits.C1CH1 // bit 1 1333 #define C1R CM1CON0bits.C1R // bit 2 1334 #define C1POL CM1CON0bits.C1POL // bit 4 1335 #define C1OE CM1CON0bits.C1OE // bit 5 1336 #define C1OUT CM1CON0bits.C1OUT // bit 6 1337 #define C1ON CM1CON0bits.C1ON // bit 7 1338 1339 #define C2CH0 CM2CON0bits.C2CH0 // bit 0 1340 #define C2CH1 CM2CON0bits.C2CH1 // bit 1 1341 #define C2R CM2CON0bits.C2R // bit 2 1342 #define C2POL CM2CON0bits.C2POL // bit 4 1343 #define C2OE CM2CON0bits.C2OE // bit 5 1344 #define C2OUT CM2CON0bits.C2OUT // bit 6 1345 #define C2ON CM2CON0bits.C2ON // bit 7 1346 1347 #define C2SYNC CM2CON1bits.C2SYNC // bit 0 1348 #define T1GSS CM2CON1bits.T1GSS // bit 1 1349 #define MC2OUT CM2CON1bits.MC2OUT // bit 6 1350 #define MC1OUT CM2CON1bits.MC1OUT // bit 7 1351 1352 #define RD EECON1bits.RD // bit 0 1353 #define WR EECON1bits.WR // bit 1 1354 #define WREN EECON1bits.WREN // bit 2 1355 #define WRERR EECON1bits.WRERR // bit 3 1356 1357 #define RABIF INTCONbits.RABIF // bit 0 1358 #define INTF INTCONbits.INTF // bit 1 1359 #define T0IF INTCONbits.T0IF // bit 2 1360 #define RABIE INTCONbits.RABIE // bit 3 1361 #define INTE INTCONbits.INTE // bit 4 1362 #define T0IE INTCONbits.T0IE // bit 5 1363 #define PEIE INTCONbits.PEIE // bit 6 1364 #define GIE INTCONbits.GIE // bit 7 1365 1366 #define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits 1367 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits 1368 #define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits 1369 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits 1370 #define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits 1371 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits 1372 #define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits 1373 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits 1374 #define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits 1375 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits 1376 #define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits 1377 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits 1378 1379 #define IOCB4 IOCBbits.IOCB4 // bit 4 1380 #define IOCB5 IOCBbits.IOCB5 // bit 5 1381 #define IOCB6 IOCBbits.IOCB6 // bit 6 1382 #define IOCB7 IOCBbits.IOCB7 // bit 7 1383 1384 #define PS0 OPTION_REGbits.PS0 // bit 0 1385 #define PS1 OPTION_REGbits.PS1 // bit 1 1386 #define PS2 OPTION_REGbits.PS2 // bit 2 1387 #define PSA OPTION_REGbits.PSA // bit 3 1388 #define T0SE OPTION_REGbits.T0SE // bit 4 1389 #define T0CS OPTION_REGbits.T0CS // bit 5 1390 #define INTEDG OPTION_REGbits.INTEDG // bit 6 1391 #define NOT_RABPU OPTION_REGbits.NOT_RABPU // bit 7 1392 1393 #define SCS OSCCONbits.SCS // bit 0 1394 #define LTS OSCCONbits.LTS // bit 1 1395 #define HTS OSCCONbits.HTS // bit 2 1396 #define OSTS OSCCONbits.OSTS // bit 3 1397 #define IRCF0 OSCCONbits.IRCF0 // bit 4 1398 #define IRCF1 OSCCONbits.IRCF1 // bit 5 1399 #define IRCF2 OSCCONbits.IRCF2 // bit 6 1400 1401 #define TUN0 OSCTUNEbits.TUN0 // bit 0 1402 #define TUN1 OSCTUNEbits.TUN1 // bit 1 1403 #define TUN2 OSCTUNEbits.TUN2 // bit 2 1404 #define TUN3 OSCTUNEbits.TUN3 // bit 3 1405 #define TUN4 OSCTUNEbits.TUN4 // bit 4 1406 1407 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits 1408 #define BOR PCONbits.BOR // bit 0, shadows bit in PCONbits 1409 #define NOT_POR PCONbits.NOT_POR // bit 1, shadows bit in PCONbits 1410 #define POR PCONbits.POR // bit 1, shadows bit in PCONbits 1411 #define SBOREN PCONbits.SBOREN // bit 4 1412 #define ULPWUE PCONbits.ULPWUE // bit 5 1413 1414 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits 1415 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits 1416 1417 #define EEIE PIE2bits.EEIE // bit 4 1418 #define C1IE PIE2bits.C1IE // bit 5 1419 #define C2IE PIE2bits.C2IE // bit 6 1420 #define OSFIE PIE2bits.OSFIE // bit 7 1421 1422 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits 1423 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits 1424 1425 #define EEIF PIR2bits.EEIF // bit 4 1426 #define C1IF PIR2bits.C1IF // bit 5 1427 #define C2IF PIR2bits.C2IF // bit 6 1428 #define OSFIF PIR2bits.OSFIF // bit 7 1429 1430 #define RA0 PORTAbits.RA0 // bit 0 1431 #define RA1 PORTAbits.RA1 // bit 1 1432 #define RA2 PORTAbits.RA2 // bit 2 1433 #define RA3 PORTAbits.RA3 // bit 3 1434 #define RA4 PORTAbits.RA4 // bit 4 1435 #define RA5 PORTAbits.RA5 // bit 5 1436 1437 #define RB4 PORTBbits.RB4 // bit 4 1438 #define RB5 PORTBbits.RB5 // bit 5 1439 #define RB6 PORTBbits.RB6 // bit 6 1440 #define RB7 PORTBbits.RB7 // bit 7 1441 1442 #define RC0 PORTCbits.RC0 // bit 0 1443 #define RC1 PORTCbits.RC1 // bit 1 1444 #define RC2 PORTCbits.RC2 // bit 2 1445 #define RC3 PORTCbits.RC3 // bit 3 1446 #define RC4 PORTCbits.RC4 // bit 4 1447 #define RC5 PORTCbits.RC5 // bit 5 1448 #define RC6 PORTCbits.RC6 // bit 6 1449 #define RC7 PORTCbits.RC7 // bit 7 1450 1451 #define PULSR SRCONbits.PULSR // bit 2 1452 #define PULSS SRCONbits.PULSS // bit 3 1453 #define C2REN SRCONbits.C2REN // bit 4 1454 #define C1SEN SRCONbits.C1SEN // bit 5 1455 #define SR0 SRCONbits.SR0 // bit 6 1456 #define SR1 SRCONbits.SR1 // bit 7 1457 1458 #define C STATUSbits.C // bit 0 1459 #define DC STATUSbits.DC // bit 1 1460 #define Z STATUSbits.Z // bit 2 1461 #define NOT_PD STATUSbits.NOT_PD // bit 3 1462 #define NOT_TO STATUSbits.NOT_TO // bit 4 1463 #define RP0 STATUSbits.RP0 // bit 5 1464 #define RP1 STATUSbits.RP1 // bit 6 1465 #define IRP STATUSbits.IRP // bit 7 1466 1467 #define TMR1ON T1CONbits.TMR1ON // bit 0 1468 #define TMR1CS T1CONbits.TMR1CS // bit 1 1469 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2 1470 #define T1OSCEN T1CONbits.T1OSCEN // bit 3 1471 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4 1472 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5 1473 #define TMR1GE T1CONbits.TMR1GE // bit 6 1474 #define T1GINV T1CONbits.T1GINV // bit 7 1475 1476 #define TRISA0 TRISAbits.TRISA0 // bit 0 1477 #define TRISA1 TRISAbits.TRISA1 // bit 1 1478 #define TRISA2 TRISAbits.TRISA2 // bit 2 1479 #define TRISA3 TRISAbits.TRISA3 // bit 3 1480 #define TRISA4 TRISAbits.TRISA4 // bit 4 1481 #define TRISA5 TRISAbits.TRISA5 // bit 5 1482 1483 #define TRISB4 TRISBbits.TRISB4 // bit 4 1484 #define TRISB5 TRISBbits.TRISB5 // bit 5 1485 #define TRISB6 TRISBbits.TRISB6 // bit 6 1486 #define TRISB7 TRISBbits.TRISB7 // bit 7 1487 1488 #define TRISC0 TRISCbits.TRISC0 // bit 0 1489 #define TRISC1 TRISCbits.TRISC1 // bit 1 1490 #define TRISC2 TRISCbits.TRISC2 // bit 2 1491 #define TRISC3 TRISCbits.TRISC3 // bit 3 1492 #define TRISC4 TRISCbits.TRISC4 // bit 4 1493 #define TRISC5 TRISCbits.TRISC5 // bit 5 1494 #define TRISC6 TRISCbits.TRISC6 // bit 6 1495 #define TRISC7 TRISCbits.TRISC7 // bit 7 1496 1497 #define VR0 VRCONbits.VR0 // bit 0 1498 #define VR1 VRCONbits.VR1 // bit 1 1499 #define VR2 VRCONbits.VR2 // bit 2 1500 #define VR3 VRCONbits.VR3 // bit 3 1501 #define VP6EN VRCONbits.VP6EN // bit 4 1502 #define VRR VRCONbits.VRR // bit 5 1503 #define C2VREN VRCONbits.C2VREN // bit 6 1504 #define C1VREN VRCONbits.C1VREN // bit 7 1505 1506 #define SWDTEN WDTCONbits.SWDTEN // bit 0 1507 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1 1508 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2 1509 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3 1510 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4 1511 1512 #define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits 1513 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits 1514 #define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits 1515 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits 1516 #define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits 1517 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits 1518 #define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits 1519 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits 1520 #define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits 1521 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits 1522 1523 #define WPUB4 WPUBbits.WPUB4 // bit 4 1524 #define WPUB5 WPUBbits.WPUB5 // bit 5 1525 #define WPUB6 WPUBbits.WPUB6 // bit 6 1526 #define WPUB7 WPUBbits.WPUB7 // bit 7 1527 1528 #endif // #ifndef NO_BIT_DEFINES 1529 1530 #endif // #ifndef __PIC16F631_H__ 1531