1 /* 2 * This declarations of the PIC16F870 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:59 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC16F870_H__ 26 #define __PIC16F870_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF_ADDR 0x0000 37 #define TMR0_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR_ADDR 0x0004 41 #define PORTA_ADDR 0x0005 42 #define PORTB_ADDR 0x0006 43 #define PORTC_ADDR 0x0007 44 #define PCLATH_ADDR 0x000A 45 #define INTCON_ADDR 0x000B 46 #define PIR1_ADDR 0x000C 47 #define PIR2_ADDR 0x000D 48 #define TMR1_ADDR 0x000E 49 #define TMR1L_ADDR 0x000E 50 #define TMR1H_ADDR 0x000F 51 #define T1CON_ADDR 0x0010 52 #define TMR2_ADDR 0x0011 53 #define T2CON_ADDR 0x0012 54 #define CCPR1_ADDR 0x0015 55 #define CCPR1L_ADDR 0x0015 56 #define CCPR1H_ADDR 0x0016 57 #define CCP1CON_ADDR 0x0017 58 #define RCSTA_ADDR 0x0018 59 #define TXREG_ADDR 0x0019 60 #define RCREG_ADDR 0x001A 61 #define ADRESH_ADDR 0x001E 62 #define ADCON0_ADDR 0x001F 63 #define OPTION_REG_ADDR 0x0081 64 #define TRISA_ADDR 0x0085 65 #define TRISB_ADDR 0x0086 66 #define TRISC_ADDR 0x0087 67 #define PIE1_ADDR 0x008C 68 #define PIE2_ADDR 0x008D 69 #define PCON_ADDR 0x008E 70 #define PR2_ADDR 0x0092 71 #define TXSTA_ADDR 0x0098 72 #define SPBRG_ADDR 0x0099 73 #define ADRESL_ADDR 0x009E 74 #define ADCON1_ADDR 0x009F 75 #define EEDATA_ADDR 0x010C 76 #define EEADR_ADDR 0x010D 77 #define EEDATH_ADDR 0x010E 78 #define EEADRH_ADDR 0x010F 79 #define EECON1_ADDR 0x018C 80 #define EECON2_ADDR 0x018D 81 82 #endif // #ifndef NO_ADDR_DEFINES 83 84 //============================================================================== 85 // 86 // Register Definitions 87 // 88 //============================================================================== 89 90 extern __at(0x0000) __sfr INDF; 91 extern __at(0x0001) __sfr TMR0; 92 extern __at(0x0002) __sfr PCL; 93 94 //============================================================================== 95 // STATUS Bits 96 97 extern __at(0x0003) __sfr STATUS; 98 99 typedef union 100 { 101 struct 102 { 103 unsigned C : 1; 104 unsigned DC : 1; 105 unsigned Z : 1; 106 unsigned NOT_PD : 1; 107 unsigned NOT_TO : 1; 108 unsigned RP0 : 1; 109 unsigned RP1 : 1; 110 unsigned IRP : 1; 111 }; 112 113 struct 114 { 115 unsigned : 5; 116 unsigned RP : 2; 117 unsigned : 1; 118 }; 119 } __STATUSbits_t; 120 121 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 122 123 #define _C 0x01 124 #define _DC 0x02 125 #define _Z 0x04 126 #define _NOT_PD 0x08 127 #define _NOT_TO 0x10 128 #define _RP0 0x20 129 #define _RP1 0x40 130 #define _IRP 0x80 131 132 //============================================================================== 133 134 extern __at(0x0004) __sfr FSR; 135 136 //============================================================================== 137 // PORTA Bits 138 139 extern __at(0x0005) __sfr PORTA; 140 141 typedef union 142 { 143 struct 144 { 145 unsigned RA0 : 1; 146 unsigned RA1 : 1; 147 unsigned RA2 : 1; 148 unsigned RA3 : 1; 149 unsigned RA4 : 1; 150 unsigned RA5 : 1; 151 unsigned : 1; 152 unsigned : 1; 153 }; 154 155 struct 156 { 157 unsigned RA : 6; 158 unsigned : 2; 159 }; 160 } __PORTAbits_t; 161 162 extern __at(0x0005) volatile __PORTAbits_t PORTAbits; 163 164 #define _RA0 0x01 165 #define _RA1 0x02 166 #define _RA2 0x04 167 #define _RA3 0x08 168 #define _RA4 0x10 169 #define _RA5 0x20 170 171 //============================================================================== 172 173 174 //============================================================================== 175 // PORTB Bits 176 177 extern __at(0x0006) __sfr PORTB; 178 179 typedef struct 180 { 181 unsigned RB0 : 1; 182 unsigned RB1 : 1; 183 unsigned RB2 : 1; 184 unsigned RB3 : 1; 185 unsigned RB4 : 1; 186 unsigned RB5 : 1; 187 unsigned RB6 : 1; 188 unsigned RB7 : 1; 189 } __PORTBbits_t; 190 191 extern __at(0x0006) volatile __PORTBbits_t PORTBbits; 192 193 #define _RB0 0x01 194 #define _RB1 0x02 195 #define _RB2 0x04 196 #define _RB3 0x08 197 #define _RB4 0x10 198 #define _RB5 0x20 199 #define _RB6 0x40 200 #define _RB7 0x80 201 202 //============================================================================== 203 204 205 //============================================================================== 206 // PORTC Bits 207 208 extern __at(0x0007) __sfr PORTC; 209 210 typedef struct 211 { 212 unsigned RC0 : 1; 213 unsigned RC1 : 1; 214 unsigned RC2 : 1; 215 unsigned RC3 : 1; 216 unsigned RC4 : 1; 217 unsigned RC5 : 1; 218 unsigned RC6 : 1; 219 unsigned RC7 : 1; 220 } __PORTCbits_t; 221 222 extern __at(0x0007) volatile __PORTCbits_t PORTCbits; 223 224 #define _RC0 0x01 225 #define _RC1 0x02 226 #define _RC2 0x04 227 #define _RC3 0x08 228 #define _RC4 0x10 229 #define _RC5 0x20 230 #define _RC6 0x40 231 #define _RC7 0x80 232 233 //============================================================================== 234 235 extern __at(0x000A) __sfr PCLATH; 236 237 //============================================================================== 238 // INTCON Bits 239 240 extern __at(0x000B) __sfr INTCON; 241 242 typedef union 243 { 244 struct 245 { 246 unsigned RBIF : 1; 247 unsigned INTF : 1; 248 unsigned T0IF : 1; 249 unsigned RBIE : 1; 250 unsigned INTE : 1; 251 unsigned T0IE : 1; 252 unsigned PEIE : 1; 253 unsigned GIE : 1; 254 }; 255 256 struct 257 { 258 unsigned : 1; 259 unsigned : 1; 260 unsigned TMR0IF : 1; 261 unsigned : 1; 262 unsigned : 1; 263 unsigned TMR0IE : 1; 264 unsigned : 1; 265 unsigned : 1; 266 }; 267 } __INTCONbits_t; 268 269 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 270 271 #define _RBIF 0x01 272 #define _INTF 0x02 273 #define _T0IF 0x04 274 #define _TMR0IF 0x04 275 #define _RBIE 0x08 276 #define _INTE 0x10 277 #define _T0IE 0x20 278 #define _TMR0IE 0x20 279 #define _PEIE 0x40 280 #define _GIE 0x80 281 282 //============================================================================== 283 284 285 //============================================================================== 286 // PIR1 Bits 287 288 extern __at(0x000C) __sfr PIR1; 289 290 typedef struct 291 { 292 unsigned TMR1IF : 1; 293 unsigned TMR2IF : 1; 294 unsigned CCP1IF : 1; 295 unsigned : 1; 296 unsigned TXIF : 1; 297 unsigned RCIF : 1; 298 unsigned ADIF : 1; 299 unsigned : 1; 300 } __PIR1bits_t; 301 302 extern __at(0x000C) volatile __PIR1bits_t PIR1bits; 303 304 #define _TMR1IF 0x01 305 #define _TMR2IF 0x02 306 #define _CCP1IF 0x04 307 #define _TXIF 0x10 308 #define _RCIF 0x20 309 #define _ADIF 0x40 310 311 //============================================================================== 312 313 314 //============================================================================== 315 // PIR2 Bits 316 317 extern __at(0x000D) __sfr PIR2; 318 319 typedef struct 320 { 321 unsigned : 1; 322 unsigned : 1; 323 unsigned : 1; 324 unsigned : 1; 325 unsigned EEIF : 1; 326 unsigned : 1; 327 unsigned : 1; 328 unsigned : 1; 329 } __PIR2bits_t; 330 331 extern __at(0x000D) volatile __PIR2bits_t PIR2bits; 332 333 #define _EEIF 0x10 334 335 //============================================================================== 336 337 extern __at(0x000E) __sfr TMR1; 338 extern __at(0x000E) __sfr TMR1L; 339 extern __at(0x000F) __sfr TMR1H; 340 341 //============================================================================== 342 // T1CON Bits 343 344 extern __at(0x0010) __sfr T1CON; 345 346 typedef union 347 { 348 struct 349 { 350 unsigned TMR1ON : 1; 351 unsigned TMR1CS : 1; 352 unsigned NOT_T1SYNC : 1; 353 unsigned T1OSCEN : 1; 354 unsigned T1CKPS0 : 1; 355 unsigned T1CKPS1 : 1; 356 unsigned : 1; 357 unsigned : 1; 358 }; 359 360 struct 361 { 362 unsigned : 1; 363 unsigned : 1; 364 unsigned T1INSYNC : 1; 365 unsigned : 1; 366 unsigned : 1; 367 unsigned : 1; 368 unsigned : 1; 369 unsigned : 1; 370 }; 371 372 struct 373 { 374 unsigned : 1; 375 unsigned : 1; 376 unsigned T1SYNC : 1; 377 unsigned : 1; 378 unsigned : 1; 379 unsigned : 1; 380 unsigned : 1; 381 unsigned : 1; 382 }; 383 384 struct 385 { 386 unsigned : 4; 387 unsigned T1CKPS : 2; 388 unsigned : 2; 389 }; 390 } __T1CONbits_t; 391 392 extern __at(0x0010) volatile __T1CONbits_t T1CONbits; 393 394 #define _TMR1ON 0x01 395 #define _TMR1CS 0x02 396 #define _NOT_T1SYNC 0x04 397 #define _T1INSYNC 0x04 398 #define _T1SYNC 0x04 399 #define _T1OSCEN 0x08 400 #define _T1CKPS0 0x10 401 #define _T1CKPS1 0x20 402 403 //============================================================================== 404 405 extern __at(0x0011) __sfr TMR2; 406 407 //============================================================================== 408 // T2CON Bits 409 410 extern __at(0x0012) __sfr T2CON; 411 412 typedef union 413 { 414 struct 415 { 416 unsigned T2CKPS0 : 1; 417 unsigned T2CKPS1 : 1; 418 unsigned TMR2ON : 1; 419 unsigned TOUTPS0 : 1; 420 unsigned TOUTPS1 : 1; 421 unsigned TOUTPS2 : 1; 422 unsigned TOUTPS3 : 1; 423 unsigned : 1; 424 }; 425 426 struct 427 { 428 unsigned T2CKPS : 2; 429 unsigned : 6; 430 }; 431 432 struct 433 { 434 unsigned : 3; 435 unsigned TOUTPS : 4; 436 unsigned : 1; 437 }; 438 } __T2CONbits_t; 439 440 extern __at(0x0012) volatile __T2CONbits_t T2CONbits; 441 442 #define _T2CKPS0 0x01 443 #define _T2CKPS1 0x02 444 #define _TMR2ON 0x04 445 #define _TOUTPS0 0x08 446 #define _TOUTPS1 0x10 447 #define _TOUTPS2 0x20 448 #define _TOUTPS3 0x40 449 450 //============================================================================== 451 452 extern __at(0x0015) __sfr CCPR1; 453 extern __at(0x0015) __sfr CCPR1L; 454 extern __at(0x0016) __sfr CCPR1H; 455 456 //============================================================================== 457 // CCP1CON Bits 458 459 extern __at(0x0017) __sfr CCP1CON; 460 461 typedef union 462 { 463 struct 464 { 465 unsigned CCP1M0 : 1; 466 unsigned CCP1M1 : 1; 467 unsigned CCP1M2 : 1; 468 unsigned CCP1M3 : 1; 469 unsigned CCP1Y : 1; 470 unsigned CCP1X : 1; 471 unsigned : 1; 472 unsigned : 1; 473 }; 474 475 struct 476 { 477 unsigned CCP1M : 4; 478 unsigned : 4; 479 }; 480 } __CCP1CONbits_t; 481 482 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits; 483 484 #define _CCP1M0 0x01 485 #define _CCP1M1 0x02 486 #define _CCP1M2 0x04 487 #define _CCP1M3 0x08 488 #define _CCP1Y 0x10 489 #define _CCP1X 0x20 490 491 //============================================================================== 492 493 494 //============================================================================== 495 // RCSTA Bits 496 497 extern __at(0x0018) __sfr RCSTA; 498 499 typedef union 500 { 501 struct 502 { 503 unsigned RX9D : 1; 504 unsigned OERR : 1; 505 unsigned FERR : 1; 506 unsigned ADDEN : 1; 507 unsigned CREN : 1; 508 unsigned SREN : 1; 509 unsigned RX9 : 1; 510 unsigned SPEN : 1; 511 }; 512 513 struct 514 { 515 unsigned RCD8 : 1; 516 unsigned : 1; 517 unsigned : 1; 518 unsigned : 1; 519 unsigned : 1; 520 unsigned : 1; 521 unsigned RC9 : 1; 522 unsigned : 1; 523 }; 524 525 struct 526 { 527 unsigned : 1; 528 unsigned : 1; 529 unsigned : 1; 530 unsigned : 1; 531 unsigned : 1; 532 unsigned : 1; 533 unsigned NOT_RC8 : 1; 534 unsigned : 1; 535 }; 536 537 struct 538 { 539 unsigned : 1; 540 unsigned : 1; 541 unsigned : 1; 542 unsigned : 1; 543 unsigned : 1; 544 unsigned : 1; 545 unsigned RC8_9 : 1; 546 unsigned : 1; 547 }; 548 } __RCSTAbits_t; 549 550 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits; 551 552 #define _RX9D 0x01 553 #define _RCD8 0x01 554 #define _OERR 0x02 555 #define _FERR 0x04 556 #define _ADDEN 0x08 557 #define _CREN 0x10 558 #define _SREN 0x20 559 #define _RX9 0x40 560 #define _RC9 0x40 561 #define _NOT_RC8 0x40 562 #define _RC8_9 0x40 563 #define _SPEN 0x80 564 565 //============================================================================== 566 567 extern __at(0x0019) __sfr TXREG; 568 extern __at(0x001A) __sfr RCREG; 569 extern __at(0x001E) __sfr ADRESH; 570 571 //============================================================================== 572 // ADCON0 Bits 573 574 extern __at(0x001F) __sfr ADCON0; 575 576 typedef union 577 { 578 struct 579 { 580 unsigned ADON : 1; 581 unsigned : 1; 582 unsigned GO_NOT_DONE : 1; 583 unsigned CHS0 : 1; 584 unsigned CHS1 : 1; 585 unsigned CHS2 : 1; 586 unsigned ADCS0 : 1; 587 unsigned ADCS1 : 1; 588 }; 589 590 struct 591 { 592 unsigned : 1; 593 unsigned : 1; 594 unsigned GO : 1; 595 unsigned : 1; 596 unsigned : 1; 597 unsigned : 1; 598 unsigned : 1; 599 unsigned : 1; 600 }; 601 602 struct 603 { 604 unsigned : 1; 605 unsigned : 1; 606 unsigned NOT_DONE : 1; 607 unsigned : 1; 608 unsigned : 1; 609 unsigned : 1; 610 unsigned : 1; 611 unsigned : 1; 612 }; 613 614 struct 615 { 616 unsigned : 1; 617 unsigned : 1; 618 unsigned GO_DONE : 1; 619 unsigned : 1; 620 unsigned : 1; 621 unsigned : 1; 622 unsigned : 1; 623 unsigned : 1; 624 }; 625 626 struct 627 { 628 unsigned : 3; 629 unsigned CHS : 3; 630 unsigned : 2; 631 }; 632 633 struct 634 { 635 unsigned : 6; 636 unsigned ADCS : 2; 637 }; 638 } __ADCON0bits_t; 639 640 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits; 641 642 #define _ADON 0x01 643 #define _GO_NOT_DONE 0x04 644 #define _GO 0x04 645 #define _NOT_DONE 0x04 646 #define _GO_DONE 0x04 647 #define _CHS0 0x08 648 #define _CHS1 0x10 649 #define _CHS2 0x20 650 #define _ADCS0 0x40 651 #define _ADCS1 0x80 652 653 //============================================================================== 654 655 656 //============================================================================== 657 // OPTION_REG Bits 658 659 extern __at(0x0081) __sfr OPTION_REG; 660 661 typedef union 662 { 663 struct 664 { 665 unsigned PS0 : 1; 666 unsigned PS1 : 1; 667 unsigned PS2 : 1; 668 unsigned PSA : 1; 669 unsigned T0SE : 1; 670 unsigned T0CS : 1; 671 unsigned INTEDG : 1; 672 unsigned NOT_RBPU : 1; 673 }; 674 675 struct 676 { 677 unsigned PS : 3; 678 unsigned : 5; 679 }; 680 } __OPTION_REGbits_t; 681 682 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits; 683 684 #define _PS0 0x01 685 #define _PS1 0x02 686 #define _PS2 0x04 687 #define _PSA 0x08 688 #define _T0SE 0x10 689 #define _T0CS 0x20 690 #define _INTEDG 0x40 691 #define _NOT_RBPU 0x80 692 693 //============================================================================== 694 695 696 //============================================================================== 697 // TRISA Bits 698 699 extern __at(0x0085) __sfr TRISA; 700 701 typedef union 702 { 703 struct 704 { 705 unsigned TRISA0 : 1; 706 unsigned TRISA1 : 1; 707 unsigned TRISA2 : 1; 708 unsigned TRISA3 : 1; 709 unsigned TRISA4 : 1; 710 unsigned TRISA5 : 1; 711 unsigned : 1; 712 unsigned : 1; 713 }; 714 715 struct 716 { 717 unsigned TRISA : 6; 718 unsigned : 2; 719 }; 720 } __TRISAbits_t; 721 722 extern __at(0x0085) volatile __TRISAbits_t TRISAbits; 723 724 #define _TRISA0 0x01 725 #define _TRISA1 0x02 726 #define _TRISA2 0x04 727 #define _TRISA3 0x08 728 #define _TRISA4 0x10 729 #define _TRISA5 0x20 730 731 //============================================================================== 732 733 734 //============================================================================== 735 // TRISB Bits 736 737 extern __at(0x0086) __sfr TRISB; 738 739 typedef struct 740 { 741 unsigned TRISB0 : 1; 742 unsigned TRISB1 : 1; 743 unsigned TRISB2 : 1; 744 unsigned TRISB3 : 1; 745 unsigned TRISB4 : 1; 746 unsigned TRISB5 : 1; 747 unsigned TRISB6 : 1; 748 unsigned TRISB7 : 1; 749 } __TRISBbits_t; 750 751 extern __at(0x0086) volatile __TRISBbits_t TRISBbits; 752 753 #define _TRISB0 0x01 754 #define _TRISB1 0x02 755 #define _TRISB2 0x04 756 #define _TRISB3 0x08 757 #define _TRISB4 0x10 758 #define _TRISB5 0x20 759 #define _TRISB6 0x40 760 #define _TRISB7 0x80 761 762 //============================================================================== 763 764 765 //============================================================================== 766 // TRISC Bits 767 768 extern __at(0x0087) __sfr TRISC; 769 770 typedef struct 771 { 772 unsigned TRISC0 : 1; 773 unsigned TRISC1 : 1; 774 unsigned TRISC2 : 1; 775 unsigned TRISC3 : 1; 776 unsigned TRISC4 : 1; 777 unsigned TRISC5 : 1; 778 unsigned TRISC6 : 1; 779 unsigned TRISC7 : 1; 780 } __TRISCbits_t; 781 782 extern __at(0x0087) volatile __TRISCbits_t TRISCbits; 783 784 #define _TRISC0 0x01 785 #define _TRISC1 0x02 786 #define _TRISC2 0x04 787 #define _TRISC3 0x08 788 #define _TRISC4 0x10 789 #define _TRISC5 0x20 790 #define _TRISC6 0x40 791 #define _TRISC7 0x80 792 793 //============================================================================== 794 795 796 //============================================================================== 797 // PIE1 Bits 798 799 extern __at(0x008C) __sfr PIE1; 800 801 typedef struct 802 { 803 unsigned TMR1IE : 1; 804 unsigned TMR2IE : 1; 805 unsigned CCP1IE : 1; 806 unsigned : 1; 807 unsigned TXIE : 1; 808 unsigned RCIE : 1; 809 unsigned ADIE : 1; 810 unsigned : 1; 811 } __PIE1bits_t; 812 813 extern __at(0x008C) volatile __PIE1bits_t PIE1bits; 814 815 #define _TMR1IE 0x01 816 #define _TMR2IE 0x02 817 #define _CCP1IE 0x04 818 #define _TXIE 0x10 819 #define _RCIE 0x20 820 #define _ADIE 0x40 821 822 //============================================================================== 823 824 825 //============================================================================== 826 // PIE2 Bits 827 828 extern __at(0x008D) __sfr PIE2; 829 830 typedef struct 831 { 832 unsigned : 1; 833 unsigned : 1; 834 unsigned : 1; 835 unsigned : 1; 836 unsigned EEIE : 1; 837 unsigned : 1; 838 unsigned : 1; 839 unsigned : 1; 840 } __PIE2bits_t; 841 842 extern __at(0x008D) volatile __PIE2bits_t PIE2bits; 843 844 #define _EEIE 0x10 845 846 //============================================================================== 847 848 849 //============================================================================== 850 // PCON Bits 851 852 extern __at(0x008E) __sfr PCON; 853 854 typedef union 855 { 856 struct 857 { 858 unsigned NOT_BOR : 1; 859 unsigned NOT_POR : 1; 860 unsigned : 1; 861 unsigned : 1; 862 unsigned : 1; 863 unsigned : 1; 864 unsigned : 1; 865 unsigned : 1; 866 }; 867 868 struct 869 { 870 unsigned NOT_BO : 1; 871 unsigned : 1; 872 unsigned : 1; 873 unsigned : 1; 874 unsigned : 1; 875 unsigned : 1; 876 unsigned : 1; 877 unsigned : 1; 878 }; 879 } __PCONbits_t; 880 881 extern __at(0x008E) volatile __PCONbits_t PCONbits; 882 883 #define _NOT_BOR 0x01 884 #define _NOT_BO 0x01 885 #define _NOT_POR 0x02 886 887 //============================================================================== 888 889 extern __at(0x0092) __sfr PR2; 890 891 //============================================================================== 892 // TXSTA Bits 893 894 extern __at(0x0098) __sfr TXSTA; 895 896 typedef union 897 { 898 struct 899 { 900 unsigned TX9D : 1; 901 unsigned TRMT : 1; 902 unsigned BRGH : 1; 903 unsigned : 1; 904 unsigned SYNC : 1; 905 unsigned TXEN : 1; 906 unsigned TX9 : 1; 907 unsigned CSRC : 1; 908 }; 909 910 struct 911 { 912 unsigned TXD8 : 1; 913 unsigned : 1; 914 unsigned : 1; 915 unsigned : 1; 916 unsigned : 1; 917 unsigned : 1; 918 unsigned NOT_TX8 : 1; 919 unsigned : 1; 920 }; 921 922 struct 923 { 924 unsigned : 1; 925 unsigned : 1; 926 unsigned : 1; 927 unsigned : 1; 928 unsigned : 1; 929 unsigned : 1; 930 unsigned TX8_9 : 1; 931 unsigned : 1; 932 }; 933 } __TXSTAbits_t; 934 935 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits; 936 937 #define _TX9D 0x01 938 #define _TXD8 0x01 939 #define _TRMT 0x02 940 #define _BRGH 0x04 941 #define _SYNC 0x10 942 #define _TXEN 0x20 943 #define _TX9 0x40 944 #define _NOT_TX8 0x40 945 #define _TX8_9 0x40 946 #define _CSRC 0x80 947 948 //============================================================================== 949 950 extern __at(0x0099) __sfr SPBRG; 951 extern __at(0x009E) __sfr ADRESL; 952 953 //============================================================================== 954 // ADCON1 Bits 955 956 extern __at(0x009F) __sfr ADCON1; 957 958 typedef union 959 { 960 struct 961 { 962 unsigned PCFG0 : 1; 963 unsigned PCFG1 : 1; 964 unsigned PCFG2 : 1; 965 unsigned PCFG3 : 1; 966 unsigned : 1; 967 unsigned : 1; 968 unsigned : 1; 969 unsigned ADFM : 1; 970 }; 971 972 struct 973 { 974 unsigned PCFG : 4; 975 unsigned : 4; 976 }; 977 } __ADCON1bits_t; 978 979 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits; 980 981 #define _PCFG0 0x01 982 #define _PCFG1 0x02 983 #define _PCFG2 0x04 984 #define _PCFG3 0x08 985 #define _ADFM 0x80 986 987 //============================================================================== 988 989 extern __at(0x010C) __sfr EEDATA; 990 extern __at(0x010D) __sfr EEADR; 991 extern __at(0x010E) __sfr EEDATH; 992 extern __at(0x010F) __sfr EEADRH; 993 994 //============================================================================== 995 // EECON1 Bits 996 997 extern __at(0x018C) __sfr EECON1; 998 999 typedef struct 1000 { 1001 unsigned RD : 1; 1002 unsigned WR : 1; 1003 unsigned WREN : 1; 1004 unsigned WRERR : 1; 1005 unsigned : 1; 1006 unsigned : 1; 1007 unsigned : 1; 1008 unsigned EEPGD : 1; 1009 } __EECON1bits_t; 1010 1011 extern __at(0x018C) volatile __EECON1bits_t EECON1bits; 1012 1013 #define _RD 0x01 1014 #define _WR 0x02 1015 #define _WREN 0x04 1016 #define _WRERR 0x08 1017 #define _EEPGD 0x80 1018 1019 //============================================================================== 1020 1021 extern __at(0x018D) __sfr EECON2; 1022 1023 //============================================================================== 1024 // 1025 // Configuration Bits 1026 // 1027 //============================================================================== 1028 1029 #define _CONFIG 0x2007 1030 1031 //----------------------------- CONFIG Options ------------------------------- 1032 1033 #define _FOSC_LP 0x3FFC // LP oscillator. 1034 #define _LP_OSC 0x3FFC // LP oscillator. 1035 #define _FOSC_XT 0x3FFD // XT oscillator. 1036 #define _XT_OSC 0x3FFD // XT oscillator. 1037 #define _FOSC_HS 0x3FFE // HS oscillator. 1038 #define _HS_OSC 0x3FFE // HS oscillator. 1039 #define _FOSC_EXTRC 0x3FFF // RC oscillator. 1040 #define _RC_OSC 0x3FFF // RC oscillator. 1041 #define _WDTE_OFF 0x3FFB // WDT disabled. 1042 #define _WDT_OFF 0x3FFB // WDT disabled. 1043 #define _WDTE_ON 0x3FFF // WDT enabled. 1044 #define _WDT_ON 0x3FFF // WDT enabled. 1045 #define _PWRTE_ON 0x3FF7 // PWRT enabled. 1046 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 1047 #define _CP_ON 0x0FCF // All memory code protected. 1048 #define _CP_ALL 0x0FCF // All memory code protected. 1049 #define _CP_OFF 0x3FFF // Code protection off. 1050 #define _BOREN_OFF 0x3FBF // BOR disabled. 1051 #define _BODEN_OFF 0x3FBF // BOR disabled. 1052 #define _BOREN_ON 0x3FFF // BOR enabled. 1053 #define _BODEN_ON 0x3FFF // BOR enabled. 1054 #define _LVP_OFF 0x3F7F // RB3 is digital I/O, HV on MCLR must be used for programming. 1055 #define _LVP_ON 0x3FFF // RB3/PGM pin has PGM function; low-voltage programming enabled. 1056 #define _CPD_ON 0x3EFF // Data EEPROM memory code-protected. 1057 #define _CPD_OFF 0x3FFF // Code Protection off. 1058 #define _WRT_OFF 0x3DFF // Unprotected program memory may not be written to by EECON control. 1059 #define _WRT_ENABLE_OFF 0x3DFF // Unprotected program memory may not be written to by EECON control. 1060 #define _WRT_ALL 0x3FFF // Unprotected program memory may be written to by EECON control. 1061 #define _WRT_ENABLE_ON 0x3FFF // Unprotected program memory may be written to by EECON control. 1062 #define _DEBUG_ON 0x37FF // In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger. 1063 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins. 1064 1065 //============================================================================== 1066 1067 #define _DEVID1 0x2006 1068 1069 #define _IDLOC0 0x2000 1070 #define _IDLOC1 0x2001 1071 #define _IDLOC2 0x2002 1072 #define _IDLOC3 0x2003 1073 1074 //============================================================================== 1075 1076 #ifndef NO_BIT_DEFINES 1077 1078 #define ADON ADCON0bits.ADON // bit 0 1079 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits 1080 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits 1081 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits 1082 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits 1083 #define CHS0 ADCON0bits.CHS0 // bit 3 1084 #define CHS1 ADCON0bits.CHS1 // bit 4 1085 #define CHS2 ADCON0bits.CHS2 // bit 5 1086 #define ADCS0 ADCON0bits.ADCS0 // bit 6 1087 #define ADCS1 ADCON0bits.ADCS1 // bit 7 1088 1089 #define PCFG0 ADCON1bits.PCFG0 // bit 0 1090 #define PCFG1 ADCON1bits.PCFG1 // bit 1 1091 #define PCFG2 ADCON1bits.PCFG2 // bit 2 1092 #define PCFG3 ADCON1bits.PCFG3 // bit 3 1093 #define ADFM ADCON1bits.ADFM // bit 7 1094 1095 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0 1096 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1 1097 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2 1098 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3 1099 #define CCP1Y CCP1CONbits.CCP1Y // bit 4 1100 #define CCP1X CCP1CONbits.CCP1X // bit 5 1101 1102 #define RD EECON1bits.RD // bit 0 1103 #define WR EECON1bits.WR // bit 1 1104 #define WREN EECON1bits.WREN // bit 2 1105 #define WRERR EECON1bits.WRERR // bit 3 1106 #define EEPGD EECON1bits.EEPGD // bit 7 1107 1108 #define RBIF INTCONbits.RBIF // bit 0 1109 #define INTF INTCONbits.INTF // bit 1 1110 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits 1111 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits 1112 #define RBIE INTCONbits.RBIE // bit 3 1113 #define INTE INTCONbits.INTE // bit 4 1114 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits 1115 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits 1116 #define PEIE INTCONbits.PEIE // bit 6 1117 #define GIE INTCONbits.GIE // bit 7 1118 1119 #define PS0 OPTION_REGbits.PS0 // bit 0 1120 #define PS1 OPTION_REGbits.PS1 // bit 1 1121 #define PS2 OPTION_REGbits.PS2 // bit 2 1122 #define PSA OPTION_REGbits.PSA // bit 3 1123 #define T0SE OPTION_REGbits.T0SE // bit 4 1124 #define T0CS OPTION_REGbits.T0CS // bit 5 1125 #define INTEDG OPTION_REGbits.INTEDG // bit 6 1126 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7 1127 1128 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits 1129 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits 1130 #define NOT_POR PCONbits.NOT_POR // bit 1 1131 1132 #define TMR1IE PIE1bits.TMR1IE // bit 0 1133 #define TMR2IE PIE1bits.TMR2IE // bit 1 1134 #define CCP1IE PIE1bits.CCP1IE // bit 2 1135 #define TXIE PIE1bits.TXIE // bit 4 1136 #define RCIE PIE1bits.RCIE // bit 5 1137 #define ADIE PIE1bits.ADIE // bit 6 1138 1139 #define EEIE PIE2bits.EEIE // bit 4 1140 1141 #define TMR1IF PIR1bits.TMR1IF // bit 0 1142 #define TMR2IF PIR1bits.TMR2IF // bit 1 1143 #define CCP1IF PIR1bits.CCP1IF // bit 2 1144 #define TXIF PIR1bits.TXIF // bit 4 1145 #define RCIF PIR1bits.RCIF // bit 5 1146 #define ADIF PIR1bits.ADIF // bit 6 1147 1148 #define EEIF PIR2bits.EEIF // bit 4 1149 1150 #define RA0 PORTAbits.RA0 // bit 0 1151 #define RA1 PORTAbits.RA1 // bit 1 1152 #define RA2 PORTAbits.RA2 // bit 2 1153 #define RA3 PORTAbits.RA3 // bit 3 1154 #define RA4 PORTAbits.RA4 // bit 4 1155 #define RA5 PORTAbits.RA5 // bit 5 1156 1157 #define RB0 PORTBbits.RB0 // bit 0 1158 #define RB1 PORTBbits.RB1 // bit 1 1159 #define RB2 PORTBbits.RB2 // bit 2 1160 #define RB3 PORTBbits.RB3 // bit 3 1161 #define RB4 PORTBbits.RB4 // bit 4 1162 #define RB5 PORTBbits.RB5 // bit 5 1163 #define RB6 PORTBbits.RB6 // bit 6 1164 #define RB7 PORTBbits.RB7 // bit 7 1165 1166 #define RC0 PORTCbits.RC0 // bit 0 1167 #define RC1 PORTCbits.RC1 // bit 1 1168 #define RC2 PORTCbits.RC2 // bit 2 1169 #define RC3 PORTCbits.RC3 // bit 3 1170 #define RC4 PORTCbits.RC4 // bit 4 1171 #define RC5 PORTCbits.RC5 // bit 5 1172 #define RC6 PORTCbits.RC6 // bit 6 1173 #define RC7 PORTCbits.RC7 // bit 7 1174 1175 #define RX9D RCSTAbits.RX9D // bit 0, shadows bit in RCSTAbits 1176 #define RCD8 RCSTAbits.RCD8 // bit 0, shadows bit in RCSTAbits 1177 #define OERR RCSTAbits.OERR // bit 1 1178 #define FERR RCSTAbits.FERR // bit 2 1179 #define ADDEN RCSTAbits.ADDEN // bit 3 1180 #define CREN RCSTAbits.CREN // bit 4 1181 #define SREN RCSTAbits.SREN // bit 5 1182 #define RX9 RCSTAbits.RX9 // bit 6, shadows bit in RCSTAbits 1183 #define RC9 RCSTAbits.RC9 // bit 6, shadows bit in RCSTAbits 1184 #define NOT_RC8 RCSTAbits.NOT_RC8 // bit 6, shadows bit in RCSTAbits 1185 #define RC8_9 RCSTAbits.RC8_9 // bit 6, shadows bit in RCSTAbits 1186 #define SPEN RCSTAbits.SPEN // bit 7 1187 1188 #define C STATUSbits.C // bit 0 1189 #define DC STATUSbits.DC // bit 1 1190 #define Z STATUSbits.Z // bit 2 1191 #define NOT_PD STATUSbits.NOT_PD // bit 3 1192 #define NOT_TO STATUSbits.NOT_TO // bit 4 1193 #define RP0 STATUSbits.RP0 // bit 5 1194 #define RP1 STATUSbits.RP1 // bit 6 1195 #define IRP STATUSbits.IRP // bit 7 1196 1197 #define TMR1ON T1CONbits.TMR1ON // bit 0 1198 #define TMR1CS T1CONbits.TMR1CS // bit 1 1199 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits 1200 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits 1201 #define T1SYNC T1CONbits.T1SYNC // bit 2, shadows bit in T1CONbits 1202 #define T1OSCEN T1CONbits.T1OSCEN // bit 3 1203 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4 1204 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5 1205 1206 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0 1207 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1 1208 #define TMR2ON T2CONbits.TMR2ON // bit 2 1209 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3 1210 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4 1211 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5 1212 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6 1213 1214 #define TRISA0 TRISAbits.TRISA0 // bit 0 1215 #define TRISA1 TRISAbits.TRISA1 // bit 1 1216 #define TRISA2 TRISAbits.TRISA2 // bit 2 1217 #define TRISA3 TRISAbits.TRISA3 // bit 3 1218 #define TRISA4 TRISAbits.TRISA4 // bit 4 1219 #define TRISA5 TRISAbits.TRISA5 // bit 5 1220 1221 #define TRISB0 TRISBbits.TRISB0 // bit 0 1222 #define TRISB1 TRISBbits.TRISB1 // bit 1 1223 #define TRISB2 TRISBbits.TRISB2 // bit 2 1224 #define TRISB3 TRISBbits.TRISB3 // bit 3 1225 #define TRISB4 TRISBbits.TRISB4 // bit 4 1226 #define TRISB5 TRISBbits.TRISB5 // bit 5 1227 #define TRISB6 TRISBbits.TRISB6 // bit 6 1228 #define TRISB7 TRISBbits.TRISB7 // bit 7 1229 1230 #define TRISC0 TRISCbits.TRISC0 // bit 0 1231 #define TRISC1 TRISCbits.TRISC1 // bit 1 1232 #define TRISC2 TRISCbits.TRISC2 // bit 2 1233 #define TRISC3 TRISCbits.TRISC3 // bit 3 1234 #define TRISC4 TRISCbits.TRISC4 // bit 4 1235 #define TRISC5 TRISCbits.TRISC5 // bit 5 1236 #define TRISC6 TRISCbits.TRISC6 // bit 6 1237 #define TRISC7 TRISCbits.TRISC7 // bit 7 1238 1239 #define TX9D TXSTAbits.TX9D // bit 0, shadows bit in TXSTAbits 1240 #define TXD8 TXSTAbits.TXD8 // bit 0, shadows bit in TXSTAbits 1241 #define TRMT TXSTAbits.TRMT // bit 1 1242 #define BRGH TXSTAbits.BRGH // bit 2 1243 #define SYNC TXSTAbits.SYNC // bit 4 1244 #define TXEN TXSTAbits.TXEN // bit 5 1245 #define TX9 TXSTAbits.TX9 // bit 6, shadows bit in TXSTAbits 1246 #define NOT_TX8 TXSTAbits.NOT_TX8 // bit 6, shadows bit in TXSTAbits 1247 #define TX8_9 TXSTAbits.TX8_9 // bit 6, shadows bit in TXSTAbits 1248 #define CSRC TXSTAbits.CSRC // bit 7 1249 1250 #endif // #ifndef NO_BIT_DEFINES 1251 1252 #endif // #ifndef __PIC16F870_H__ 1253