1 /* 2 * This declarations of the PIC16LF819 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:01 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC16LF819_H__ 26 #define __PIC16LF819_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF_ADDR 0x0000 37 #define TMR0_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR_ADDR 0x0004 41 #define PORTA_ADDR 0x0005 42 #define PORTB_ADDR 0x0006 43 #define PCLATH_ADDR 0x000A 44 #define INTCON_ADDR 0x000B 45 #define PIR1_ADDR 0x000C 46 #define PIR2_ADDR 0x000D 47 #define TMR1_ADDR 0x000E 48 #define TMR1L_ADDR 0x000E 49 #define TMR1H_ADDR 0x000F 50 #define T1CON_ADDR 0x0010 51 #define TMR2_ADDR 0x0011 52 #define T2CON_ADDR 0x0012 53 #define SSPBUF_ADDR 0x0013 54 #define SSPCON_ADDR 0x0014 55 #define CCPR1_ADDR 0x0015 56 #define CCPR1L_ADDR 0x0015 57 #define CCPR1H_ADDR 0x0016 58 #define CCP1CON_ADDR 0x0017 59 #define ADRESH_ADDR 0x001E 60 #define ADCON0_ADDR 0x001F 61 #define OPTION_REG_ADDR 0x0081 62 #define TRISA_ADDR 0x0085 63 #define TRISB_ADDR 0x0086 64 #define PIE1_ADDR 0x008C 65 #define PIE2_ADDR 0x008D 66 #define PCON_ADDR 0x008E 67 #define OSCCON_ADDR 0x008F 68 #define OSCTUNE_ADDR 0x0090 69 #define PR2_ADDR 0x0092 70 #define SSPADD_ADDR 0x0093 71 #define SSPSTAT_ADDR 0x0094 72 #define ADRESL_ADDR 0x009E 73 #define ADCON1_ADDR 0x009F 74 #define EEDATA_ADDR 0x010C 75 #define EEADR_ADDR 0x010D 76 #define EEDATH_ADDR 0x010E 77 #define EEADRH_ADDR 0x010F 78 #define EECON1_ADDR 0x018C 79 #define EECON2_ADDR 0x018D 80 81 #endif // #ifndef NO_ADDR_DEFINES 82 83 //============================================================================== 84 // 85 // Register Definitions 86 // 87 //============================================================================== 88 89 extern __at(0x0000) __sfr INDF; 90 extern __at(0x0001) __sfr TMR0; 91 extern __at(0x0002) __sfr PCL; 92 93 //============================================================================== 94 // STATUS Bits 95 96 extern __at(0x0003) __sfr STATUS; 97 98 typedef union 99 { 100 struct 101 { 102 unsigned C : 1; 103 unsigned DC : 1; 104 unsigned Z : 1; 105 unsigned NOT_PD : 1; 106 unsigned NOT_TO : 1; 107 unsigned RP0 : 1; 108 unsigned RP1 : 1; 109 unsigned IRP : 1; 110 }; 111 112 struct 113 { 114 unsigned : 5; 115 unsigned RP : 2; 116 unsigned : 1; 117 }; 118 } __STATUSbits_t; 119 120 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 121 122 #define _C 0x01 123 #define _DC 0x02 124 #define _Z 0x04 125 #define _NOT_PD 0x08 126 #define _NOT_TO 0x10 127 #define _RP0 0x20 128 #define _RP1 0x40 129 #define _IRP 0x80 130 131 //============================================================================== 132 133 extern __at(0x0004) __sfr FSR; 134 135 //============================================================================== 136 // PORTA Bits 137 138 extern __at(0x0005) __sfr PORTA; 139 140 typedef struct 141 { 142 unsigned RA0 : 1; 143 unsigned RA1 : 1; 144 unsigned RA2 : 1; 145 unsigned RA3 : 1; 146 unsigned RA4 : 1; 147 unsigned RA5 : 1; 148 unsigned RA6 : 1; 149 unsigned RA7 : 1; 150 } __PORTAbits_t; 151 152 extern __at(0x0005) volatile __PORTAbits_t PORTAbits; 153 154 #define _RA0 0x01 155 #define _RA1 0x02 156 #define _RA2 0x04 157 #define _RA3 0x08 158 #define _RA4 0x10 159 #define _RA5 0x20 160 #define _RA6 0x40 161 #define _RA7 0x80 162 163 //============================================================================== 164 165 166 //============================================================================== 167 // PORTB Bits 168 169 extern __at(0x0006) __sfr PORTB; 170 171 typedef struct 172 { 173 unsigned RB0 : 1; 174 unsigned RB1 : 1; 175 unsigned RB2 : 1; 176 unsigned RB3 : 1; 177 unsigned RB4 : 1; 178 unsigned RB5 : 1; 179 unsigned RB6 : 1; 180 unsigned RB7 : 1; 181 } __PORTBbits_t; 182 183 extern __at(0x0006) volatile __PORTBbits_t PORTBbits; 184 185 #define _RB0 0x01 186 #define _RB1 0x02 187 #define _RB2 0x04 188 #define _RB3 0x08 189 #define _RB4 0x10 190 #define _RB5 0x20 191 #define _RB6 0x40 192 #define _RB7 0x80 193 194 //============================================================================== 195 196 extern __at(0x000A) __sfr PCLATH; 197 198 //============================================================================== 199 // INTCON Bits 200 201 extern __at(0x000B) __sfr INTCON; 202 203 typedef struct 204 { 205 unsigned RBIF : 1; 206 unsigned INTF : 1; 207 unsigned TMR0IF : 1; 208 unsigned RBIE : 1; 209 unsigned INTE : 1; 210 unsigned TMR0IE : 1; 211 unsigned PEIE : 1; 212 unsigned GIE : 1; 213 } __INTCONbits_t; 214 215 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 216 217 #define _RBIF 0x01 218 #define _INTF 0x02 219 #define _TMR0IF 0x04 220 #define _RBIE 0x08 221 #define _INTE 0x10 222 #define _TMR0IE 0x20 223 #define _PEIE 0x40 224 #define _GIE 0x80 225 226 //============================================================================== 227 228 229 //============================================================================== 230 // PIR1 Bits 231 232 extern __at(0x000C) __sfr PIR1; 233 234 typedef struct 235 { 236 unsigned TMR1IF : 1; 237 unsigned TMR2IF : 1; 238 unsigned CCP1IF : 1; 239 unsigned SSPIF : 1; 240 unsigned : 1; 241 unsigned : 1; 242 unsigned ADIF : 1; 243 unsigned : 1; 244 } __PIR1bits_t; 245 246 extern __at(0x000C) volatile __PIR1bits_t PIR1bits; 247 248 #define _TMR1IF 0x01 249 #define _TMR2IF 0x02 250 #define _CCP1IF 0x04 251 #define _SSPIF 0x08 252 #define _ADIF 0x40 253 254 //============================================================================== 255 256 257 //============================================================================== 258 // PIR2 Bits 259 260 extern __at(0x000D) __sfr PIR2; 261 262 typedef struct 263 { 264 unsigned : 1; 265 unsigned : 1; 266 unsigned : 1; 267 unsigned : 1; 268 unsigned EEIF : 1; 269 unsigned : 1; 270 unsigned : 1; 271 unsigned : 1; 272 } __PIR2bits_t; 273 274 extern __at(0x000D) volatile __PIR2bits_t PIR2bits; 275 276 #define _EEIF 0x10 277 278 //============================================================================== 279 280 extern __at(0x000E) __sfr TMR1; 281 extern __at(0x000E) __sfr TMR1L; 282 extern __at(0x000F) __sfr TMR1H; 283 284 //============================================================================== 285 // T1CON Bits 286 287 extern __at(0x0010) __sfr T1CON; 288 289 typedef union 290 { 291 struct 292 { 293 unsigned TMR1ON : 1; 294 unsigned TMR1CS : 1; 295 unsigned NOT_T1SYNC : 1; 296 unsigned T1OSCEN : 1; 297 unsigned T1CKPS0 : 1; 298 unsigned T1CKPS1 : 1; 299 unsigned : 1; 300 unsigned : 1; 301 }; 302 303 struct 304 { 305 unsigned : 1; 306 unsigned : 1; 307 unsigned T1INSYNC : 1; 308 unsigned : 1; 309 unsigned : 1; 310 unsigned : 1; 311 unsigned : 1; 312 unsigned : 1; 313 }; 314 315 struct 316 { 317 unsigned : 4; 318 unsigned T1CKPS : 2; 319 unsigned : 2; 320 }; 321 } __T1CONbits_t; 322 323 extern __at(0x0010) volatile __T1CONbits_t T1CONbits; 324 325 #define _TMR1ON 0x01 326 #define _TMR1CS 0x02 327 #define _NOT_T1SYNC 0x04 328 #define _T1INSYNC 0x04 329 #define _T1OSCEN 0x08 330 #define _T1CKPS0 0x10 331 #define _T1CKPS1 0x20 332 333 //============================================================================== 334 335 extern __at(0x0011) __sfr TMR2; 336 337 //============================================================================== 338 // T2CON Bits 339 340 extern __at(0x0012) __sfr T2CON; 341 342 typedef union 343 { 344 struct 345 { 346 unsigned T2CKPS0 : 1; 347 unsigned T2CKPS1 : 1; 348 unsigned TMR2ON : 1; 349 unsigned TOUTPS0 : 1; 350 unsigned TOUTPS1 : 1; 351 unsigned TOUTPS2 : 1; 352 unsigned TOUTPS3 : 1; 353 unsigned : 1; 354 }; 355 356 struct 357 { 358 unsigned T2CKPS : 2; 359 unsigned : 6; 360 }; 361 362 struct 363 { 364 unsigned : 3; 365 unsigned TOUTPS : 4; 366 unsigned : 1; 367 }; 368 } __T2CONbits_t; 369 370 extern __at(0x0012) volatile __T2CONbits_t T2CONbits; 371 372 #define _T2CKPS0 0x01 373 #define _T2CKPS1 0x02 374 #define _TMR2ON 0x04 375 #define _TOUTPS0 0x08 376 #define _TOUTPS1 0x10 377 #define _TOUTPS2 0x20 378 #define _TOUTPS3 0x40 379 380 //============================================================================== 381 382 extern __at(0x0013) __sfr SSPBUF; 383 384 //============================================================================== 385 // SSPCON Bits 386 387 extern __at(0x0014) __sfr SSPCON; 388 389 typedef union 390 { 391 struct 392 { 393 unsigned SSPM0 : 1; 394 unsigned SSPM1 : 1; 395 unsigned SSPM2 : 1; 396 unsigned SSPM3 : 1; 397 unsigned CKP : 1; 398 unsigned SSPEN : 1; 399 unsigned SSPOV : 1; 400 unsigned WCOL : 1; 401 }; 402 403 struct 404 { 405 unsigned SSPM : 4; 406 unsigned : 4; 407 }; 408 } __SSPCONbits_t; 409 410 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits; 411 412 #define _SSPM0 0x01 413 #define _SSPM1 0x02 414 #define _SSPM2 0x04 415 #define _SSPM3 0x08 416 #define _CKP 0x10 417 #define _SSPEN 0x20 418 #define _SSPOV 0x40 419 #define _WCOL 0x80 420 421 //============================================================================== 422 423 extern __at(0x0015) __sfr CCPR1; 424 extern __at(0x0015) __sfr CCPR1L; 425 extern __at(0x0016) __sfr CCPR1H; 426 427 //============================================================================== 428 // CCP1CON Bits 429 430 extern __at(0x0017) __sfr CCP1CON; 431 432 typedef union 433 { 434 struct 435 { 436 unsigned CCP1M0 : 1; 437 unsigned CCP1M1 : 1; 438 unsigned CCP1M2 : 1; 439 unsigned CCP1M3 : 1; 440 unsigned CCP1Y : 1; 441 unsigned CCP1X : 1; 442 unsigned : 1; 443 unsigned : 1; 444 }; 445 446 struct 447 { 448 unsigned CCP1M : 4; 449 unsigned : 4; 450 }; 451 } __CCP1CONbits_t; 452 453 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits; 454 455 #define _CCP1M0 0x01 456 #define _CCP1M1 0x02 457 #define _CCP1M2 0x04 458 #define _CCP1M3 0x08 459 #define _CCP1Y 0x10 460 #define _CCP1X 0x20 461 462 //============================================================================== 463 464 extern __at(0x001E) __sfr ADRESH; 465 466 //============================================================================== 467 // ADCON0 Bits 468 469 extern __at(0x001F) __sfr ADCON0; 470 471 typedef union 472 { 473 struct 474 { 475 unsigned ADON : 1; 476 unsigned : 1; 477 unsigned GO_NOT_DONE : 1; 478 unsigned CHS0 : 1; 479 unsigned CHS1 : 1; 480 unsigned CHS2 : 1; 481 unsigned ADCS0 : 1; 482 unsigned ADCS1 : 1; 483 }; 484 485 struct 486 { 487 unsigned : 1; 488 unsigned : 1; 489 unsigned GO : 1; 490 unsigned : 1; 491 unsigned : 1; 492 unsigned : 1; 493 unsigned : 1; 494 unsigned : 1; 495 }; 496 497 struct 498 { 499 unsigned : 1; 500 unsigned : 1; 501 unsigned NOT_DONE : 1; 502 unsigned : 1; 503 unsigned : 1; 504 unsigned : 1; 505 unsigned : 1; 506 unsigned : 1; 507 }; 508 509 struct 510 { 511 unsigned : 1; 512 unsigned : 1; 513 unsigned GO_DONE : 1; 514 unsigned : 1; 515 unsigned : 1; 516 unsigned : 1; 517 unsigned : 1; 518 unsigned : 1; 519 }; 520 521 struct 522 { 523 unsigned : 3; 524 unsigned CHS : 3; 525 unsigned : 2; 526 }; 527 528 struct 529 { 530 unsigned : 6; 531 unsigned ADCS : 2; 532 }; 533 } __ADCON0bits_t; 534 535 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits; 536 537 #define _ADON 0x01 538 #define _GO_NOT_DONE 0x04 539 #define _GO 0x04 540 #define _NOT_DONE 0x04 541 #define _GO_DONE 0x04 542 #define _CHS0 0x08 543 #define _CHS1 0x10 544 #define _CHS2 0x20 545 #define _ADCS0 0x40 546 #define _ADCS1 0x80 547 548 //============================================================================== 549 550 551 //============================================================================== 552 // OPTION_REG Bits 553 554 extern __at(0x0081) __sfr OPTION_REG; 555 556 typedef union 557 { 558 struct 559 { 560 unsigned PS0 : 1; 561 unsigned PS1 : 1; 562 unsigned PS2 : 1; 563 unsigned PSA : 1; 564 unsigned T0SE : 1; 565 unsigned T0CS : 1; 566 unsigned INTEDG : 1; 567 unsigned NOT_RBPU : 1; 568 }; 569 570 struct 571 { 572 unsigned PS : 3; 573 unsigned : 5; 574 }; 575 } __OPTION_REGbits_t; 576 577 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits; 578 579 #define _PS0 0x01 580 #define _PS1 0x02 581 #define _PS2 0x04 582 #define _PSA 0x08 583 #define _T0SE 0x10 584 #define _T0CS 0x20 585 #define _INTEDG 0x40 586 #define _NOT_RBPU 0x80 587 588 //============================================================================== 589 590 591 //============================================================================== 592 // TRISA Bits 593 594 extern __at(0x0085) __sfr TRISA; 595 596 typedef struct 597 { 598 unsigned TRISA0 : 1; 599 unsigned TRISA1 : 1; 600 unsigned TRISA2 : 1; 601 unsigned TRISA3 : 1; 602 unsigned TRISA4 : 1; 603 unsigned TRISA5 : 1; 604 unsigned TRISA6 : 1; 605 unsigned TRISA7 : 1; 606 } __TRISAbits_t; 607 608 extern __at(0x0085) volatile __TRISAbits_t TRISAbits; 609 610 #define _TRISA0 0x01 611 #define _TRISA1 0x02 612 #define _TRISA2 0x04 613 #define _TRISA3 0x08 614 #define _TRISA4 0x10 615 #define _TRISA5 0x20 616 #define _TRISA6 0x40 617 #define _TRISA7 0x80 618 619 //============================================================================== 620 621 622 //============================================================================== 623 // TRISB Bits 624 625 extern __at(0x0086) __sfr TRISB; 626 627 typedef struct 628 { 629 unsigned TRISB0 : 1; 630 unsigned TRISB1 : 1; 631 unsigned TRISB2 : 1; 632 unsigned TRISB3 : 1; 633 unsigned TRISB4 : 1; 634 unsigned TRISB5 : 1; 635 unsigned TRISB6 : 1; 636 unsigned TRISB7 : 1; 637 } __TRISBbits_t; 638 639 extern __at(0x0086) volatile __TRISBbits_t TRISBbits; 640 641 #define _TRISB0 0x01 642 #define _TRISB1 0x02 643 #define _TRISB2 0x04 644 #define _TRISB3 0x08 645 #define _TRISB4 0x10 646 #define _TRISB5 0x20 647 #define _TRISB6 0x40 648 #define _TRISB7 0x80 649 650 //============================================================================== 651 652 653 //============================================================================== 654 // PIE1 Bits 655 656 extern __at(0x008C) __sfr PIE1; 657 658 typedef struct 659 { 660 unsigned TMR1IE : 1; 661 unsigned TMR2IE : 1; 662 unsigned CCP1IE : 1; 663 unsigned SSPIE : 1; 664 unsigned : 1; 665 unsigned : 1; 666 unsigned ADIE : 1; 667 unsigned : 1; 668 } __PIE1bits_t; 669 670 extern __at(0x008C) volatile __PIE1bits_t PIE1bits; 671 672 #define _TMR1IE 0x01 673 #define _TMR2IE 0x02 674 #define _CCP1IE 0x04 675 #define _SSPIE 0x08 676 #define _ADIE 0x40 677 678 //============================================================================== 679 680 681 //============================================================================== 682 // PIE2 Bits 683 684 extern __at(0x008D) __sfr PIE2; 685 686 typedef struct 687 { 688 unsigned : 1; 689 unsigned : 1; 690 unsigned : 1; 691 unsigned : 1; 692 unsigned EEIE : 1; 693 unsigned : 1; 694 unsigned : 1; 695 unsigned : 1; 696 } __PIE2bits_t; 697 698 extern __at(0x008D) volatile __PIE2bits_t PIE2bits; 699 700 #define _EEIE 0x10 701 702 //============================================================================== 703 704 705 //============================================================================== 706 // PCON Bits 707 708 extern __at(0x008E) __sfr PCON; 709 710 typedef union 711 { 712 struct 713 { 714 unsigned NOT_BOR : 1; 715 unsigned NOT_POR : 1; 716 unsigned : 1; 717 unsigned : 1; 718 unsigned : 1; 719 unsigned : 1; 720 unsigned : 1; 721 unsigned : 1; 722 }; 723 724 struct 725 { 726 unsigned NOT_BO : 1; 727 unsigned : 1; 728 unsigned : 1; 729 unsigned : 1; 730 unsigned : 1; 731 unsigned : 1; 732 unsigned : 1; 733 unsigned : 1; 734 }; 735 } __PCONbits_t; 736 737 extern __at(0x008E) volatile __PCONbits_t PCONbits; 738 739 #define _NOT_BOR 0x01 740 #define _NOT_BO 0x01 741 #define _NOT_POR 0x02 742 743 //============================================================================== 744 745 746 //============================================================================== 747 // OSCCON Bits 748 749 extern __at(0x008F) __sfr OSCCON; 750 751 typedef union 752 { 753 struct 754 { 755 unsigned : 1; 756 unsigned : 1; 757 unsigned IOFS : 1; 758 unsigned : 1; 759 unsigned IRCF0 : 1; 760 unsigned IRCF1 : 1; 761 unsigned IRCF2 : 1; 762 unsigned : 1; 763 }; 764 765 struct 766 { 767 unsigned : 4; 768 unsigned IRCF : 3; 769 unsigned : 1; 770 }; 771 } __OSCCONbits_t; 772 773 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits; 774 775 #define _IOFS 0x04 776 #define _IRCF0 0x10 777 #define _IRCF1 0x20 778 #define _IRCF2 0x40 779 780 //============================================================================== 781 782 783 //============================================================================== 784 // OSCTUNE Bits 785 786 extern __at(0x0090) __sfr OSCTUNE; 787 788 typedef union 789 { 790 struct 791 { 792 unsigned TUN0 : 1; 793 unsigned TUN1 : 1; 794 unsigned TUN2 : 1; 795 unsigned TUN3 : 1; 796 unsigned TUN4 : 1; 797 unsigned TUN5 : 1; 798 unsigned : 1; 799 unsigned : 1; 800 }; 801 802 struct 803 { 804 unsigned TUN : 6; 805 unsigned : 2; 806 }; 807 } __OSCTUNEbits_t; 808 809 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits; 810 811 #define _TUN0 0x01 812 #define _TUN1 0x02 813 #define _TUN2 0x04 814 #define _TUN3 0x08 815 #define _TUN4 0x10 816 #define _TUN5 0x20 817 818 //============================================================================== 819 820 extern __at(0x0092) __sfr PR2; 821 extern __at(0x0093) __sfr SSPADD; 822 823 //============================================================================== 824 // SSPSTAT Bits 825 826 extern __at(0x0094) __sfr SSPSTAT; 827 828 typedef union 829 { 830 struct 831 { 832 unsigned BF : 1; 833 unsigned UA : 1; 834 unsigned R_NOT_W : 1; 835 unsigned S : 1; 836 unsigned P : 1; 837 unsigned D_NOT_A : 1; 838 unsigned CKE : 1; 839 unsigned SMP : 1; 840 }; 841 842 struct 843 { 844 unsigned : 1; 845 unsigned : 1; 846 unsigned R : 1; 847 unsigned I2C_START : 1; 848 unsigned I2C_STOP : 1; 849 unsigned D : 1; 850 unsigned : 1; 851 unsigned : 1; 852 }; 853 854 struct 855 { 856 unsigned : 1; 857 unsigned : 1; 858 unsigned I2C_READ : 1; 859 unsigned : 1; 860 unsigned : 1; 861 unsigned I2C_DATA : 1; 862 unsigned : 1; 863 unsigned : 1; 864 }; 865 866 struct 867 { 868 unsigned : 1; 869 unsigned : 1; 870 unsigned NOT_W : 1; 871 unsigned : 1; 872 unsigned : 1; 873 unsigned NOT_A : 1; 874 unsigned : 1; 875 unsigned : 1; 876 }; 877 878 struct 879 { 880 unsigned : 1; 881 unsigned : 1; 882 unsigned NOT_WRITE : 1; 883 unsigned : 1; 884 unsigned : 1; 885 unsigned NOT_ADDRESS : 1; 886 unsigned : 1; 887 unsigned : 1; 888 }; 889 890 struct 891 { 892 unsigned : 1; 893 unsigned : 1; 894 unsigned R_W : 1; 895 unsigned : 1; 896 unsigned : 1; 897 unsigned D_A : 1; 898 unsigned : 1; 899 unsigned : 1; 900 }; 901 902 struct 903 { 904 unsigned : 1; 905 unsigned : 1; 906 unsigned READ_WRITE : 1; 907 unsigned : 1; 908 unsigned : 1; 909 unsigned DATA_ADDRESS : 1; 910 unsigned : 1; 911 unsigned : 1; 912 }; 913 } __SSPSTATbits_t; 914 915 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits; 916 917 #define _BF 0x01 918 #define _UA 0x02 919 #define _R_NOT_W 0x04 920 #define _R 0x04 921 #define _I2C_READ 0x04 922 #define _NOT_W 0x04 923 #define _NOT_WRITE 0x04 924 #define _R_W 0x04 925 #define _READ_WRITE 0x04 926 #define _S 0x08 927 #define _I2C_START 0x08 928 #define _P 0x10 929 #define _I2C_STOP 0x10 930 #define _D_NOT_A 0x20 931 #define _D 0x20 932 #define _I2C_DATA 0x20 933 #define _NOT_A 0x20 934 #define _NOT_ADDRESS 0x20 935 #define _D_A 0x20 936 #define _DATA_ADDRESS 0x20 937 #define _CKE 0x40 938 #define _SMP 0x80 939 940 //============================================================================== 941 942 extern __at(0x009E) __sfr ADRESL; 943 944 //============================================================================== 945 // ADCON1 Bits 946 947 extern __at(0x009F) __sfr ADCON1; 948 949 typedef union 950 { 951 struct 952 { 953 unsigned PCFG0 : 1; 954 unsigned PCFG1 : 1; 955 unsigned PCFG2 : 1; 956 unsigned PCFG3 : 1; 957 unsigned : 1; 958 unsigned : 1; 959 unsigned ADCS2 : 1; 960 unsigned ADFM : 1; 961 }; 962 963 struct 964 { 965 unsigned PCFG : 4; 966 unsigned : 4; 967 }; 968 } __ADCON1bits_t; 969 970 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits; 971 972 #define _PCFG0 0x01 973 #define _PCFG1 0x02 974 #define _PCFG2 0x04 975 #define _PCFG3 0x08 976 #define _ADCS2 0x40 977 #define _ADFM 0x80 978 979 //============================================================================== 980 981 extern __at(0x010C) __sfr EEDATA; 982 extern __at(0x010D) __sfr EEADR; 983 extern __at(0x010E) __sfr EEDATH; 984 extern __at(0x010F) __sfr EEADRH; 985 986 //============================================================================== 987 // EECON1 Bits 988 989 extern __at(0x018C) __sfr EECON1; 990 991 typedef struct 992 { 993 unsigned RD : 1; 994 unsigned WR : 1; 995 unsigned WREN : 1; 996 unsigned WRERR : 1; 997 unsigned FREE : 1; 998 unsigned : 1; 999 unsigned : 1; 1000 unsigned EEPGD : 1; 1001 } __EECON1bits_t; 1002 1003 extern __at(0x018C) volatile __EECON1bits_t EECON1bits; 1004 1005 #define _RD 0x01 1006 #define _WR 0x02 1007 #define _WREN 0x04 1008 #define _WRERR 0x08 1009 #define _FREE 0x10 1010 #define _EEPGD 0x80 1011 1012 //============================================================================== 1013 1014 extern __at(0x018D) __sfr EECON2; 1015 1016 //============================================================================== 1017 // 1018 // Configuration Bits 1019 // 1020 //============================================================================== 1021 1022 #define _CONFIG 0x2007 1023 1024 //----------------------------- CONFIG Options ------------------------------- 1025 1026 #define _FOSC_LP 0x3FEC // LP oscillator. 1027 #define _LP_OSC 0x3FEC // LP oscillator. 1028 #define _FOSC_XT 0x3FED // XT oscillator. 1029 #define _XT_OSC 0x3FED // XT oscillator. 1030 #define _FOSC_HS 0x3FEE // HS oscillator. 1031 #define _HS_OSC 0x3FEE // HS oscillator. 1032 #define _FOSC_EC 0x3FEF // EXTCLK; port I/O function on RA6/OSC2/CLKO pin. 1033 #define _EXTCLK 0x3FEF // EXTCLK; port I/O function on RA6/OSC2/CLKO pin. 1034 #define _FOSC_INTOSCIO 0x3FFC // INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin. 1035 #define _INTRC_IO 0x3FFC // INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin. 1036 #define _FOSC_INTOSCCLK 0x3FFD // INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin. 1037 #define _INTRC_CLKOUT 0x3FFD // INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin. 1038 #define _FOSC_EXTRCIO 0x3FFE // EXTRC oscillator; port I/O function on RA6/OSC2/CLKO pin. 1039 #define _EXTRC_IO 0x3FFE // EXTRC oscillator; port I/O function on RA6/OSC2/CLKO pin. 1040 #define _FOSC_EXTRCCLK 0x3FFF // EXTRC oscillator; CLKO function on RA6/OSC2/CLKO pin. 1041 #define _EXTRC_CLKOUT 0x3FFF // EXTRC oscillator; CLKO function on RA6/OSC2/CLKO pin. 1042 #define _WDTE_OFF 0x3FFB // WDT disabled. 1043 #define _WDT_OFF 0x3FFB // WDT disabled. 1044 #define _WDTE_ON 0x3FFF // WDT enabled. 1045 #define _WDT_ON 0x3FFF // WDT enabled. 1046 #define _PWRTE_ON 0x3FF7 // PWRT enabled. 1047 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 1048 #define _MCLRE_OFF 0x3FDF // RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD. 1049 #define _MCLR_OFF 0x3FDF // RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD. 1050 #define _MCLRE_ON 0x3FFF // RA5/MCLR/VPP pin function is MCLR. 1051 #define _MCLR_ON 0x3FFF // RA5/MCLR/VPP pin function is MCLR. 1052 #define _BOREN_OFF 0x3FBF // BOR disabled. 1053 #define _BODEN_OFF 0x3FBF // BOR disabled. 1054 #define _BOREN_ON 0x3FFF // BOR enabled. 1055 #define _BODEN_ON 0x3FFF // BOR enabled. 1056 #define _LVP_OFF 0x3F7F // RB3/PGM pin has digital I/O function, HV on MCLR must be used for programming. 1057 #define _LVP_ON 0x3FFF // RB3/PGM pin has PGM function, Low-Voltage Programming enabled. 1058 #define _CPD_ON 0x3EFF // Data EE memory locations code-protected. 1059 #define _CPD_OFF 0x3FFF // Code protection off. 1060 #define _WRT_1536 0x39FF // 0000h to 05FFh write-protected, 0600h to 07FFh may be modified by EECON control. 1061 #define _WRT_ENABLE_1536 0x39FF // 0000h to 05FFh write-protected, 0600h to 07FFh may be modified by EECON control. 1062 #define _WRT_1024 0x3BFF // 0000h to 03FFh write-protected, 0400h to 07FFh may be modified by EECON control. 1063 #define _WRT_ENABLE_1024 0x3BFF // 0000h to 03FFh write-protected, 0400h to 07FFh may be modified by EECON control. 1064 #define _WRT_512 0x3DFF // 0000h to 01FFh write-protected, 0200h to 07FFh may be modified by EECON control. 1065 #define _WRT_ENABLE_512 0x3DFF // 0000h to 01FFh write-protected, 0200h to 07FFh may be modified by EECON control. 1066 #define _WRT_OFF 0x3FFF // Write protection off. 1067 #define _WRT_ENABLE_OFF 0x3FFF // Write protection off. 1068 #define _DEBUG_ON 0x37FF // In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger. 1069 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins. 1070 #define _CCPMX_RB3 0x2FFF // CCP1 function on RB3. 1071 #define _CCP1_RB3 0x2FFF // CCP1 function on RB3. 1072 #define _CCPMX_RB2 0x3FFF // CCP1 function on RB2. 1073 #define _CCP1_RB2 0x3FFF // CCP1 function on RB2. 1074 #define _CP_ON 0x1FFF // All memory locations code-protected. 1075 #define _CP_ALL 0x1FFF // All memory locations code-protected. 1076 #define _CP_OFF 0x3FFF // Code protection off. 1077 1078 //============================================================================== 1079 1080 #define _DEVID1 0x2006 1081 1082 #define _IDLOC0 0x2000 1083 #define _IDLOC1 0x2001 1084 #define _IDLOC2 0x2002 1085 #define _IDLOC3 0x2003 1086 1087 //============================================================================== 1088 1089 #ifndef NO_BIT_DEFINES 1090 1091 #define ADON ADCON0bits.ADON // bit 0 1092 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits 1093 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits 1094 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits 1095 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits 1096 #define CHS0 ADCON0bits.CHS0 // bit 3 1097 #define CHS1 ADCON0bits.CHS1 // bit 4 1098 #define CHS2 ADCON0bits.CHS2 // bit 5 1099 #define ADCS0 ADCON0bits.ADCS0 // bit 6 1100 #define ADCS1 ADCON0bits.ADCS1 // bit 7 1101 1102 #define PCFG0 ADCON1bits.PCFG0 // bit 0 1103 #define PCFG1 ADCON1bits.PCFG1 // bit 1 1104 #define PCFG2 ADCON1bits.PCFG2 // bit 2 1105 #define PCFG3 ADCON1bits.PCFG3 // bit 3 1106 #define ADCS2 ADCON1bits.ADCS2 // bit 6 1107 #define ADFM ADCON1bits.ADFM // bit 7 1108 1109 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0 1110 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1 1111 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2 1112 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3 1113 #define CCP1Y CCP1CONbits.CCP1Y // bit 4 1114 #define CCP1X CCP1CONbits.CCP1X // bit 5 1115 1116 #define RD EECON1bits.RD // bit 0 1117 #define WR EECON1bits.WR // bit 1 1118 #define WREN EECON1bits.WREN // bit 2 1119 #define WRERR EECON1bits.WRERR // bit 3 1120 #define FREE EECON1bits.FREE // bit 4 1121 #define EEPGD EECON1bits.EEPGD // bit 7 1122 1123 #define RBIF INTCONbits.RBIF // bit 0 1124 #define INTF INTCONbits.INTF // bit 1 1125 #define TMR0IF INTCONbits.TMR0IF // bit 2 1126 #define RBIE INTCONbits.RBIE // bit 3 1127 #define INTE INTCONbits.INTE // bit 4 1128 #define TMR0IE INTCONbits.TMR0IE // bit 5 1129 #define PEIE INTCONbits.PEIE // bit 6 1130 #define GIE INTCONbits.GIE // bit 7 1131 1132 #define PS0 OPTION_REGbits.PS0 // bit 0 1133 #define PS1 OPTION_REGbits.PS1 // bit 1 1134 #define PS2 OPTION_REGbits.PS2 // bit 2 1135 #define PSA OPTION_REGbits.PSA // bit 3 1136 #define T0SE OPTION_REGbits.T0SE // bit 4 1137 #define T0CS OPTION_REGbits.T0CS // bit 5 1138 #define INTEDG OPTION_REGbits.INTEDG // bit 6 1139 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7 1140 1141 #define IOFS OSCCONbits.IOFS // bit 2 1142 #define IRCF0 OSCCONbits.IRCF0 // bit 4 1143 #define IRCF1 OSCCONbits.IRCF1 // bit 5 1144 #define IRCF2 OSCCONbits.IRCF2 // bit 6 1145 1146 #define TUN0 OSCTUNEbits.TUN0 // bit 0 1147 #define TUN1 OSCTUNEbits.TUN1 // bit 1 1148 #define TUN2 OSCTUNEbits.TUN2 // bit 2 1149 #define TUN3 OSCTUNEbits.TUN3 // bit 3 1150 #define TUN4 OSCTUNEbits.TUN4 // bit 4 1151 #define TUN5 OSCTUNEbits.TUN5 // bit 5 1152 1153 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits 1154 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits 1155 #define NOT_POR PCONbits.NOT_POR // bit 1 1156 1157 #define TMR1IE PIE1bits.TMR1IE // bit 0 1158 #define TMR2IE PIE1bits.TMR2IE // bit 1 1159 #define CCP1IE PIE1bits.CCP1IE // bit 2 1160 #define SSPIE PIE1bits.SSPIE // bit 3 1161 #define ADIE PIE1bits.ADIE // bit 6 1162 1163 #define EEIE PIE2bits.EEIE // bit 4 1164 1165 #define TMR1IF PIR1bits.TMR1IF // bit 0 1166 #define TMR2IF PIR1bits.TMR2IF // bit 1 1167 #define CCP1IF PIR1bits.CCP1IF // bit 2 1168 #define SSPIF PIR1bits.SSPIF // bit 3 1169 #define ADIF PIR1bits.ADIF // bit 6 1170 1171 #define EEIF PIR2bits.EEIF // bit 4 1172 1173 #define RA0 PORTAbits.RA0 // bit 0 1174 #define RA1 PORTAbits.RA1 // bit 1 1175 #define RA2 PORTAbits.RA2 // bit 2 1176 #define RA3 PORTAbits.RA3 // bit 3 1177 #define RA4 PORTAbits.RA4 // bit 4 1178 #define RA5 PORTAbits.RA5 // bit 5 1179 #define RA6 PORTAbits.RA6 // bit 6 1180 #define RA7 PORTAbits.RA7 // bit 7 1181 1182 #define RB0 PORTBbits.RB0 // bit 0 1183 #define RB1 PORTBbits.RB1 // bit 1 1184 #define RB2 PORTBbits.RB2 // bit 2 1185 #define RB3 PORTBbits.RB3 // bit 3 1186 #define RB4 PORTBbits.RB4 // bit 4 1187 #define RB5 PORTBbits.RB5 // bit 5 1188 #define RB6 PORTBbits.RB6 // bit 6 1189 #define RB7 PORTBbits.RB7 // bit 7 1190 1191 #define SSPM0 SSPCONbits.SSPM0 // bit 0 1192 #define SSPM1 SSPCONbits.SSPM1 // bit 1 1193 #define SSPM2 SSPCONbits.SSPM2 // bit 2 1194 #define SSPM3 SSPCONbits.SSPM3 // bit 3 1195 #define CKP SSPCONbits.CKP // bit 4 1196 #define SSPEN SSPCONbits.SSPEN // bit 5 1197 #define SSPOV SSPCONbits.SSPOV // bit 6 1198 #define WCOL SSPCONbits.WCOL // bit 7 1199 1200 #define BF SSPSTATbits.BF // bit 0 1201 #define UA SSPSTATbits.UA // bit 1 1202 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits 1203 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits 1204 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits 1205 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits 1206 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits 1207 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits 1208 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits 1209 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits 1210 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits 1211 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits 1212 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits 1213 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits 1214 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits 1215 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits 1216 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits 1217 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits 1218 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits 1219 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits 1220 #define CKE SSPSTATbits.CKE // bit 6 1221 #define SMP SSPSTATbits.SMP // bit 7 1222 1223 #define C STATUSbits.C // bit 0 1224 #define DC STATUSbits.DC // bit 1 1225 #define Z STATUSbits.Z // bit 2 1226 #define NOT_PD STATUSbits.NOT_PD // bit 3 1227 #define NOT_TO STATUSbits.NOT_TO // bit 4 1228 #define RP0 STATUSbits.RP0 // bit 5 1229 #define RP1 STATUSbits.RP1 // bit 6 1230 #define IRP STATUSbits.IRP // bit 7 1231 1232 #define TMR1ON T1CONbits.TMR1ON // bit 0 1233 #define TMR1CS T1CONbits.TMR1CS // bit 1 1234 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits 1235 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits 1236 #define T1OSCEN T1CONbits.T1OSCEN // bit 3 1237 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4 1238 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5 1239 1240 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0 1241 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1 1242 #define TMR2ON T2CONbits.TMR2ON // bit 2 1243 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3 1244 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4 1245 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5 1246 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6 1247 1248 #define TRISA0 TRISAbits.TRISA0 // bit 0 1249 #define TRISA1 TRISAbits.TRISA1 // bit 1 1250 #define TRISA2 TRISAbits.TRISA2 // bit 2 1251 #define TRISA3 TRISAbits.TRISA3 // bit 3 1252 #define TRISA4 TRISAbits.TRISA4 // bit 4 1253 #define TRISA5 TRISAbits.TRISA5 // bit 5 1254 #define TRISA6 TRISAbits.TRISA6 // bit 6 1255 #define TRISA7 TRISAbits.TRISA7 // bit 7 1256 1257 #define TRISB0 TRISBbits.TRISB0 // bit 0 1258 #define TRISB1 TRISBbits.TRISB1 // bit 1 1259 #define TRISB2 TRISBbits.TRISB2 // bit 2 1260 #define TRISB3 TRISBbits.TRISB3 // bit 3 1261 #define TRISB4 TRISBbits.TRISB4 // bit 4 1262 #define TRISB5 TRISBbits.TRISB5 // bit 5 1263 #define TRISB6 TRISBbits.TRISB6 // bit 6 1264 #define TRISB7 TRISBbits.TRISB7 // bit 7 1265 1266 #endif // #ifndef NO_BIT_DEFINES 1267 1268 #endif // #ifndef __PIC16LF819_H__ 1269