1 /* 2 * This definitions of the PIC16F1614 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:09 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #include <pic16f1614.h> 26 27 //============================================================================== 28 29 __at(0x0000) __sfr INDF0; 30 31 __at(0x0001) __sfr INDF1; 32 33 __at(0x0002) __sfr PCL; 34 35 __at(0x0003) __sfr STATUS; 36 __at(0x0003) volatile __STATUSbits_t STATUSbits; 37 38 __at(0x0004) __sfr FSR0; 39 40 __at(0x0004) __sfr FSR0L; 41 42 __at(0x0005) __sfr FSR0H; 43 44 __at(0x0006) __sfr FSR1; 45 46 __at(0x0006) __sfr FSR1L; 47 48 __at(0x0007) __sfr FSR1H; 49 50 __at(0x0008) __sfr BSR; 51 __at(0x0008) volatile __BSRbits_t BSRbits; 52 53 __at(0x0009) __sfr WREG; 54 55 __at(0x000A) __sfr PCLATH; 56 57 __at(0x000B) __sfr INTCON; 58 __at(0x000B) volatile __INTCONbits_t INTCONbits; 59 60 __at(0x000C) __sfr PORTA; 61 __at(0x000C) volatile __PORTAbits_t PORTAbits; 62 63 __at(0x000E) __sfr PORTC; 64 __at(0x000E) volatile __PORTCbits_t PORTCbits; 65 66 __at(0x0010) __sfr PIR1; 67 __at(0x0010) volatile __PIR1bits_t PIR1bits; 68 69 __at(0x0011) __sfr PIR2; 70 __at(0x0011) volatile __PIR2bits_t PIR2bits; 71 72 __at(0x0012) __sfr PIR3; 73 __at(0x0012) volatile __PIR3bits_t PIR3bits; 74 75 __at(0x0013) __sfr PIR4; 76 __at(0x0013) volatile __PIR4bits_t PIR4bits; 77 78 __at(0x0014) __sfr PIR5; 79 __at(0x0014) volatile __PIR5bits_t PIR5bits; 80 81 __at(0x0015) __sfr TMR0; 82 83 __at(0x0016) __sfr TMR1; 84 85 __at(0x0016) __sfr TMR1L; 86 87 __at(0x0017) __sfr TMR1H; 88 89 __at(0x0018) __sfr T1CON; 90 __at(0x0018) volatile __T1CONbits_t T1CONbits; 91 92 __at(0x0019) __sfr T1GCON; 93 __at(0x0019) volatile __T1GCONbits_t T1GCONbits; 94 95 __at(0x001A) __sfr T2TMR; 96 97 __at(0x001A) __sfr TMR2; 98 99 __at(0x001B) __sfr PR2; 100 101 __at(0x001B) __sfr T2PR; 102 103 __at(0x001C) __sfr T2CON; 104 __at(0x001C) volatile __T2CONbits_t T2CONbits; 105 106 __at(0x001D) __sfr T2HLT; 107 __at(0x001D) volatile __T2HLTbits_t T2HLTbits; 108 109 __at(0x001E) __sfr T2CLKCON; 110 __at(0x001E) volatile __T2CLKCONbits_t T2CLKCONbits; 111 112 __at(0x001F) __sfr T2RST; 113 __at(0x001F) volatile __T2RSTbits_t T2RSTbits; 114 115 __at(0x008C) __sfr TRISA; 116 __at(0x008C) volatile __TRISAbits_t TRISAbits; 117 118 __at(0x008E) __sfr TRISC; 119 __at(0x008E) volatile __TRISCbits_t TRISCbits; 120 121 __at(0x0090) __sfr PIE1; 122 __at(0x0090) volatile __PIE1bits_t PIE1bits; 123 124 __at(0x0091) __sfr PIE2; 125 __at(0x0091) volatile __PIE2bits_t PIE2bits; 126 127 __at(0x0092) __sfr PIE3; 128 __at(0x0092) volatile __PIE3bits_t PIE3bits; 129 130 __at(0x0093) __sfr PIE4; 131 __at(0x0093) volatile __PIE4bits_t PIE4bits; 132 133 __at(0x0094) __sfr PIE5; 134 __at(0x0094) volatile __PIE5bits_t PIE5bits; 135 136 __at(0x0095) __sfr OPTION_REG; 137 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits; 138 139 __at(0x0096) __sfr PCON; 140 __at(0x0096) volatile __PCONbits_t PCONbits; 141 142 __at(0x0098) __sfr OSCTUNE; 143 __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits; 144 145 __at(0x0099) __sfr OSCCON; 146 __at(0x0099) volatile __OSCCONbits_t OSCCONbits; 147 148 __at(0x009A) __sfr OSCSTAT; 149 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits; 150 151 __at(0x009B) __sfr ADRES; 152 153 __at(0x009B) __sfr ADRESL; 154 155 __at(0x009C) __sfr ADRESH; 156 157 __at(0x009D) __sfr ADCON0; 158 __at(0x009D) volatile __ADCON0bits_t ADCON0bits; 159 160 __at(0x009E) __sfr ADCON1; 161 __at(0x009E) volatile __ADCON1bits_t ADCON1bits; 162 163 __at(0x009F) __sfr ADCON2; 164 __at(0x009F) volatile __ADCON2bits_t ADCON2bits; 165 166 __at(0x010C) __sfr LATA; 167 __at(0x010C) volatile __LATAbits_t LATAbits; 168 169 __at(0x010E) __sfr LATC; 170 __at(0x010E) volatile __LATCbits_t LATCbits; 171 172 __at(0x0111) __sfr CM1CON0; 173 __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits; 174 175 __at(0x0112) __sfr CM1CON1; 176 __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits; 177 178 __at(0x0113) __sfr CM2CON0; 179 __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits; 180 181 __at(0x0114) __sfr CM2CON1; 182 __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits; 183 184 __at(0x0115) __sfr CMOUT; 185 __at(0x0115) volatile __CMOUTbits_t CMOUTbits; 186 187 __at(0x0116) __sfr BORCON; 188 __at(0x0116) volatile __BORCONbits_t BORCONbits; 189 190 __at(0x0117) __sfr FVRCON; 191 __at(0x0117) volatile __FVRCONbits_t FVRCONbits; 192 193 __at(0x0118) __sfr DAC1CON0; 194 __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits; 195 196 __at(0x0119) __sfr DAC1CON1; 197 __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits; 198 199 __at(0x011C) __sfr ZCD1CON; 200 __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits; 201 202 __at(0x018C) __sfr ANSELA; 203 __at(0x018C) volatile __ANSELAbits_t ANSELAbits; 204 205 __at(0x018E) __sfr ANSELC; 206 __at(0x018E) volatile __ANSELCbits_t ANSELCbits; 207 208 __at(0x0191) __sfr PMADR; 209 210 __at(0x0191) __sfr PMADRL; 211 212 __at(0x0192) __sfr PMADRH; 213 214 __at(0x0193) __sfr PMDAT; 215 216 __at(0x0193) __sfr PMDATL; 217 218 __at(0x0194) __sfr PMDATH; 219 220 __at(0x0195) __sfr PMCON1; 221 __at(0x0195) volatile __PMCON1bits_t PMCON1bits; 222 223 __at(0x0196) __sfr PMCON2; 224 225 __at(0x0197) __sfr VREGCON; 226 __at(0x0197) volatile __VREGCONbits_t VREGCONbits; 227 228 __at(0x0199) __sfr RC1REG; 229 230 __at(0x0199) __sfr RCREG; 231 232 __at(0x0199) __sfr RCREG1; 233 234 __at(0x019A) __sfr TX1REG; 235 236 __at(0x019A) __sfr TXREG; 237 238 __at(0x019A) __sfr TXREG1; 239 240 __at(0x019B) __sfr SP1BRG; 241 242 __at(0x019B) __sfr SP1BRGL; 243 244 __at(0x019B) __sfr SPBRG; 245 246 __at(0x019B) __sfr SPBRG1; 247 248 __at(0x019B) __sfr SPBRGL; 249 250 __at(0x019C) __sfr SP1BRGH; 251 252 __at(0x019C) __sfr SPBRGH; 253 254 __at(0x019C) __sfr SPBRGH1; 255 256 __at(0x019D) __sfr RC1STA; 257 __at(0x019D) volatile __RC1STAbits_t RC1STAbits; 258 259 __at(0x019D) __sfr RCSTA; 260 __at(0x019D) volatile __RCSTAbits_t RCSTAbits; 261 262 __at(0x019D) __sfr RCSTA1; 263 __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits; 264 265 __at(0x019E) __sfr TX1STA; 266 __at(0x019E) volatile __TX1STAbits_t TX1STAbits; 267 268 __at(0x019E) __sfr TXSTA; 269 __at(0x019E) volatile __TXSTAbits_t TXSTAbits; 270 271 __at(0x019E) __sfr TXSTA1; 272 __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits; 273 274 __at(0x019F) __sfr BAUD1CON; 275 __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits; 276 277 __at(0x019F) __sfr BAUDCON; 278 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits; 279 280 __at(0x019F) __sfr BAUDCON1; 281 __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits; 282 283 __at(0x019F) __sfr BAUDCTL; 284 __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits; 285 286 __at(0x019F) __sfr BAUDCTL1; 287 __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits; 288 289 __at(0x020C) __sfr WPUA; 290 __at(0x020C) volatile __WPUAbits_t WPUAbits; 291 292 __at(0x020E) __sfr WPUC; 293 __at(0x020E) volatile __WPUCbits_t WPUCbits; 294 295 __at(0x0211) __sfr SSP1BUF; 296 __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits; 297 298 __at(0x0211) __sfr SSPBUF; 299 __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits; 300 301 __at(0x0212) __sfr SSP1ADD; 302 __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits; 303 304 __at(0x0212) __sfr SSPADD; 305 __at(0x0212) volatile __SSPADDbits_t SSPADDbits; 306 307 __at(0x0213) __sfr SSP1MSK; 308 __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits; 309 310 __at(0x0213) __sfr SSPMSK; 311 __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits; 312 313 __at(0x0214) __sfr SSP1STAT; 314 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits; 315 316 __at(0x0214) __sfr SSPSTAT; 317 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits; 318 319 __at(0x0215) __sfr SSP1CON; 320 __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits; 321 322 __at(0x0215) __sfr SSP1CON1; 323 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits; 324 325 __at(0x0215) __sfr SSPCON; 326 __at(0x0215) volatile __SSPCONbits_t SSPCONbits; 327 328 __at(0x0215) __sfr SSPCON1; 329 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits; 330 331 __at(0x0216) __sfr SSP1CON2; 332 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits; 333 334 __at(0x0216) __sfr SSPCON2; 335 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits; 336 337 __at(0x0217) __sfr SSP1CON3; 338 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits; 339 340 __at(0x0217) __sfr SSPCON3; 341 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits; 342 343 __at(0x028C) __sfr ODCONA; 344 __at(0x028C) volatile __ODCONAbits_t ODCONAbits; 345 346 __at(0x028E) __sfr ODCONC; 347 __at(0x028E) volatile __ODCONCbits_t ODCONCbits; 348 349 __at(0x0291) __sfr CCPR1; 350 351 __at(0x0291) __sfr CCPR1L; 352 353 __at(0x0292) __sfr CCPR1H; 354 355 __at(0x0293) __sfr CCP1CON; 356 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits; 357 358 __at(0x0294) __sfr CCP1CAP; 359 __at(0x0294) volatile __CCP1CAPbits_t CCP1CAPbits; 360 361 __at(0x0298) __sfr CCPR2; 362 363 __at(0x0298) __sfr CCPR2L; 364 365 __at(0x0299) __sfr CCPR2H; 366 367 __at(0x029A) __sfr CCP2CON; 368 __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits; 369 370 __at(0x029B) __sfr CCP2CAP; 371 __at(0x029B) volatile __CCP2CAPbits_t CCP2CAPbits; 372 373 __at(0x029E) __sfr CCPTMRS; 374 __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits; 375 376 __at(0x030C) __sfr SLRCONA; 377 __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits; 378 379 __at(0x030E) __sfr SLRCONC; 380 __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits; 381 382 __at(0x038C) __sfr INLVLA; 383 __at(0x038C) volatile __INLVLAbits_t INLVLAbits; 384 385 __at(0x038E) __sfr INLVLC; 386 __at(0x038E) volatile __INLVLCbits_t INLVLCbits; 387 388 __at(0x0391) __sfr IOCAP; 389 __at(0x0391) volatile __IOCAPbits_t IOCAPbits; 390 391 __at(0x0392) __sfr IOCAN; 392 __at(0x0392) volatile __IOCANbits_t IOCANbits; 393 394 __at(0x0393) __sfr IOCAF; 395 __at(0x0393) volatile __IOCAFbits_t IOCAFbits; 396 397 __at(0x0397) __sfr IOCCP; 398 __at(0x0397) volatile __IOCCPbits_t IOCCPbits; 399 400 __at(0x0398) __sfr IOCCN; 401 __at(0x0398) volatile __IOCCNbits_t IOCCNbits; 402 403 __at(0x0399) __sfr IOCCF; 404 __at(0x0399) volatile __IOCCFbits_t IOCCFbits; 405 406 __at(0x040E) __sfr HIDRVC; 407 __at(0x040E) volatile __HIDRVCbits_t HIDRVCbits; 408 409 __at(0x0413) __sfr T4TMR; 410 411 __at(0x0413) __sfr TMR4; 412 413 __at(0x0414) __sfr PR4; 414 415 __at(0x0414) __sfr T4PR; 416 417 __at(0x0415) __sfr T4CON; 418 __at(0x0415) volatile __T4CONbits_t T4CONbits; 419 420 __at(0x0416) __sfr T4HLT; 421 __at(0x0416) volatile __T4HLTbits_t T4HLTbits; 422 423 __at(0x0417) __sfr T4CLKCON; 424 __at(0x0417) volatile __T4CLKCONbits_t T4CLKCONbits; 425 426 __at(0x0418) __sfr T4RST; 427 __at(0x0418) volatile __T4RSTbits_t T4RSTbits; 428 429 __at(0x041A) __sfr T6TMR; 430 431 __at(0x041A) __sfr TMR6; 432 433 __at(0x041B) __sfr PR6; 434 435 __at(0x041B) __sfr T6PR; 436 437 __at(0x041C) __sfr T6CON; 438 __at(0x041C) volatile __T6CONbits_t T6CONbits; 439 440 __at(0x041D) __sfr T6HLT; 441 __at(0x041D) volatile __T6HLTbits_t T6HLTbits; 442 443 __at(0x041E) __sfr T6CLKCON; 444 __at(0x041E) volatile __T6CLKCONbits_t T6CLKCONbits; 445 446 __at(0x041F) __sfr T6RST; 447 __at(0x041F) volatile __T6RSTbits_t T6RSTbits; 448 449 __at(0x0493) __sfr TMR3L; 450 451 __at(0x0494) __sfr TMR3H; 452 453 __at(0x0495) __sfr T3CON; 454 __at(0x0495) volatile __T3CONbits_t T3CONbits; 455 456 __at(0x0496) __sfr T3GCON; 457 __at(0x0496) volatile __T3GCONbits_t T3GCONbits; 458 459 __at(0x049A) __sfr TMR5L; 460 461 __at(0x049B) __sfr TMR5H; 462 463 __at(0x049C) __sfr T5CON; 464 __at(0x049C) volatile __T5CONbits_t T5CONbits; 465 466 __at(0x049D) __sfr T5GCON; 467 __at(0x049D) volatile __T5GCONbits_t T5GCONbits; 468 469 __at(0x058C) __sfr PID1SET; 470 471 __at(0x058C) __sfr PID1SETL; 472 __at(0x058C) volatile __PID1SETLbits_t PID1SETLbits; 473 474 __at(0x058D) __sfr PID1SETH; 475 __at(0x058D) volatile __PID1SETHbits_t PID1SETHbits; 476 477 __at(0x058E) __sfr PID1IN; 478 479 __at(0x058E) __sfr PID1INL; 480 __at(0x058E) volatile __PID1INLbits_t PID1INLbits; 481 482 __at(0x058F) __sfr PID1INH; 483 __at(0x058F) volatile __PID1INHbits_t PID1INHbits; 484 485 __at(0x0590) __sfr PID1K1; 486 487 __at(0x0590) __sfr PID1K1L; 488 __at(0x0590) volatile __PID1K1Lbits_t PID1K1Lbits; 489 490 __at(0x0591) __sfr PID1K1H; 491 __at(0x0591) volatile __PID1K1Hbits_t PID1K1Hbits; 492 493 __at(0x0592) __sfr PID1K2; 494 495 __at(0x0592) __sfr PID1K2L; 496 __at(0x0592) volatile __PID1K2Lbits_t PID1K2Lbits; 497 498 __at(0x0593) __sfr PID1K2H; 499 __at(0x0593) volatile __PID1K2Hbits_t PID1K2Hbits; 500 501 __at(0x0594) __sfr PID1K3; 502 503 __at(0x0594) __sfr PID1K3L; 504 __at(0x0594) volatile __PID1K3Lbits_t PID1K3Lbits; 505 506 __at(0x0595) __sfr PID1K3H; 507 __at(0x0595) volatile __PID1K3Hbits_t PID1K3Hbits; 508 509 __at(0x0596) __sfr PID1OUT; 510 511 __at(0x0596) __sfr PID1OUTLL; 512 __at(0x0596) volatile __PID1OUTLLbits_t PID1OUTLLbits; 513 514 __at(0x0597) __sfr PID1OUTLH; 515 __at(0x0597) volatile __PID1OUTLHbits_t PID1OUTLHbits; 516 517 __at(0x0598) __sfr PID1OUTHL; 518 __at(0x0598) volatile __PID1OUTHLbits_t PID1OUTHLbits; 519 520 __at(0x0599) __sfr PID1OUTHH; 521 __at(0x0599) volatile __PID1OUTHHbits_t PID1OUTHHbits; 522 523 __at(0x059A) __sfr PID1OUTU; 524 __at(0x059A) volatile __PID1OUTUbits_t PID1OUTUbits; 525 526 __at(0x059B) __sfr PID1Z1; 527 528 __at(0x059B) __sfr PID1Z1L; 529 __at(0x059B) volatile __PID1Z1Lbits_t PID1Z1Lbits; 530 531 __at(0x059C) __sfr PID1Z1H; 532 __at(0x059C) volatile __PID1Z1Hbits_t PID1Z1Hbits; 533 534 __at(0x059D) __sfr PID1Z1U; 535 __at(0x059D) volatile __PID1Z1Ubits_t PID1Z1Ubits; 536 537 __at(0x060C) __sfr PID1Z2; 538 539 __at(0x060C) __sfr PID1Z2L; 540 __at(0x060C) volatile __PID1Z2Lbits_t PID1Z2Lbits; 541 542 __at(0x060D) __sfr PID1Z2H; 543 __at(0x060D) volatile __PID1Z2Hbits_t PID1Z2Hbits; 544 545 __at(0x060E) __sfr PID1Z2U; 546 __at(0x060E) volatile __PID1Z2Ubits_t PID1Z2Ubits; 547 548 __at(0x060F) __sfr PID1ACC; 549 550 __at(0x060F) __sfr PID1ACCLL; 551 __at(0x060F) volatile __PID1ACCLLbits_t PID1ACCLLbits; 552 553 __at(0x0610) __sfr PID1ACCLH; 554 __at(0x0610) volatile __PID1ACCLHbits_t PID1ACCLHbits; 555 556 __at(0x0611) __sfr PID1ACCHL; 557 __at(0x0611) volatile __PID1ACCHLbits_t PID1ACCHLbits; 558 559 __at(0x0612) __sfr PID1ACCHH; 560 __at(0x0612) volatile __PID1ACCHHbits_t PID1ACCHHbits; 561 562 __at(0x0613) __sfr PID1ACCU; 563 __at(0x0613) volatile __PID1ACCUbits_t PID1ACCUbits; 564 565 __at(0x0614) __sfr PID1CON; 566 __at(0x0614) volatile __PID1CONbits_t PID1CONbits; 567 568 __at(0x0617) __sfr PWM3DCL; 569 __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits; 570 571 __at(0x0618) __sfr PWM3DCH; 572 __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits; 573 574 __at(0x0619) __sfr PWM3CON; 575 __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits; 576 577 __at(0x061A) __sfr PWM4DCL; 578 __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits; 579 580 __at(0x061B) __sfr PWM4DCH; 581 __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits; 582 583 __at(0x061C) __sfr PWM4CON; 584 __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits; 585 586 __at(0x0691) __sfr CWG1DBR; 587 __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits; 588 589 __at(0x0692) __sfr CWG1DBF; 590 __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits; 591 592 __at(0x0693) __sfr CWG1AS0; 593 __at(0x0693) volatile __CWG1AS0bits_t CWG1AS0bits; 594 595 __at(0x0694) __sfr CWG1AS1; 596 __at(0x0694) volatile __CWG1AS1bits_t CWG1AS1bits; 597 598 __at(0x0695) __sfr CWG1OCON0; 599 __at(0x0695) volatile __CWG1OCON0bits_t CWG1OCON0bits; 600 601 __at(0x0696) __sfr CWG1CON0; 602 __at(0x0696) volatile __CWG1CON0bits_t CWG1CON0bits; 603 604 __at(0x0697) __sfr CWG1CON1; 605 __at(0x0697) volatile __CWG1CON1bits_t CWG1CON1bits; 606 607 __at(0x0699) __sfr CWG1CLKCON; 608 __at(0x0699) volatile __CWG1CLKCONbits_t CWG1CLKCONbits; 609 610 __at(0x069A) __sfr CWG1ISM; 611 __at(0x069A) volatile __CWG1ISMbits_t CWG1ISMbits; 612 613 __at(0x0711) __sfr WDTCON0; 614 __at(0x0711) volatile __WDTCON0bits_t WDTCON0bits; 615 616 __at(0x0712) __sfr WDTCON1; 617 __at(0x0712) volatile __WDTCON1bits_t WDTCON1bits; 618 619 __at(0x0713) __sfr WDTPSL; 620 __at(0x0713) volatile __WDTPSLbits_t WDTPSLbits; 621 622 __at(0x0714) __sfr WDTPSH; 623 __at(0x0714) volatile __WDTPSHbits_t WDTPSHbits; 624 625 __at(0x0715) __sfr WDTTMR; 626 __at(0x0715) volatile __WDTTMRbits_t WDTTMRbits; 627 628 __at(0x0718) __sfr SCANLADR; 629 630 __at(0x0718) __sfr SCANLADRL; 631 __at(0x0718) volatile __SCANLADRLbits_t SCANLADRLbits; 632 633 __at(0x0719) __sfr SCANLADRH; 634 __at(0x0719) volatile __SCANLADRHbits_t SCANLADRHbits; 635 636 __at(0x071A) __sfr SCANHADR; 637 638 __at(0x071A) __sfr SCANHADRL; 639 __at(0x071A) volatile __SCANHADRLbits_t SCANHADRLbits; 640 641 __at(0x071B) __sfr SCANHADRH; 642 __at(0x071B) volatile __SCANHADRHbits_t SCANHADRHbits; 643 644 __at(0x071C) __sfr SCANCON0; 645 __at(0x071C) volatile __SCANCON0bits_t SCANCON0bits; 646 647 __at(0x071D) __sfr SCANTRIG; 648 __at(0x071D) volatile __SCANTRIGbits_t SCANTRIGbits; 649 650 __at(0x0791) __sfr CRCDAT; 651 652 __at(0x0791) __sfr CRCDATL; 653 __at(0x0791) volatile __CRCDATLbits_t CRCDATLbits; 654 655 __at(0x0792) __sfr CRCDATH; 656 __at(0x0792) volatile __CRCDATHbits_t CRCDATHbits; 657 658 __at(0x0793) __sfr CRCACC; 659 660 __at(0x0793) __sfr CRCACCL; 661 __at(0x0793) volatile __CRCACCLbits_t CRCACCLbits; 662 663 __at(0x0794) __sfr CRCACCH; 664 __at(0x0794) volatile __CRCACCHbits_t CRCACCHbits; 665 666 __at(0x0795) __sfr CRCSHIFT; 667 668 __at(0x0795) __sfr CRCSHIFTL; 669 __at(0x0795) volatile __CRCSHIFTLbits_t CRCSHIFTLbits; 670 671 __at(0x0796) __sfr CRCSHIFTH; 672 __at(0x0796) volatile __CRCSHIFTHbits_t CRCSHIFTHbits; 673 674 __at(0x0797) __sfr CRCXOR; 675 676 __at(0x0797) __sfr CRCXORL; 677 __at(0x0797) volatile __CRCXORLbits_t CRCXORLbits; 678 679 __at(0x0798) __sfr CRCXORH; 680 __at(0x0798) volatile __CRCXORHbits_t CRCXORHbits; 681 682 __at(0x0799) __sfr CRCCON0; 683 __at(0x0799) volatile __CRCCON0bits_t CRCCON0bits; 684 685 __at(0x079A) __sfr CRCCON1; 686 __at(0x079A) volatile __CRCCON1bits_t CRCCON1bits; 687 688 __at(0x080C) __sfr AT1RES; 689 690 __at(0x080C) __sfr AT1RESL; 691 __at(0x080C) volatile __AT1RESLbits_t AT1RESLbits; 692 693 __at(0x080D) __sfr AT1RESH; 694 __at(0x080D) volatile __AT1RESHbits_t AT1RESHbits; 695 696 __at(0x080E) __sfr AT1MISS; 697 698 __at(0x080E) __sfr AT1MISSL; 699 __at(0x080E) volatile __AT1MISSLbits_t AT1MISSLbits; 700 701 __at(0x080F) __sfr AT1MISSH; 702 __at(0x080F) volatile __AT1MISSHbits_t AT1MISSHbits; 703 704 __at(0x0810) __sfr AT1PER; 705 706 __at(0x0810) __sfr AT1PERL; 707 __at(0x0810) volatile __AT1PERLbits_t AT1PERLbits; 708 709 __at(0x0811) __sfr AT1PERH; 710 __at(0x0811) volatile __AT1PERHbits_t AT1PERHbits; 711 712 __at(0x0812) __sfr AT1PHS; 713 714 __at(0x0812) __sfr AT1PHSL; 715 __at(0x0812) volatile __AT1PHSLbits_t AT1PHSLbits; 716 717 __at(0x0813) __sfr AT1PHSH; 718 __at(0x0813) volatile __AT1PHSHbits_t AT1PHSHbits; 719 720 __at(0x0814) __sfr AT1CON0; 721 __at(0x0814) volatile __AT1CON0bits_t AT1CON0bits; 722 723 __at(0x0815) __sfr AT1CON1; 724 __at(0x0815) volatile __AT1CON1bits_t AT1CON1bits; 725 726 __at(0x0816) __sfr AT1IR0; 727 __at(0x0816) volatile __AT1IR0bits_t AT1IR0bits; 728 729 __at(0x0817) __sfr AT1IE0; 730 __at(0x0817) volatile __AT1IE0bits_t AT1IE0bits; 731 732 __at(0x0818) __sfr AT1IR1; 733 __at(0x0818) volatile __AT1IR1bits_t AT1IR1bits; 734 735 __at(0x0819) __sfr AT1IE1; 736 __at(0x0819) volatile __AT1IE1bits_t AT1IE1bits; 737 738 __at(0x081A) __sfr AT1STPT; 739 740 __at(0x081A) __sfr AT1STPTL; 741 __at(0x081A) volatile __AT1STPTLbits_t AT1STPTLbits; 742 743 __at(0x081B) __sfr AT1STPTH; 744 __at(0x081B) volatile __AT1STPTHbits_t AT1STPTHbits; 745 746 __at(0x081C) __sfr AT1ERR; 747 748 __at(0x081C) __sfr AT1ERRL; 749 __at(0x081C) volatile __AT1ERRLbits_t AT1ERRLbits; 750 751 __at(0x081D) __sfr AT1ERRH; 752 __at(0x081D) volatile __AT1ERRHbits_t AT1ERRHbits; 753 754 __at(0x088C) __sfr AT1CLK; 755 __at(0x088C) volatile __AT1CLKbits_t AT1CLKbits; 756 757 __at(0x088D) __sfr AT1SIG; 758 __at(0x088D) volatile __AT1SIGbits_t AT1SIGbits; 759 760 __at(0x088E) __sfr AT1CSEL1; 761 __at(0x088E) volatile __AT1CSEL1bits_t AT1CSEL1bits; 762 763 __at(0x088F) __sfr AT1CC1; 764 765 __at(0x088F) __sfr AT1CC1L; 766 __at(0x088F) volatile __AT1CC1Lbits_t AT1CC1Lbits; 767 768 __at(0x0890) __sfr AT1CC1H; 769 __at(0x0890) volatile __AT1CC1Hbits_t AT1CC1Hbits; 770 771 __at(0x0891) __sfr AT1CCON1; 772 __at(0x0891) volatile __AT1CCON1bits_t AT1CCON1bits; 773 774 __at(0x0892) __sfr AT1CSEL2; 775 __at(0x0892) volatile __AT1CSEL2bits_t AT1CSEL2bits; 776 777 __at(0x0893) __sfr AT1CC2; 778 779 __at(0x0893) __sfr AT1CC2L; 780 __at(0x0893) volatile __AT1CC2Lbits_t AT1CC2Lbits; 781 782 __at(0x0894) __sfr AT1CC2H; 783 __at(0x0894) volatile __AT1CC2Hbits_t AT1CC2Hbits; 784 785 __at(0x0895) __sfr AT1CCON2; 786 __at(0x0895) volatile __AT1CCON2bits_t AT1CCON2bits; 787 788 __at(0x0896) __sfr AT1CSEL3; 789 __at(0x0896) volatile __AT1CSEL3bits_t AT1CSEL3bits; 790 791 __at(0x0897) __sfr AT1CC3; 792 793 __at(0x0897) __sfr AT1CC3L; 794 __at(0x0897) volatile __AT1CC3Lbits_t AT1CC3Lbits; 795 796 __at(0x0898) __sfr AT1CC3H; 797 __at(0x0898) volatile __AT1CC3Hbits_t AT1CC3Hbits; 798 799 __at(0x0899) __sfr AT1CCON3; 800 __at(0x0899) volatile __AT1CCON3bits_t AT1CCON3bits; 801 802 __at(0x0D8C) __sfr SMT1TMR; 803 804 __at(0x0D8C) __sfr SMT1TMRL; 805 __at(0x0D8C) volatile __SMT1TMRLbits_t SMT1TMRLbits; 806 807 __at(0x0D8D) __sfr SMT1TMRH; 808 __at(0x0D8D) volatile __SMT1TMRHbits_t SMT1TMRHbits; 809 810 __at(0x0D8E) __sfr SMT1TMRU; 811 __at(0x0D8E) volatile __SMT1TMRUbits_t SMT1TMRUbits; 812 813 __at(0x0D8F) __sfr SMT1CPR; 814 815 __at(0x0D8F) __sfr SMT1CPRL; 816 __at(0x0D8F) volatile __SMT1CPRLbits_t SMT1CPRLbits; 817 818 __at(0x0D90) __sfr SMT1CPRH; 819 __at(0x0D90) volatile __SMT1CPRHbits_t SMT1CPRHbits; 820 821 __at(0x0D91) __sfr SMT1CPRU; 822 __at(0x0D91) volatile __SMT1CPRUbits_t SMT1CPRUbits; 823 824 __at(0x0D92) __sfr SMT1CPW; 825 826 __at(0x0D92) __sfr SMT1CPWL; 827 __at(0x0D92) volatile __SMT1CPWLbits_t SMT1CPWLbits; 828 829 __at(0x0D93) __sfr SMT1CPWH; 830 __at(0x0D93) volatile __SMT1CPWHbits_t SMT1CPWHbits; 831 832 __at(0x0D94) __sfr SMT1CPWU; 833 __at(0x0D94) volatile __SMT1CPWUbits_t SMT1CPWUbits; 834 835 __at(0x0D95) __sfr SMT1PR; 836 837 __at(0x0D95) __sfr SMT1PRL; 838 __at(0x0D95) volatile __SMT1PRLbits_t SMT1PRLbits; 839 840 __at(0x0D96) __sfr SMT1PRH; 841 __at(0x0D96) volatile __SMT1PRHbits_t SMT1PRHbits; 842 843 __at(0x0D97) __sfr SMT1PRU; 844 __at(0x0D97) volatile __SMT1PRUbits_t SMT1PRUbits; 845 846 __at(0x0D98) __sfr SMT1CON0; 847 __at(0x0D98) volatile __SMT1CON0bits_t SMT1CON0bits; 848 849 __at(0x0D99) __sfr SMT1CON1; 850 __at(0x0D99) volatile __SMT1CON1bits_t SMT1CON1bits; 851 852 __at(0x0D9A) __sfr SMT1STAT; 853 __at(0x0D9A) volatile __SMT1STATbits_t SMT1STATbits; 854 855 __at(0x0D9B) __sfr SMT1CLK; 856 __at(0x0D9B) volatile __SMT1CLKbits_t SMT1CLKbits; 857 858 __at(0x0D9C) __sfr SMT1SIG; 859 __at(0x0D9C) volatile __SMT1SIGbits_t SMT1SIGbits; 860 861 __at(0x0D9D) __sfr SMT1WIN; 862 __at(0x0D9D) volatile __SMT1WINbits_t SMT1WINbits; 863 864 __at(0x0D9E) __sfr SMT2TMR; 865 866 __at(0x0D9E) __sfr SMT2TMRL; 867 __at(0x0D9E) volatile __SMT2TMRLbits_t SMT2TMRLbits; 868 869 __at(0x0D9F) __sfr SMT2TMRH; 870 __at(0x0D9F) volatile __SMT2TMRHbits_t SMT2TMRHbits; 871 872 __at(0x0DA0) __sfr SMT2TMRU; 873 __at(0x0DA0) volatile __SMT2TMRUbits_t SMT2TMRUbits; 874 875 __at(0x0DA1) __sfr SMT2CPR; 876 877 __at(0x0DA1) __sfr SMT2CPRL; 878 __at(0x0DA1) volatile __SMT2CPRLbits_t SMT2CPRLbits; 879 880 __at(0x0DA2) __sfr SMT2CPRH; 881 __at(0x0DA2) volatile __SMT2CPRHbits_t SMT2CPRHbits; 882 883 __at(0x0DA3) __sfr SMT2CPRU; 884 __at(0x0DA3) volatile __SMT2CPRUbits_t SMT2CPRUbits; 885 886 __at(0x0DA4) __sfr SMT2CPW; 887 888 __at(0x0DA4) __sfr SMT2CPWL; 889 __at(0x0DA4) volatile __SMT2CPWLbits_t SMT2CPWLbits; 890 891 __at(0x0DA5) __sfr SMT2CPWH; 892 __at(0x0DA5) volatile __SMT2CPWHbits_t SMT2CPWHbits; 893 894 __at(0x0DA6) __sfr SMT2CPWU; 895 __at(0x0DA6) volatile __SMT2CPWUbits_t SMT2CPWUbits; 896 897 __at(0x0DA7) __sfr SMT2PR; 898 899 __at(0x0DA7) __sfr SMT2PRL; 900 __at(0x0DA7) volatile __SMT2PRLbits_t SMT2PRLbits; 901 902 __at(0x0DA8) __sfr SMT2PRH; 903 __at(0x0DA8) volatile __SMT2PRHbits_t SMT2PRHbits; 904 905 __at(0x0DA9) __sfr SMT2PRU; 906 __at(0x0DA9) volatile __SMT2PRUbits_t SMT2PRUbits; 907 908 __at(0x0DAA) __sfr SMT2CON0; 909 __at(0x0DAA) volatile __SMT2CON0bits_t SMT2CON0bits; 910 911 __at(0x0DAB) __sfr SMT2CON1; 912 __at(0x0DAB) volatile __SMT2CON1bits_t SMT2CON1bits; 913 914 __at(0x0DAC) __sfr SMT2STAT; 915 __at(0x0DAC) volatile __SMT2STATbits_t SMT2STATbits; 916 917 __at(0x0DAD) __sfr SMT2CLK; 918 __at(0x0DAD) volatile __SMT2CLKbits_t SMT2CLKbits; 919 920 __at(0x0DAE) __sfr SMT2SIG; 921 __at(0x0DAE) volatile __SMT2SIGbits_t SMT2SIGbits; 922 923 __at(0x0DAF) __sfr SMT2WIN; 924 __at(0x0DAF) volatile __SMT2WINbits_t SMT2WINbits; 925 926 __at(0x0E0F) __sfr PPSLOCK; 927 __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits; 928 929 __at(0x0E10) __sfr INTPPS; 930 __at(0x0E10) volatile __INTPPSbits_t INTPPSbits; 931 932 __at(0x0E11) __sfr T0CKIPPS; 933 __at(0x0E11) volatile __T0CKIPPSbits_t T0CKIPPSbits; 934 935 __at(0x0E12) __sfr T1CKIPPS; 936 __at(0x0E12) volatile __T1CKIPPSbits_t T1CKIPPSbits; 937 938 __at(0x0E13) __sfr T1GPPS; 939 __at(0x0E13) volatile __T1GPPSbits_t T1GPPSbits; 940 941 __at(0x0E14) __sfr CCP1PPS; 942 __at(0x0E14) volatile __CCP1PPSbits_t CCP1PPSbits; 943 944 __at(0x0E15) __sfr CCP2PPS; 945 __at(0x0E15) volatile __CCP2PPSbits_t CCP2PPSbits; 946 947 __at(0x0E16) __sfr ATINPPS; 948 __at(0x0E16) volatile __ATINPPSbits_t ATINPPSbits; 949 950 __at(0x0E17) __sfr CWGINPPS; 951 __at(0x0E17) volatile __CWGINPPSbits_t CWGINPPSbits; 952 953 __at(0x0E18) __sfr T2PPS; 954 __at(0x0E18) volatile __T2PPSbits_t T2PPSbits; 955 956 __at(0x0E19) __sfr T3CKIPPS; 957 __at(0x0E19) volatile __T3CKIPPSbits_t T3CKIPPSbits; 958 959 __at(0x0E1A) __sfr T3GPPS; 960 __at(0x0E1A) volatile __T3GPPSbits_t T3GPPSbits; 961 962 __at(0x0E1B) __sfr T4PPS; 963 __at(0x0E1B) volatile __T4PPSbits_t T4PPSbits; 964 965 __at(0x0E1C) __sfr T5CKIPPS; 966 __at(0x0E1C) volatile __T5CKIPPSbits_t T5CKIPPSbits; 967 968 __at(0x0E1D) __sfr T5GPPS; 969 __at(0x0E1D) volatile __T5GPPSbits_t T5GPPSbits; 970 971 __at(0x0E1E) __sfr T6PPS; 972 __at(0x0E1E) volatile __T6PPSbits_t T6PPSbits; 973 974 __at(0x0E1F) __sfr ATCC1PPS; 975 __at(0x0E1F) volatile __ATCC1PPSbits_t ATCC1PPSbits; 976 977 __at(0x0E20) __sfr SSPCLKPPS; 978 __at(0x0E20) volatile __SSPCLKPPSbits_t SSPCLKPPSbits; 979 980 __at(0x0E21) __sfr SSPDATPPS; 981 __at(0x0E21) volatile __SSPDATPPSbits_t SSPDATPPSbits; 982 983 __at(0x0E22) __sfr SSPSSPPS; 984 __at(0x0E22) volatile __SSPSSPPSbits_t SSPSSPPSbits; 985 986 __at(0x0E23) __sfr ATCC2PPS; 987 __at(0x0E23) volatile __ATCC2PPSbits_t ATCC2PPSbits; 988 989 __at(0x0E24) __sfr RXPPS; 990 __at(0x0E24) volatile __RXPPSbits_t RXPPSbits; 991 992 __at(0x0E25) __sfr CKPPS; 993 __at(0x0E25) volatile __CKPPSbits_t CKPPSbits; 994 995 __at(0x0E26) __sfr SMT1SIGPPS; 996 __at(0x0E26) volatile __SMT1SIGPPSbits_t SMT1SIGPPSbits; 997 998 __at(0x0E27) __sfr SMT1WINPPS; 999 __at(0x0E27) volatile __SMT1WINPPSbits_t SMT1WINPPSbits; 1000 1001 __at(0x0E28) __sfr CLCIN0PPS; 1002 __at(0x0E28) volatile __CLCIN0PPSbits_t CLCIN0PPSbits; 1003 1004 __at(0x0E29) __sfr CLCIN1PPS; 1005 __at(0x0E29) volatile __CLCIN1PPSbits_t CLCIN1PPSbits; 1006 1007 __at(0x0E2A) __sfr CLCIN2PPS; 1008 __at(0x0E2A) volatile __CLCIN2PPSbits_t CLCIN2PPSbits; 1009 1010 __at(0x0E2B) __sfr CLCIN3PPS; 1011 __at(0x0E2B) volatile __CLCIN3PPSbits_t CLCIN3PPSbits; 1012 1013 __at(0x0E2C) __sfr SMT2SIGPPS; 1014 __at(0x0E2C) volatile __SMT2SIGPPSbits_t SMT2SIGPPSbits; 1015 1016 __at(0x0E2D) __sfr SMT2WINPPS; 1017 __at(0x0E2D) volatile __SMT2WINPPSbits_t SMT2WINPPSbits; 1018 1019 __at(0x0E2E) __sfr ATCC3PPS; 1020 __at(0x0E2E) volatile __ATCC3PPSbits_t ATCC3PPSbits; 1021 1022 __at(0x0E90) __sfr RA0PPS; 1023 __at(0x0E90) volatile __RA0PPSbits_t RA0PPSbits; 1024 1025 __at(0x0E91) __sfr RA1PPS; 1026 __at(0x0E91) volatile __RA1PPSbits_t RA1PPSbits; 1027 1028 __at(0x0E92) __sfr RA2PPS; 1029 __at(0x0E92) volatile __RA2PPSbits_t RA2PPSbits; 1030 1031 __at(0x0E94) __sfr RA4PPS; 1032 __at(0x0E94) volatile __RA4PPSbits_t RA4PPSbits; 1033 1034 __at(0x0E95) __sfr RA5PPS; 1035 __at(0x0E95) volatile __RA5PPSbits_t RA5PPSbits; 1036 1037 __at(0x0EA0) __sfr RC0PPS; 1038 __at(0x0EA0) volatile __RC0PPSbits_t RC0PPSbits; 1039 1040 __at(0x0EA1) __sfr RC1PPS; 1041 __at(0x0EA1) volatile __RC1PPSbits_t RC1PPSbits; 1042 1043 __at(0x0EA2) __sfr RC2PPS; 1044 __at(0x0EA2) volatile __RC2PPSbits_t RC2PPSbits; 1045 1046 __at(0x0EA3) __sfr RC3PPS; 1047 __at(0x0EA3) volatile __RC3PPSbits_t RC3PPSbits; 1048 1049 __at(0x0EA4) __sfr RC4PPS; 1050 __at(0x0EA4) volatile __RC4PPSbits_t RC4PPSbits; 1051 1052 __at(0x0EA5) __sfr RC5PPS; 1053 __at(0x0EA5) volatile __RC5PPSbits_t RC5PPSbits; 1054 1055 __at(0x0F0F) __sfr CLCDATA; 1056 __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits; 1057 1058 __at(0x0F10) __sfr CLC1CON; 1059 __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits; 1060 1061 __at(0x0F11) __sfr CLC1POL; 1062 __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits; 1063 1064 __at(0x0F12) __sfr CLC1SEL0; 1065 __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits; 1066 1067 __at(0x0F13) __sfr CLC1SEL1; 1068 __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits; 1069 1070 __at(0x0F14) __sfr CLC1SEL2; 1071 __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits; 1072 1073 __at(0x0F15) __sfr CLC1SEL3; 1074 __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits; 1075 1076 __at(0x0F16) __sfr CLC1GLS0; 1077 __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits; 1078 1079 __at(0x0F17) __sfr CLC1GLS1; 1080 __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits; 1081 1082 __at(0x0F18) __sfr CLC1GLS2; 1083 __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits; 1084 1085 __at(0x0F19) __sfr CLC1GLS3; 1086 __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits; 1087 1088 __at(0x0F1A) __sfr CLC2CON; 1089 __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits; 1090 1091 __at(0x0F1B) __sfr CLC2POL; 1092 __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits; 1093 1094 __at(0x0F1C) __sfr CLC2SEL0; 1095 __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits; 1096 1097 __at(0x0F1D) __sfr CLC2SEL1; 1098 __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits; 1099 1100 __at(0x0F1E) __sfr CLC2SEL2; 1101 __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits; 1102 1103 __at(0x0F1F) __sfr CLC2SEL3; 1104 __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits; 1105 1106 __at(0x0F20) __sfr CLC2GLS0; 1107 __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits; 1108 1109 __at(0x0F21) __sfr CLC2GLS1; 1110 __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits; 1111 1112 __at(0x0F22) __sfr CLC2GLS2; 1113 __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits; 1114 1115 __at(0x0F23) __sfr CLC2GLS3; 1116 __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits; 1117 1118 __at(0x0FE4) __sfr STATUS_SHAD; 1119 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; 1120 1121 __at(0x0FE5) __sfr WREG_SHAD; 1122 1123 __at(0x0FE6) __sfr BSR_SHAD; 1124 1125 __at(0x0FE7) __sfr PCLATH_SHAD; 1126 1127 __at(0x0FE8) __sfr FSR0L_SHAD; 1128 1129 __at(0x0FE9) __sfr FSR0H_SHAD; 1130 1131 __at(0x0FEA) __sfr FSR1L_SHAD; 1132 1133 __at(0x0FEB) __sfr FSR1H_SHAD; 1134 1135 __at(0x0FED) __sfr STKPTR; 1136 1137 __at(0x0FEE) __sfr TOSL; 1138 1139 __at(0x0FEF) __sfr TOSH; 1140