1 /* 2 * This definitions of the PIC18LF13K50 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:53 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #include <pic18lf13k50.h> 26 27 //============================================================================== 28 29 __at(0x0F53) __sfr UEP0; 30 __at(0x0F53) volatile __UEP0bits_t UEP0bits; 31 32 __at(0x0F54) __sfr UEP1; 33 __at(0x0F54) volatile __UEP1bits_t UEP1bits; 34 35 __at(0x0F55) __sfr UEP2; 36 __at(0x0F55) volatile __UEP2bits_t UEP2bits; 37 38 __at(0x0F56) __sfr UEP3; 39 __at(0x0F56) volatile __UEP3bits_t UEP3bits; 40 41 __at(0x0F57) __sfr UEP4; 42 __at(0x0F57) volatile __UEP4bits_t UEP4bits; 43 44 __at(0x0F58) __sfr UEP5; 45 __at(0x0F58) volatile __UEP5bits_t UEP5bits; 46 47 __at(0x0F59) __sfr UEP6; 48 __at(0x0F59) volatile __UEP6bits_t UEP6bits; 49 50 __at(0x0F5A) __sfr UEP7; 51 __at(0x0F5A) volatile __UEP7bits_t UEP7bits; 52 53 __at(0x0F5B) __sfr UEIE; 54 __at(0x0F5B) volatile __UEIEbits_t UEIEbits; 55 56 __at(0x0F5C) __sfr UADDR; 57 __at(0x0F5C) volatile __UADDRbits_t UADDRbits; 58 59 __at(0x0F5D) __sfr UFRML; 60 __at(0x0F5D) volatile __UFRMLbits_t UFRMLbits; 61 62 __at(0x0F5E) __sfr UFRMH; 63 __at(0x0F5E) volatile __UFRMHbits_t UFRMHbits; 64 65 __at(0x0F5F) __sfr UEIR; 66 __at(0x0F5F) volatile __UEIRbits_t UEIRbits; 67 68 __at(0x0F60) __sfr UIE; 69 __at(0x0F60) volatile __UIEbits_t UIEbits; 70 71 __at(0x0F61) __sfr UCFG; 72 __at(0x0F61) volatile __UCFGbits_t UCFGbits; 73 74 __at(0x0F62) __sfr UIR; 75 __at(0x0F62) volatile __UIRbits_t UIRbits; 76 77 __at(0x0F63) __sfr USTAT; 78 __at(0x0F63) volatile __USTATbits_t USTATbits; 79 80 __at(0x0F64) __sfr UCON; 81 __at(0x0F64) volatile __UCONbits_t UCONbits; 82 83 __at(0x0F68) __sfr SRCON0; 84 __at(0x0F68) volatile __SRCON0bits_t SRCON0bits; 85 86 __at(0x0F69) __sfr SRCON1; 87 __at(0x0F69) volatile __SRCON1bits_t SRCON1bits; 88 89 __at(0x0F6B) __sfr CM2CON0; 90 __at(0x0F6B) volatile __CM2CON0bits_t CM2CON0bits; 91 92 __at(0x0F6C) __sfr CM2CON1; 93 __at(0x0F6C) volatile __CM2CON1bits_t CM2CON1bits; 94 95 __at(0x0F6D) __sfr CM1CON0; 96 __at(0x0F6D) volatile __CM1CON0bits_t CM1CON0bits; 97 98 __at(0x0F6F) __sfr SSPMSK; 99 __at(0x0F6F) volatile __SSPMSKbits_t SSPMSKbits; 100 101 __at(0x0F76) __sfr SLRCON; 102 __at(0x0F76) volatile __SLRCONbits_t SLRCONbits; 103 104 __at(0x0F77) __sfr WPUA; 105 __at(0x0F77) volatile __WPUAbits_t WPUAbits; 106 107 __at(0x0F78) __sfr WPUB; 108 __at(0x0F78) volatile __WPUBbits_t WPUBbits; 109 110 __at(0x0F79) __sfr IOCA; 111 __at(0x0F79) volatile __IOCAbits_t IOCAbits; 112 113 __at(0x0F7A) __sfr IOCB; 114 __at(0x0F7A) volatile __IOCBbits_t IOCBbits; 115 116 __at(0x0F7E) __sfr ANSEL; 117 __at(0x0F7E) volatile __ANSELbits_t ANSELbits; 118 119 __at(0x0F7F) __sfr ANSELH; 120 __at(0x0F7F) volatile __ANSELHbits_t ANSELHbits; 121 122 __at(0x0F80) __sfr PORTA; 123 __at(0x0F80) volatile __PORTAbits_t PORTAbits; 124 125 __at(0x0F81) __sfr PORTB; 126 __at(0x0F81) volatile __PORTBbits_t PORTBbits; 127 128 __at(0x0F82) __sfr PORTC; 129 __at(0x0F82) volatile __PORTCbits_t PORTCbits; 130 131 __at(0x0F89) __sfr LATA; 132 __at(0x0F89) volatile __LATAbits_t LATAbits; 133 134 __at(0x0F8A) __sfr LATB; 135 __at(0x0F8A) volatile __LATBbits_t LATBbits; 136 137 __at(0x0F8B) __sfr LATC; 138 __at(0x0F8B) volatile __LATCbits_t LATCbits; 139 140 __at(0x0F92) __sfr DDRA; 141 __at(0x0F92) volatile __DDRAbits_t DDRAbits; 142 143 __at(0x0F92) __sfr TRISA; 144 __at(0x0F92) volatile __TRISAbits_t TRISAbits; 145 146 __at(0x0F93) __sfr DDRB; 147 __at(0x0F93) volatile __DDRBbits_t DDRBbits; 148 149 __at(0x0F93) __sfr TRISB; 150 __at(0x0F93) volatile __TRISBbits_t TRISBbits; 151 152 __at(0x0F94) __sfr DDRC; 153 __at(0x0F94) volatile __DDRCbits_t DDRCbits; 154 155 __at(0x0F94) __sfr TRISC; 156 __at(0x0F94) volatile __TRISCbits_t TRISCbits; 157 158 __at(0x0F9B) __sfr OSCTUNE; 159 __at(0x0F9B) volatile __OSCTUNEbits_t OSCTUNEbits; 160 161 __at(0x0F9D) __sfr PIE1; 162 __at(0x0F9D) volatile __PIE1bits_t PIE1bits; 163 164 __at(0x0F9E) __sfr PIR1; 165 __at(0x0F9E) volatile __PIR1bits_t PIR1bits; 166 167 __at(0x0F9F) __sfr IPR1; 168 __at(0x0F9F) volatile __IPR1bits_t IPR1bits; 169 170 __at(0x0FA0) __sfr PIE2; 171 __at(0x0FA0) volatile __PIE2bits_t PIE2bits; 172 173 __at(0x0FA1) __sfr PIR2; 174 __at(0x0FA1) volatile __PIR2bits_t PIR2bits; 175 176 __at(0x0FA2) __sfr IPR2; 177 __at(0x0FA2) volatile __IPR2bits_t IPR2bits; 178 179 __at(0x0FA6) __sfr EECON1; 180 __at(0x0FA6) volatile __EECON1bits_t EECON1bits; 181 182 __at(0x0FA7) __sfr EECON2; 183 184 __at(0x0FA8) __sfr EEDATA; 185 186 __at(0x0FA9) __sfr EEADR; 187 __at(0x0FA9) volatile __EEADRbits_t EEADRbits; 188 189 __at(0x0FAB) __sfr RCSTA; 190 __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits; 191 192 __at(0x0FAC) __sfr TXSTA; 193 __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits; 194 195 __at(0x0FAD) __sfr TXREG; 196 197 __at(0x0FAE) __sfr RCREG; 198 199 __at(0x0FAF) __sfr SPBRG; 200 201 __at(0x0FB0) __sfr SPBRGH; 202 203 __at(0x0FB1) __sfr T3CON; 204 __at(0x0FB1) volatile __T3CONbits_t T3CONbits; 205 206 __at(0x0FB2) __sfr TMR3; 207 208 __at(0x0FB2) __sfr TMR3L; 209 210 __at(0x0FB3) __sfr TMR3H; 211 212 __at(0x0FB6) __sfr ECCP1AS; 213 __at(0x0FB6) volatile __ECCP1ASbits_t ECCP1ASbits; 214 215 __at(0x0FB7) __sfr PWM1CON; 216 __at(0x0FB7) volatile __PWM1CONbits_t PWM1CONbits; 217 218 __at(0x0FB8) __sfr BAUDCON; 219 __at(0x0FB8) volatile __BAUDCONbits_t BAUDCONbits; 220 221 __at(0x0FB8) __sfr BAUDCTL; 222 __at(0x0FB8) volatile __BAUDCTLbits_t BAUDCTLbits; 223 224 __at(0x0FB9) __sfr PSTRCON; 225 __at(0x0FB9) volatile __PSTRCONbits_t PSTRCONbits; 226 227 __at(0x0FBA) __sfr REFCON0; 228 __at(0x0FBA) volatile __REFCON0bits_t REFCON0bits; 229 230 __at(0x0FBA) __sfr VREFCON0; 231 __at(0x0FBA) volatile __VREFCON0bits_t VREFCON0bits; 232 233 __at(0x0FBB) __sfr REFCON1; 234 __at(0x0FBB) volatile __REFCON1bits_t REFCON1bits; 235 236 __at(0x0FBB) __sfr VREFCON1; 237 __at(0x0FBB) volatile __VREFCON1bits_t VREFCON1bits; 238 239 __at(0x0FBC) __sfr REFCON2; 240 __at(0x0FBC) volatile __REFCON2bits_t REFCON2bits; 241 242 __at(0x0FBC) __sfr VREFCON2; 243 __at(0x0FBC) volatile __VREFCON2bits_t VREFCON2bits; 244 245 __at(0x0FBD) __sfr CCP1CON; 246 __at(0x0FBD) volatile __CCP1CONbits_t CCP1CONbits; 247 248 __at(0x0FBE) __sfr CCPR1; 249 250 __at(0x0FBE) __sfr CCPR1L; 251 252 __at(0x0FBF) __sfr CCPR1H; 253 254 __at(0x0FC0) __sfr ADCON2; 255 __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits; 256 257 __at(0x0FC1) __sfr ADCON1; 258 __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits; 259 260 __at(0x0FC2) __sfr ADCON0; 261 __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits; 262 263 __at(0x0FC3) __sfr ADRES; 264 265 __at(0x0FC3) __sfr ADRESL; 266 267 __at(0x0FC4) __sfr ADRESH; 268 269 __at(0x0FC5) __sfr SSPCON2; 270 __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits; 271 272 __at(0x0FC6) __sfr SSPCON1; 273 __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits; 274 275 __at(0x0FC7) __sfr SSPSTAT; 276 __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits; 277 278 __at(0x0FC8) __sfr SSPADD; 279 280 __at(0x0FC9) __sfr SSPBUF; 281 282 __at(0x0FCA) __sfr T2CON; 283 __at(0x0FCA) volatile __T2CONbits_t T2CONbits; 284 285 __at(0x0FCB) __sfr PR2; 286 287 __at(0x0FCC) __sfr TMR2; 288 289 __at(0x0FCD) __sfr T1CON; 290 __at(0x0FCD) volatile __T1CONbits_t T1CONbits; 291 292 __at(0x0FCE) __sfr TMR1; 293 294 __at(0x0FCE) __sfr TMR1L; 295 296 __at(0x0FCF) __sfr TMR1H; 297 298 __at(0x0FD0) __sfr RCON; 299 __at(0x0FD0) volatile __RCONbits_t RCONbits; 300 301 __at(0x0FD1) __sfr WDTCON; 302 __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits; 303 304 __at(0x0FD2) __sfr OSCCON2; 305 __at(0x0FD2) volatile __OSCCON2bits_t OSCCON2bits; 306 307 __at(0x0FD3) __sfr OSCCON; 308 __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits; 309 310 __at(0x0FD5) __sfr T0CON; 311 __at(0x0FD5) volatile __T0CONbits_t T0CONbits; 312 313 __at(0x0FD6) __sfr TMR0; 314 315 __at(0x0FD6) __sfr TMR0L; 316 317 __at(0x0FD7) __sfr TMR0H; 318 319 __at(0x0FD8) __sfr STATUS; 320 __at(0x0FD8) volatile __STATUSbits_t STATUSbits; 321 322 __at(0x0FD9) __sfr FSR2L; 323 324 __at(0x0FDA) __sfr FSR2H; 325 326 __at(0x0FDB) __sfr PLUSW2; 327 328 __at(0x0FDC) __sfr PREINC2; 329 330 __at(0x0FDD) __sfr POSTDEC2; 331 332 __at(0x0FDE) __sfr POSTINC2; 333 334 __at(0x0FDF) __sfr INDF2; 335 336 __at(0x0FE0) __sfr BSR; 337 338 __at(0x0FE1) __sfr FSR1L; 339 340 __at(0x0FE2) __sfr FSR1H; 341 342 __at(0x0FE3) __sfr PLUSW1; 343 344 __at(0x0FE4) __sfr PREINC1; 345 346 __at(0x0FE5) __sfr POSTDEC1; 347 348 __at(0x0FE6) __sfr POSTINC1; 349 350 __at(0x0FE7) __sfr INDF1; 351 352 __at(0x0FE8) __sfr WREG; 353 354 __at(0x0FE9) __sfr FSR0L; 355 356 __at(0x0FEA) __sfr FSR0H; 357 358 __at(0x0FEB) __sfr PLUSW0; 359 360 __at(0x0FEC) __sfr PREINC0; 361 362 __at(0x0FED) __sfr POSTDEC0; 363 364 __at(0x0FEE) __sfr POSTINC0; 365 366 __at(0x0FEF) __sfr INDF0; 367 368 __at(0x0FF0) __sfr INTCON3; 369 __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits; 370 371 __at(0x0FF1) __sfr INTCON2; 372 __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits; 373 374 __at(0x0FF2) __sfr INTCON; 375 __at(0x0FF2) volatile __INTCONbits_t INTCONbits; 376 377 __at(0x0FF3) __sfr PROD; 378 379 __at(0x0FF3) __sfr PRODL; 380 381 __at(0x0FF4) __sfr PRODH; 382 383 __at(0x0FF5) __sfr TABLAT; 384 385 __at(0x0FF6) __sfr TBLPTR; 386 387 __at(0x0FF6) __sfr TBLPTRL; 388 389 __at(0x0FF7) __sfr TBLPTRH; 390 391 __at(0x0FF8) __sfr TBLPTRU; 392 393 __at(0x0FF9) __sfr PC; 394 395 __at(0x0FF9) __sfr PCL; 396 397 __at(0x0FFA) __sfr PCLATH; 398 399 __at(0x0FFB) __sfr PCLATU; 400 401 __at(0x0FFC) __sfr STKPTR; 402 __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits; 403 404 __at(0x0FFD) __sfr TOS; 405 406 __at(0x0FFD) __sfr TOSL; 407 408 __at(0x0FFE) __sfr TOSH; 409 410 __at(0x0FFF) __sfr TOSU; 411