1 /* 2 * This definitions of the PIC18LF44J11 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:56 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #include <pic18lf44j11.h> 26 27 //============================================================================== 28 29 __at(0x0EC6) __sfr RPOR0; 30 31 __at(0x0EC7) __sfr RPOR1; 32 33 __at(0x0EC8) __sfr RPOR2; 34 35 __at(0x0EC9) __sfr RPOR3; 36 37 __at(0x0ECA) __sfr RPOR4; 38 39 __at(0x0ECB) __sfr RPOR5; 40 41 __at(0x0ECC) __sfr RPOR6; 42 43 __at(0x0ECD) __sfr RPOR7; 44 45 __at(0x0ECE) __sfr RPOR8; 46 47 __at(0x0ECF) __sfr RPOR9; 48 49 __at(0x0ED0) __sfr RPOR10; 50 51 __at(0x0ED1) __sfr RPOR11; 52 53 __at(0x0ED2) __sfr RPOR12; 54 55 __at(0x0ED3) __sfr RPOR13; 56 57 __at(0x0ED4) __sfr RPOR14; 58 59 __at(0x0ED5) __sfr RPOR15; 60 61 __at(0x0ED6) __sfr RPOR16; 62 63 __at(0x0ED7) __sfr RPOR17; 64 65 __at(0x0ED8) __sfr RPOR18; 66 67 __at(0x0ED9) __sfr RPOR19; 68 69 __at(0x0EDA) __sfr RPOR20; 70 71 __at(0x0EDB) __sfr RPOR21; 72 73 __at(0x0EDC) __sfr RPOR22; 74 75 __at(0x0EDD) __sfr RPOR23; 76 77 __at(0x0EDE) __sfr RPOR24; 78 79 __at(0x0EE7) __sfr RPINR1; 80 81 __at(0x0EE8) __sfr RPINR2; 82 83 __at(0x0EE9) __sfr RPINR3; 84 85 __at(0x0EEA) __sfr RPINR4; 86 87 __at(0x0EEC) __sfr RPINR6; 88 89 __at(0x0EED) __sfr RPINR7; 90 91 __at(0x0EEE) __sfr RPINR8; 92 93 __at(0x0EF2) __sfr RPINR12; 94 95 __at(0x0EF3) __sfr RPINR13; 96 97 __at(0x0EF6) __sfr RPINR16; 98 99 __at(0x0EF7) __sfr RPINR17; 100 101 __at(0x0EFB) __sfr RPINR21; 102 103 __at(0x0EFC) __sfr RPINR22; 104 105 __at(0x0EFD) __sfr RPINR23; 106 107 __at(0x0EFE) __sfr RPINR24; 108 109 __at(0x0EFF) __sfr PPSCON; 110 __at(0x0EFF) volatile __PPSCONbits_t PPSCONbits; 111 112 __at(0x0F3C) __sfr PADCFG1; 113 __at(0x0F3C) volatile __PADCFG1bits_t PADCFG1bits; 114 115 __at(0x0F3D) __sfr REFOCON; 116 __at(0x0F3D) volatile __REFOCONbits_t REFOCONbits; 117 118 __at(0x0F3E) __sfr RTCCAL; 119 __at(0x0F3E) volatile __RTCCALbits_t RTCCALbits; 120 121 __at(0x0F3F) __sfr RTCCFG; 122 __at(0x0F3F) volatile __RTCCFGbits_t RTCCFGbits; 123 124 __at(0x0F40) __sfr ODCON3; 125 __at(0x0F40) volatile __ODCON3bits_t ODCON3bits; 126 127 __at(0x0F41) __sfr ODCON2; 128 __at(0x0F41) volatile __ODCON2bits_t ODCON2bits; 129 130 __at(0x0F42) __sfr ODCON1; 131 __at(0x0F42) volatile __ODCON1bits_t ODCON1bits; 132 133 __at(0x0F48) __sfr ANCON0; 134 __at(0x0F48) volatile __ANCON0bits_t ANCON0bits; 135 136 __at(0x0F49) __sfr ANCON1; 137 __at(0x0F49) volatile __ANCON1bits_t ANCON1bits; 138 139 __at(0x0F4A) __sfr DSWAKEL; 140 __at(0x0F4A) volatile __DSWAKELbits_t DSWAKELbits; 141 142 __at(0x0F4B) __sfr DSWAKEH; 143 __at(0x0F4B) volatile __DSWAKEHbits_t DSWAKEHbits; 144 145 __at(0x0F4C) __sfr DSCONL; 146 __at(0x0F4C) volatile __DSCONLbits_t DSCONLbits; 147 148 __at(0x0F4D) __sfr DSCONH; 149 __at(0x0F4D) volatile __DSCONHbits_t DSCONHbits; 150 151 __at(0x0F4E) __sfr DSGPR0; 152 153 __at(0x0F4F) __sfr DSGPR1; 154 155 __at(0x0F52) __sfr TCLKCON; 156 __at(0x0F52) volatile __TCLKCONbits_t TCLKCONbits; 157 158 __at(0x0F53) __sfr CVRCON; 159 __at(0x0F53) volatile __CVRCONbits_t CVRCONbits; 160 161 __at(0x0F54) __sfr PMSTATL; 162 __at(0x0F54) volatile __PMSTATLbits_t PMSTATLbits; 163 164 __at(0x0F55) __sfr PMSTATH; 165 __at(0x0F55) volatile __PMSTATHbits_t PMSTATHbits; 166 167 __at(0x0F56) __sfr PMEL; 168 __at(0x0F56) volatile __PMELbits_t PMELbits; 169 170 __at(0x0F57) __sfr PMEH; 171 __at(0x0F57) volatile __PMEHbits_t PMEHbits; 172 173 __at(0x0F58) __sfr PMDIN2L; 174 175 __at(0x0F59) __sfr PMDIN2H; 176 177 __at(0x0F5A) __sfr PMDOUT2L; 178 179 __at(0x0F5B) __sfr PMDOUT2H; 180 181 __at(0x0F5C) __sfr PMMODEL; 182 __at(0x0F5C) volatile __PMMODELbits_t PMMODELbits; 183 184 __at(0x0F5D) __sfr PMMODEH; 185 __at(0x0F5D) volatile __PMMODEHbits_t PMMODEHbits; 186 187 __at(0x0F5E) __sfr PMCONL; 188 __at(0x0F5E) volatile __PMCONLbits_t PMCONLbits; 189 190 __at(0x0F5F) __sfr PMCONH; 191 __at(0x0F5F) volatile __PMCONHbits_t PMCONHbits; 192 193 __at(0x0F66) __sfr DMABCH; 194 195 __at(0x0F67) __sfr DMABCL; 196 197 __at(0x0F68) __sfr RXADDRH; 198 199 __at(0x0F69) __sfr RXADDRL; 200 201 __at(0x0F6A) __sfr TXADDRH; 202 203 __at(0x0F6B) __sfr TXADDRL; 204 205 __at(0x0F6C) __sfr PMDIN1L; 206 207 __at(0x0F6D) __sfr PMDIN1H; 208 209 __at(0x0F6E) __sfr PMADDRL; 210 211 __at(0x0F6E) __sfr PMDOUT1L; 212 213 __at(0x0F6F) __sfr PMADDRH; 214 __at(0x0F6F) volatile __PMADDRHbits_t PMADDRHbits; 215 216 __at(0x0F6F) __sfr PMDOUT1H; 217 218 __at(0x0F70) __sfr CMSTAT; 219 __at(0x0F70) volatile __CMSTATbits_t CMSTATbits; 220 221 __at(0x0F70) __sfr CMSTATUS; 222 __at(0x0F70) volatile __CMSTATUSbits_t CMSTATUSbits; 223 224 __at(0x0F71) __sfr SSP2CON2; 225 __at(0x0F71) volatile __SSP2CON2bits_t SSP2CON2bits; 226 227 __at(0x0F72) __sfr SSP2CON1; 228 __at(0x0F72) volatile __SSP2CON1bits_t SSP2CON1bits; 229 230 __at(0x0F73) __sfr SSP2STAT; 231 __at(0x0F73) volatile __SSP2STATbits_t SSP2STATbits; 232 233 __at(0x0F74) __sfr SSP2ADD; 234 __at(0x0F74) volatile __SSP2ADDbits_t SSP2ADDbits; 235 236 __at(0x0F74) __sfr SSP2MSK; 237 __at(0x0F74) volatile __SSP2MSKbits_t SSP2MSKbits; 238 239 __at(0x0F75) __sfr SSP2BUF; 240 241 __at(0x0F76) __sfr T4CON; 242 __at(0x0F76) volatile __T4CONbits_t T4CONbits; 243 244 __at(0x0F77) __sfr PR4; 245 246 __at(0x0F78) __sfr TMR4; 247 248 __at(0x0F79) __sfr T3CON; 249 __at(0x0F79) volatile __T3CONbits_t T3CONbits; 250 251 __at(0x0F7A) __sfr TMR3; 252 253 __at(0x0F7A) __sfr TMR3L; 254 255 __at(0x0F7B) __sfr TMR3H; 256 257 __at(0x0F7C) __sfr BAUDCON2; 258 __at(0x0F7C) volatile __BAUDCON2bits_t BAUDCON2bits; 259 260 __at(0x0F7D) __sfr SPBRGH2; 261 262 __at(0x0F7E) __sfr BAUDCON; 263 __at(0x0F7E) volatile __BAUDCONbits_t BAUDCONbits; 264 265 __at(0x0F7E) __sfr BAUDCON1; 266 __at(0x0F7E) volatile __BAUDCON1bits_t BAUDCON1bits; 267 268 __at(0x0F7E) __sfr BAUDCTL; 269 __at(0x0F7E) volatile __BAUDCTLbits_t BAUDCTLbits; 270 271 __at(0x0F7F) __sfr SPBRGH; 272 273 __at(0x0F7F) __sfr SPBRGH1; 274 275 __at(0x0F80) __sfr PORTA; 276 __at(0x0F80) volatile __PORTAbits_t PORTAbits; 277 278 __at(0x0F81) __sfr PORTB; 279 __at(0x0F81) volatile __PORTBbits_t PORTBbits; 280 281 __at(0x0F82) __sfr PORTC; 282 __at(0x0F82) volatile __PORTCbits_t PORTCbits; 283 284 __at(0x0F83) __sfr PORTD; 285 __at(0x0F83) volatile __PORTDbits_t PORTDbits; 286 287 __at(0x0F84) __sfr PORTE; 288 __at(0x0F84) volatile __PORTEbits_t PORTEbits; 289 290 __at(0x0F85) __sfr HLVDCON; 291 __at(0x0F85) volatile __HLVDCONbits_t HLVDCONbits; 292 293 __at(0x0F86) __sfr DMACON2; 294 __at(0x0F86) volatile __DMACON2bits_t DMACON2bits; 295 296 __at(0x0F88) __sfr DMACON1; 297 __at(0x0F88) volatile __DMACON1bits_t DMACON1bits; 298 299 __at(0x0F89) __sfr LATA; 300 __at(0x0F89) volatile __LATAbits_t LATAbits; 301 302 __at(0x0F8A) __sfr LATB; 303 __at(0x0F8A) volatile __LATBbits_t LATBbits; 304 305 __at(0x0F8B) __sfr LATC; 306 __at(0x0F8B) volatile __LATCbits_t LATCbits; 307 308 __at(0x0F8C) __sfr LATD; 309 __at(0x0F8C) volatile __LATDbits_t LATDbits; 310 311 __at(0x0F8D) __sfr LATE; 312 __at(0x0F8D) volatile __LATEbits_t LATEbits; 313 314 __at(0x0F8E) __sfr ALRMVALL; 315 316 __at(0x0F8F) __sfr ALRMVALH; 317 318 __at(0x0F90) __sfr ALRMRPT; 319 __at(0x0F90) volatile __ALRMRPTbits_t ALRMRPTbits; 320 321 __at(0x0F91) __sfr ALRMCFG; 322 __at(0x0F91) volatile __ALRMCFGbits_t ALRMCFGbits; 323 324 __at(0x0F92) __sfr TRISA; 325 __at(0x0F92) volatile __TRISAbits_t TRISAbits; 326 327 __at(0x0F93) __sfr TRISB; 328 __at(0x0F93) volatile __TRISBbits_t TRISBbits; 329 330 __at(0x0F94) __sfr TRISC; 331 __at(0x0F94) volatile __TRISCbits_t TRISCbits; 332 333 __at(0x0F95) __sfr TRISD; 334 __at(0x0F95) volatile __TRISDbits_t TRISDbits; 335 336 __at(0x0F96) __sfr TRISE; 337 __at(0x0F96) volatile __TRISEbits_t TRISEbits; 338 339 __at(0x0F97) __sfr T3GCON; 340 __at(0x0F97) volatile __T3GCONbits_t T3GCONbits; 341 342 __at(0x0F98) __sfr RTCVALL; 343 344 __at(0x0F99) __sfr RTCVALH; 345 346 __at(0x0F9A) __sfr T1GCON; 347 __at(0x0F9A) volatile __T1GCONbits_t T1GCONbits; 348 349 __at(0x0F9B) __sfr OSCTUNE; 350 __at(0x0F9B) volatile __OSCTUNEbits_t OSCTUNEbits; 351 352 __at(0x0F9C) __sfr RCSTA2; 353 __at(0x0F9C) volatile __RCSTA2bits_t RCSTA2bits; 354 355 __at(0x0F9D) __sfr PIE1; 356 __at(0x0F9D) volatile __PIE1bits_t PIE1bits; 357 358 __at(0x0F9E) __sfr PIR1; 359 __at(0x0F9E) volatile __PIR1bits_t PIR1bits; 360 361 __at(0x0F9F) __sfr IPR1; 362 __at(0x0F9F) volatile __IPR1bits_t IPR1bits; 363 364 __at(0x0FA0) __sfr PIE2; 365 __at(0x0FA0) volatile __PIE2bits_t PIE2bits; 366 367 __at(0x0FA1) __sfr PIR2; 368 __at(0x0FA1) volatile __PIR2bits_t PIR2bits; 369 370 __at(0x0FA2) __sfr IPR2; 371 __at(0x0FA2) volatile __IPR2bits_t IPR2bits; 372 373 __at(0x0FA3) __sfr PIE3; 374 __at(0x0FA3) volatile __PIE3bits_t PIE3bits; 375 376 __at(0x0FA4) __sfr PIR3; 377 __at(0x0FA4) volatile __PIR3bits_t PIR3bits; 378 379 __at(0x0FA5) __sfr IPR3; 380 __at(0x0FA5) volatile __IPR3bits_t IPR3bits; 381 382 __at(0x0FA6) __sfr EECON1; 383 __at(0x0FA6) volatile __EECON1bits_t EECON1bits; 384 385 __at(0x0FA7) __sfr EECON2; 386 387 __at(0x0FA8) __sfr TXSTA2; 388 __at(0x0FA8) volatile __TXSTA2bits_t TXSTA2bits; 389 390 __at(0x0FA9) __sfr TXREG2; 391 392 __at(0x0FAA) __sfr RCREG2; 393 394 __at(0x0FAB) __sfr SPBRG2; 395 396 __at(0x0FAC) __sfr RCSTA; 397 __at(0x0FAC) volatile __RCSTAbits_t RCSTAbits; 398 399 __at(0x0FAC) __sfr RCSTA1; 400 __at(0x0FAC) volatile __RCSTA1bits_t RCSTA1bits; 401 402 __at(0x0FAD) __sfr TXSTA; 403 __at(0x0FAD) volatile __TXSTAbits_t TXSTAbits; 404 405 __at(0x0FAD) __sfr TXSTA1; 406 __at(0x0FAD) volatile __TXSTA1bits_t TXSTA1bits; 407 408 __at(0x0FAE) __sfr TXREG; 409 410 __at(0x0FAE) __sfr TXREG1; 411 412 __at(0x0FAF) __sfr RCREG; 413 414 __at(0x0FAF) __sfr RCREG1; 415 416 __at(0x0FB0) __sfr SPBRG; 417 418 __at(0x0FB0) __sfr SPBRG1; 419 420 __at(0x0FB1) __sfr CTMUICON; 421 __at(0x0FB1) volatile __CTMUICONbits_t CTMUICONbits; 422 423 __at(0x0FB2) __sfr CTMUCONL; 424 __at(0x0FB2) volatile __CTMUCONLbits_t CTMUCONLbits; 425 426 __at(0x0FB3) __sfr CTMUCONH; 427 __at(0x0FB3) volatile __CTMUCONHbits_t CTMUCONHbits; 428 429 __at(0x0FB4) __sfr CCP2CON; 430 __at(0x0FB4) volatile __CCP2CONbits_t CCP2CONbits; 431 432 __at(0x0FB4) __sfr ECCP2CON; 433 __at(0x0FB4) volatile __ECCP2CONbits_t ECCP2CONbits; 434 435 __at(0x0FB5) __sfr CCPR2; 436 437 __at(0x0FB5) __sfr CCPR2L; 438 439 __at(0x0FB6) __sfr CCPR2H; 440 441 __at(0x0FB7) __sfr ECCP2DEL; 442 __at(0x0FB7) volatile __ECCP2DELbits_t ECCP2DELbits; 443 444 __at(0x0FB7) __sfr PWM2CON; 445 __at(0x0FB7) volatile __PWM2CONbits_t PWM2CONbits; 446 447 __at(0x0FB8) __sfr ECCP2AS; 448 __at(0x0FB8) volatile __ECCP2ASbits_t ECCP2ASbits; 449 450 __at(0x0FB9) __sfr PSTR2CON; 451 __at(0x0FB9) volatile __PSTR2CONbits_t PSTR2CONbits; 452 453 __at(0x0FBA) __sfr CCP1CON; 454 __at(0x0FBA) volatile __CCP1CONbits_t CCP1CONbits; 455 456 __at(0x0FBA) __sfr ECCP1CON; 457 __at(0x0FBA) volatile __ECCP1CONbits_t ECCP1CONbits; 458 459 __at(0x0FBB) __sfr CCPR1; 460 461 __at(0x0FBB) __sfr CCPR1L; 462 463 __at(0x0FBC) __sfr CCPR1H; 464 465 __at(0x0FBD) __sfr ECCP1DEL; 466 __at(0x0FBD) volatile __ECCP1DELbits_t ECCP1DELbits; 467 468 __at(0x0FBD) __sfr PWM1CON; 469 __at(0x0FBD) volatile __PWM1CONbits_t PWM1CONbits; 470 471 __at(0x0FBE) __sfr ECCP1AS; 472 __at(0x0FBE) volatile __ECCP1ASbits_t ECCP1ASbits; 473 474 __at(0x0FBF) __sfr PSTR1CON; 475 __at(0x0FBF) volatile __PSTR1CONbits_t PSTR1CONbits; 476 477 __at(0x0FC0) __sfr WDTCON; 478 __at(0x0FC0) volatile __WDTCONbits_t WDTCONbits; 479 480 __at(0x0FC1) __sfr ADCON1; 481 __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits; 482 483 __at(0x0FC2) __sfr ADCON0; 484 __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits; 485 486 __at(0x0FC3) __sfr ADRES; 487 488 __at(0x0FC3) __sfr ADRESL; 489 490 __at(0x0FC4) __sfr ADRESH; 491 492 __at(0x0FC5) __sfr SSP1CON2; 493 __at(0x0FC5) volatile __SSP1CON2bits_t SSP1CON2bits; 494 495 __at(0x0FC5) __sfr SSPCON2; 496 __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits; 497 498 __at(0x0FC6) __sfr SSP1CON1; 499 __at(0x0FC6) volatile __SSP1CON1bits_t SSP1CON1bits; 500 501 __at(0x0FC6) __sfr SSPCON1; 502 __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits; 503 504 __at(0x0FC7) __sfr SSP1STAT; 505 __at(0x0FC7) volatile __SSP1STATbits_t SSP1STATbits; 506 507 __at(0x0FC7) __sfr SSPSTAT; 508 __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits; 509 510 __at(0x0FC8) __sfr SSP1ADD; 511 __at(0x0FC8) volatile __SSP1ADDbits_t SSP1ADDbits; 512 513 __at(0x0FC8) __sfr SSP1MSK; 514 __at(0x0FC8) volatile __SSP1MSKbits_t SSP1MSKbits; 515 516 __at(0x0FC8) __sfr SSPADD; 517 __at(0x0FC8) volatile __SSPADDbits_t SSPADDbits; 518 519 __at(0x0FC9) __sfr SSP1BUF; 520 521 __at(0x0FC9) __sfr SSPBUF; 522 523 __at(0x0FCA) __sfr T2CON; 524 __at(0x0FCA) volatile __T2CONbits_t T2CONbits; 525 526 __at(0x0FCB) __sfr PR2; 527 528 __at(0x0FCC) __sfr TMR2; 529 530 __at(0x0FCD) __sfr T1CON; 531 __at(0x0FCD) volatile __T1CONbits_t T1CONbits; 532 533 __at(0x0FCE) __sfr TMR1; 534 535 __at(0x0FCE) __sfr TMR1L; 536 537 __at(0x0FCF) __sfr TMR1H; 538 539 __at(0x0FD0) __sfr RCON; 540 __at(0x0FD0) volatile __RCONbits_t RCONbits; 541 542 __at(0x0FD1) __sfr CM2CON; 543 __at(0x0FD1) volatile __CM2CONbits_t CM2CONbits; 544 545 __at(0x0FD1) __sfr CM2CON1; 546 __at(0x0FD1) volatile __CM2CON1bits_t CM2CON1bits; 547 548 __at(0x0FD2) __sfr CM1CON; 549 __at(0x0FD2) volatile __CM1CONbits_t CM1CONbits; 550 551 __at(0x0FD2) __sfr CM1CON1; 552 __at(0x0FD2) volatile __CM1CON1bits_t CM1CON1bits; 553 554 __at(0x0FD3) __sfr OSCCON; 555 __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits; 556 557 __at(0x0FD5) __sfr T0CON; 558 __at(0x0FD5) volatile __T0CONbits_t T0CONbits; 559 560 __at(0x0FD6) __sfr TMR0; 561 562 __at(0x0FD6) __sfr TMR0L; 563 564 __at(0x0FD7) __sfr TMR0H; 565 566 __at(0x0FD8) __sfr STATUS; 567 __at(0x0FD8) volatile __STATUSbits_t STATUSbits; 568 569 __at(0x0FD9) __sfr FSR2L; 570 571 __at(0x0FDA) __sfr FSR2H; 572 573 __at(0x0FDB) __sfr PLUSW2; 574 575 __at(0x0FDC) __sfr PREINC2; 576 577 __at(0x0FDD) __sfr POSTDEC2; 578 579 __at(0x0FDE) __sfr POSTINC2; 580 581 __at(0x0FDF) __sfr INDF2; 582 583 __at(0x0FE0) __sfr BSR; 584 585 __at(0x0FE1) __sfr FSR1L; 586 587 __at(0x0FE2) __sfr FSR1H; 588 589 __at(0x0FE3) __sfr PLUSW1; 590 591 __at(0x0FE4) __sfr PREINC1; 592 593 __at(0x0FE5) __sfr POSTDEC1; 594 595 __at(0x0FE6) __sfr POSTINC1; 596 597 __at(0x0FE7) __sfr INDF1; 598 599 __at(0x0FE8) __sfr WREG; 600 601 __at(0x0FE9) __sfr FSR0L; 602 603 __at(0x0FEA) __sfr FSR0H; 604 605 __at(0x0FEB) __sfr PLUSW0; 606 607 __at(0x0FEC) __sfr PREINC0; 608 609 __at(0x0FED) __sfr POSTDEC0; 610 611 __at(0x0FEE) __sfr POSTINC0; 612 613 __at(0x0FEF) __sfr INDF0; 614 615 __at(0x0FF0) __sfr INTCON3; 616 __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits; 617 618 __at(0x0FF1) __sfr INTCON2; 619 __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits; 620 621 __at(0x0FF2) __sfr INTCON; 622 __at(0x0FF2) volatile __INTCONbits_t INTCONbits; 623 624 __at(0x0FF3) __sfr PROD; 625 626 __at(0x0FF3) __sfr PRODL; 627 628 __at(0x0FF4) __sfr PRODH; 629 630 __at(0x0FF5) __sfr TABLAT; 631 632 __at(0x0FF6) __sfr TBLPTR; 633 634 __at(0x0FF6) __sfr TBLPTRL; 635 636 __at(0x0FF7) __sfr TBLPTRH; 637 638 __at(0x0FF8) __sfr TBLPTRU; 639 640 __at(0x0FF9) __sfr PC; 641 642 __at(0x0FF9) __sfr PCL; 643 644 __at(0x0FFA) __sfr PCLATH; 645 646 __at(0x0FFB) __sfr PCLATU; 647 648 __at(0x0FFC) __sfr STKPTR; 649 __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits; 650 651 __at(0x0FFD) __sfr TOS; 652 653 __at(0x0FFD) __sfr TOSL; 654 655 __at(0x0FFE) __sfr TOSH; 656 657 __at(0x0FFF) __sfr TOSU; 658