1## 2## Copyright (c) 2015 The WebM project authors. All Rights Reserved. 3## 4## Use of this source code is governed by a BSD-style license 5## that can be found in the LICENSE file in the root of the source 6## tree. An additional intellectual property rights grant can be found 7## in the file PATENTS. All contributing project authors may 8## be found in the AUTHORS file in the root of the source tree. 9## 10 11DSP_SRCS-yes += vpx_dsp.mk 12DSP_SRCS-yes += vpx_dsp_common.h 13 14DSP_SRCS-$(HAVE_MSA) += mips/macros_msa.h 15 16# bit reader 17DSP_SRCS-yes += prob.h 18DSP_SRCS-yes += prob.c 19 20ifeq ($(CONFIG_ENCODERS),yes) 21DSP_SRCS-yes += bitwriter.h 22DSP_SRCS-yes += bitwriter.c 23DSP_SRCS-yes += bitwriter_buffer.c 24DSP_SRCS-yes += bitwriter_buffer.h 25DSP_SRCS-yes += psnr.c 26DSP_SRCS-yes += psnr.h 27DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.c 28DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.h 29DSP_SRCS-$(CONFIG_INTERNAL_STATS) += psnrhvs.c 30DSP_SRCS-$(CONFIG_INTERNAL_STATS) += fastssim.c 31endif 32 33ifeq ($(CONFIG_DECODERS),yes) 34DSP_SRCS-yes += bitreader.h 35DSP_SRCS-yes += bitreader.c 36DSP_SRCS-yes += bitreader_buffer.c 37DSP_SRCS-yes += bitreader_buffer.h 38endif 39 40# intra predictions 41DSP_SRCS-yes += intrapred.c 42 43DSP_SRCS-$(HAVE_SSE) += x86/intrapred_sse2.asm 44DSP_SRCS-$(HAVE_SSE2) += x86/intrapred_sse2.asm 45DSP_SRCS-$(HAVE_SSSE3) += x86/intrapred_ssse3.asm 46DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm 47 48ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 49DSP_SRCS-$(HAVE_SSE) += x86/highbd_intrapred_sse2.asm 50DSP_SRCS-$(HAVE_SSE2) += x86/highbd_intrapred_sse2.asm 51DSP_SRCS-$(HAVE_NEON) += arm/highbd_intrapred_neon.c 52endif # CONFIG_VP9_HIGHBITDEPTH 53 54ifneq ($(filter yes,$(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),) 55DSP_SRCS-yes += add_noise.c 56DSP_SRCS-yes += deblock.c 57DSP_SRCS-yes += postproc.h 58DSP_SRCS-$(HAVE_MSA) += mips/add_noise_msa.c 59DSP_SRCS-$(HAVE_MSA) += mips/deblock_msa.c 60DSP_SRCS-$(HAVE_NEON) += arm/deblock_neon.c 61DSP_SRCS-$(HAVE_SSE2) += x86/add_noise_sse2.asm 62DSP_SRCS-$(HAVE_SSE2) += x86/deblock_sse2.asm 63endif # CONFIG_POSTPROC 64 65DSP_SRCS-$(HAVE_NEON_ASM) += arm/intrapred_neon_asm$(ASM) 66DSP_SRCS-$(HAVE_NEON) += arm/intrapred_neon.c 67DSP_SRCS-$(HAVE_MSA) += mips/intrapred_msa.c 68DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred4_dspr2.c 69DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred8_dspr2.c 70DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred16_dspr2.c 71 72DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.h 73DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.c 74 75# interpolation filters 76DSP_SRCS-yes += vpx_convolve.c 77DSP_SRCS-yes += vpx_convolve.h 78DSP_SRCS-yes += vpx_filter.h 79 80DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/convolve.h 81DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/vpx_asm_stubs.c 82DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_8t_sse2.asm 83DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_bilinear_sse2.asm 84DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm 85DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_bilinear_ssse3.asm 86DSP_SRCS-$(HAVE_AVX2) += x86/vpx_subpixel_8t_intrin_avx2.c 87DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_intrin_ssse3.c 88ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 89DSP_SRCS-$(HAVE_SSE2) += x86/vpx_high_subpixel_8t_sse2.asm 90DSP_SRCS-$(HAVE_SSE2) += x86/vpx_high_subpixel_bilinear_sse2.asm 91DSP_SRCS-$(HAVE_NEON) += arm/highbd_vpx_convolve_copy_neon.c 92DSP_SRCS-$(HAVE_NEON) += arm/highbd_vpx_convolve_avg_neon.c 93DSP_SRCS-$(HAVE_NEON) += arm/highbd_vpx_convolve8_neon.c 94DSP_SRCS-$(HAVE_NEON) += arm/highbd_vpx_convolve_neon.c 95endif 96 97DSP_SRCS-$(HAVE_SSE2) += x86/vpx_convolve_copy_sse2.asm 98 99ifeq ($(HAVE_NEON_ASM),yes) 100DSP_SRCS-yes += arm/vpx_convolve_copy_neon_asm$(ASM) 101DSP_SRCS-yes += arm/vpx_convolve8_avg_neon_asm$(ASM) 102DSP_SRCS-yes += arm/vpx_convolve8_neon_asm$(ASM) 103DSP_SRCS-yes += arm/vpx_convolve_avg_neon_asm$(ASM) 104DSP_SRCS-yes += arm/vpx_convolve_neon.c 105else 106ifeq ($(HAVE_NEON),yes) 107DSP_SRCS-yes += arm/vpx_convolve_copy_neon.c 108DSP_SRCS-yes += arm/vpx_convolve8_neon.c 109DSP_SRCS-yes += arm/vpx_convolve_avg_neon.c 110DSP_SRCS-yes += arm/vpx_convolve_neon.c 111endif # HAVE_NEON 112endif # HAVE_NEON_ASM 113 114# common (msa) 115DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_horiz_msa.c 116DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_msa.c 117DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_vert_msa.c 118DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_horiz_msa.c 119DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_msa.c 120DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_vert_msa.c 121DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_avg_msa.c 122DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_copy_msa.c 123DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_msa.h 124 125# common (dspr2) 126DSP_SRCS-$(HAVE_DSPR2) += mips/convolve_common_dspr2.h 127DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_avg_dspr2.c 128DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_avg_horiz_dspr2.c 129DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_dspr2.c 130DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_horiz_dspr2.c 131DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_vert_dspr2.c 132DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_avg_dspr2.c 133DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_avg_horiz_dspr2.c 134DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_dspr2.c 135DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_horiz_dspr2.c 136DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_vert_dspr2.c 137 138# loop filters 139DSP_SRCS-yes += loopfilter.c 140 141DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/loopfilter_intrin_sse2.c 142DSP_SRCS-$(HAVE_AVX2) += x86/loopfilter_avx2.c 143 144ifeq ($(HAVE_NEON_ASM),yes) 145DSP_SRCS-yes += arm/loopfilter_16_neon$(ASM) 146DSP_SRCS-yes += arm/loopfilter_8_neon$(ASM) 147DSP_SRCS-yes += arm/loopfilter_4_neon$(ASM) 148else 149DSP_SRCS-$(HAVE_NEON) += arm/loopfilter_neon.c 150endif # HAVE_NEON_ASM 151 152DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_msa.h 153DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_16_msa.c 154DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_8_msa.c 155DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_4_msa.c 156DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_filters_dspr2.h 157DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_filters_dspr2.c 158DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_macros_dspr2.h 159DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_masks_dspr2.h 160DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_dspr2.c 161DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_horiz_dspr2.c 162DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_vert_dspr2.c 163 164ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 165DSP_SRCS-$(HAVE_NEON) += arm/highbd_loopfilter_neon.c 166DSP_SRCS-$(HAVE_SSE2) += x86/highbd_loopfilter_sse2.c 167endif # CONFIG_VP9_HIGHBITDEPTH 168 169DSP_SRCS-yes += txfm_common.h 170DSP_SRCS-$(HAVE_SSE2) += x86/txfm_common_sse2.h 171DSP_SRCS-$(HAVE_MSA) += mips/txfm_macros_msa.h 172# forward transform 173ifeq ($(CONFIG_VP9_ENCODER),yes) 174DSP_SRCS-yes += fwd_txfm.c 175DSP_SRCS-yes += fwd_txfm.h 176DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.h 177DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.c 178DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_impl_sse2.h 179DSP_SRCS-$(HAVE_SSE2) += x86/fwd_dct32x32_impl_sse2.h 180ifeq ($(ARCH_X86_64),yes) 181DSP_SRCS-$(HAVE_SSSE3) += x86/fwd_txfm_ssse3_x86_64.asm 182endif 183DSP_SRCS-$(HAVE_AVX2) += x86/fwd_txfm_avx2.c 184DSP_SRCS-$(HAVE_AVX2) += x86/fwd_dct32x32_impl_avx2.h 185DSP_SRCS-$(HAVE_NEON) += arm/fwd_txfm_neon.c 186DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.h 187DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.c 188DSP_SRCS-$(HAVE_MSA) += mips/fwd_dct32x32_msa.c 189endif # CONFIG_VP9_ENCODER 190 191# inverse transform 192ifeq ($(CONFIG_VP9),yes) 193DSP_SRCS-yes += inv_txfm.h 194DSP_SRCS-yes += inv_txfm.c 195DSP_SRCS-$(HAVE_SSE2) += x86/inv_txfm_sse2.h 196DSP_SRCS-$(HAVE_SSE2) += x86/inv_txfm_sse2.c 197DSP_SRCS-$(HAVE_SSE2) += x86/inv_wht_sse2.asm 198ifeq ($(ARCH_X86_64),yes) 199DSP_SRCS-$(HAVE_SSSE3) += x86/inv_txfm_ssse3_x86_64.asm 200endif # ARCH_X86_64 201 202DSP_SRCS-$(HAVE_NEON_ASM) += arm/save_reg_neon$(ASM) 203 204ifneq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 205DSP_SRCS-$(HAVE_MSA) += mips/inv_txfm_msa.h 206DSP_SRCS-$(HAVE_MSA) += mips/idct4x4_msa.c 207DSP_SRCS-$(HAVE_MSA) += mips/idct8x8_msa.c 208DSP_SRCS-$(HAVE_MSA) += mips/idct16x16_msa.c 209DSP_SRCS-$(HAVE_MSA) += mips/idct32x32_msa.c 210 211DSP_SRCS-$(HAVE_DSPR2) += mips/inv_txfm_dspr2.h 212DSP_SRCS-$(HAVE_DSPR2) += mips/itrans4_dspr2.c 213DSP_SRCS-$(HAVE_DSPR2) += mips/itrans8_dspr2.c 214DSP_SRCS-$(HAVE_DSPR2) += mips/itrans16_dspr2.c 215DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_dspr2.c 216DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_cols_dspr2.c 217else # CONFIG_VP9_HIGHBITDEPTH 218DSP_SRCS-$(HAVE_NEON) += arm/highbd_idct4x4_add_neon.c 219DSP_SRCS-$(HAVE_NEON) += arm/highbd_idct8x8_add_neon.c 220endif # !CONFIG_VP9_HIGHBITDEPTH 221 222ifeq ($(HAVE_NEON_ASM),yes) 223DSP_SRCS-yes += arm/idct_neon$(ASM) 224DSP_SRCS-yes += arm/idct4x4_1_add_neon$(ASM) 225DSP_SRCS-yes += arm/idct4x4_add_neon$(ASM) 226DSP_SRCS-yes += arm/idct8x8_1_add_neon$(ASM) 227DSP_SRCS-yes += arm/idct8x8_add_neon$(ASM) 228DSP_SRCS-yes += arm/idct16x16_1_add_neon$(ASM) 229DSP_SRCS-yes += arm/idct16x16_add_neon$(ASM) 230else 231DSP_SRCS-$(HAVE_NEON) += arm/idct4x4_1_add_neon.c 232DSP_SRCS-$(HAVE_NEON) += arm/idct4x4_add_neon.c 233DSP_SRCS-$(HAVE_NEON) += arm/idct8x8_1_add_neon.c 234DSP_SRCS-$(HAVE_NEON) += arm/idct8x8_add_neon.c 235DSP_SRCS-$(HAVE_NEON) += arm/idct16x16_1_add_neon.c 236DSP_SRCS-$(HAVE_NEON) += arm/idct16x16_add_neon.c 237endif # HAVE_NEON_ASM 238DSP_SRCS-$(HAVE_NEON) += arm/idct_neon.h 239DSP_SRCS-$(HAVE_NEON) += arm/idct16x16_neon.c 240DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_1_add_neon.c 241DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_34_add_neon.c 242DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_135_add_neon.c 243DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_add_neon.c 244 245endif # CONFIG_VP9 246 247# quantization 248ifeq ($(CONFIG_VP9_ENCODER),yes) 249DSP_SRCS-yes += quantize.c 250DSP_SRCS-yes += quantize.h 251 252DSP_SRCS-$(HAVE_SSE2) += x86/fdct.h 253DSP_SRCS-$(HAVE_SSE2) += x86/quantize_sse2.c 254ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 255DSP_SRCS-$(HAVE_SSE2) += x86/highbd_quantize_intrin_sse2.c 256endif 257ifeq ($(ARCH_X86_64),yes) 258DSP_SRCS-$(HAVE_SSSE3) += x86/quantize_ssse3_x86_64.asm 259DSP_SRCS-$(HAVE_AVX) += x86/quantize_avx_x86_64.asm 260endif 261 262# avg 263DSP_SRCS-yes += avg.c 264DSP_SRCS-$(HAVE_SSE2) += x86/avg_intrin_sse2.c 265DSP_SRCS-$(HAVE_NEON) += arm/avg_neon.c 266DSP_SRCS-$(HAVE_MSA) += mips/avg_msa.c 267DSP_SRCS-$(HAVE_NEON) += arm/hadamard_neon.c 268ifeq ($(ARCH_X86_64),yes) 269DSP_SRCS-$(HAVE_SSSE3) += x86/avg_ssse3_x86_64.asm 270endif 271 272endif # CONFIG_VP9_ENCODER 273 274ifeq ($(CONFIG_ENCODERS),yes) 275DSP_SRCS-yes += sad.c 276DSP_SRCS-yes += subtract.c 277DSP_SRCS-yes += sum_squares.c 278DSP_SRCS-$(HAVE_SSE2) += x86/sum_squares_sse2.c 279 280DSP_SRCS-$(HAVE_NEON) += arm/sad4d_neon.c 281DSP_SRCS-$(HAVE_NEON) += arm/sad_neon.c 282DSP_SRCS-$(HAVE_NEON) += arm/subtract_neon.c 283 284DSP_SRCS-$(HAVE_MSA) += mips/sad_msa.c 285DSP_SRCS-$(HAVE_MSA) += mips/subtract_msa.c 286 287DSP_SRCS-$(HAVE_SSE3) += x86/sad_sse3.asm 288DSP_SRCS-$(HAVE_SSSE3) += x86/sad_ssse3.asm 289DSP_SRCS-$(HAVE_SSE4_1) += x86/sad_sse4.asm 290DSP_SRCS-$(HAVE_AVX2) += x86/sad4d_avx2.c 291DSP_SRCS-$(HAVE_AVX2) += x86/sad_avx2.c 292 293DSP_SRCS-$(HAVE_SSE) += x86/sad4d_sse2.asm 294DSP_SRCS-$(HAVE_SSE) += x86/sad_sse2.asm 295DSP_SRCS-$(HAVE_SSE2) += x86/sad4d_sse2.asm 296DSP_SRCS-$(HAVE_SSE2) += x86/sad_sse2.asm 297DSP_SRCS-$(HAVE_SSE2) += x86/subtract_sse2.asm 298 299ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 300DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad4d_sse2.asm 301DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad_sse2.asm 302endif # CONFIG_VP9_HIGHBITDEPTH 303 304endif # CONFIG_ENCODERS 305 306ifneq ($(filter yes,$(CONFIG_ENCODERS) $(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),) 307DSP_SRCS-yes += variance.c 308DSP_SRCS-yes += variance.h 309 310DSP_SRCS-$(HAVE_NEON) += arm/subpel_variance_neon.c 311DSP_SRCS-$(HAVE_NEON) += arm/variance_neon.c 312 313DSP_SRCS-$(HAVE_MSA) += mips/variance_msa.c 314DSP_SRCS-$(HAVE_MSA) += mips/sub_pixel_variance_msa.c 315 316DSP_SRCS-$(HAVE_SSE) += x86/variance_sse2.c 317DSP_SRCS-$(HAVE_SSE2) += x86/variance_sse2.c # Contains SSE2 and SSSE3 318DSP_SRCS-$(HAVE_AVX2) += x86/variance_avx2.c 319DSP_SRCS-$(HAVE_AVX2) += x86/variance_impl_avx2.c 320 321ifeq ($(ARCH_X86_64),yes) 322DSP_SRCS-$(HAVE_SSE2) += x86/ssim_opt_x86_64.asm 323endif # ARCH_X86_64 324 325DSP_SRCS-$(HAVE_SSE) += x86/subpel_variance_sse2.asm 326DSP_SRCS-$(HAVE_SSE2) += x86/subpel_variance_sse2.asm # Contains SSE2 and SSSE3 327 328ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 329DSP_SRCS-$(HAVE_SSE2) += x86/highbd_variance_sse2.c 330DSP_SRCS-$(HAVE_SSE2) += x86/highbd_variance_impl_sse2.asm 331DSP_SRCS-$(HAVE_SSE2) += x86/highbd_subpel_variance_impl_sse2.asm 332endif # CONFIG_VP9_HIGHBITDEPTH 333endif # CONFIG_ENCODERS || CONFIG_POSTPROC || CONFIG_VP9_POSTPROC 334 335# Neon utilities 336DSP_SRCS-$(HAVE_NEON) += arm/transpose_neon.h 337 338DSP_SRCS-no += $(DSP_SRCS_REMOVE-yes) 339 340DSP_SRCS-yes += vpx_dsp_rtcd.c 341DSP_SRCS-yes += vpx_dsp_rtcd_defs.pl 342 343$(eval $(call rtcd_h_template,vpx_dsp_rtcd,vpx_dsp/vpx_dsp_rtcd_defs.pl)) 344