1 /*
2  *  Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
3  *
4  *  Use of this source code is governed by a BSD-style license
5  *  that can be found in the LICENSE file in the root of the source
6  *  tree. An additional intellectual property rights grant can be found
7  *  in the file PATENTS.  All contributing project authors may
8  *  be found in the AUTHORS file in the root of the source tree.
9  */
10 
11 #include "webrtc/modules/audio_processing/aecm/aecm_core.h"
12 
13 #include "webrtc/base/checks.h"
14 #include "webrtc/modules/audio_processing/aecm/echo_control_mobile.h"
15 #include "webrtc/modules/audio_processing/utility/delay_estimator_wrapper.h"
16 
17 static const ALIGN8_BEG int16_t WebRtcAecm_kSqrtHanning[] ALIGN8_END = {
18   0, 399, 798, 1196, 1594, 1990, 2386, 2780, 3172,
19   3562, 3951, 4337, 4720, 5101, 5478, 5853, 6224,
20   6591, 6954, 7313, 7668, 8019, 8364, 8705, 9040,
21   9370, 9695, 10013, 10326, 10633, 10933, 11227, 11514,
22   11795, 12068, 12335, 12594, 12845, 13089, 13325, 13553,
23   13773, 13985, 14189, 14384, 14571, 14749, 14918, 15079,
24   15231, 15373, 15506, 15631, 15746, 15851, 15947, 16034,
25   16111, 16179, 16237, 16286, 16325, 16354, 16373, 16384
26 };
27 
28 static const int16_t kNoiseEstQDomain = 15;
29 static const int16_t kNoiseEstIncCount = 5;
30 
31 static int16_t coefTable[] = {
32    0,   4, 256, 260, 128, 132, 384, 388,
33   64,  68, 320, 324, 192, 196, 448, 452,
34   32,  36, 288, 292, 160, 164, 416, 420,
35   96, 100, 352, 356, 224, 228, 480, 484,
36   16,  20, 272, 276, 144, 148, 400, 404,
37   80,  84, 336, 340, 208, 212, 464, 468,
38   48,  52, 304, 308, 176, 180, 432, 436,
39  112, 116, 368, 372, 240, 244, 496, 500,
40    8,  12, 264, 268, 136, 140, 392, 396,
41   72,  76, 328, 332, 200, 204, 456, 460,
42   40,  44, 296, 300, 168, 172, 424, 428,
43  104, 108, 360, 364, 232, 236, 488, 492,
44   24,  28, 280, 284, 152, 156, 408, 412,
45   88,  92, 344, 348, 216, 220, 472, 476,
46   56,  60, 312, 316, 184, 188, 440, 444,
47  120, 124, 376, 380, 248, 252, 504, 508
48 };
49 
50 static int16_t coefTable_ifft[] = {
51     0, 512, 256, 508, 128, 252, 384, 380,
52    64, 124, 320, 444, 192, 188, 448, 316,
53    32,  60, 288, 476, 160, 220, 416, 348,
54    96,  92, 352, 412, 224, 156, 480, 284,
55    16,  28, 272, 492, 144, 236, 400, 364,
56    80, 108, 336, 428, 208, 172, 464, 300,
57    48,  44, 304, 460, 176, 204, 432, 332,
58   112,  76, 368, 396, 240, 140, 496, 268,
59     8,  12, 264, 500, 136, 244, 392, 372,
60    72, 116, 328, 436, 200, 180, 456, 308,
61    40,  52, 296, 468, 168, 212, 424, 340,
62   104,  84, 360, 404, 232, 148, 488, 276,
63    24,  20, 280, 484, 152, 228, 408, 356,
64    88, 100, 344, 420, 216, 164, 472, 292,
65    56,  36, 312, 452, 184, 196, 440, 324,
66   120,  68, 376, 388, 248, 132, 504, 260
67 };
68 
69 static void ComfortNoise(AecmCore* aecm,
70                          const uint16_t* dfa,
71                          ComplexInt16* out,
72                          const int16_t* lambda);
73 
WindowAndFFT(AecmCore * aecm,int16_t * fft,const int16_t * time_signal,ComplexInt16 * freq_signal,int time_signal_scaling)74 static void WindowAndFFT(AecmCore* aecm,
75                          int16_t* fft,
76                          const int16_t* time_signal,
77                          ComplexInt16* freq_signal,
78                          int time_signal_scaling) {
79   int i, j;
80   int32_t tmp1, tmp2, tmp3, tmp4;
81   int16_t* pfrfi;
82   ComplexInt16* pfreq_signal;
83   int16_t  f_coef, s_coef;
84   int32_t load_ptr, store_ptr1, store_ptr2, shift, shift1;
85   int32_t hann, hann1, coefs;
86 
87   memset(fft, 0, sizeof(int16_t) * PART_LEN4);
88 
89   // FFT of signal
90   __asm __volatile (
91     ".set        push                                                    \n\t"
92     ".set        noreorder                                               \n\t"
93     "addiu       %[shift],          %[time_signal_scaling], -14          \n\t"
94     "addiu       %[i],              $zero,                  64           \n\t"
95     "addiu       %[load_ptr],       %[time_signal],         0            \n\t"
96     "addiu       %[hann],           %[hanning],             0            \n\t"
97     "addiu       %[hann1],          %[hanning],             128          \n\t"
98     "addiu       %[coefs],          %[coefTable],           0            \n\t"
99     "bltz        %[shift],          2f                                   \n\t"
100     " negu       %[shift1],         %[shift]                             \n\t"
101    "1:                                                                   \n\t"
102     "lh          %[tmp1],           0(%[load_ptr])                       \n\t"
103     "lh          %[tmp2],           0(%[hann])                           \n\t"
104     "lh          %[tmp3],           128(%[load_ptr])                     \n\t"
105     "lh          %[tmp4],           0(%[hann1])                          \n\t"
106     "addiu       %[i],              %[i],                   -1           \n\t"
107     "mul         %[tmp1],           %[tmp1],                %[tmp2]      \n\t"
108     "mul         %[tmp3],           %[tmp3],                %[tmp4]      \n\t"
109     "lh          %[f_coef],         0(%[coefs])                          \n\t"
110     "lh          %[s_coef],         2(%[coefs])                          \n\t"
111     "addiu       %[load_ptr],       %[load_ptr],            2            \n\t"
112     "addiu       %[hann],           %[hann],                2            \n\t"
113     "addiu       %[hann1],          %[hann1],               -2           \n\t"
114     "addu        %[store_ptr1],     %[fft],                 %[f_coef]    \n\t"
115     "addu        %[store_ptr2],     %[fft],                 %[s_coef]    \n\t"
116     "sllv        %[tmp1],           %[tmp1],                %[shift]     \n\t"
117     "sllv        %[tmp3],           %[tmp3],                %[shift]     \n\t"
118     "sh          %[tmp1],           0(%[store_ptr1])                     \n\t"
119     "sh          %[tmp3],           0(%[store_ptr2])                     \n\t"
120     "bgtz        %[i],              1b                                   \n\t"
121     " addiu      %[coefs],          %[coefs],               4            \n\t"
122     "b           3f                                                      \n\t"
123     " nop                                                                \n\t"
124    "2:                                                                   \n\t"
125     "lh          %[tmp1],           0(%[load_ptr])                       \n\t"
126     "lh          %[tmp2],           0(%[hann])                           \n\t"
127     "lh          %[tmp3],           128(%[load_ptr])                     \n\t"
128     "lh          %[tmp4],           0(%[hann1])                          \n\t"
129     "addiu       %[i],              %[i],                   -1           \n\t"
130     "mul         %[tmp1],           %[tmp1],                %[tmp2]      \n\t"
131     "mul         %[tmp3],           %[tmp3],                %[tmp4]      \n\t"
132     "lh          %[f_coef],         0(%[coefs])                          \n\t"
133     "lh          %[s_coef],         2(%[coefs])                          \n\t"
134     "addiu       %[load_ptr],       %[load_ptr],            2            \n\t"
135     "addiu       %[hann],           %[hann],                2            \n\t"
136     "addiu       %[hann1],          %[hann1],               -2           \n\t"
137     "addu        %[store_ptr1],     %[fft],                 %[f_coef]    \n\t"
138     "addu        %[store_ptr2],     %[fft],                 %[s_coef]    \n\t"
139     "srav        %[tmp1],           %[tmp1],                %[shift1]    \n\t"
140     "srav        %[tmp3],           %[tmp3],                %[shift1]    \n\t"
141     "sh          %[tmp1],           0(%[store_ptr1])                     \n\t"
142     "sh          %[tmp3],           0(%[store_ptr2])                     \n\t"
143     "bgtz        %[i],              2b                                   \n\t"
144     " addiu      %[coefs],          %[coefs],               4            \n\t"
145    "3:                                                                   \n\t"
146     ".set        pop                                                     \n\t"
147     : [load_ptr] "=&r" (load_ptr), [shift] "=&r" (shift), [hann] "=&r" (hann),
148       [hann1] "=&r" (hann1), [shift1] "=&r" (shift1), [coefs] "=&r" (coefs),
149       [tmp1] "=&r" (tmp1), [tmp2] "=&r" (tmp2), [tmp3] "=&r" (tmp3),
150       [tmp4] "=&r" (tmp4), [i] "=&r" (i), [f_coef] "=&r" (f_coef),
151       [s_coef] "=&r" (s_coef), [store_ptr1] "=&r" (store_ptr1),
152       [store_ptr2] "=&r" (store_ptr2)
153     : [time_signal] "r" (time_signal), [coefTable] "r" (coefTable),
154       [time_signal_scaling] "r" (time_signal_scaling),
155       [hanning] "r" (WebRtcAecm_kSqrtHanning), [fft] "r" (fft)
156     : "memory", "hi", "lo"
157   );
158 
159   WebRtcSpl_ComplexFFT(fft, PART_LEN_SHIFT, 1);
160   pfrfi = fft;
161   pfreq_signal = freq_signal;
162 
163   __asm __volatile (
164     ".set        push                                                     \n\t"
165     ".set        noreorder                                                \n\t"
166     "addiu       %[j],              $zero,                 128            \n\t"
167    "1:                                                                    \n\t"
168     "lh          %[tmp1],           0(%[pfrfi])                           \n\t"
169     "lh          %[tmp2],           2(%[pfrfi])                           \n\t"
170     "lh          %[tmp3],           4(%[pfrfi])                           \n\t"
171     "lh          %[tmp4],           6(%[pfrfi])                           \n\t"
172     "subu        %[tmp2],           $zero,                 %[tmp2]        \n\t"
173     "sh          %[tmp1],           0(%[pfreq_signal])                    \n\t"
174     "sh          %[tmp2],           2(%[pfreq_signal])                    \n\t"
175     "subu        %[tmp4],           $zero,                 %[tmp4]        \n\t"
176     "sh          %[tmp3],           4(%[pfreq_signal])                    \n\t"
177     "sh          %[tmp4],           6(%[pfreq_signal])                    \n\t"
178     "lh          %[tmp1],           8(%[pfrfi])                           \n\t"
179     "lh          %[tmp2],           10(%[pfrfi])                          \n\t"
180     "lh          %[tmp3],           12(%[pfrfi])                          \n\t"
181     "lh          %[tmp4],           14(%[pfrfi])                          \n\t"
182     "addiu       %[j],              %[j],                  -8             \n\t"
183     "subu        %[tmp2],           $zero,                 %[tmp2]        \n\t"
184     "sh          %[tmp1],           8(%[pfreq_signal])                    \n\t"
185     "sh          %[tmp2],           10(%[pfreq_signal])                   \n\t"
186     "subu        %[tmp4],           $zero,                 %[tmp4]        \n\t"
187     "sh          %[tmp3],           12(%[pfreq_signal])                   \n\t"
188     "sh          %[tmp4],           14(%[pfreq_signal])                   \n\t"
189     "addiu       %[pfreq_signal],   %[pfreq_signal],       16             \n\t"
190     "bgtz        %[j],              1b                                    \n\t"
191     " addiu      %[pfrfi],          %[pfrfi],              16             \n\t"
192     ".set        pop                                                      \n\t"
193     : [tmp1] "=&r" (tmp1), [tmp2] "=&r" (tmp2), [tmp3] "=&r" (tmp3),
194       [j] "=&r" (j), [pfrfi] "+r" (pfrfi), [pfreq_signal] "+r" (pfreq_signal),
195       [tmp4] "=&r" (tmp4)
196     :
197     : "memory"
198   );
199 }
200 
InverseFFTAndWindow(AecmCore * aecm,int16_t * fft,ComplexInt16 * efw,int16_t * output,const int16_t * nearendClean)201 static void InverseFFTAndWindow(AecmCore* aecm,
202                                 int16_t* fft,
203                                 ComplexInt16* efw,
204                                 int16_t* output,
205                                 const int16_t* nearendClean) {
206   int i, outCFFT;
207   int32_t tmp1, tmp2, tmp3, tmp4, tmp_re, tmp_im;
208   int16_t* pcoefTable_ifft = coefTable_ifft;
209   int16_t* pfft = fft;
210   int16_t* ppfft = fft;
211   ComplexInt16* pefw = efw;
212   int32_t out_aecm;
213   int16_t* paecm_buf = aecm->outBuf;
214   const int16_t* p_kSqrtHanning = WebRtcAecm_kSqrtHanning;
215   const int16_t* pp_kSqrtHanning = &WebRtcAecm_kSqrtHanning[PART_LEN];
216   int16_t* output1 = output;
217 
218   __asm __volatile (
219     ".set      push                                                        \n\t"
220     ".set      noreorder                                                   \n\t"
221     "addiu     %[i],                $zero,                   64            \n\t"
222    "1:                                                                     \n\t"
223     "lh        %[tmp1],             0(%[pcoefTable_ifft])                  \n\t"
224     "lh        %[tmp2],             2(%[pcoefTable_ifft])                  \n\t"
225     "lh        %[tmp_re],           0(%[pefw])                             \n\t"
226     "lh        %[tmp_im],           2(%[pefw])                             \n\t"
227     "addu      %[pfft],             %[fft],                  %[tmp2]       \n\t"
228     "sh        %[tmp_re],           0(%[pfft])                             \n\t"
229     "sh        %[tmp_im],           2(%[pfft])                             \n\t"
230     "addu      %[pfft],             %[fft],                  %[tmp1]       \n\t"
231     "sh        %[tmp_re],           0(%[pfft])                             \n\t"
232     "subu      %[tmp_im],           $zero,                   %[tmp_im]     \n\t"
233     "sh        %[tmp_im],           2(%[pfft])                             \n\t"
234     "lh        %[tmp1],             4(%[pcoefTable_ifft])                  \n\t"
235     "lh        %[tmp2],             6(%[pcoefTable_ifft])                  \n\t"
236     "lh        %[tmp_re],           4(%[pefw])                             \n\t"
237     "lh        %[tmp_im],           6(%[pefw])                             \n\t"
238     "addu      %[pfft],             %[fft],                  %[tmp2]       \n\t"
239     "sh        %[tmp_re],           0(%[pfft])                             \n\t"
240     "sh        %[tmp_im],           2(%[pfft])                             \n\t"
241     "addu      %[pfft],             %[fft],                  %[tmp1]       \n\t"
242     "sh        %[tmp_re],           0(%[pfft])                             \n\t"
243     "subu      %[tmp_im],           $zero,                   %[tmp_im]     \n\t"
244     "sh        %[tmp_im],           2(%[pfft])                             \n\t"
245     "lh        %[tmp1],             8(%[pcoefTable_ifft])                  \n\t"
246     "lh        %[tmp2],             10(%[pcoefTable_ifft])                 \n\t"
247     "lh        %[tmp_re],           8(%[pefw])                             \n\t"
248     "lh        %[tmp_im],           10(%[pefw])                            \n\t"
249     "addu      %[pfft],             %[fft],                  %[tmp2]       \n\t"
250     "sh        %[tmp_re],           0(%[pfft])                             \n\t"
251     "sh        %[tmp_im],           2(%[pfft])                             \n\t"
252     "addu      %[pfft],             %[fft],                  %[tmp1]       \n\t"
253     "sh        %[tmp_re],           0(%[pfft])                             \n\t"
254     "subu      %[tmp_im],           $zero,                   %[tmp_im]     \n\t"
255     "sh        %[tmp_im],           2(%[pfft])                             \n\t"
256     "lh        %[tmp1],             12(%[pcoefTable_ifft])                 \n\t"
257     "lh        %[tmp2],             14(%[pcoefTable_ifft])                 \n\t"
258     "lh        %[tmp_re],           12(%[pefw])                            \n\t"
259     "lh        %[tmp_im],           14(%[pefw])                            \n\t"
260     "addu      %[pfft],             %[fft],                  %[tmp2]       \n\t"
261     "sh        %[tmp_re],           0(%[pfft])                             \n\t"
262     "sh        %[tmp_im],           2(%[pfft])                             \n\t"
263     "addu      %[pfft],             %[fft],                  %[tmp1]       \n\t"
264     "sh        %[tmp_re],           0(%[pfft])                             \n\t"
265     "subu      %[tmp_im],           $zero,                   %[tmp_im]     \n\t"
266     "sh        %[tmp_im],           2(%[pfft])                             \n\t"
267     "addiu     %[pcoefTable_ifft],  %[pcoefTable_ifft],      16            \n\t"
268     "addiu     %[i],                %[i],                    -4            \n\t"
269     "bgtz      %[i],                1b                                     \n\t"
270     " addiu    %[pefw],             %[pefw],                 16            \n\t"
271     ".set      pop                                                         \n\t"
272     : [tmp1] "=&r" (tmp1), [tmp2] "=&r" (tmp2), [pfft] "+r" (pfft),
273       [i] "=&r" (i), [tmp_re] "=&r" (tmp_re), [tmp_im] "=&r" (tmp_im),
274       [pefw] "+r" (pefw), [pcoefTable_ifft] "+r" (pcoefTable_ifft),
275       [fft] "+r" (fft)
276     :
277     : "memory"
278   );
279 
280   fft[2] = efw[PART_LEN].real;
281   fft[3] = -efw[PART_LEN].imag;
282 
283   outCFFT = WebRtcSpl_ComplexIFFT(fft, PART_LEN_SHIFT, 1);
284   pfft = fft;
285 
286   __asm __volatile (
287     ".set       push                                               \n\t"
288     ".set       noreorder                                          \n\t"
289     "addiu      %[i],            $zero,               128          \n\t"
290    "1:                                                             \n\t"
291     "lh         %[tmp1],         0(%[ppfft])                       \n\t"
292     "lh         %[tmp2],         4(%[ppfft])                       \n\t"
293     "lh         %[tmp3],         8(%[ppfft])                       \n\t"
294     "lh         %[tmp4],         12(%[ppfft])                      \n\t"
295     "addiu      %[i],            %[i],                -4           \n\t"
296     "sh         %[tmp1],         0(%[pfft])                        \n\t"
297     "sh         %[tmp2],         2(%[pfft])                        \n\t"
298     "sh         %[tmp3],         4(%[pfft])                        \n\t"
299     "sh         %[tmp4],         6(%[pfft])                        \n\t"
300     "addiu      %[ppfft],        %[ppfft],            16           \n\t"
301     "bgtz       %[i],            1b                                \n\t"
302     " addiu     %[pfft],         %[pfft],             8            \n\t"
303     ".set       pop                                                \n\t"
304     : [tmp1] "=&r" (tmp1), [tmp2] "=&r" (tmp2), [pfft] "+r" (pfft),
305       [i] "=&r" (i), [tmp3] "=&r" (tmp3), [tmp4] "=&r" (tmp4),
306       [ppfft] "+r" (ppfft)
307     :
308     : "memory"
309   );
310 
311   pfft = fft;
312   out_aecm = (int32_t)(outCFFT - aecm->dfaCleanQDomain);
313 
314   __asm __volatile (
315     ".set       push                                                       \n\t"
316     ".set       noreorder                                                  \n\t"
317     "addiu      %[i],                $zero,                  64            \n\t"
318    "11:                                                                    \n\t"
319     "lh         %[tmp1],             0(%[pfft])                            \n\t"
320     "lh         %[tmp2],             0(%[p_kSqrtHanning])                  \n\t"
321     "addiu      %[i],                %[i],                   -2            \n\t"
322     "mul        %[tmp1],             %[tmp1],                %[tmp2]       \n\t"
323     "lh         %[tmp3],             2(%[pfft])                            \n\t"
324     "lh         %[tmp4],             2(%[p_kSqrtHanning])                  \n\t"
325     "mul        %[tmp3],             %[tmp3],                %[tmp4]       \n\t"
326     "addiu      %[tmp1],             %[tmp1],                8192          \n\t"
327     "sra        %[tmp1],             %[tmp1],                14            \n\t"
328     "addiu      %[tmp3],             %[tmp3],                8192          \n\t"
329     "sra        %[tmp3],             %[tmp3],                14            \n\t"
330     "bgez       %[out_aecm],         1f                                    \n\t"
331     " negu      %[tmp2],             %[out_aecm]                           \n\t"
332     "srav       %[tmp1],             %[tmp1],                %[tmp2]       \n\t"
333     "b          2f                                                         \n\t"
334     " srav      %[tmp3],             %[tmp3],                %[tmp2]       \n\t"
335    "1:                                                                     \n\t"
336     "sllv       %[tmp1],             %[tmp1],                %[out_aecm]   \n\t"
337     "sllv       %[tmp3],             %[tmp3],                %[out_aecm]   \n\t"
338    "2:                                                                     \n\t"
339     "lh         %[tmp4],             0(%[paecm_buf])                       \n\t"
340     "lh         %[tmp2],             2(%[paecm_buf])                       \n\t"
341     "addu       %[tmp3],             %[tmp3],                %[tmp2]       \n\t"
342     "addu       %[tmp1],             %[tmp1],                %[tmp4]       \n\t"
343 #if defined(MIPS_DSP_R1_LE)
344     "shll_s.w   %[tmp1],             %[tmp1],                16            \n\t"
345     "sra        %[tmp1],             %[tmp1],                16            \n\t"
346     "shll_s.w   %[tmp3],             %[tmp3],                16            \n\t"
347     "sra        %[tmp3],             %[tmp3],                16            \n\t"
348 #else  // #if defined(MIPS_DSP_R1_LE)
349     "sra        %[tmp4],             %[tmp1],                31            \n\t"
350     "sra        %[tmp2],             %[tmp1],                15            \n\t"
351     "beq        %[tmp4],             %[tmp2],                3f            \n\t"
352     " ori       %[tmp2],             $zero,                  0x7fff        \n\t"
353     "xor        %[tmp1],             %[tmp2],                %[tmp4]       \n\t"
354    "3:                                                                     \n\t"
355     "sra        %[tmp2],             %[tmp3],                31            \n\t"
356     "sra        %[tmp4],             %[tmp3],                15            \n\t"
357     "beq        %[tmp2],             %[tmp4],                4f            \n\t"
358     " ori       %[tmp4],             $zero,                  0x7fff        \n\t"
359     "xor        %[tmp3],             %[tmp4],                %[tmp2]       \n\t"
360    "4:                                                                     \n\t"
361 #endif  // #if defined(MIPS_DSP_R1_LE)
362     "sh         %[tmp1],             0(%[pfft])                            \n\t"
363     "sh         %[tmp1],             0(%[output1])                         \n\t"
364     "sh         %[tmp3],             2(%[pfft])                            \n\t"
365     "sh         %[tmp3],             2(%[output1])                         \n\t"
366     "lh         %[tmp1],             128(%[pfft])                          \n\t"
367     "lh         %[tmp2],             0(%[pp_kSqrtHanning])                 \n\t"
368     "mul        %[tmp1],             %[tmp1],                %[tmp2]       \n\t"
369     "lh         %[tmp3],             130(%[pfft])                          \n\t"
370     "lh         %[tmp4],             -2(%[pp_kSqrtHanning])                \n\t"
371     "mul        %[tmp3],             %[tmp3],                %[tmp4]       \n\t"
372     "sra        %[tmp1],             %[tmp1],                14            \n\t"
373     "sra        %[tmp3],             %[tmp3],                14            \n\t"
374     "bgez       %[out_aecm],         5f                                    \n\t"
375     " negu      %[tmp2],             %[out_aecm]                           \n\t"
376     "srav       %[tmp3],             %[tmp3],                %[tmp2]       \n\t"
377     "b          6f                                                         \n\t"
378     " srav      %[tmp1],             %[tmp1],                %[tmp2]       \n\t"
379    "5:                                                                     \n\t"
380     "sllv       %[tmp1],             %[tmp1],                %[out_aecm]   \n\t"
381     "sllv       %[tmp3],             %[tmp3],                %[out_aecm]   \n\t"
382    "6:                                                                     \n\t"
383 #if defined(MIPS_DSP_R1_LE)
384     "shll_s.w   %[tmp1],             %[tmp1],                16            \n\t"
385     "sra        %[tmp1],             %[tmp1],                16            \n\t"
386     "shll_s.w   %[tmp3],             %[tmp3],                16            \n\t"
387     "sra        %[tmp3],             %[tmp3],                16            \n\t"
388 #else  // #if defined(MIPS_DSP_R1_LE)
389     "sra        %[tmp4],             %[tmp1],                31            \n\t"
390     "sra        %[tmp2],             %[tmp1],                15            \n\t"
391     "beq        %[tmp4],             %[tmp2],                7f            \n\t"
392     " ori       %[tmp2],             $zero,                  0x7fff        \n\t"
393     "xor        %[tmp1],             %[tmp2],                %[tmp4]       \n\t"
394    "7:                                                                     \n\t"
395     "sra        %[tmp2],             %[tmp3],                31            \n\t"
396     "sra        %[tmp4],             %[tmp3],                15            \n\t"
397     "beq        %[tmp2],             %[tmp4],                8f            \n\t"
398     " ori       %[tmp4],             $zero,                  0x7fff        \n\t"
399     "xor        %[tmp3],             %[tmp4],                %[tmp2]       \n\t"
400    "8:                                                                     \n\t"
401 #endif  // #if defined(MIPS_DSP_R1_LE)
402     "sh         %[tmp1],             0(%[paecm_buf])                       \n\t"
403     "sh         %[tmp3],             2(%[paecm_buf])                       \n\t"
404     "addiu      %[output1],          %[output1],             4             \n\t"
405     "addiu      %[paecm_buf],        %[paecm_buf],           4             \n\t"
406     "addiu      %[pfft],             %[pfft],                4             \n\t"
407     "addiu      %[p_kSqrtHanning],   %[p_kSqrtHanning],      4             \n\t"
408     "bgtz       %[i],                11b                                   \n\t"
409     " addiu     %[pp_kSqrtHanning],  %[pp_kSqrtHanning],     -4            \n\t"
410     ".set       pop                                                        \n\t"
411     : [tmp1] "=&r" (tmp1), [tmp2] "=&r" (tmp2), [pfft] "+r" (pfft),
412       [output1] "+r" (output1), [tmp3] "=&r" (tmp3), [tmp4] "=&r" (tmp4),
413       [paecm_buf] "+r" (paecm_buf), [i] "=&r" (i),
414       [pp_kSqrtHanning] "+r" (pp_kSqrtHanning),
415       [p_kSqrtHanning] "+r" (p_kSqrtHanning)
416     : [out_aecm] "r" (out_aecm),
417       [WebRtcAecm_kSqrtHanning] "r" (WebRtcAecm_kSqrtHanning)
418     : "hi", "lo","memory"
419   );
420 
421   // Copy the current block to the old position
422   // (aecm->outBuf is shifted elsewhere)
423   memcpy(aecm->xBuf, aecm->xBuf + PART_LEN, sizeof(int16_t) * PART_LEN);
424   memcpy(aecm->dBufNoisy,
425          aecm->dBufNoisy + PART_LEN,
426          sizeof(int16_t) * PART_LEN);
427   if (nearendClean != NULL) {
428     memcpy(aecm->dBufClean,
429            aecm->dBufClean + PART_LEN,
430            sizeof(int16_t) * PART_LEN);
431   }
432 }
433 
WebRtcAecm_CalcLinearEnergies_mips(AecmCore * aecm,const uint16_t * far_spectrum,int32_t * echo_est,uint32_t * far_energy,uint32_t * echo_energy_adapt,uint32_t * echo_energy_stored)434 void WebRtcAecm_CalcLinearEnergies_mips(AecmCore* aecm,
435                                         const uint16_t* far_spectrum,
436                                         int32_t* echo_est,
437                                         uint32_t* far_energy,
438                                         uint32_t* echo_energy_adapt,
439                                         uint32_t* echo_energy_stored) {
440   int i;
441   uint32_t par1 = (*far_energy);
442   uint32_t par2 = (*echo_energy_adapt);
443   uint32_t par3 = (*echo_energy_stored);
444   int16_t* ch_stored_p = &(aecm->channelStored[0]);
445   int16_t* ch_adapt_p = &(aecm->channelAdapt16[0]);
446   uint16_t* spectrum_p = (uint16_t*)(&(far_spectrum[0]));
447   int32_t* echo_p = &(echo_est[0]);
448   int32_t temp0, stored0, echo0, adept0, spectrum0;
449   int32_t stored1, adept1, spectrum1, echo1, temp1;
450 
451   // Get energy for the delayed far end signal and estimated
452   // echo using both stored and adapted channels.
453   for (i = 0; i < PART_LEN; i+= 4) {
454     __asm __volatile (
455       ".set           push                                            \n\t"
456       ".set           noreorder                                       \n\t"
457       "lh             %[stored0],     0(%[ch_stored_p])               \n\t"
458       "lhu            %[adept0],      0(%[ch_adapt_p])                \n\t"
459       "lhu            %[spectrum0],   0(%[spectrum_p])                \n\t"
460       "lh             %[stored1],     2(%[ch_stored_p])               \n\t"
461       "lhu            %[adept1],      2(%[ch_adapt_p])                \n\t"
462       "lhu            %[spectrum1],   2(%[spectrum_p])                \n\t"
463       "mul            %[echo0],       %[stored0],     %[spectrum0]    \n\t"
464       "mul            %[temp0],       %[adept0],      %[spectrum0]    \n\t"
465       "mul            %[echo1],       %[stored1],     %[spectrum1]    \n\t"
466       "mul            %[temp1],       %[adept1],      %[spectrum1]    \n\t"
467       "addu           %[par1],        %[par1],        %[spectrum0]    \n\t"
468       "addu           %[par1],        %[par1],        %[spectrum1]    \n\t"
469       "addiu          %[echo_p],      %[echo_p],      16              \n\t"
470       "addu           %[par3],        %[par3],        %[echo0]        \n\t"
471       "addu           %[par2],        %[par2],        %[temp0]        \n\t"
472       "addu           %[par3],        %[par3],        %[echo1]        \n\t"
473       "addu           %[par2],        %[par2],        %[temp1]        \n\t"
474       "usw            %[echo0],       -16(%[echo_p])                  \n\t"
475       "usw            %[echo1],       -12(%[echo_p])                  \n\t"
476       "lh             %[stored0],     4(%[ch_stored_p])               \n\t"
477       "lhu            %[adept0],      4(%[ch_adapt_p])                \n\t"
478       "lhu            %[spectrum0],   4(%[spectrum_p])                \n\t"
479       "lh             %[stored1],     6(%[ch_stored_p])               \n\t"
480       "lhu            %[adept1],      6(%[ch_adapt_p])                \n\t"
481       "lhu            %[spectrum1],   6(%[spectrum_p])                \n\t"
482       "mul            %[echo0],       %[stored0],     %[spectrum0]    \n\t"
483       "mul            %[temp0],       %[adept0],      %[spectrum0]    \n\t"
484       "mul            %[echo1],       %[stored1],     %[spectrum1]    \n\t"
485       "mul            %[temp1],       %[adept1],      %[spectrum1]    \n\t"
486       "addu           %[par1],        %[par1],        %[spectrum0]    \n\t"
487       "addu           %[par1],        %[par1],        %[spectrum1]    \n\t"
488       "addiu          %[ch_stored_p], %[ch_stored_p], 8               \n\t"
489       "addiu          %[ch_adapt_p],  %[ch_adapt_p],  8               \n\t"
490       "addiu          %[spectrum_p],  %[spectrum_p],  8               \n\t"
491       "addu           %[par3],        %[par3],        %[echo0]        \n\t"
492       "addu           %[par2],        %[par2],        %[temp0]        \n\t"
493       "addu           %[par3],        %[par3],        %[echo1]        \n\t"
494       "addu           %[par2],        %[par2],        %[temp1]        \n\t"
495       "usw            %[echo0],       -8(%[echo_p])                   \n\t"
496       "usw            %[echo1],       -4(%[echo_p])                   \n\t"
497       ".set           pop                                             \n\t"
498       : [temp0] "=&r" (temp0), [stored0] "=&r" (stored0),
499         [adept0] "=&r" (adept0), [spectrum0] "=&r" (spectrum0),
500         [echo0] "=&r" (echo0), [echo_p] "+r" (echo_p), [par3] "+r" (par3),
501         [par1] "+r" (par1), [par2] "+r" (par2), [stored1] "=&r" (stored1),
502         [adept1] "=&r" (adept1), [echo1] "=&r" (echo1),
503         [spectrum1] "=&r" (spectrum1), [temp1] "=&r" (temp1),
504         [ch_stored_p] "+r" (ch_stored_p), [ch_adapt_p] "+r" (ch_adapt_p),
505         [spectrum_p] "+r" (spectrum_p)
506       :
507       : "hi", "lo", "memory"
508     );
509   }
510 
511   echo_est[PART_LEN] = WEBRTC_SPL_MUL_16_U16(aecm->channelStored[PART_LEN],
512                                              far_spectrum[PART_LEN]);
513   par1 += (uint32_t)(far_spectrum[PART_LEN]);
514   par2 += aecm->channelAdapt16[PART_LEN] * far_spectrum[PART_LEN];
515   par3 += (uint32_t)echo_est[PART_LEN];
516 
517   (*far_energy) = par1;
518   (*echo_energy_adapt) = par2;
519   (*echo_energy_stored) = par3;
520 }
521 
522 #if defined(MIPS_DSP_R1_LE)
WebRtcAecm_StoreAdaptiveChannel_mips(AecmCore * aecm,const uint16_t * far_spectrum,int32_t * echo_est)523 void WebRtcAecm_StoreAdaptiveChannel_mips(AecmCore* aecm,
524                                           const uint16_t* far_spectrum,
525                                           int32_t* echo_est) {
526   int i;
527   int16_t* temp1;
528   uint16_t* temp8;
529   int32_t temp0, temp2, temp3, temp4, temp5, temp6;
530   int32_t* temp7 = &(echo_est[0]);
531   temp1 = &(aecm->channelStored[0]);
532   temp8 = (uint16_t*)(&far_spectrum[0]);
533 
534   // During startup we store the channel every block.
535   memcpy(aecm->channelStored, aecm->channelAdapt16,
536          sizeof(int16_t) * PART_LEN1);
537   // Recalculate echo estimate
538   for (i = 0; i < PART_LEN; i += 4) {
539     __asm __volatile (
540       "ulw            %[temp0],   0(%[temp8])               \n\t"
541       "ulw            %[temp2],   0(%[temp1])               \n\t"
542       "ulw            %[temp4],   4(%[temp8])               \n\t"
543       "ulw            %[temp5],   4(%[temp1])               \n\t"
544       "muleq_s.w.phl  %[temp3],   %[temp2],     %[temp0]    \n\t"
545       "muleq_s.w.phr  %[temp0],   %[temp2],     %[temp0]    \n\t"
546       "muleq_s.w.phl  %[temp6],   %[temp5],     %[temp4]    \n\t"
547       "muleq_s.w.phr  %[temp4],   %[temp5],     %[temp4]    \n\t"
548       "addiu          %[temp7],   %[temp7],     16          \n\t"
549       "addiu          %[temp1],   %[temp1],     8           \n\t"
550       "addiu          %[temp8],   %[temp8],     8           \n\t"
551       "sra            %[temp3],   %[temp3],     1           \n\t"
552       "sra            %[temp0],   %[temp0],     1           \n\t"
553       "sra            %[temp6],   %[temp6],     1           \n\t"
554       "sra            %[temp4],   %[temp4],     1           \n\t"
555       "usw            %[temp3],   -12(%[temp7])             \n\t"
556       "usw            %[temp0],   -16(%[temp7])             \n\t"
557       "usw            %[temp6],   -4(%[temp7])              \n\t"
558       "usw            %[temp4],   -8(%[temp7])              \n\t"
559       : [temp0] "=&r" (temp0), [temp2] "=&r" (temp2), [temp3] "=&r" (temp3),
560         [temp4] "=&r" (temp4), [temp5] "=&r" (temp5), [temp6] "=&r" (temp6),
561         [temp1] "+r" (temp1), [temp8] "+r" (temp8), [temp7] "+r" (temp7)
562       :
563       : "hi", "lo", "memory"
564     );
565   }
566   echo_est[i] = WEBRTC_SPL_MUL_16_U16(aecm->channelStored[i],
567                                       far_spectrum[i]);
568 }
569 
WebRtcAecm_ResetAdaptiveChannel_mips(AecmCore * aecm)570 void WebRtcAecm_ResetAdaptiveChannel_mips(AecmCore* aecm) {
571   int i;
572   int32_t* temp3;
573   int16_t* temp0;
574   int32_t temp1, temp2, temp4, temp5;
575 
576   temp0 = &(aecm->channelStored[0]);
577   temp3 = &(aecm->channelAdapt32[0]);
578 
579   // The stored channel has a significantly lower MSE than the adaptive one for
580   // two consecutive calculations. Reset the adaptive channel.
581   memcpy(aecm->channelAdapt16,
582          aecm->channelStored,
583          sizeof(int16_t) * PART_LEN1);
584 
585   // Restore the W32 channel
586   for (i = 0; i < PART_LEN; i += 4) {
587     __asm __volatile (
588       "ulw            %[temp1], 0(%[temp0])           \n\t"
589       "ulw            %[temp4], 4(%[temp0])           \n\t"
590       "preceq.w.phl   %[temp2], %[temp1]              \n\t"
591       "preceq.w.phr   %[temp1], %[temp1]              \n\t"
592       "preceq.w.phl   %[temp5], %[temp4]              \n\t"
593       "preceq.w.phr   %[temp4], %[temp4]              \n\t"
594       "addiu          %[temp0], %[temp0], 8           \n\t"
595       "usw            %[temp2], 4(%[temp3])           \n\t"
596       "usw            %[temp1], 0(%[temp3])           \n\t"
597       "usw            %[temp5], 12(%[temp3])          \n\t"
598       "usw            %[temp4], 8(%[temp3])           \n\t"
599       "addiu          %[temp3], %[temp3], 16          \n\t"
600       : [temp1] "=&r" (temp1), [temp2] "=&r" (temp2),
601         [temp4] "=&r" (temp4), [temp5] "=&r" (temp5),
602         [temp3] "+r" (temp3), [temp0] "+r" (temp0)
603       :
604       : "memory"
605     );
606   }
607 
608   aecm->channelAdapt32[i] = (int32_t)aecm->channelStored[i] << 16;
609 }
610 #endif  // #if defined(MIPS_DSP_R1_LE)
611 
612 // Transforms a time domain signal into the frequency domain, outputting the
613 // complex valued signal, absolute value and sum of absolute values.
614 //
615 // time_signal          [in]    Pointer to time domain signal
616 // freq_signal_real     [out]   Pointer to real part of frequency domain array
617 // freq_signal_imag     [out]   Pointer to imaginary part of frequency domain
618 //                              array
619 // freq_signal_abs      [out]   Pointer to absolute value of frequency domain
620 //                              array
621 // freq_signal_sum_abs  [out]   Pointer to the sum of all absolute values in
622 //                              the frequency domain array
623 // return value                 The Q-domain of current frequency values
624 //
TimeToFrequencyDomain(AecmCore * aecm,const int16_t * time_signal,ComplexInt16 * freq_signal,uint16_t * freq_signal_abs,uint32_t * freq_signal_sum_abs)625 static int TimeToFrequencyDomain(AecmCore* aecm,
626                                  const int16_t* time_signal,
627                                  ComplexInt16* freq_signal,
628                                  uint16_t* freq_signal_abs,
629                                  uint32_t* freq_signal_sum_abs) {
630   int i = 0;
631   int time_signal_scaling = 0;
632 
633   // In fft_buf, +16 for 32-byte alignment.
634   int16_t fft_buf[PART_LEN4 + 16];
635   int16_t *fft = (int16_t *) (((uintptr_t) fft_buf + 31) & ~31);
636 
637   int16_t tmp16no1;
638 #if !defined(MIPS_DSP_R2_LE)
639   int32_t tmp32no1;
640   int32_t tmp32no2;
641   int16_t tmp16no2;
642 #else
643   int32_t tmp32no10, tmp32no11, tmp32no12, tmp32no13;
644   int32_t tmp32no20, tmp32no21, tmp32no22, tmp32no23;
645   int16_t* freqp;
646   uint16_t* freqabsp;
647   uint32_t freqt0, freqt1, freqt2, freqt3;
648   uint32_t freqs;
649 #endif
650 
651 #ifdef AECM_DYNAMIC_Q
652   tmp16no1 = WebRtcSpl_MaxAbsValueW16(time_signal, PART_LEN2);
653   time_signal_scaling = WebRtcSpl_NormW16(tmp16no1);
654 #endif
655 
656   WindowAndFFT(aecm, fft, time_signal, freq_signal, time_signal_scaling);
657 
658   // Extract imaginary and real part,
659   // calculate the magnitude for all frequency bins
660   freq_signal[0].imag = 0;
661   freq_signal[PART_LEN].imag = 0;
662   freq_signal[PART_LEN].real = fft[PART_LEN2];
663   freq_signal_abs[0] = (uint16_t)WEBRTC_SPL_ABS_W16(freq_signal[0].real);
664   freq_signal_abs[PART_LEN] = (uint16_t)WEBRTC_SPL_ABS_W16(
665     freq_signal[PART_LEN].real);
666   (*freq_signal_sum_abs) = (uint32_t)(freq_signal_abs[0]) +
667     (uint32_t)(freq_signal_abs[PART_LEN]);
668 
669 #if !defined(MIPS_DSP_R2_LE)
670   for (i = 1; i < PART_LEN; i++) {
671     if (freq_signal[i].real == 0)
672     {
673       freq_signal_abs[i] = (uint16_t)WEBRTC_SPL_ABS_W16(
674         freq_signal[i].imag);
675     }
676     else if (freq_signal[i].imag == 0)
677     {
678       freq_signal_abs[i] = (uint16_t)WEBRTC_SPL_ABS_W16(
679         freq_signal[i].real);
680     }
681     else
682     {
683       // Approximation for magnitude of complex fft output
684       // magn = sqrt(real^2 + imag^2)
685       // magn ~= alpha * max(|imag|,|real|) + beta * min(|imag|,|real|)
686       //
687       // The parameters alpha and beta are stored in Q15
688       tmp16no1 = WEBRTC_SPL_ABS_W16(freq_signal[i].real);
689       tmp16no2 = WEBRTC_SPL_ABS_W16(freq_signal[i].imag);
690       tmp32no1 = tmp16no1 * tmp16no1;
691       tmp32no2 = tmp16no2 * tmp16no2;
692       tmp32no2 = WebRtcSpl_AddSatW32(tmp32no1, tmp32no2);
693       tmp32no1 = WebRtcSpl_SqrtFloor(tmp32no2);
694 
695       freq_signal_abs[i] = (uint16_t)tmp32no1;
696     }
697     (*freq_signal_sum_abs) += (uint32_t)freq_signal_abs[i];
698   }
699 #else // #if !defined(MIPS_DSP_R2_LE)
700   freqs = (uint32_t)(freq_signal_abs[0]) +
701           (uint32_t)(freq_signal_abs[PART_LEN]);
702   freqp = &(freq_signal[1].real);
703 
704   __asm __volatile (
705     "lw             %[freqt0],      0(%[freqp])             \n\t"
706     "lw             %[freqt1],      4(%[freqp])             \n\t"
707     "lw             %[freqt2],      8(%[freqp])             \n\t"
708     "mult           $ac0,           $zero,      $zero       \n\t"
709     "mult           $ac1,           $zero,      $zero       \n\t"
710     "mult           $ac2,           $zero,      $zero       \n\t"
711     "dpaq_s.w.ph    $ac0,           %[freqt0],  %[freqt0]   \n\t"
712     "dpaq_s.w.ph    $ac1,           %[freqt1],  %[freqt1]   \n\t"
713     "dpaq_s.w.ph    $ac2,           %[freqt2],  %[freqt2]   \n\t"
714     "addiu          %[freqp],       %[freqp],   12          \n\t"
715     "extr.w         %[tmp32no20],   $ac0,       1           \n\t"
716     "extr.w         %[tmp32no21],   $ac1,       1           \n\t"
717     "extr.w         %[tmp32no22],   $ac2,       1           \n\t"
718     : [freqt0] "=&r" (freqt0), [freqt1] "=&r" (freqt1),
719       [freqt2] "=&r" (freqt2), [freqp] "+r" (freqp),
720       [tmp32no20] "=r" (tmp32no20), [tmp32no21] "=r" (tmp32no21),
721       [tmp32no22] "=r" (tmp32no22)
722     :
723     : "memory", "hi", "lo", "$ac1hi", "$ac1lo", "$ac2hi", "$ac2lo"
724   );
725 
726   tmp32no10 = WebRtcSpl_SqrtFloor(tmp32no20);
727   tmp32no11 = WebRtcSpl_SqrtFloor(tmp32no21);
728   tmp32no12 = WebRtcSpl_SqrtFloor(tmp32no22);
729   freq_signal_abs[1] = (uint16_t)tmp32no10;
730   freq_signal_abs[2] = (uint16_t)tmp32no11;
731   freq_signal_abs[3] = (uint16_t)tmp32no12;
732   freqs += (uint32_t)tmp32no10;
733   freqs += (uint32_t)tmp32no11;
734   freqs += (uint32_t)tmp32no12;
735   freqabsp = &(freq_signal_abs[4]);
736   for (i = 4; i < PART_LEN; i+=4)
737   {
738     __asm __volatile (
739       "ulw            %[freqt0],      0(%[freqp])                 \n\t"
740       "ulw            %[freqt1],      4(%[freqp])                 \n\t"
741       "ulw            %[freqt2],      8(%[freqp])                 \n\t"
742       "ulw            %[freqt3],      12(%[freqp])                \n\t"
743       "mult           $ac0,           $zero,          $zero       \n\t"
744       "mult           $ac1,           $zero,          $zero       \n\t"
745       "mult           $ac2,           $zero,          $zero       \n\t"
746       "mult           $ac3,           $zero,          $zero       \n\t"
747       "dpaq_s.w.ph    $ac0,           %[freqt0],      %[freqt0]   \n\t"
748       "dpaq_s.w.ph    $ac1,           %[freqt1],      %[freqt1]   \n\t"
749       "dpaq_s.w.ph    $ac2,           %[freqt2],      %[freqt2]   \n\t"
750       "dpaq_s.w.ph    $ac3,           %[freqt3],      %[freqt3]   \n\t"
751       "addiu          %[freqp],       %[freqp],       16          \n\t"
752       "addiu          %[freqabsp],    %[freqabsp],    8           \n\t"
753       "extr.w         %[tmp32no20],   $ac0,           1           \n\t"
754       "extr.w         %[tmp32no21],   $ac1,           1           \n\t"
755       "extr.w         %[tmp32no22],   $ac2,           1           \n\t"
756       "extr.w         %[tmp32no23],   $ac3,           1           \n\t"
757       : [freqt0] "=&r" (freqt0), [freqt1] "=&r" (freqt1),
758         [freqt2] "=&r" (freqt2), [freqt3] "=&r" (freqt3),
759         [tmp32no20] "=r" (tmp32no20), [tmp32no21] "=r" (tmp32no21),
760         [tmp32no22] "=r" (tmp32no22), [tmp32no23] "=r" (tmp32no23),
761         [freqabsp] "+r" (freqabsp), [freqp] "+r" (freqp)
762       :
763       : "memory", "hi", "lo", "$ac1hi", "$ac1lo",
764         "$ac2hi", "$ac2lo", "$ac3hi", "$ac3lo"
765     );
766 
767     tmp32no10 = WebRtcSpl_SqrtFloor(tmp32no20);
768     tmp32no11 = WebRtcSpl_SqrtFloor(tmp32no21);
769     tmp32no12 = WebRtcSpl_SqrtFloor(tmp32no22);
770     tmp32no13 = WebRtcSpl_SqrtFloor(tmp32no23);
771 
772     __asm __volatile (
773       "sh             %[tmp32no10],   -8(%[freqabsp])                 \n\t"
774       "sh             %[tmp32no11],   -6(%[freqabsp])                 \n\t"
775       "sh             %[tmp32no12],   -4(%[freqabsp])                 \n\t"
776       "sh             %[tmp32no13],   -2(%[freqabsp])                 \n\t"
777       "addu           %[freqs],       %[freqs],       %[tmp32no10]    \n\t"
778       "addu           %[freqs],       %[freqs],       %[tmp32no11]    \n\t"
779       "addu           %[freqs],       %[freqs],       %[tmp32no12]    \n\t"
780       "addu           %[freqs],       %[freqs],       %[tmp32no13]    \n\t"
781       : [freqs] "+r" (freqs)
782       : [tmp32no10] "r" (tmp32no10), [tmp32no11] "r" (tmp32no11),
783         [tmp32no12] "r" (tmp32no12), [tmp32no13] "r" (tmp32no13),
784         [freqabsp] "r" (freqabsp)
785       : "memory"
786     );
787   }
788 
789   (*freq_signal_sum_abs) = freqs;
790 #endif
791 
792   return time_signal_scaling;
793 }
794 
WebRtcAecm_ProcessBlock(AecmCore * aecm,const int16_t * farend,const int16_t * nearendNoisy,const int16_t * nearendClean,int16_t * output)795 int WebRtcAecm_ProcessBlock(AecmCore* aecm,
796                             const int16_t* farend,
797                             const int16_t* nearendNoisy,
798                             const int16_t* nearendClean,
799                             int16_t* output) {
800   int i;
801   uint32_t xfaSum;
802   uint32_t dfaNoisySum;
803   uint32_t dfaCleanSum;
804   uint32_t echoEst32Gained;
805   uint32_t tmpU32;
806   int32_t tmp32no1;
807 
808   uint16_t xfa[PART_LEN1];
809   uint16_t dfaNoisy[PART_LEN1];
810   uint16_t dfaClean[PART_LEN1];
811   uint16_t* ptrDfaClean = dfaClean;
812   const uint16_t* far_spectrum_ptr = NULL;
813 
814   // 32 byte aligned buffers (with +8 or +16).
815   int16_t fft_buf[PART_LEN4 + 2 + 16]; // +2 to make a loop safe.
816   int32_t echoEst32_buf[PART_LEN1 + 8];
817   int32_t dfw_buf[PART_LEN2 + 8];
818   int32_t efw_buf[PART_LEN2 + 8];
819 
820   int16_t* fft = (int16_t*)(((uint32_t)fft_buf + 31) & ~ 31);
821   int32_t* echoEst32 = (int32_t*)(((uint32_t)echoEst32_buf + 31) & ~ 31);
822   ComplexInt16* dfw = (ComplexInt16*)(((uint32_t)dfw_buf + 31) & ~31);
823   ComplexInt16* efw = (ComplexInt16*)(((uint32_t)efw_buf + 31) & ~31);
824 
825   int16_t hnl[PART_LEN1];
826   int16_t numPosCoef = 0;
827   int delay;
828   int16_t tmp16no1;
829   int16_t tmp16no2;
830   int16_t mu;
831   int16_t supGain;
832   int16_t zeros32, zeros16;
833   int16_t zerosDBufNoisy, zerosDBufClean, zerosXBuf;
834   int far_q;
835   int16_t resolutionDiff, qDomainDiff, dfa_clean_q_domain_diff;
836 
837   const int kMinPrefBand = 4;
838   const int kMaxPrefBand = 24;
839   int32_t avgHnl32 = 0;
840 
841   int32_t temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8;
842   int16_t* ptr;
843   int16_t* ptr1;
844   int16_t* er_ptr;
845   int16_t* dr_ptr;
846 
847   ptr = &hnl[0];
848   ptr1 = &hnl[0];
849   er_ptr = &efw[0].real;
850   dr_ptr = &dfw[0].real;
851 
852   // Determine startup state. There are three states:
853   // (0) the first CONV_LEN blocks
854   // (1) another CONV_LEN blocks
855   // (2) the rest
856 
857   if (aecm->startupState < 2) {
858     aecm->startupState = (aecm->totCount >= CONV_LEN) +
859                          (aecm->totCount >= CONV_LEN2);
860   }
861   // END: Determine startup state
862 
863   // Buffer near and far end signals
864   memcpy(aecm->xBuf + PART_LEN, farend, sizeof(int16_t) * PART_LEN);
865   memcpy(aecm->dBufNoisy + PART_LEN,
866          nearendNoisy,
867          sizeof(int16_t) * PART_LEN);
868   if (nearendClean != NULL) {
869     memcpy(aecm->dBufClean + PART_LEN,
870            nearendClean,
871            sizeof(int16_t) * PART_LEN);
872   }
873 
874   // Transform far end signal from time domain to frequency domain.
875   far_q = TimeToFrequencyDomain(aecm,
876                                 aecm->xBuf,
877                                 dfw,
878                                 xfa,
879                                 &xfaSum);
880 
881   // Transform noisy near end signal from time domain to frequency domain.
882   zerosDBufNoisy = TimeToFrequencyDomain(aecm,
883                                          aecm->dBufNoisy,
884                                          dfw,
885                                          dfaNoisy,
886                                          &dfaNoisySum);
887   aecm->dfaNoisyQDomainOld = aecm->dfaNoisyQDomain;
888   aecm->dfaNoisyQDomain = (int16_t)zerosDBufNoisy;
889 
890   if (nearendClean == NULL) {
891     ptrDfaClean = dfaNoisy;
892     aecm->dfaCleanQDomainOld = aecm->dfaNoisyQDomainOld;
893     aecm->dfaCleanQDomain = aecm->dfaNoisyQDomain;
894     dfaCleanSum = dfaNoisySum;
895   } else {
896     // Transform clean near end signal from time domain to frequency domain.
897     zerosDBufClean = TimeToFrequencyDomain(aecm,
898                                            aecm->dBufClean,
899                                            dfw,
900                                            dfaClean,
901                                            &dfaCleanSum);
902     aecm->dfaCleanQDomainOld = aecm->dfaCleanQDomain;
903     aecm->dfaCleanQDomain = (int16_t)zerosDBufClean;
904   }
905 
906   // Get the delay
907   // Save far-end history and estimate delay
908   WebRtcAecm_UpdateFarHistory(aecm, xfa, far_q);
909 
910   if (WebRtc_AddFarSpectrumFix(aecm->delay_estimator_farend, xfa, PART_LEN1,
911                                far_q) == -1) {
912     return -1;
913   }
914   delay = WebRtc_DelayEstimatorProcessFix(aecm->delay_estimator,
915                                           dfaNoisy,
916                                           PART_LEN1,
917                                           zerosDBufNoisy);
918   if (delay == -1) {
919     return -1;
920   }
921   else if (delay == -2) {
922     // If the delay is unknown, we assume zero.
923     // NOTE: this will have to be adjusted if we ever add lookahead.
924     delay = 0;
925   }
926 
927   if (aecm->fixedDelay >= 0) {
928     // Use fixed delay
929     delay = aecm->fixedDelay;
930   }
931 
932   // Get aligned far end spectrum
933   far_spectrum_ptr = WebRtcAecm_AlignedFarend(aecm, &far_q, delay);
934   zerosXBuf = (int16_t) far_q;
935 
936   if (far_spectrum_ptr == NULL) {
937     return -1;
938   }
939 
940   // Calculate log(energy) and update energy threshold levels
941   WebRtcAecm_CalcEnergies(aecm,
942                           far_spectrum_ptr,
943                           zerosXBuf,
944                           dfaNoisySum,
945                           echoEst32);
946   // Calculate stepsize
947   mu = WebRtcAecm_CalcStepSize(aecm);
948 
949   // Update counters
950   aecm->totCount++;
951 
952   // This is the channel estimation algorithm.
953   // It is base on NLMS but has a variable step length,
954   // which was calculated above.
955   WebRtcAecm_UpdateChannel(aecm,
956                            far_spectrum_ptr,
957                            zerosXBuf,
958                            dfaNoisy,
959                            mu,
960                            echoEst32);
961 
962   supGain = WebRtcAecm_CalcSuppressionGain(aecm);
963 
964   // Calculate Wiener filter hnl[]
965   for (i = 0; i < PART_LEN1; i++) {
966     // Far end signal through channel estimate in Q8
967     // How much can we shift right to preserve resolution
968     tmp32no1 = echoEst32[i] - aecm->echoFilt[i];
969     aecm->echoFilt[i] += (tmp32no1 * 50) >> 8;
970 
971     zeros32 = WebRtcSpl_NormW32(aecm->echoFilt[i]) + 1;
972     zeros16 = WebRtcSpl_NormW16(supGain) + 1;
973     if (zeros32 + zeros16 > 16) {
974       // Multiplication is safe
975       // Result in
976       // Q(RESOLUTION_CHANNEL+RESOLUTION_SUPGAIN+aecm->xfaQDomainBuf[diff])
977       echoEst32Gained = WEBRTC_SPL_UMUL_32_16((uint32_t)aecm->echoFilt[i],
978                                               (uint16_t)supGain);
979       resolutionDiff = 14 - RESOLUTION_CHANNEL16 - RESOLUTION_SUPGAIN;
980       resolutionDiff += (aecm->dfaCleanQDomain - zerosXBuf);
981     } else {
982       tmp16no1 = 17 - zeros32 - zeros16;
983       resolutionDiff = 14 + tmp16no1 - RESOLUTION_CHANNEL16 -
984                        RESOLUTION_SUPGAIN;
985       resolutionDiff += (aecm->dfaCleanQDomain - zerosXBuf);
986       if (zeros32 > tmp16no1) {
987         echoEst32Gained = WEBRTC_SPL_UMUL_32_16(
988                             (uint32_t)aecm->echoFilt[i],
989                             supGain >> tmp16no1);
990       } else {
991         // Result in Q-(RESOLUTION_CHANNEL+RESOLUTION_SUPGAIN-16)
992         echoEst32Gained = (aecm->echoFilt[i] >> tmp16no1) * supGain;
993       }
994     }
995 
996     zeros16 = WebRtcSpl_NormW16(aecm->nearFilt[i]);
997     RTC_DCHECK_GE(zeros16, 0);  // |zeros16| is a norm, hence non-negative.
998     dfa_clean_q_domain_diff = aecm->dfaCleanQDomain - aecm->dfaCleanQDomainOld;
999     if (zeros16 < dfa_clean_q_domain_diff && aecm->nearFilt[i]) {
1000       tmp16no1 = aecm->nearFilt[i] << zeros16;
1001       qDomainDiff = zeros16 - dfa_clean_q_domain_diff;
1002       tmp16no2 = ptrDfaClean[i] >> -qDomainDiff;
1003     } else {
1004       tmp16no1 = dfa_clean_q_domain_diff < 0
1005           ? aecm->nearFilt[i] >> -dfa_clean_q_domain_diff
1006           : aecm->nearFilt[i] << dfa_clean_q_domain_diff;
1007       qDomainDiff = 0;
1008       tmp16no2 = ptrDfaClean[i];
1009     }
1010 
1011     tmp32no1 = (int32_t)(tmp16no2 - tmp16no1);
1012     tmp16no2 = (int16_t)(tmp32no1 >> 4);
1013     tmp16no2 += tmp16no1;
1014     zeros16 = WebRtcSpl_NormW16(tmp16no2);
1015     if ((tmp16no2) & (-qDomainDiff > zeros16)) {
1016       aecm->nearFilt[i] = WEBRTC_SPL_WORD16_MAX;
1017     } else {
1018       aecm->nearFilt[i] = qDomainDiff < 0 ? tmp16no2 << -qDomainDiff
1019                                           : tmp16no2 >> qDomainDiff;
1020     }
1021 
1022     // Wiener filter coefficients, resulting hnl in Q14
1023     if (echoEst32Gained == 0) {
1024       hnl[i] = ONE_Q14;
1025       numPosCoef++;
1026     } else if (aecm->nearFilt[i] == 0) {
1027       hnl[i] = 0;
1028     } else {
1029       // Multiply the suppression gain
1030       // Rounding
1031       echoEst32Gained += (uint32_t)(aecm->nearFilt[i] >> 1);
1032       tmpU32 = WebRtcSpl_DivU32U16(echoEst32Gained,
1033                                    (uint16_t)aecm->nearFilt[i]);
1034 
1035       // Current resolution is
1036       // Q-(RESOLUTION_CHANNEL + RESOLUTION_SUPGAIN
1037       //    - max(0, 17 - zeros16 - zeros32))
1038       // Make sure we are in Q14
1039       tmp32no1 = (int32_t)WEBRTC_SPL_SHIFT_W32(tmpU32, resolutionDiff);
1040       if (tmp32no1 > ONE_Q14) {
1041         hnl[i] = 0;
1042       } else if (tmp32no1 < 0) {
1043         hnl[i] = ONE_Q14;
1044         numPosCoef++;
1045       } else {
1046         // 1-echoEst/dfa
1047         hnl[i] = ONE_Q14 - (int16_t)tmp32no1;
1048         if (hnl[i] <= 0) {
1049           hnl[i] = 0;
1050         } else {
1051           numPosCoef++;
1052         }
1053       }
1054     }
1055   }
1056 
1057   // Only in wideband. Prevent the gain in upper band from being larger than
1058   // in lower band.
1059   if (aecm->mult == 2) {
1060     // TODO(bjornv): Investigate if the scaling of hnl[i] below can cause
1061     //               speech distortion in double-talk.
1062     for (i = 0; i < (PART_LEN1 >> 3); i++) {
1063       __asm __volatile (
1064         "lh         %[temp1],       0(%[ptr1])                  \n\t"
1065         "lh         %[temp2],       2(%[ptr1])                  \n\t"
1066         "lh         %[temp3],       4(%[ptr1])                  \n\t"
1067         "lh         %[temp4],       6(%[ptr1])                  \n\t"
1068         "lh         %[temp5],       8(%[ptr1])                  \n\t"
1069         "lh         %[temp6],       10(%[ptr1])                 \n\t"
1070         "lh         %[temp7],       12(%[ptr1])                 \n\t"
1071         "lh         %[temp8],       14(%[ptr1])                 \n\t"
1072         "mul        %[temp1],       %[temp1],       %[temp1]    \n\t"
1073         "mul        %[temp2],       %[temp2],       %[temp2]    \n\t"
1074         "mul        %[temp3],       %[temp3],       %[temp3]    \n\t"
1075         "mul        %[temp4],       %[temp4],       %[temp4]    \n\t"
1076         "mul        %[temp5],       %[temp5],       %[temp5]    \n\t"
1077         "mul        %[temp6],       %[temp6],       %[temp6]    \n\t"
1078         "mul        %[temp7],       %[temp7],       %[temp7]    \n\t"
1079         "mul        %[temp8],       %[temp8],       %[temp8]    \n\t"
1080         "sra        %[temp1],       %[temp1],       14          \n\t"
1081         "sra        %[temp2],       %[temp2],       14          \n\t"
1082         "sra        %[temp3],       %[temp3],       14          \n\t"
1083         "sra        %[temp4],       %[temp4],       14          \n\t"
1084         "sra        %[temp5],       %[temp5],       14          \n\t"
1085         "sra        %[temp6],       %[temp6],       14          \n\t"
1086         "sra        %[temp7],       %[temp7],       14          \n\t"
1087         "sra        %[temp8],       %[temp8],       14          \n\t"
1088         "sh         %[temp1],       0(%[ptr1])                  \n\t"
1089         "sh         %[temp2],       2(%[ptr1])                  \n\t"
1090         "sh         %[temp3],       4(%[ptr1])                  \n\t"
1091         "sh         %[temp4],       6(%[ptr1])                  \n\t"
1092         "sh         %[temp5],       8(%[ptr1])                  \n\t"
1093         "sh         %[temp6],       10(%[ptr1])                 \n\t"
1094         "sh         %[temp7],       12(%[ptr1])                 \n\t"
1095         "sh         %[temp8],       14(%[ptr1])                 \n\t"
1096         "addiu      %[ptr1],        %[ptr1],        16          \n\t"
1097         : [temp1] "=&r" (temp1), [temp2] "=&r" (temp2), [temp3] "=&r" (temp3),
1098           [temp4] "=&r" (temp4), [temp5] "=&r" (temp5), [temp6] "=&r" (temp6),
1099           [temp7] "=&r" (temp7), [temp8] "=&r" (temp8), [ptr1] "+r" (ptr1)
1100         :
1101         : "memory", "hi", "lo"
1102       );
1103     }
1104     for(i = 0; i < (PART_LEN1 & 7); i++) {
1105       __asm __volatile (
1106         "lh         %[temp1],       0(%[ptr1])                  \n\t"
1107         "mul        %[temp1],       %[temp1],       %[temp1]    \n\t"
1108         "sra        %[temp1],       %[temp1],       14          \n\t"
1109         "sh         %[temp1],       0(%[ptr1])                  \n\t"
1110         "addiu      %[ptr1],        %[ptr1],        2           \n\t"
1111         : [temp1] "=&r" (temp1), [ptr1] "+r" (ptr1)
1112         :
1113         : "memory", "hi", "lo"
1114       );
1115     }
1116 
1117     for (i = kMinPrefBand; i <= kMaxPrefBand; i++) {
1118       avgHnl32 += (int32_t)hnl[i];
1119     }
1120 
1121     RTC_DCHECK_GT(kMaxPrefBand - kMinPrefBand + 1, 0);
1122     avgHnl32 /= (kMaxPrefBand - kMinPrefBand + 1);
1123 
1124     for (i = kMaxPrefBand; i < PART_LEN1; i++) {
1125       if (hnl[i] > (int16_t)avgHnl32) {
1126         hnl[i] = (int16_t)avgHnl32;
1127       }
1128     }
1129   }
1130 
1131   // Calculate NLP gain, result is in Q14
1132   if (aecm->nlpFlag) {
1133     if (numPosCoef < 3) {
1134       for (i = 0; i < PART_LEN1; i++) {
1135         efw[i].real = 0;
1136         efw[i].imag = 0;
1137         hnl[i] = 0;
1138       }
1139     } else {
1140       for (i = 0; i < PART_LEN1; i++) {
1141 #if defined(MIPS_DSP_R1_LE)
1142         __asm __volatile (
1143           ".set       push                                        \n\t"
1144           ".set       noreorder                                   \n\t"
1145           "lh         %[temp1],       0(%[ptr])                   \n\t"
1146           "lh         %[temp2],       0(%[dr_ptr])                \n\t"
1147           "slti       %[temp4],       %[temp1],       0x4001      \n\t"
1148           "beqz       %[temp4],       3f                          \n\t"
1149           " lh        %[temp3],       2(%[dr_ptr])                \n\t"
1150           "slti       %[temp5],       %[temp1],       3277        \n\t"
1151           "bnez       %[temp5],       2f                          \n\t"
1152           " addiu     %[dr_ptr],      %[dr_ptr],      4           \n\t"
1153           "mul        %[temp2],       %[temp2],       %[temp1]    \n\t"
1154           "mul        %[temp3],       %[temp3],       %[temp1]    \n\t"
1155           "shra_r.w   %[temp2],       %[temp2],       14          \n\t"
1156           "shra_r.w   %[temp3],       %[temp3],       14          \n\t"
1157           "b          4f                                          \n\t"
1158           " nop                                                   \n\t"
1159          "2:                                                      \n\t"
1160           "addu       %[temp1],       $zero,          $zero       \n\t"
1161           "addu       %[temp2],       $zero,          $zero       \n\t"
1162           "addu       %[temp3],       $zero,          $zero       \n\t"
1163           "b          1f                                          \n\t"
1164           " nop                                                   \n\t"
1165          "3:                                                      \n\t"
1166           "addiu      %[temp1],       $0,             0x4000      \n\t"
1167          "1:                                                      \n\t"
1168           "sh         %[temp1],       0(%[ptr])                   \n\t"
1169          "4:                                                      \n\t"
1170           "sh         %[temp2],       0(%[er_ptr])                \n\t"
1171           "sh         %[temp3],       2(%[er_ptr])                \n\t"
1172           "addiu      %[ptr],         %[ptr],         2           \n\t"
1173           "addiu      %[er_ptr],      %[er_ptr],      4           \n\t"
1174           ".set       pop                                         \n\t"
1175           : [temp1] "=&r" (temp1), [temp2] "=&r" (temp2), [temp3] "=&r" (temp3),
1176             [temp4] "=&r" (temp4), [temp5] "=&r" (temp5), [ptr] "+r" (ptr),
1177             [er_ptr] "+r" (er_ptr), [dr_ptr] "+r" (dr_ptr)
1178           :
1179           : "memory", "hi", "lo"
1180         );
1181 #else
1182         __asm __volatile (
1183           ".set       push                                        \n\t"
1184           ".set       noreorder                                   \n\t"
1185           "lh         %[temp1],       0(%[ptr])                   \n\t"
1186           "lh         %[temp2],       0(%[dr_ptr])                \n\t"
1187           "slti       %[temp4],       %[temp1],       0x4001      \n\t"
1188           "beqz       %[temp4],       3f                          \n\t"
1189           " lh        %[temp3],       2(%[dr_ptr])                \n\t"
1190           "slti       %[temp5],       %[temp1],       3277        \n\t"
1191           "bnez       %[temp5],       2f                          \n\t"
1192           " addiu     %[dr_ptr],      %[dr_ptr],      4           \n\t"
1193           "mul        %[temp2],       %[temp2],       %[temp1]    \n\t"
1194           "mul        %[temp3],       %[temp3],       %[temp1]    \n\t"
1195           "addiu      %[temp2],       %[temp2],       0x2000      \n\t"
1196           "addiu      %[temp3],       %[temp3],       0x2000      \n\t"
1197           "sra        %[temp2],       %[temp2],       14          \n\t"
1198           "sra        %[temp3],       %[temp3],       14          \n\t"
1199           "b          4f                                          \n\t"
1200           " nop                                                   \n\t"
1201          "2:                                                      \n\t"
1202           "addu       %[temp1],       $zero,          $zero       \n\t"
1203           "addu       %[temp2],       $zero,          $zero       \n\t"
1204           "addu       %[temp3],       $zero,          $zero       \n\t"
1205           "b          1f                                          \n\t"
1206           " nop                                                   \n\t"
1207          "3:                                                      \n\t"
1208           "addiu      %[temp1],       $0,             0x4000      \n\t"
1209          "1:                                                      \n\t"
1210           "sh         %[temp1],       0(%[ptr])                   \n\t"
1211          "4:                                                      \n\t"
1212           "sh         %[temp2],       0(%[er_ptr])                \n\t"
1213           "sh         %[temp3],       2(%[er_ptr])                \n\t"
1214           "addiu      %[ptr],         %[ptr],         2           \n\t"
1215           "addiu      %[er_ptr],      %[er_ptr],      4           \n\t"
1216           ".set       pop                                         \n\t"
1217           : [temp1] "=&r" (temp1), [temp2] "=&r" (temp2), [temp3] "=&r" (temp3),
1218             [temp4] "=&r" (temp4), [temp5] "=&r" (temp5), [ptr] "+r" (ptr),
1219             [er_ptr] "+r" (er_ptr), [dr_ptr] "+r" (dr_ptr)
1220           :
1221           : "memory", "hi", "lo"
1222         );
1223 #endif
1224       }
1225     }
1226   }
1227   else {
1228     // multiply with Wiener coefficients
1229     for (i = 0; i < PART_LEN1; i++) {
1230       efw[i].real = (int16_t)
1231                       (WEBRTC_SPL_MUL_16_16_RSFT_WITH_ROUND(dfw[i].real,
1232                                                             hnl[i],
1233                                                             14));
1234       efw[i].imag = (int16_t)
1235                       (WEBRTC_SPL_MUL_16_16_RSFT_WITH_ROUND(dfw[i].imag,
1236                                                             hnl[i],
1237                                                             14));
1238     }
1239   }
1240 
1241   if (aecm->cngMode == AecmTrue) {
1242     ComfortNoise(aecm, ptrDfaClean, efw, hnl);
1243   }
1244 
1245   InverseFFTAndWindow(aecm, fft, efw, output, nearendClean);
1246 
1247   return 0;
1248 }
1249 
1250 // Generate comfort noise and add to output signal.
ComfortNoise(AecmCore * aecm,const uint16_t * dfa,ComplexInt16 * out,const int16_t * lambda)1251 static void ComfortNoise(AecmCore* aecm,
1252                          const uint16_t* dfa,
1253                          ComplexInt16* out,
1254                          const int16_t* lambda) {
1255   int16_t i;
1256   int16_t tmp16, tmp161, tmp162, tmp163, nrsh1, nrsh2;
1257   int32_t tmp32, tmp321, tnoise, tnoise1;
1258   int32_t tmp322, tmp323, *tmp1;
1259   int16_t* dfap;
1260   int16_t* lambdap;
1261   const int32_t c2049 = 2049;
1262   const int32_t c359 = 359;
1263   const int32_t c114 = ONE_Q14;
1264 
1265   int16_t randW16[PART_LEN];
1266   int16_t uReal[PART_LEN1];
1267   int16_t uImag[PART_LEN1];
1268   int32_t outLShift32;
1269 
1270   int16_t shiftFromNearToNoise = kNoiseEstQDomain - aecm->dfaCleanQDomain;
1271   int16_t minTrackShift = 9;
1272 
1273   RTC_DCHECK_GE(shiftFromNearToNoise, 0);
1274   RTC_DCHECK_LT(shiftFromNearToNoise, 16);
1275 
1276   if (aecm->noiseEstCtr < 100) {
1277     // Track the minimum more quickly initially.
1278     aecm->noiseEstCtr++;
1279     minTrackShift = 6;
1280   }
1281 
1282   // Generate a uniform random array on [0 2^15-1].
1283   WebRtcSpl_RandUArray(randW16, PART_LEN, &aecm->seed);
1284   int16_t* randW16p = (int16_t*)randW16;
1285 #if defined (MIPS_DSP_R1_LE)
1286   int16_t* kCosTablep = (int16_t*)WebRtcAecm_kCosTable;
1287   int16_t* kSinTablep = (int16_t*)WebRtcAecm_kSinTable;
1288 #endif   // #if defined(MIPS_DSP_R1_LE)
1289   tmp1 = (int32_t*)aecm->noiseEst + 1;
1290   dfap = (int16_t*)dfa + 1;
1291   lambdap = (int16_t*)lambda + 1;
1292   // Estimate noise power.
1293   for (i = 1; i < PART_LEN1; i+=2) {
1294   // Shift to the noise domain.
1295     __asm __volatile (
1296       "lh     %[tmp32],       0(%[dfap])                              \n\t"
1297       "lw     %[tnoise],      0(%[tmp1])                              \n\t"
1298       "sllv   %[outLShift32], %[tmp32],   %[shiftFromNearToNoise]     \n\t"
1299       : [tmp32] "=&r" (tmp32), [outLShift32] "=r" (outLShift32),
1300         [tnoise] "=&r" (tnoise)
1301       : [tmp1] "r" (tmp1), [dfap] "r" (dfap),
1302         [shiftFromNearToNoise] "r" (shiftFromNearToNoise)
1303       : "memory"
1304     );
1305 
1306     if (outLShift32 < tnoise) {
1307       // Reset "too low" counter
1308       aecm->noiseEstTooLowCtr[i] = 0;
1309       // Track the minimum.
1310       if (tnoise < (1 << minTrackShift)) {
1311         // For small values, decrease noiseEst[i] every
1312         // |kNoiseEstIncCount| block. The regular approach below can not
1313         // go further down due to truncation.
1314         aecm->noiseEstTooHighCtr[i]++;
1315         if (aecm->noiseEstTooHighCtr[i] >= kNoiseEstIncCount) {
1316           tnoise--;
1317           aecm->noiseEstTooHighCtr[i] = 0;  // Reset the counter
1318         }
1319       } else {
1320         __asm __volatile (
1321           "subu   %[tmp32],       %[tnoise],      %[outLShift32]      \n\t"
1322           "srav   %[tmp32],       %[tmp32],       %[minTrackShift]    \n\t"
1323           "subu   %[tnoise],      %[tnoise],      %[tmp32]            \n\t"
1324           : [tmp32] "=&r" (tmp32), [tnoise] "+r" (tnoise)
1325           : [outLShift32] "r" (outLShift32), [minTrackShift] "r" (minTrackShift)
1326         );
1327       }
1328     } else {
1329       // Reset "too high" counter
1330       aecm->noiseEstTooHighCtr[i] = 0;
1331       // Ramp slowly upwards until we hit the minimum again.
1332       if ((tnoise >> 19) <= 0) {
1333         if ((tnoise >> 11) > 0) {
1334           // Large enough for relative increase
1335           __asm __volatile (
1336             "mul    %[tnoise],  %[tnoise],  %[c2049]    \n\t"
1337             "sra    %[tnoise],  %[tnoise],  11          \n\t"
1338             : [tnoise] "+r" (tnoise)
1339             : [c2049] "r" (c2049)
1340             : "hi", "lo"
1341           );
1342         } else {
1343           // Make incremental increases based on size every
1344           // |kNoiseEstIncCount| block
1345           aecm->noiseEstTooLowCtr[i]++;
1346           if (aecm->noiseEstTooLowCtr[i] >= kNoiseEstIncCount) {
1347             __asm __volatile (
1348               "sra    %[tmp32],   %[tnoise],  9           \n\t"
1349               "addi   %[tnoise],  %[tnoise],  1           \n\t"
1350               "addu   %[tnoise],  %[tnoise],  %[tmp32]    \n\t"
1351               : [tnoise] "+r" (tnoise), [tmp32] "=&r" (tmp32)
1352               :
1353             );
1354             aecm->noiseEstTooLowCtr[i] = 0; // Reset counter
1355           }
1356         }
1357       } else {
1358         // Avoid overflow.
1359         // Multiplication with 2049 will cause wrap around. Scale
1360         // down first and then multiply
1361         __asm __volatile (
1362           "sra    %[tnoise],  %[tnoise],  11          \n\t"
1363           "mul    %[tnoise],  %[tnoise],  %[c2049]    \n\t"
1364           : [tnoise] "+r" (tnoise)
1365           : [c2049] "r" (c2049)
1366           : "hi", "lo"
1367         );
1368       }
1369     }
1370 
1371     // Shift to the noise domain.
1372     __asm __volatile (
1373       "lh     %[tmp32],       2(%[dfap])                              \n\t"
1374       "lw     %[tnoise1],     4(%[tmp1])                              \n\t"
1375       "addiu  %[dfap],        %[dfap],    4                           \n\t"
1376       "sllv   %[outLShift32], %[tmp32],   %[shiftFromNearToNoise]     \n\t"
1377       : [tmp32] "=&r" (tmp32), [dfap] "+r" (dfap),
1378         [outLShift32] "=r" (outLShift32), [tnoise1] "=&r" (tnoise1)
1379       : [tmp1] "r" (tmp1), [shiftFromNearToNoise] "r" (shiftFromNearToNoise)
1380       : "memory"
1381     );
1382 
1383     if (outLShift32 < tnoise1) {
1384       // Reset "too low" counter
1385       aecm->noiseEstTooLowCtr[i + 1] = 0;
1386       // Track the minimum.
1387       if (tnoise1 < (1 << minTrackShift)) {
1388         // For small values, decrease noiseEst[i] every
1389         // |kNoiseEstIncCount| block. The regular approach below can not
1390         // go further down due to truncation.
1391         aecm->noiseEstTooHighCtr[i + 1]++;
1392         if (aecm->noiseEstTooHighCtr[i + 1] >= kNoiseEstIncCount) {
1393           tnoise1--;
1394           aecm->noiseEstTooHighCtr[i + 1] = 0; // Reset the counter
1395         }
1396       } else {
1397         __asm __volatile (
1398           "subu   %[tmp32],       %[tnoise1],     %[outLShift32]      \n\t"
1399           "srav   %[tmp32],       %[tmp32],       %[minTrackShift]    \n\t"
1400           "subu   %[tnoise1],     %[tnoise1],     %[tmp32]            \n\t"
1401           : [tmp32] "=&r" (tmp32), [tnoise1] "+r" (tnoise1)
1402           : [outLShift32] "r" (outLShift32), [minTrackShift] "r" (minTrackShift)
1403         );
1404       }
1405     } else {
1406       // Reset "too high" counter
1407       aecm->noiseEstTooHighCtr[i + 1] = 0;
1408       // Ramp slowly upwards until we hit the minimum again.
1409       if ((tnoise1 >> 19) <= 0) {
1410         if ((tnoise1 >> 11) > 0) {
1411           // Large enough for relative increase
1412           __asm __volatile (
1413             "mul    %[tnoise1], %[tnoise1], %[c2049]   \n\t"
1414             "sra    %[tnoise1], %[tnoise1], 11         \n\t"
1415             : [tnoise1] "+r" (tnoise1)
1416             : [c2049] "r" (c2049)
1417             : "hi", "lo"
1418           );
1419         } else {
1420           // Make incremental increases based on size every
1421           // |kNoiseEstIncCount| block
1422           aecm->noiseEstTooLowCtr[i + 1]++;
1423           if (aecm->noiseEstTooLowCtr[i + 1] >= kNoiseEstIncCount) {
1424             __asm __volatile (
1425               "sra    %[tmp32],   %[tnoise1], 9           \n\t"
1426               "addi   %[tnoise1], %[tnoise1], 1           \n\t"
1427               "addu   %[tnoise1], %[tnoise1], %[tmp32]    \n\t"
1428               : [tnoise1] "+r" (tnoise1), [tmp32] "=&r" (tmp32)
1429               :
1430             );
1431             aecm->noiseEstTooLowCtr[i + 1] = 0; // Reset counter
1432           }
1433         }
1434       } else {
1435         // Avoid overflow.
1436         // Multiplication with 2049 will cause wrap around. Scale
1437         // down first and then multiply
1438         __asm __volatile (
1439           "sra    %[tnoise1], %[tnoise1], 11          \n\t"
1440           "mul    %[tnoise1], %[tnoise1], %[c2049]    \n\t"
1441           : [tnoise1] "+r" (tnoise1)
1442           : [c2049] "r" (c2049)
1443           : "hi", "lo"
1444         );
1445       }
1446     }
1447 
1448     __asm __volatile (
1449       "lh     %[tmp16],   0(%[lambdap])                           \n\t"
1450       "lh     %[tmp161],  2(%[lambdap])                           \n\t"
1451       "sw     %[tnoise],  0(%[tmp1])                              \n\t"
1452       "sw     %[tnoise1], 4(%[tmp1])                              \n\t"
1453       "subu   %[tmp16],   %[c114],        %[tmp16]                \n\t"
1454       "subu   %[tmp161],  %[c114],        %[tmp161]               \n\t"
1455       "srav   %[tmp32],   %[tnoise],      %[shiftFromNearToNoise] \n\t"
1456       "srav   %[tmp321],  %[tnoise1],     %[shiftFromNearToNoise] \n\t"
1457       "addiu  %[lambdap], %[lambdap],     4                       \n\t"
1458       "addiu  %[tmp1],    %[tmp1],        8                       \n\t"
1459       : [tmp16] "=&r" (tmp16), [tmp161] "=&r" (tmp161), [tmp1] "+r" (tmp1),
1460         [tmp32] "=&r" (tmp32), [tmp321] "=&r" (tmp321), [lambdap] "+r" (lambdap)
1461       : [tnoise] "r" (tnoise), [tnoise1] "r" (tnoise1), [c114] "r" (c114),
1462         [shiftFromNearToNoise] "r" (shiftFromNearToNoise)
1463       : "memory"
1464     );
1465 
1466     if (tmp32 > 32767) {
1467       tmp32 = 32767;
1468       aecm->noiseEst[i] = tmp32 << shiftFromNearToNoise;
1469     }
1470     if (tmp321 > 32767) {
1471       tmp321 = 32767;
1472       aecm->noiseEst[i+1] = tmp321 << shiftFromNearToNoise;
1473     }
1474 
1475     __asm __volatile (
1476       "mul    %[tmp32],   %[tmp32],       %[tmp16]                \n\t"
1477       "mul    %[tmp321],  %[tmp321],      %[tmp161]               \n\t"
1478       "sra    %[nrsh1],   %[tmp32],       14                      \n\t"
1479       "sra    %[nrsh2],   %[tmp321],      14                      \n\t"
1480       : [nrsh1] "=&r" (nrsh1), [nrsh2] "=r" (nrsh2)
1481       : [tmp16] "r" (tmp16), [tmp161] "r" (tmp161), [tmp32] "r" (tmp32),
1482         [tmp321] "r" (tmp321)
1483       : "memory", "hi", "lo"
1484     );
1485 
1486     __asm __volatile (
1487       "lh     %[tmp32],       0(%[randW16p])              \n\t"
1488       "lh     %[tmp321],      2(%[randW16p])              \n\t"
1489       "addiu  %[randW16p],    %[randW16p],    4           \n\t"
1490       "mul    %[tmp32],       %[tmp32],       %[c359]     \n\t"
1491       "mul    %[tmp321],      %[tmp321],      %[c359]     \n\t"
1492       "sra    %[tmp16],       %[tmp32],       15          \n\t"
1493       "sra    %[tmp161],      %[tmp321],      15          \n\t"
1494       : [randW16p] "+r" (randW16p), [tmp32] "=&r" (tmp32),
1495         [tmp16] "=r" (tmp16), [tmp161] "=r" (tmp161), [tmp321] "=&r" (tmp321)
1496       : [c359] "r" (c359)
1497       : "memory", "hi", "lo"
1498     );
1499 
1500 #if !defined(MIPS_DSP_R1_LE)
1501     tmp32 = WebRtcAecm_kCosTable[tmp16];
1502     tmp321 = WebRtcAecm_kSinTable[tmp16];
1503     tmp322 = WebRtcAecm_kCosTable[tmp161];
1504     tmp323 = WebRtcAecm_kSinTable[tmp161];
1505 #else
1506     __asm __volatile (
1507       "sll    %[tmp16],       %[tmp16],                   1           \n\t"
1508       "sll    %[tmp161],      %[tmp161],                  1           \n\t"
1509       "lhx    %[tmp32],       %[tmp16](%[kCosTablep])                 \n\t"
1510       "lhx    %[tmp321],      %[tmp16](%[kSinTablep])                 \n\t"
1511       "lhx    %[tmp322],      %[tmp161](%[kCosTablep])                \n\t"
1512       "lhx    %[tmp323],      %[tmp161](%[kSinTablep])                \n\t"
1513       : [tmp32] "=&r" (tmp32), [tmp321] "=&r" (tmp321),
1514         [tmp322] "=&r" (tmp322), [tmp323] "=&r" (tmp323)
1515       : [kCosTablep] "r" (kCosTablep), [tmp16] "r" (tmp16),
1516         [tmp161] "r" (tmp161), [kSinTablep] "r" (kSinTablep)
1517       : "memory"
1518     );
1519 #endif
1520     __asm __volatile (
1521       "mul    %[tmp32],       %[tmp32],                   %[nrsh1]    \n\t"
1522       "negu   %[tmp162],      %[nrsh1]                                \n\t"
1523       "mul    %[tmp322],      %[tmp322],                  %[nrsh2]    \n\t"
1524       "negu   %[tmp163],      %[nrsh2]                                \n\t"
1525       "sra    %[tmp32],       %[tmp32],                   13          \n\t"
1526       "mul    %[tmp321],      %[tmp321],                  %[tmp162]   \n\t"
1527       "sra    %[tmp322],      %[tmp322],                  13          \n\t"
1528       "mul    %[tmp323],      %[tmp323],                  %[tmp163]   \n\t"
1529       "sra    %[tmp321],      %[tmp321],                  13          \n\t"
1530       "sra    %[tmp323],      %[tmp323],                  13          \n\t"
1531       : [tmp32] "+r" (tmp32), [tmp321] "+r" (tmp321), [tmp162] "=&r" (tmp162),
1532         [tmp322] "+r" (tmp322), [tmp323] "+r" (tmp323), [tmp163] "=&r" (tmp163)
1533       : [nrsh1] "r" (nrsh1), [nrsh2] "r" (nrsh2)
1534       : "hi", "lo"
1535     );
1536     // Tables are in Q13.
1537     uReal[i] = (int16_t)tmp32;
1538     uImag[i] = (int16_t)tmp321;
1539     uReal[i + 1] = (int16_t)tmp322;
1540     uImag[i + 1] = (int16_t)tmp323;
1541   }
1542 
1543   int32_t tt, sgn;
1544   tt = out[0].real;
1545   sgn = ((int)tt) >> 31;
1546   out[0].real = sgn == (int16_t)(tt >> 15) ? (int16_t)tt : (16384 ^ sgn);
1547   tt = out[0].imag;
1548   sgn = ((int)tt) >> 31;
1549   out[0].imag = sgn == (int16_t)(tt >> 15) ? (int16_t)tt : (16384 ^ sgn);
1550   for (i = 1; i < PART_LEN; i++) {
1551     tt = out[i].real + uReal[i];
1552     sgn = ((int)tt) >> 31;
1553     out[i].real = sgn == (int16_t)(tt >> 15) ? (int16_t)tt : (16384 ^ sgn);
1554     tt = out[i].imag + uImag[i];
1555     sgn = ((int)tt) >> 31;
1556     out[i].imag = sgn == (int16_t)(tt >> 15) ? (int16_t)tt : (16384 ^ sgn);
1557   }
1558   tt = out[PART_LEN].real + uReal[PART_LEN];
1559   sgn = ((int)tt) >> 31;
1560   out[PART_LEN].real = sgn == (int16_t)(tt >> 15) ? (int16_t)tt : (16384 ^ sgn);
1561   tt = out[PART_LEN].imag;
1562   sgn = ((int)tt) >> 31;
1563   out[PART_LEN].imag = sgn == (int16_t)(tt >> 15) ? (int16_t)tt : (16384 ^ sgn);
1564 }
1565