1const std = @import("std.zig");
2const io = std.io;
3const os = std.os;
4const math = std.math;
5const mem = std.mem;
6const debug = std.debug;
7const File = std.fs.File;
8const native_endian = @import("builtin").target.cpu.arch.endian();
9
10pub const AT_NULL = 0;
11pub const AT_IGNORE = 1;
12pub const AT_EXECFD = 2;
13pub const AT_PHDR = 3;
14pub const AT_PHENT = 4;
15pub const AT_PHNUM = 5;
16pub const AT_PAGESZ = 6;
17pub const AT_BASE = 7;
18pub const AT_FLAGS = 8;
19pub const AT_ENTRY = 9;
20pub const AT_NOTELF = 10;
21pub const AT_UID = 11;
22pub const AT_EUID = 12;
23pub const AT_GID = 13;
24pub const AT_EGID = 14;
25pub const AT_CLKTCK = 17;
26pub const AT_PLATFORM = 15;
27pub const AT_HWCAP = 16;
28pub const AT_FPUCW = 18;
29pub const AT_DCACHEBSIZE = 19;
30pub const AT_ICACHEBSIZE = 20;
31pub const AT_UCACHEBSIZE = 21;
32pub const AT_IGNOREPPC = 22;
33pub const AT_SECURE = 23;
34pub const AT_BASE_PLATFORM = 24;
35pub const AT_RANDOM = 25;
36pub const AT_HWCAP2 = 26;
37pub const AT_EXECFN = 31;
38pub const AT_SYSINFO = 32;
39pub const AT_SYSINFO_EHDR = 33;
40pub const AT_L1I_CACHESHAPE = 34;
41pub const AT_L1D_CACHESHAPE = 35;
42pub const AT_L2_CACHESHAPE = 36;
43pub const AT_L3_CACHESHAPE = 37;
44pub const AT_L1I_CACHESIZE = 40;
45pub const AT_L1I_CACHEGEOMETRY = 41;
46pub const AT_L1D_CACHESIZE = 42;
47pub const AT_L1D_CACHEGEOMETRY = 43;
48pub const AT_L2_CACHESIZE = 44;
49pub const AT_L2_CACHEGEOMETRY = 45;
50pub const AT_L3_CACHESIZE = 46;
51pub const AT_L3_CACHEGEOMETRY = 47;
52
53pub const DT_NULL = 0;
54pub const DT_NEEDED = 1;
55pub const DT_PLTRELSZ = 2;
56pub const DT_PLTGOT = 3;
57pub const DT_HASH = 4;
58pub const DT_STRTAB = 5;
59pub const DT_SYMTAB = 6;
60pub const DT_RELA = 7;
61pub const DT_RELASZ = 8;
62pub const DT_RELAENT = 9;
63pub const DT_STRSZ = 10;
64pub const DT_SYMENT = 11;
65pub const DT_INIT = 12;
66pub const DT_FINI = 13;
67pub const DT_SONAME = 14;
68pub const DT_RPATH = 15;
69pub const DT_SYMBOLIC = 16;
70pub const DT_REL = 17;
71pub const DT_RELSZ = 18;
72pub const DT_RELENT = 19;
73pub const DT_PLTREL = 20;
74pub const DT_DEBUG = 21;
75pub const DT_TEXTREL = 22;
76pub const DT_JMPREL = 23;
77pub const DT_BIND_NOW = 24;
78pub const DT_INIT_ARRAY = 25;
79pub const DT_FINI_ARRAY = 26;
80pub const DT_INIT_ARRAYSZ = 27;
81pub const DT_FINI_ARRAYSZ = 28;
82pub const DT_RUNPATH = 29;
83pub const DT_FLAGS = 30;
84pub const DT_ENCODING = 32;
85pub const DT_PREINIT_ARRAY = 32;
86pub const DT_PREINIT_ARRAYSZ = 33;
87pub const DT_SYMTAB_SHNDX = 34;
88pub const DT_NUM = 35;
89pub const DT_LOOS = 0x6000000d;
90pub const DT_HIOS = 0x6ffff000;
91pub const DT_LOPROC = 0x70000000;
92pub const DT_HIPROC = 0x7fffffff;
93pub const DT_PROCNUM = DT_MIPS_NUM;
94
95pub const DT_VALRNGLO = 0x6ffffd00;
96pub const DT_GNU_PRELINKED = 0x6ffffdf5;
97pub const DT_GNU_CONFLICTSZ = 0x6ffffdf6;
98pub const DT_GNU_LIBLISTSZ = 0x6ffffdf7;
99pub const DT_CHECKSUM = 0x6ffffdf8;
100pub const DT_PLTPADSZ = 0x6ffffdf9;
101pub const DT_MOVEENT = 0x6ffffdfa;
102pub const DT_MOVESZ = 0x6ffffdfb;
103pub const DT_FEATURE_1 = 0x6ffffdfc;
104pub const DT_POSFLAG_1 = 0x6ffffdfd;
105
106pub const DT_SYMINSZ = 0x6ffffdfe;
107pub const DT_SYMINENT = 0x6ffffdff;
108pub const DT_VALRNGHI = 0x6ffffdff;
109pub const DT_VALNUM = 12;
110
111pub const DT_ADDRRNGLO = 0x6ffffe00;
112pub const DT_GNU_HASH = 0x6ffffef5;
113pub const DT_TLSDESC_PLT = 0x6ffffef6;
114pub const DT_TLSDESC_GOT = 0x6ffffef7;
115pub const DT_GNU_CONFLICT = 0x6ffffef8;
116pub const DT_GNU_LIBLIST = 0x6ffffef9;
117pub const DT_CONFIG = 0x6ffffefa;
118pub const DT_DEPAUDIT = 0x6ffffefb;
119pub const DT_AUDIT = 0x6ffffefc;
120pub const DT_PLTPAD = 0x6ffffefd;
121pub const DT_MOVETAB = 0x6ffffefe;
122pub const DT_SYMINFO = 0x6ffffeff;
123pub const DT_ADDRRNGHI = 0x6ffffeff;
124pub const DT_ADDRNUM = 11;
125
126pub const DT_VERSYM = 0x6ffffff0;
127
128pub const DT_RELACOUNT = 0x6ffffff9;
129pub const DT_RELCOUNT = 0x6ffffffa;
130
131pub const DT_FLAGS_1 = 0x6ffffffb;
132pub const DT_VERDEF = 0x6ffffffc;
133
134pub const DT_VERDEFNUM = 0x6ffffffd;
135pub const DT_VERNEED = 0x6ffffffe;
136
137pub const DT_VERNEEDNUM = 0x6fffffff;
138pub const DT_VERSIONTAGNUM = 16;
139
140pub const DT_AUXILIARY = 0x7ffffffd;
141pub const DT_FILTER = 0x7fffffff;
142pub const DT_EXTRANUM = 3;
143
144pub const DT_SPARC_REGISTER = 0x70000001;
145pub const DT_SPARC_NUM = 2;
146
147pub const DT_MIPS_RLD_VERSION = 0x70000001;
148pub const DT_MIPS_TIME_STAMP = 0x70000002;
149pub const DT_MIPS_ICHECKSUM = 0x70000003;
150pub const DT_MIPS_IVERSION = 0x70000004;
151pub const DT_MIPS_FLAGS = 0x70000005;
152pub const DT_MIPS_BASE_ADDRESS = 0x70000006;
153pub const DT_MIPS_MSYM = 0x70000007;
154pub const DT_MIPS_CONFLICT = 0x70000008;
155pub const DT_MIPS_LIBLIST = 0x70000009;
156pub const DT_MIPS_LOCAL_GOTNO = 0x7000000a;
157pub const DT_MIPS_CONFLICTNO = 0x7000000b;
158pub const DT_MIPS_LIBLISTNO = 0x70000010;
159pub const DT_MIPS_SYMTABNO = 0x70000011;
160pub const DT_MIPS_UNREFEXTNO = 0x70000012;
161pub const DT_MIPS_GOTSYM = 0x70000013;
162pub const DT_MIPS_HIPAGENO = 0x70000014;
163pub const DT_MIPS_RLD_MAP = 0x70000016;
164pub const DT_MIPS_DELTA_CLASS = 0x70000017;
165pub const DT_MIPS_DELTA_CLASS_NO = 0x70000018;
166
167pub const DT_MIPS_DELTA_INSTANCE = 0x70000019;
168pub const DT_MIPS_DELTA_INSTANCE_NO = 0x7000001a;
169
170pub const DT_MIPS_DELTA_RELOC = 0x7000001b;
171pub const DT_MIPS_DELTA_RELOC_NO = 0x7000001c;
172
173pub const DT_MIPS_DELTA_SYM = 0x7000001d;
174
175pub const DT_MIPS_DELTA_SYM_NO = 0x7000001e;
176
177pub const DT_MIPS_DELTA_CLASSSYM = 0x70000020;
178
179pub const DT_MIPS_DELTA_CLASSSYM_NO = 0x70000021;
180
181pub const DT_MIPS_CXX_FLAGS = 0x70000022;
182pub const DT_MIPS_PIXIE_INIT = 0x70000023;
183pub const DT_MIPS_SYMBOL_LIB = 0x70000024;
184pub const DT_MIPS_LOCALPAGE_GOTIDX = 0x70000025;
185pub const DT_MIPS_LOCAL_GOTIDX = 0x70000026;
186pub const DT_MIPS_HIDDEN_GOTIDX = 0x70000027;
187pub const DT_MIPS_PROTECTED_GOTIDX = 0x70000028;
188pub const DT_MIPS_OPTIONS = 0x70000029;
189pub const DT_MIPS_INTERFACE = 0x7000002a;
190pub const DT_MIPS_DYNSTR_ALIGN = 0x7000002b;
191pub const DT_MIPS_INTERFACE_SIZE = 0x7000002c;
192pub const DT_MIPS_RLD_TEXT_RESOLVE_ADDR = 0x7000002d;
193
194pub const DT_MIPS_PERF_SUFFIX = 0x7000002e;
195
196pub const DT_MIPS_COMPACT_SIZE = 0x7000002f;
197pub const DT_MIPS_GP_VALUE = 0x70000030;
198pub const DT_MIPS_AUX_DYNAMIC = 0x70000031;
199
200pub const DT_MIPS_PLTGOT = 0x70000032;
201
202pub const DT_MIPS_RWPLT = 0x70000034;
203pub const DT_MIPS_RLD_MAP_REL = 0x70000035;
204pub const DT_MIPS_NUM = 0x36;
205
206pub const DT_ALPHA_PLTRO = (DT_LOPROC + 0);
207pub const DT_ALPHA_NUM = 1;
208
209pub const DT_PPC_GOT = (DT_LOPROC + 0);
210pub const DT_PPC_OPT = (DT_LOPROC + 1);
211pub const DT_PPC_NUM = 2;
212
213pub const DT_PPC64_GLINK = (DT_LOPROC + 0);
214pub const DT_PPC64_OPD = (DT_LOPROC + 1);
215pub const DT_PPC64_OPDSZ = (DT_LOPROC + 2);
216pub const DT_PPC64_OPT = (DT_LOPROC + 3);
217pub const DT_PPC64_NUM = 4;
218
219pub const DT_IA_64_PLT_RESERVE = (DT_LOPROC + 0);
220pub const DT_IA_64_NUM = 1;
221
222pub const DT_NIOS2_GP = 0x70000002;
223
224pub const PT_NULL = 0;
225pub const PT_LOAD = 1;
226pub const PT_DYNAMIC = 2;
227pub const PT_INTERP = 3;
228pub const PT_NOTE = 4;
229pub const PT_SHLIB = 5;
230pub const PT_PHDR = 6;
231pub const PT_TLS = 7;
232pub const PT_NUM = 8;
233pub const PT_LOOS = 0x60000000;
234pub const PT_GNU_EH_FRAME = 0x6474e550;
235pub const PT_GNU_STACK = 0x6474e551;
236pub const PT_GNU_RELRO = 0x6474e552;
237pub const PT_LOSUNW = 0x6ffffffa;
238pub const PT_SUNWBSS = 0x6ffffffa;
239pub const PT_SUNWSTACK = 0x6ffffffb;
240pub const PT_HISUNW = 0x6fffffff;
241pub const PT_HIOS = 0x6fffffff;
242pub const PT_LOPROC = 0x70000000;
243pub const PT_HIPROC = 0x7fffffff;
244
245pub const SHT_NULL = 0;
246pub const SHT_PROGBITS = 1;
247pub const SHT_SYMTAB = 2;
248pub const SHT_STRTAB = 3;
249pub const SHT_RELA = 4;
250pub const SHT_HASH = 5;
251pub const SHT_DYNAMIC = 6;
252pub const SHT_NOTE = 7;
253pub const SHT_NOBITS = 8;
254pub const SHT_REL = 9;
255pub const SHT_SHLIB = 10;
256pub const SHT_DYNSYM = 11;
257pub const SHT_INIT_ARRAY = 14;
258pub const SHT_FINI_ARRAY = 15;
259pub const SHT_PREINIT_ARRAY = 16;
260pub const SHT_GROUP = 17;
261pub const SHT_SYMTAB_SHNDX = 18;
262pub const SHT_LOOS = 0x60000000;
263pub const SHT_HIOS = 0x6fffffff;
264pub const SHT_LOPROC = 0x70000000;
265pub const SHT_HIPROC = 0x7fffffff;
266pub const SHT_LOUSER = 0x80000000;
267pub const SHT_HIUSER = 0xffffffff;
268
269pub const STB_LOCAL = 0;
270pub const STB_GLOBAL = 1;
271pub const STB_WEAK = 2;
272pub const STB_NUM = 3;
273pub const STB_LOOS = 10;
274pub const STB_GNU_UNIQUE = 10;
275pub const STB_HIOS = 12;
276pub const STB_LOPROC = 13;
277pub const STB_HIPROC = 15;
278
279pub const STB_MIPS_SPLIT_COMMON = 13;
280
281pub const STT_NOTYPE = 0;
282pub const STT_OBJECT = 1;
283pub const STT_FUNC = 2;
284pub const STT_SECTION = 3;
285pub const STT_FILE = 4;
286pub const STT_COMMON = 5;
287pub const STT_TLS = 6;
288pub const STT_NUM = 7;
289pub const STT_LOOS = 10;
290pub const STT_GNU_IFUNC = 10;
291pub const STT_HIOS = 12;
292pub const STT_LOPROC = 13;
293pub const STT_HIPROC = 15;
294
295pub const STT_SPARC_REGISTER = 13;
296
297pub const STT_PARISC_MILLICODE = 13;
298
299pub const STT_HP_OPAQUE = (STT_LOOS + 0x1);
300pub const STT_HP_STUB = (STT_LOOS + 0x2);
301
302pub const STT_ARM_TFUNC = STT_LOPROC;
303pub const STT_ARM_16BIT = STT_HIPROC;
304
305pub const VER_FLG_BASE = 0x1;
306pub const VER_FLG_WEAK = 0x2;
307
308/// File types
309pub const ET = enum(u16) {
310    /// No file type
311    NONE = 0,
312
313    /// Relocatable file
314    REL = 1,
315
316    /// Executable file
317    EXEC = 2,
318
319    /// Shared object file
320    DYN = 3,
321
322    /// Core file
323    CORE = 4,
324
325    /// Beginning of processor-specific codes
326    pub const LOPROC = 0xff00;
327
328    /// Processor-specific
329    pub const HIPROC = 0xffff;
330};
331
332/// All integers are native endian.
333pub const Header = struct {
334    endian: std.builtin.Endian,
335    machine: EM,
336    is_64: bool,
337    entry: u64,
338    phoff: u64,
339    shoff: u64,
340    phentsize: u16,
341    phnum: u16,
342    shentsize: u16,
343    shnum: u16,
344    shstrndx: u16,
345
346    pub fn program_header_iterator(self: Header, parse_source: anytype) ProgramHeaderIterator(@TypeOf(parse_source)) {
347        return ProgramHeaderIterator(@TypeOf(parse_source)){
348            .elf_header = self,
349            .parse_source = parse_source,
350        };
351    }
352
353    pub fn section_header_iterator(self: Header, parse_source: anytype) SectionHeaderIterator(@TypeOf(parse_source)) {
354        return SectionHeaderIterator(@TypeOf(parse_source)){
355            .elf_header = self,
356            .parse_source = parse_source,
357        };
358    }
359
360    pub fn read(parse_source: anytype) !Header {
361        var hdr_buf: [@sizeOf(Elf64_Ehdr)]u8 align(@alignOf(Elf64_Ehdr)) = undefined;
362        try parse_source.seekableStream().seekTo(0);
363        try parse_source.reader().readNoEof(&hdr_buf);
364        return Header.parse(&hdr_buf);
365    }
366
367    pub fn parse(hdr_buf: *align(@alignOf(Elf64_Ehdr)) const [@sizeOf(Elf64_Ehdr)]u8) !Header {
368        const hdr32 = @ptrCast(*const Elf32_Ehdr, hdr_buf);
369        const hdr64 = @ptrCast(*const Elf64_Ehdr, hdr_buf);
370        if (!mem.eql(u8, hdr32.e_ident[0..4], "\x7fELF")) return error.InvalidElfMagic;
371        if (hdr32.e_ident[EI_VERSION] != 1) return error.InvalidElfVersion;
372
373        const endian: std.builtin.Endian = switch (hdr32.e_ident[EI_DATA]) {
374            ELFDATA2LSB => .Little,
375            ELFDATA2MSB => .Big,
376            else => return error.InvalidElfEndian,
377        };
378        const need_bswap = endian != native_endian;
379
380        const is_64 = switch (hdr32.e_ident[EI_CLASS]) {
381            ELFCLASS32 => false,
382            ELFCLASS64 => true,
383            else => return error.InvalidElfClass,
384        };
385
386        const machine = if (need_bswap) blk: {
387            const value = @enumToInt(hdr32.e_machine);
388            break :blk @intToEnum(EM, @byteSwap(@TypeOf(value), value));
389        } else hdr32.e_machine;
390
391        return @as(Header, .{
392            .endian = endian,
393            .machine = machine,
394            .is_64 = is_64,
395            .entry = int(is_64, need_bswap, hdr32.e_entry, hdr64.e_entry),
396            .phoff = int(is_64, need_bswap, hdr32.e_phoff, hdr64.e_phoff),
397            .shoff = int(is_64, need_bswap, hdr32.e_shoff, hdr64.e_shoff),
398            .phentsize = int(is_64, need_bswap, hdr32.e_phentsize, hdr64.e_phentsize),
399            .phnum = int(is_64, need_bswap, hdr32.e_phnum, hdr64.e_phnum),
400            .shentsize = int(is_64, need_bswap, hdr32.e_shentsize, hdr64.e_shentsize),
401            .shnum = int(is_64, need_bswap, hdr32.e_shnum, hdr64.e_shnum),
402            .shstrndx = int(is_64, need_bswap, hdr32.e_shstrndx, hdr64.e_shstrndx),
403        });
404    }
405};
406
407pub fn ProgramHeaderIterator(ParseSource: anytype) type {
408    return struct {
409        elf_header: Header,
410        parse_source: ParseSource,
411        index: usize = 0,
412
413        pub fn next(self: *@This()) !?Elf64_Phdr {
414            if (self.index >= self.elf_header.phnum) return null;
415            defer self.index += 1;
416
417            if (self.elf_header.is_64) {
418                var phdr: Elf64_Phdr = undefined;
419                const offset = self.elf_header.phoff + @sizeOf(@TypeOf(phdr)) * self.index;
420                try self.parse_source.seekableStream().seekTo(offset);
421                try self.parse_source.reader().readNoEof(mem.asBytes(&phdr));
422
423                // ELF endianness matches native endianness.
424                if (self.elf_header.endian == native_endian) return phdr;
425
426                // Convert fields to native endianness.
427                mem.bswapAllFields(Elf64_Phdr, &phdr);
428                return phdr;
429            }
430
431            var phdr: Elf32_Phdr = undefined;
432            const offset = self.elf_header.phoff + @sizeOf(@TypeOf(phdr)) * self.index;
433            try self.parse_source.seekableStream().seekTo(offset);
434            try self.parse_source.reader().readNoEof(mem.asBytes(&phdr));
435
436            // ELF endianness does NOT match native endianness.
437            if (self.elf_header.endian != native_endian) {
438                // Convert fields to native endianness.
439                mem.bswapAllFields(Elf32_Phdr, &phdr);
440            }
441
442            // Convert 32-bit header to 64-bit.
443            return Elf64_Phdr{
444                .p_type = phdr.p_type,
445                .p_offset = phdr.p_offset,
446                .p_vaddr = phdr.p_vaddr,
447                .p_paddr = phdr.p_paddr,
448                .p_filesz = phdr.p_filesz,
449                .p_memsz = phdr.p_memsz,
450                .p_flags = phdr.p_flags,
451                .p_align = phdr.p_align,
452            };
453        }
454    };
455}
456
457pub fn SectionHeaderIterator(ParseSource: anytype) type {
458    return struct {
459        elf_header: Header,
460        parse_source: ParseSource,
461        index: usize = 0,
462
463        pub fn next(self: *@This()) !?Elf64_Shdr {
464            if (self.index >= self.elf_header.shnum) return null;
465            defer self.index += 1;
466
467            if (self.elf_header.is_64) {
468                var shdr: Elf64_Shdr = undefined;
469                const offset = self.elf_header.shoff + @sizeOf(@TypeOf(shdr)) * self.index;
470                try self.parse_source.seekableStream().seekTo(offset);
471                try self.parse_source.reader().readNoEof(mem.asBytes(&shdr));
472
473                // ELF endianness matches native endianness.
474                if (self.elf_header.endian == native_endian) return shdr;
475
476                // Convert fields to native endianness.
477                mem.bswapAllFields(Elf64_Shdr, &shdr);
478                return shdr;
479            }
480
481            var shdr: Elf32_Shdr = undefined;
482            const offset = self.elf_header.shoff + @sizeOf(@TypeOf(shdr)) * self.index;
483            try self.parse_source.seekableStream().seekTo(offset);
484            try self.parse_source.reader().readNoEof(mem.asBytes(&shdr));
485
486            // ELF endianness does NOT match native endianness.
487            if (self.elf_header.endian != native_endian) {
488                // Convert fields to native endianness.
489                mem.bswapAllFields(Elf32_Shdr, &shdr);
490            }
491
492            // Convert 32-bit header to 64-bit.
493            return Elf64_Shdr{
494                .sh_name = shdr.sh_name,
495                .sh_type = shdr.sh_type,
496                .sh_flags = shdr.sh_flags,
497                .sh_addr = shdr.sh_addr,
498                .sh_offset = shdr.sh_offset,
499                .sh_size = shdr.sh_size,
500                .sh_link = shdr.sh_link,
501                .sh_info = shdr.sh_info,
502                .sh_addralign = shdr.sh_addralign,
503                .sh_entsize = shdr.sh_entsize,
504            };
505        }
506    };
507}
508
509pub fn int(is_64: bool, need_bswap: bool, int_32: anytype, int_64: anytype) @TypeOf(int_64) {
510    if (is_64) {
511        if (need_bswap) {
512            return @byteSwap(@TypeOf(int_64), int_64);
513        } else {
514            return int_64;
515        }
516    } else {
517        return int32(need_bswap, int_32, @TypeOf(int_64));
518    }
519}
520
521pub fn int32(need_bswap: bool, int_32: anytype, comptime Int64: anytype) Int64 {
522    if (need_bswap) {
523        return @byteSwap(@TypeOf(int_32), int_32);
524    } else {
525        return int_32;
526    }
527}
528
529pub const EI_NIDENT = 16;
530
531pub const EI_CLASS = 4;
532pub const ELFCLASSNONE = 0;
533pub const ELFCLASS32 = 1;
534pub const ELFCLASS64 = 2;
535pub const ELFCLASSNUM = 3;
536
537pub const EI_DATA = 5;
538pub const ELFDATANONE = 0;
539pub const ELFDATA2LSB = 1;
540pub const ELFDATA2MSB = 2;
541pub const ELFDATANUM = 3;
542
543pub const EI_VERSION = 6;
544
545pub const Elf32_Half = u16;
546pub const Elf64_Half = u16;
547pub const Elf32_Word = u32;
548pub const Elf32_Sword = i32;
549pub const Elf64_Word = u32;
550pub const Elf64_Sword = i32;
551pub const Elf32_Xword = u64;
552pub const Elf32_Sxword = i64;
553pub const Elf64_Xword = u64;
554pub const Elf64_Sxword = i64;
555pub const Elf32_Addr = u32;
556pub const Elf64_Addr = u64;
557pub const Elf32_Off = u32;
558pub const Elf64_Off = u64;
559pub const Elf32_Section = u16;
560pub const Elf64_Section = u16;
561pub const Elf32_Versym = Elf32_Half;
562pub const Elf64_Versym = Elf64_Half;
563pub const Elf32_Ehdr = extern struct {
564    e_ident: [EI_NIDENT]u8,
565    e_type: ET,
566    e_machine: EM,
567    e_version: Elf32_Word,
568    e_entry: Elf32_Addr,
569    e_phoff: Elf32_Off,
570    e_shoff: Elf32_Off,
571    e_flags: Elf32_Word,
572    e_ehsize: Elf32_Half,
573    e_phentsize: Elf32_Half,
574    e_phnum: Elf32_Half,
575    e_shentsize: Elf32_Half,
576    e_shnum: Elf32_Half,
577    e_shstrndx: Elf32_Half,
578};
579pub const Elf64_Ehdr = extern struct {
580    e_ident: [EI_NIDENT]u8,
581    e_type: ET,
582    e_machine: EM,
583    e_version: Elf64_Word,
584    e_entry: Elf64_Addr,
585    e_phoff: Elf64_Off,
586    e_shoff: Elf64_Off,
587    e_flags: Elf64_Word,
588    e_ehsize: Elf64_Half,
589    e_phentsize: Elf64_Half,
590    e_phnum: Elf64_Half,
591    e_shentsize: Elf64_Half,
592    e_shnum: Elf64_Half,
593    e_shstrndx: Elf64_Half,
594};
595pub const Elf32_Phdr = extern struct {
596    p_type: Elf32_Word,
597    p_offset: Elf32_Off,
598    p_vaddr: Elf32_Addr,
599    p_paddr: Elf32_Addr,
600    p_filesz: Elf32_Word,
601    p_memsz: Elf32_Word,
602    p_flags: Elf32_Word,
603    p_align: Elf32_Word,
604};
605pub const Elf64_Phdr = extern struct {
606    p_type: Elf64_Word,
607    p_flags: Elf64_Word,
608    p_offset: Elf64_Off,
609    p_vaddr: Elf64_Addr,
610    p_paddr: Elf64_Addr,
611    p_filesz: Elf64_Xword,
612    p_memsz: Elf64_Xword,
613    p_align: Elf64_Xword,
614};
615pub const Elf32_Shdr = extern struct {
616    sh_name: Elf32_Word,
617    sh_type: Elf32_Word,
618    sh_flags: Elf32_Word,
619    sh_addr: Elf32_Addr,
620    sh_offset: Elf32_Off,
621    sh_size: Elf32_Word,
622    sh_link: Elf32_Word,
623    sh_info: Elf32_Word,
624    sh_addralign: Elf32_Word,
625    sh_entsize: Elf32_Word,
626};
627pub const Elf64_Shdr = extern struct {
628    sh_name: Elf64_Word,
629    sh_type: Elf64_Word,
630    sh_flags: Elf64_Xword,
631    sh_addr: Elf64_Addr,
632    sh_offset: Elf64_Off,
633    sh_size: Elf64_Xword,
634    sh_link: Elf64_Word,
635    sh_info: Elf64_Word,
636    sh_addralign: Elf64_Xword,
637    sh_entsize: Elf64_Xword,
638};
639pub const Elf32_Chdr = extern struct {
640    ch_type: Elf32_Word,
641    ch_size: Elf32_Word,
642    ch_addralign: Elf32_Word,
643};
644pub const Elf64_Chdr = extern struct {
645    ch_type: Elf64_Word,
646    ch_reserved: Elf64_Word,
647    ch_size: Elf64_Xword,
648    ch_addralign: Elf64_Xword,
649};
650pub const Elf32_Sym = extern struct {
651    st_name: Elf32_Word,
652    st_value: Elf32_Addr,
653    st_size: Elf32_Word,
654    st_info: u8,
655    st_other: u8,
656    st_shndx: Elf32_Section,
657};
658pub const Elf64_Sym = extern struct {
659    st_name: Elf64_Word,
660    st_info: u8,
661    st_other: u8,
662    st_shndx: Elf64_Section,
663    st_value: Elf64_Addr,
664    st_size: Elf64_Xword,
665};
666pub const Elf32_Syminfo = extern struct {
667    si_boundto: Elf32_Half,
668    si_flags: Elf32_Half,
669};
670pub const Elf64_Syminfo = extern struct {
671    si_boundto: Elf64_Half,
672    si_flags: Elf64_Half,
673};
674pub const Elf32_Rel = extern struct {
675    r_offset: Elf32_Addr,
676    r_info: Elf32_Word,
677
678    pub inline fn r_sym(self: @This()) u24 {
679        return @truncate(u24, self.r_info >> 8);
680    }
681    pub inline fn r_type(self: @This()) u8 {
682        return @truncate(u8, self.r_info & 0xff);
683    }
684};
685pub const Elf64_Rel = extern struct {
686    r_offset: Elf64_Addr,
687    r_info: Elf64_Xword,
688
689    pub inline fn r_sym(self: @This()) u32 {
690        return @truncate(u32, self.r_info >> 32);
691    }
692    pub inline fn r_type(self: @This()) u32 {
693        return @truncate(u32, self.r_info & 0xffffffff);
694    }
695};
696pub const Elf32_Rela = extern struct {
697    r_offset: Elf32_Addr,
698    r_info: Elf32_Word,
699    r_addend: Elf32_Sword,
700
701    pub inline fn r_sym(self: @This()) u24 {
702        return @truncate(u24, self.r_info >> 8);
703    }
704    pub inline fn r_type(self: @This()) u8 {
705        return @truncate(u8, self.r_info & 0xff);
706    }
707};
708pub const Elf64_Rela = extern struct {
709    r_offset: Elf64_Addr,
710    r_info: Elf64_Xword,
711    r_addend: Elf64_Sxword,
712
713    pub inline fn r_sym(self: @This()) u32 {
714        return @truncate(u32, self.r_info >> 32);
715    }
716    pub inline fn r_type(self: @This()) u32 {
717        return @truncate(u32, self.r_info & 0xffffffff);
718    }
719};
720pub const Elf32_Dyn = extern struct {
721    d_tag: Elf32_Sword,
722    d_val: Elf32_Addr,
723};
724pub const Elf64_Dyn = extern struct {
725    d_tag: Elf64_Sxword,
726    d_val: Elf64_Addr,
727};
728pub const Elf32_Verdef = extern struct {
729    vd_version: Elf32_Half,
730    vd_flags: Elf32_Half,
731    vd_ndx: Elf32_Half,
732    vd_cnt: Elf32_Half,
733    vd_hash: Elf32_Word,
734    vd_aux: Elf32_Word,
735    vd_next: Elf32_Word,
736};
737pub const Elf64_Verdef = extern struct {
738    vd_version: Elf64_Half,
739    vd_flags: Elf64_Half,
740    vd_ndx: Elf64_Half,
741    vd_cnt: Elf64_Half,
742    vd_hash: Elf64_Word,
743    vd_aux: Elf64_Word,
744    vd_next: Elf64_Word,
745};
746pub const Elf32_Verdaux = extern struct {
747    vda_name: Elf32_Word,
748    vda_next: Elf32_Word,
749};
750pub const Elf64_Verdaux = extern struct {
751    vda_name: Elf64_Word,
752    vda_next: Elf64_Word,
753};
754pub const Elf32_Verneed = extern struct {
755    vn_version: Elf32_Half,
756    vn_cnt: Elf32_Half,
757    vn_file: Elf32_Word,
758    vn_aux: Elf32_Word,
759    vn_next: Elf32_Word,
760};
761pub const Elf64_Verneed = extern struct {
762    vn_version: Elf64_Half,
763    vn_cnt: Elf64_Half,
764    vn_file: Elf64_Word,
765    vn_aux: Elf64_Word,
766    vn_next: Elf64_Word,
767};
768pub const Elf32_Vernaux = extern struct {
769    vna_hash: Elf32_Word,
770    vna_flags: Elf32_Half,
771    vna_other: Elf32_Half,
772    vna_name: Elf32_Word,
773    vna_next: Elf32_Word,
774};
775pub const Elf64_Vernaux = extern struct {
776    vna_hash: Elf64_Word,
777    vna_flags: Elf64_Half,
778    vna_other: Elf64_Half,
779    vna_name: Elf64_Word,
780    vna_next: Elf64_Word,
781};
782pub const Elf32_auxv_t = extern struct {
783    a_type: u32,
784    a_un: extern union {
785        a_val: u32,
786    },
787};
788pub const Elf64_auxv_t = extern struct {
789    a_type: u64,
790    a_un: extern union {
791        a_val: u64,
792    },
793};
794pub const Elf32_Nhdr = extern struct {
795    n_namesz: Elf32_Word,
796    n_descsz: Elf32_Word,
797    n_type: Elf32_Word,
798};
799pub const Elf64_Nhdr = extern struct {
800    n_namesz: Elf64_Word,
801    n_descsz: Elf64_Word,
802    n_type: Elf64_Word,
803};
804pub const Elf32_Move = extern struct {
805    m_value: Elf32_Xword,
806    m_info: Elf32_Word,
807    m_poffset: Elf32_Word,
808    m_repeat: Elf32_Half,
809    m_stride: Elf32_Half,
810};
811pub const Elf64_Move = extern struct {
812    m_value: Elf64_Xword,
813    m_info: Elf64_Xword,
814    m_poffset: Elf64_Xword,
815    m_repeat: Elf64_Half,
816    m_stride: Elf64_Half,
817};
818pub const Elf32_gptab = extern union {
819    gt_header: extern struct {
820        gt_current_g_value: Elf32_Word,
821        gt_unused: Elf32_Word,
822    },
823    gt_entry: extern struct {
824        gt_g_value: Elf32_Word,
825        gt_bytes: Elf32_Word,
826    },
827};
828pub const Elf32_RegInfo = extern struct {
829    ri_gprmask: Elf32_Word,
830    ri_cprmask: [4]Elf32_Word,
831    ri_gp_value: Elf32_Sword,
832};
833pub const Elf_Options = extern struct {
834    kind: u8,
835    size: u8,
836    @"section": Elf32_Section,
837    info: Elf32_Word,
838};
839pub const Elf_Options_Hw = extern struct {
840    hwp_flags1: Elf32_Word,
841    hwp_flags2: Elf32_Word,
842};
843pub const Elf32_Lib = extern struct {
844    l_name: Elf32_Word,
845    l_time_stamp: Elf32_Word,
846    l_checksum: Elf32_Word,
847    l_version: Elf32_Word,
848    l_flags: Elf32_Word,
849};
850pub const Elf64_Lib = extern struct {
851    l_name: Elf64_Word,
852    l_time_stamp: Elf64_Word,
853    l_checksum: Elf64_Word,
854    l_version: Elf64_Word,
855    l_flags: Elf64_Word,
856};
857pub const Elf32_Conflict = Elf32_Addr;
858pub const Elf_MIPS_ABIFlags_v0 = extern struct {
859    version: Elf32_Half,
860    isa_level: u8,
861    isa_rev: u8,
862    gpr_size: u8,
863    cpr1_size: u8,
864    cpr2_size: u8,
865    fp_abi: u8,
866    isa_ext: Elf32_Word,
867    ases: Elf32_Word,
868    flags1: Elf32_Word,
869    flags2: Elf32_Word,
870};
871
872comptime {
873    debug.assert(@sizeOf(Elf32_Ehdr) == 52);
874    debug.assert(@sizeOf(Elf64_Ehdr) == 64);
875
876    debug.assert(@sizeOf(Elf32_Phdr) == 32);
877    debug.assert(@sizeOf(Elf64_Phdr) == 56);
878
879    debug.assert(@sizeOf(Elf32_Shdr) == 40);
880    debug.assert(@sizeOf(Elf64_Shdr) == 64);
881}
882
883pub const Auxv = switch (@sizeOf(usize)) {
884    4 => Elf32_auxv_t,
885    8 => Elf64_auxv_t,
886    else => @compileError("expected pointer size of 32 or 64"),
887};
888pub const Ehdr = switch (@sizeOf(usize)) {
889    4 => Elf32_Ehdr,
890    8 => Elf64_Ehdr,
891    else => @compileError("expected pointer size of 32 or 64"),
892};
893pub const Phdr = switch (@sizeOf(usize)) {
894    4 => Elf32_Phdr,
895    8 => Elf64_Phdr,
896    else => @compileError("expected pointer size of 32 or 64"),
897};
898pub const Dyn = switch (@sizeOf(usize)) {
899    4 => Elf32_Dyn,
900    8 => Elf64_Dyn,
901    else => @compileError("expected pointer size of 32 or 64"),
902};
903pub const Rel = switch (@sizeOf(usize)) {
904    4 => Elf32_Rel,
905    8 => Elf64_Rel,
906    else => @compileError("expected pointer size of 32 or 64"),
907};
908pub const Rela = switch (@sizeOf(usize)) {
909    4 => Elf32_Rela,
910    8 => Elf64_Rela,
911    else => @compileError("expected pointer size of 32 or 64"),
912};
913pub const Shdr = switch (@sizeOf(usize)) {
914    4 => Elf32_Shdr,
915    8 => Elf64_Shdr,
916    else => @compileError("expected pointer size of 32 or 64"),
917};
918pub const Sym = switch (@sizeOf(usize)) {
919    4 => Elf32_Sym,
920    8 => Elf64_Sym,
921    else => @compileError("expected pointer size of 32 or 64"),
922};
923pub const Verdef = switch (@sizeOf(usize)) {
924    4 => Elf32_Verdef,
925    8 => Elf64_Verdef,
926    else => @compileError("expected pointer size of 32 or 64"),
927};
928pub const Verdaux = switch (@sizeOf(usize)) {
929    4 => Elf32_Verdaux,
930    8 => Elf64_Verdaux,
931    else => @compileError("expected pointer size of 32 or 64"),
932};
933pub const Addr = switch (@sizeOf(usize)) {
934    4 => Elf32_Addr,
935    8 => Elf64_Addr,
936    else => @compileError("expected pointer size of 32 or 64"),
937};
938pub const Half = switch (@sizeOf(usize)) {
939    4 => Elf32_Half,
940    8 => Elf64_Half,
941    else => @compileError("expected pointer size of 32 or 64"),
942};
943
944/// Machine architectures
945/// See current registered ELF machine architectures at:
946///    http://www.uxsglobal.com/developers/gabi/latest/ch4.eheader.html
947/// The underscore prefix is because many of these start with numbers.
948pub const EM = enum(u16) {
949    /// No machine
950    _NONE = 0,
951
952    /// AT&T WE 32100
953    _M32 = 1,
954
955    /// SPARC
956    _SPARC = 2,
957
958    /// Intel 386
959    _386 = 3,
960
961    /// Motorola 68000
962    _68K = 4,
963
964    /// Motorola 88000
965    _88K = 5,
966
967    /// Intel MCU
968    _IAMCU = 6,
969
970    /// Intel 80860
971    _860 = 7,
972
973    /// MIPS R3000
974    _MIPS = 8,
975
976    /// IBM System/370
977    _S370 = 9,
978
979    /// MIPS RS3000 Little-endian
980    _MIPS_RS3_LE = 10,
981
982    /// SPU Mark II
983    _SPU_2 = 13,
984
985    /// Hewlett-Packard PA-RISC
986    _PARISC = 15,
987
988    /// Fujitsu VPP500
989    _VPP500 = 17,
990
991    /// Enhanced instruction set SPARC
992    _SPARC32PLUS = 18,
993
994    /// Intel 80960
995    _960 = 19,
996
997    /// PowerPC
998    _PPC = 20,
999
1000    /// PowerPC64
1001    _PPC64 = 21,
1002
1003    /// IBM System/390
1004    _S390 = 22,
1005
1006    /// IBM SPU/SPC
1007    _SPU = 23,
1008
1009    /// NEC V800
1010    _V800 = 36,
1011
1012    /// Fujitsu FR20
1013    _FR20 = 37,
1014
1015    /// TRW RH-32
1016    _RH32 = 38,
1017
1018    /// Motorola RCE
1019    _RCE = 39,
1020
1021    /// ARM
1022    _ARM = 40,
1023
1024    /// DEC Alpha
1025    _ALPHA = 41,
1026
1027    /// Hitachi SH
1028    _SH = 42,
1029
1030    /// SPARC V9
1031    _SPARCV9 = 43,
1032
1033    /// Siemens TriCore
1034    _TRICORE = 44,
1035
1036    /// Argonaut RISC Core
1037    _ARC = 45,
1038
1039    /// Hitachi H8/300
1040    _H8_300 = 46,
1041
1042    /// Hitachi H8/300H
1043    _H8_300H = 47,
1044
1045    /// Hitachi H8S
1046    _H8S = 48,
1047
1048    /// Hitachi H8/500
1049    _H8_500 = 49,
1050
1051    /// Intel IA-64 processor architecture
1052    _IA_64 = 50,
1053
1054    /// Stanford MIPS-X
1055    _MIPS_X = 51,
1056
1057    /// Motorola ColdFire
1058    _COLDFIRE = 52,
1059
1060    /// Motorola M68HC12
1061    _68HC12 = 53,
1062
1063    /// Fujitsu MMA Multimedia Accelerator
1064    _MMA = 54,
1065
1066    /// Siemens PCP
1067    _PCP = 55,
1068
1069    /// Sony nCPU embedded RISC processor
1070    _NCPU = 56,
1071
1072    /// Denso NDR1 microprocessor
1073    _NDR1 = 57,
1074
1075    /// Motorola Star*Core processor
1076    _STARCORE = 58,
1077
1078    /// Toyota ME16 processor
1079    _ME16 = 59,
1080
1081    /// STMicroelectronics ST100 processor
1082    _ST100 = 60,
1083
1084    /// Advanced Logic Corp. TinyJ embedded processor family
1085    _TINYJ = 61,
1086
1087    /// AMD x86-64 architecture
1088    _X86_64 = 62,
1089
1090    /// Sony DSP Processor
1091    _PDSP = 63,
1092
1093    /// Digital Equipment Corp. PDP-10
1094    _PDP10 = 64,
1095
1096    /// Digital Equipment Corp. PDP-11
1097    _PDP11 = 65,
1098
1099    /// Siemens FX66 microcontroller
1100    _FX66 = 66,
1101
1102    /// STMicroelectronics ST9+ 8/16 bit microcontroller
1103    _ST9PLUS = 67,
1104
1105    /// STMicroelectronics ST7 8-bit microcontroller
1106    _ST7 = 68,
1107
1108    /// Motorola MC68HC16 Microcontroller
1109    _68HC16 = 69,
1110
1111    /// Motorola MC68HC11 Microcontroller
1112    _68HC11 = 70,
1113
1114    /// Motorola MC68HC08 Microcontroller
1115    _68HC08 = 71,
1116
1117    /// Motorola MC68HC05 Microcontroller
1118    _68HC05 = 72,
1119
1120    /// Silicon Graphics SVx
1121    _SVX = 73,
1122
1123    /// STMicroelectronics ST19 8-bit microcontroller
1124    _ST19 = 74,
1125
1126    /// Digital VAX
1127    _VAX = 75,
1128
1129    /// Axis Communications 32-bit embedded processor
1130    _CRIS = 76,
1131
1132    /// Infineon Technologies 32-bit embedded processor
1133    _JAVELIN = 77,
1134
1135    /// Element 14 64-bit DSP Processor
1136    _FIREPATH = 78,
1137
1138    /// LSI Logic 16-bit DSP Processor
1139    _ZSP = 79,
1140
1141    /// Donald Knuth's educational 64-bit processor
1142    _MMIX = 80,
1143
1144    /// Harvard University machine-independent object files
1145    _HUANY = 81,
1146
1147    /// SiTera Prism
1148    _PRISM = 82,
1149
1150    /// Atmel AVR 8-bit microcontroller
1151    _AVR = 83,
1152
1153    /// Fujitsu FR30
1154    _FR30 = 84,
1155
1156    /// Mitsubishi D10V
1157    _D10V = 85,
1158
1159    /// Mitsubishi D30V
1160    _D30V = 86,
1161
1162    /// NEC v850
1163    _V850 = 87,
1164
1165    /// Mitsubishi M32R
1166    _M32R = 88,
1167
1168    /// Matsushita MN10300
1169    _MN10300 = 89,
1170
1171    /// Matsushita MN10200
1172    _MN10200 = 90,
1173
1174    /// picoJava
1175    _PJ = 91,
1176
1177    /// OpenRISC 32-bit embedded processor
1178    _OPENRISC = 92,
1179
1180    /// ARC International ARCompact processor (old spelling/synonym: EM_ARC_A5)
1181    _ARC_COMPACT = 93,
1182
1183    /// Tensilica Xtensa Architecture
1184    _XTENSA = 94,
1185
1186    /// Alphamosaic VideoCore processor
1187    _VIDEOCORE = 95,
1188
1189    /// Thompson Multimedia General Purpose Processor
1190    _TMM_GPP = 96,
1191
1192    /// National Semiconductor 32000 series
1193    _NS32K = 97,
1194
1195    /// Tenor Network TPC processor
1196    _TPC = 98,
1197
1198    /// Trebia SNP 1000 processor
1199    _SNP1K = 99,
1200
1201    /// STMicroelectronics (www.st.com) ST200
1202    _ST200 = 100,
1203
1204    /// Ubicom IP2xxx microcontroller family
1205    _IP2K = 101,
1206
1207    /// MAX Processor
1208    _MAX = 102,
1209
1210    /// National Semiconductor CompactRISC microprocessor
1211    _CR = 103,
1212
1213    /// Fujitsu F2MC16
1214    _F2MC16 = 104,
1215
1216    /// Texas Instruments embedded microcontroller msp430
1217    _MSP430 = 105,
1218
1219    /// Analog Devices Blackfin (DSP) processor
1220    _BLACKFIN = 106,
1221
1222    /// S1C33 Family of Seiko Epson processors
1223    _SE_C33 = 107,
1224
1225    /// Sharp embedded microprocessor
1226    _SEP = 108,
1227
1228    /// Arca RISC Microprocessor
1229    _ARCA = 109,
1230
1231    /// Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University
1232    _UNICORE = 110,
1233
1234    /// eXcess: 16/32/64-bit configurable embedded CPU
1235    _EXCESS = 111,
1236
1237    /// Icera Semiconductor Inc. Deep Execution Processor
1238    _DXP = 112,
1239
1240    /// Altera Nios II soft-core processor
1241    _ALTERA_NIOS2 = 113,
1242
1243    /// National Semiconductor CompactRISC CRX
1244    _CRX = 114,
1245
1246    /// Motorola XGATE embedded processor
1247    _XGATE = 115,
1248
1249    /// Infineon C16x/XC16x processor
1250    _C166 = 116,
1251
1252    /// Renesas M16C series microprocessors
1253    _M16C = 117,
1254
1255    /// Microchip Technology dsPIC30F Digital Signal Controller
1256    _DSPIC30F = 118,
1257
1258    /// Freescale Communication Engine RISC core
1259    _CE = 119,
1260
1261    /// Renesas M32C series microprocessors
1262    _M32C = 120,
1263
1264    /// Altium TSK3000 core
1265    _TSK3000 = 131,
1266
1267    /// Freescale RS08 embedded processor
1268    _RS08 = 132,
1269
1270    /// Analog Devices SHARC family of 32-bit DSP processors
1271    _SHARC = 133,
1272
1273    /// Cyan Technology eCOG2 microprocessor
1274    _ECOG2 = 134,
1275
1276    /// Sunplus S+core7 RISC processor
1277    _SCORE7 = 135,
1278
1279    /// New Japan Radio (NJR) 24-bit DSP Processor
1280    _DSP24 = 136,
1281
1282    /// Broadcom VideoCore III processor
1283    _VIDEOCORE3 = 137,
1284
1285    /// RISC processor for Lattice FPGA architecture
1286    _LATTICEMICO32 = 138,
1287
1288    /// Seiko Epson C17 family
1289    _SE_C17 = 139,
1290
1291    /// The Texas Instruments TMS320C6000 DSP family
1292    _TI_C6000 = 140,
1293
1294    /// The Texas Instruments TMS320C2000 DSP family
1295    _TI_C2000 = 141,
1296
1297    /// The Texas Instruments TMS320C55x DSP family
1298    _TI_C5500 = 142,
1299
1300    /// STMicroelectronics 64bit VLIW Data Signal Processor
1301    _MMDSP_PLUS = 160,
1302
1303    /// Cypress M8C microprocessor
1304    _CYPRESS_M8C = 161,
1305
1306    /// Renesas R32C series microprocessors
1307    _R32C = 162,
1308
1309    /// NXP Semiconductors TriMedia architecture family
1310    _TRIMEDIA = 163,
1311
1312    /// Qualcomm Hexagon processor
1313    _HEXAGON = 164,
1314
1315    /// Intel 8051 and variants
1316    _8051 = 165,
1317
1318    /// STMicroelectronics STxP7x family of configurable and extensible RISC processors
1319    _STXP7X = 166,
1320
1321    /// Andes Technology compact code size embedded RISC processor family
1322    _NDS32 = 167,
1323
1324    /// Cyan Technology eCOG1X family
1325    _ECOG1X = 168,
1326
1327    /// Dallas Semiconductor MAXQ30 Core Micro-controllers
1328    _MAXQ30 = 169,
1329
1330    /// New Japan Radio (NJR) 16-bit DSP Processor
1331    _XIMO16 = 170,
1332
1333    /// M2000 Reconfigurable RISC Microprocessor
1334    _MANIK = 171,
1335
1336    /// Cray Inc. NV2 vector architecture
1337    _CRAYNV2 = 172,
1338
1339    /// Renesas RX family
1340    _RX = 173,
1341
1342    /// Imagination Technologies META processor architecture
1343    _METAG = 174,
1344
1345    /// MCST Elbrus general purpose hardware architecture
1346    _MCST_ELBRUS = 175,
1347
1348    /// Cyan Technology eCOG16 family
1349    _ECOG16 = 176,
1350
1351    /// National Semiconductor CompactRISC CR16 16-bit microprocessor
1352    _CR16 = 177,
1353
1354    /// Freescale Extended Time Processing Unit
1355    _ETPU = 178,
1356
1357    /// Infineon Technologies SLE9X core
1358    _SLE9X = 179,
1359
1360    /// Intel L10M
1361    _L10M = 180,
1362
1363    /// Intel K10M
1364    _K10M = 181,
1365
1366    /// ARM AArch64
1367    _AARCH64 = 183,
1368
1369    /// Atmel Corporation 32-bit microprocessor family
1370    _AVR32 = 185,
1371
1372    /// STMicroeletronics STM8 8-bit microcontroller
1373    _STM8 = 186,
1374
1375    /// Tilera TILE64 multicore architecture family
1376    _TILE64 = 187,
1377
1378    /// Tilera TILEPro multicore architecture family
1379    _TILEPRO = 188,
1380
1381    /// NVIDIA CUDA architecture
1382    _CUDA = 190,
1383
1384    /// Tilera TILE-Gx multicore architecture family
1385    _TILEGX = 191,
1386
1387    /// CloudShield architecture family
1388    _CLOUDSHIELD = 192,
1389
1390    /// KIPO-KAIST Core-A 1st generation processor family
1391    _COREA_1ST = 193,
1392
1393    /// KIPO-KAIST Core-A 2nd generation processor family
1394    _COREA_2ND = 194,
1395
1396    /// Synopsys ARCompact V2
1397    _ARC_COMPACT2 = 195,
1398
1399    /// Open8 8-bit RISC soft processor core
1400    _OPEN8 = 196,
1401
1402    /// Renesas RL78 family
1403    _RL78 = 197,
1404
1405    /// Broadcom VideoCore V processor
1406    _VIDEOCORE5 = 198,
1407
1408    /// Renesas 78KOR family
1409    _78KOR = 199,
1410
1411    /// Freescale 56800EX Digital Signal Controller (DSC)
1412    _56800EX = 200,
1413
1414    /// Beyond BA1 CPU architecture
1415    _BA1 = 201,
1416
1417    /// Beyond BA2 CPU architecture
1418    _BA2 = 202,
1419
1420    /// XMOS xCORE processor family
1421    _XCORE = 203,
1422
1423    /// Microchip 8-bit PIC(r) family
1424    _MCHP_PIC = 204,
1425
1426    /// Reserved by Intel
1427    _INTEL205 = 205,
1428
1429    /// Reserved by Intel
1430    _INTEL206 = 206,
1431
1432    /// Reserved by Intel
1433    _INTEL207 = 207,
1434
1435    /// Reserved by Intel
1436    _INTEL208 = 208,
1437
1438    /// Reserved by Intel
1439    _INTEL209 = 209,
1440
1441    /// KM211 KM32 32-bit processor
1442    _KM32 = 210,
1443
1444    /// KM211 KMX32 32-bit processor
1445    _KMX32 = 211,
1446
1447    /// KM211 KMX16 16-bit processor
1448    _KMX16 = 212,
1449
1450    /// KM211 KMX8 8-bit processor
1451    _KMX8 = 213,
1452
1453    /// KM211 KVARC processor
1454    _KVARC = 214,
1455
1456    /// Paneve CDP architecture family
1457    _CDP = 215,
1458
1459    /// Cognitive Smart Memory Processor
1460    _COGE = 216,
1461
1462    /// iCelero CoolEngine
1463    _COOL = 217,
1464
1465    /// Nanoradio Optimized RISC
1466    _NORC = 218,
1467
1468    /// CSR Kalimba architecture family
1469    _CSR_KALIMBA = 219,
1470
1471    /// AMD GPU architecture
1472    _AMDGPU = 224,
1473
1474    /// RISC-V
1475    _RISCV = 243,
1476
1477    /// Lanai 32-bit processor
1478    _LANAI = 244,
1479
1480    /// Linux kernel bpf virtual machine
1481    _BPF = 247,
1482
1483    _,
1484};
1485
1486/// Section data should be writable during execution.
1487pub const SHF_WRITE = 0x1;
1488
1489/// Section occupies memory during program execution.
1490pub const SHF_ALLOC = 0x2;
1491
1492/// Section contains executable machine instructions.
1493pub const SHF_EXECINSTR = 0x4;
1494
1495/// The data in this section may be merged.
1496pub const SHF_MERGE = 0x10;
1497
1498/// The data in this section is null-terminated strings.
1499pub const SHF_STRINGS = 0x20;
1500
1501/// A field in this section holds a section header table index.
1502pub const SHF_INFO_LINK = 0x40;
1503
1504/// Adds special ordering requirements for link editors.
1505pub const SHF_LINK_ORDER = 0x80;
1506
1507/// This section requires special OS-specific processing to avoid incorrect
1508/// behavior.
1509pub const SHF_OS_NONCONFORMING = 0x100;
1510
1511/// This section is a member of a section group.
1512pub const SHF_GROUP = 0x200;
1513
1514/// This section holds Thread-Local Storage.
1515pub const SHF_TLS = 0x400;
1516
1517/// Identifies a section containing compressed data.
1518pub const SHF_COMPRESSED = 0x800;
1519
1520/// This section is excluded from the final executable or shared library.
1521pub const SHF_EXCLUDE = 0x80000000;
1522
1523/// Start of target-specific flags.
1524pub const SHF_MASKOS = 0x0ff00000;
1525
1526/// Bits indicating processor-specific flags.
1527pub const SHF_MASKPROC = 0xf0000000;
1528
1529/// All sections with the "d" flag are grouped together by the linker to form
1530/// the data section and the dp register is set to the start of the section by
1531/// the boot code.
1532pub const XCORE_SHF_DP_SECTION = 0x10000000;
1533
1534/// All sections with the "c" flag are grouped together by the linker to form
1535/// the constant pool and the cp register is set to the start of the constant
1536/// pool by the boot code.
1537pub const XCORE_SHF_CP_SECTION = 0x20000000;
1538
1539/// If an object file section does not have this flag set, then it may not hold
1540/// more than 2GB and can be freely referred to in objects using smaller code
1541/// models. Otherwise, only objects using larger code models can refer to them.
1542/// For example, a medium code model object can refer to data in a section that
1543/// sets this flag besides being able to refer to data in a section that does
1544/// not set it; likewise, a small code model object can refer only to code in a
1545/// section that does not set this flag.
1546pub const SHF_X86_64_LARGE = 0x10000000;
1547
1548/// All sections with the GPREL flag are grouped into a global data area
1549/// for faster accesses
1550pub const SHF_HEX_GPREL = 0x10000000;
1551
1552/// Section contains text/data which may be replicated in other sections.
1553/// Linker must retain only one copy.
1554pub const SHF_MIPS_NODUPES = 0x01000000;
1555
1556/// Linker must generate implicit hidden weak names.
1557pub const SHF_MIPS_NAMES = 0x02000000;
1558
1559/// Section data local to process.
1560pub const SHF_MIPS_LOCAL = 0x04000000;
1561
1562/// Do not strip this section.
1563pub const SHF_MIPS_NOSTRIP = 0x08000000;
1564
1565/// Section must be part of global data area.
1566pub const SHF_MIPS_GPREL = 0x10000000;
1567
1568/// This section should be merged.
1569pub const SHF_MIPS_MERGE = 0x20000000;
1570
1571/// Address size to be inferred from section entry size.
1572pub const SHF_MIPS_ADDR = 0x40000000;
1573
1574/// Section data is string data by default.
1575pub const SHF_MIPS_STRING = 0x80000000;
1576
1577/// Make code section unreadable when in execute-only mode
1578pub const SHF_ARM_PURECODE = 0x2000000;
1579
1580/// Execute
1581pub const PF_X = 1;
1582
1583/// Write
1584pub const PF_W = 2;
1585
1586/// Read
1587pub const PF_R = 4;
1588
1589/// Bits for operating system-specific semantics.
1590pub const PF_MASKOS = 0x0ff00000;
1591
1592/// Bits for processor-specific semantics.
1593pub const PF_MASKPROC = 0xf0000000;
1594
1595// Special section indexes used in Elf{32,64}_Sym.
1596pub const SHN_UNDEF = 0;
1597pub const SHN_LORESERVE = 0xff00;
1598pub const SHN_LOPROC = 0xff00;
1599pub const SHN_HIPROC = 0xff1f;
1600pub const SHN_LIVEPATCH = 0xff20;
1601pub const SHN_ABS = 0xfff1;
1602pub const SHN_COMMON = 0xfff2;
1603pub const SHN_HIRESERVE = 0xffff;
1604
1605/// AMD x86-64 relocations.
1606/// No reloc
1607pub const R_X86_64_NONE = 0;
1608/// Direct 64 bit
1609pub const R_X86_64_64 = 1;
1610/// PC relative 32 bit signed
1611pub const R_X86_64_PC32 = 2;
1612/// 32 bit GOT entry
1613pub const R_X86_64_GOT32 = 3;
1614/// 32 bit PLT address
1615pub const R_X86_64_PLT32 = 4;
1616/// Copy symbol at runtime
1617pub const R_X86_64_COPY = 5;
1618/// Create GOT entry
1619pub const R_X86_64_GLOB_DAT = 6;
1620/// Create PLT entry
1621pub const R_X86_64_JUMP_SLOT = 7;
1622/// Adjust by program base
1623pub const R_X86_64_RELATIVE = 8;
1624/// 32 bit signed PC relative offset to GOT
1625pub const R_X86_64_GOTPCREL = 9;
1626/// Direct 32 bit zero extended
1627pub const R_X86_64_32 = 10;
1628/// Direct 32 bit sign extended
1629pub const R_X86_64_32S = 11;
1630/// Direct 16 bit zero extended
1631pub const R_X86_64_16 = 12;
1632/// 16 bit sign extended pc relative
1633pub const R_X86_64_PC16 = 13;
1634/// Direct 8 bit sign extended
1635pub const R_X86_64_8 = 14;
1636/// 8 bit sign extended pc relative
1637pub const R_X86_64_PC8 = 15;
1638/// ID of module containing symbol
1639pub const R_X86_64_DTPMOD64 = 16;
1640/// Offset in module's TLS block
1641pub const R_X86_64_DTPOFF64 = 17;
1642/// Offset in initial TLS block
1643pub const R_X86_64_TPOFF64 = 18;
1644/// 32 bit signed PC relative offset to two GOT entries for GD symbol
1645pub const R_X86_64_TLSGD = 19;
1646/// 32 bit signed PC relative offset to two GOT entries for LD symbol
1647pub const R_X86_64_TLSLD = 20;
1648/// Offset in TLS block
1649pub const R_X86_64_DTPOFF32 = 21;
1650/// 32 bit signed PC relative offset to GOT entry for IE symbol
1651pub const R_X86_64_GOTTPOFF = 22;
1652/// Offset in initial TLS block
1653pub const R_X86_64_TPOFF32 = 23;
1654/// PC relative 64 bit
1655pub const R_X86_64_PC64 = 24;
1656/// 64 bit offset to GOT
1657pub const R_X86_64_GOTOFF64 = 25;
1658/// 32 bit signed pc relative offset to GOT
1659pub const R_X86_64_GOTPC32 = 26;
1660/// 64 bit GOT entry offset
1661pub const R_X86_64_GOT64 = 27;
1662/// 64 bit PC relative offset to GOT entry
1663pub const R_X86_64_GOTPCREL64 = 28;
1664/// 64 bit PC relative offset to GOT
1665pub const R_X86_64_GOTPC64 = 29;
1666/// Like GOT64, says PLT entry needed
1667pub const R_X86_64_GOTPLT64 = 30;
1668/// 64-bit GOT relative offset to PLT entry
1669pub const R_X86_64_PLTOFF64 = 31;
1670/// Size of symbol plus 32-bit addend
1671pub const R_X86_64_SIZE32 = 32;
1672/// Size of symbol plus 64-bit addend
1673pub const R_X86_64_SIZE64 = 33;
1674/// GOT offset for TLS descriptor
1675pub const R_X86_64_GOTPC32_TLSDESC = 34;
1676/// Marker for call through TLS descriptor
1677pub const R_X86_64_TLSDESC_CALL = 35;
1678/// TLS descriptor
1679pub const R_X86_64_TLSDESC = 36;
1680/// Adjust indirectly by program base
1681pub const R_X86_64_IRELATIVE = 37;
1682/// 64-bit adjust by program base
1683pub const R_X86_64_RELATIVE64 = 38;
1684/// 39 Reserved was R_X86_64_PC32_BND
1685/// 40 Reserved was R_X86_64_PLT32_BND
1686/// Load from 32 bit signed pc relative offset to GOT entry without REX prefix, relaxable
1687pub const R_X86_64_GOTPCRELX = 41;
1688/// Load from 32 bit signed PC relative offset to GOT entry with REX prefix, relaxable
1689pub const R_X86_64_REX_GOTPCRELX = 42;
1690pub const R_X86_64_NUM = 43;
1691
1692pub const STV = enum(u2) {
1693    DEFAULT = 0,
1694    INTERNAL = 1,
1695    HIDDEN = 2,
1696    PROTECTED = 3,
1697};
1698