1 use crate::cdsl::cpu_modes::CpuMode;
2 use crate::cdsl::isa::TargetIsa;
3 use crate::cdsl::types::{ReferenceType, VectorType};
4
5 use crate::shared::types::Bool::B1;
6 use crate::shared::types::Float::{F32, F64};
7 use crate::shared::types::Int::{I16, I32, I64, I8};
8 use crate::shared::types::Reference::{R32, R64};
9 use crate::shared::Definitions as SharedDefinitions;
10
11 mod encodings;
12 mod instructions;
13 mod legalize;
14 mod opcodes;
15 mod recipes;
16 mod registers;
17 pub(crate) mod settings;
18
define(shared_defs: &mut SharedDefinitions) -> TargetIsa19 pub(crate) fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
20 let settings = settings::define(&shared_defs.settings);
21 let regs = registers::define();
22
23 let inst_group = instructions::define(
24 &mut shared_defs.all_instructions,
25 &shared_defs.formats,
26 &shared_defs.imm,
27 &shared_defs.entities,
28 );
29 legalize::define(shared_defs, &inst_group);
30
31 // CPU modes for 32-bit and 64-bit operations.
32 let mut x86_64 = CpuMode::new("I64");
33 let mut x86_32 = CpuMode::new("I32");
34
35 let expand_flags = shared_defs.transform_groups.by_name("expand_flags");
36 let x86_widen = shared_defs.transform_groups.by_name("x86_widen");
37 let x86_narrow = shared_defs.transform_groups.by_name("x86_narrow");
38 let x86_narrow_avx = shared_defs.transform_groups.by_name("x86_narrow_avx");
39 let x86_expand = shared_defs.transform_groups.by_name("x86_expand");
40
41 x86_32.legalize_monomorphic(expand_flags);
42 x86_32.legalize_default(x86_narrow);
43 x86_32.legalize_type(B1, expand_flags);
44 x86_32.legalize_type(I8, x86_widen);
45 x86_32.legalize_type(I16, x86_widen);
46 x86_32.legalize_type(I32, x86_expand);
47 x86_32.legalize_value_type(ReferenceType(R32), x86_expand);
48 x86_32.legalize_type(F32, x86_expand);
49 x86_32.legalize_type(F64, x86_expand);
50 x86_32.legalize_value_type(VectorType::new(I32.into(), 4), x86_narrow_avx);
51 x86_32.legalize_value_type(VectorType::new(I64.into(), 2), x86_narrow_avx);
52 x86_32.legalize_value_type(VectorType::new(F32.into(), 4), x86_narrow_avx);
53
54 x86_64.legalize_monomorphic(expand_flags);
55 x86_64.legalize_default(x86_narrow);
56 x86_64.legalize_type(B1, expand_flags);
57 x86_64.legalize_type(I8, x86_widen);
58 x86_64.legalize_type(I16, x86_widen);
59 x86_64.legalize_type(I32, x86_expand);
60 x86_64.legalize_type(I64, x86_expand);
61 x86_64.legalize_value_type(ReferenceType(R64), x86_expand);
62 x86_64.legalize_type(F32, x86_expand);
63 x86_64.legalize_type(F64, x86_expand);
64 x86_64.legalize_value_type(VectorType::new(I32.into(), 4), x86_narrow_avx);
65 x86_64.legalize_value_type(VectorType::new(I64.into(), 2), x86_narrow_avx);
66 x86_64.legalize_value_type(VectorType::new(F32.into(), 4), x86_narrow_avx);
67
68 let recipes = recipes::define(shared_defs, &settings, ®s);
69
70 let encodings = encodings::define(shared_defs, &settings, &inst_group, &recipes);
71 x86_32.set_encodings(encodings.enc32);
72 x86_64.set_encodings(encodings.enc64);
73 let encodings_predicates = encodings.inst_pred_reg.extract();
74
75 let recipes = encodings.recipes;
76
77 let cpu_modes = vec![x86_64, x86_32];
78
79 TargetIsa::new(
80 "x86",
81 inst_group,
82 settings,
83 regs,
84 recipes,
85 cpu_modes,
86 encodings_predicates,
87 )
88 }
89