1 /* Target Definitions for OpenRISC. 2 Copyright (C) 2018-2021 Free Software Foundation, Inc. 3 Contributed by Stafford Horne. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published 9 by the Free Software Foundation; either version 3, or (at your 10 option) any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING3. If not see 19 <http://www.gnu.org/licenses/>. */ 20 21 #ifndef GCC_OR1K_H 22 #define GCC_OR1K_H 23 24 /* Names to predefine in the preprocessor for this target machine. */ 25 #define TARGET_CPU_CPP_BUILTINS() \ 26 do \ 27 { \ 28 builtin_define ("__OR1K__"); \ 29 builtin_define ("__OR1K_DELAY__"); \ 30 builtin_define ("__or1k__"); \ 31 if (TARGET_CMOV) \ 32 builtin_define ("__or1k_cmov__"); \ 33 if (TARGET_HARD_FLOAT) \ 34 builtin_define ("__or1k_hard_float__"); \ 35 builtin_assert ("cpu=or1k"); \ 36 builtin_assert ("machine=or1k"); \ 37 } \ 38 while (0) 39 40 /* Storage layout. */ 41 42 #define DEFAULT_SIGNED_CHAR 1 43 #define BITS_BIG_ENDIAN 0 44 #define BYTES_BIG_ENDIAN 1 45 #define WORDS_BIG_ENDIAN 1 46 #define BITS_PER_WORD 32 47 #define UNITS_PER_WORD 4 48 #define POINTER_SIZE 32 49 #define BIGGEST_ALIGNMENT 32 50 #define STRICT_ALIGNMENT 1 51 #define FUNCTION_BOUNDARY 32 52 #define PARM_BOUNDARY 32 53 #define STACK_BOUNDARY 32 54 #define PREFERRED_STACK_BOUNDARY 32 55 #define MAX_FIXED_MODE_SIZE 64 56 57 /* Layout of source language data types. */ 58 59 #define INT_TYPE_SIZE 32 60 #define SHORT_TYPE_SIZE 16 61 #define LONG_TYPE_SIZE 32 62 #define LONG_LONG_TYPE_SIZE 64 63 #define FLOAT_TYPE_SIZE 32 64 #define DOUBLE_TYPE_SIZE 64 65 #define LONG_DOUBLE_TYPE_SIZE 64 66 #define WCHAR_TYPE_SIZE 32 67 68 #undef SIZE_TYPE 69 #define SIZE_TYPE "unsigned int" 70 71 #undef PTRDIFF_TYPE 72 #define PTRDIFF_TYPE "int" 73 74 #undef WCHAR_TYPE 75 #define WCHAR_TYPE "unsigned int" 76 77 /* Describing Relative Costs of Operations. */ 78 #define MOVE_MAX 4 79 #define SLOW_BYTE_ACCESS 1 80 81 /* Register usage, class and contents. */ 82 83 /* In OpenRISC there are 32 general purpose registers with the following 84 designations: 85 86 r0 always 0 87 r1 stack pointer 88 r2 frame pointer (optional) 89 r3 arg 0 90 r4 arg 1 91 r5 arg 2 92 r6 arg 3 93 r7 arg 4 94 r8 arg 5 95 r9 function call return link address 96 r10 thread local storage 97 r11 function return value & static chain 98 r12 function return value high (upper 64-bit) 99 r13 temporary (used in prologue and epilogue) 100 r14 callee saved 101 r15 temporary 102 r16 callee saved & pic base register 103 r17 temporary 104 r18 callee saved 105 r19 temporary 106 r20 callee saved 107 r21 temporary 108 r22 callee saved 109 r23 temporary 110 r24 callee saved 111 r25 temporary 112 r26 callee saved 113 r27 temporary 114 r28 callee saved 115 r29 temporary 116 r30 callee saved 117 r31 temporary 118 119 r32 soft argument pointer 120 r33 soft frame pointer 121 r34 SR[F] (bit) register 122 123 This ABI has no adjacent call-saved register, which means that 124 DImode/DFmode pseudos cannot be call-saved and will always be 125 spilled across calls. To solve this without changing the ABI, 126 remap the compiler internal register numbers to place the even 127 call-saved registers r16-r30 in 24-31, and the odd call-clobbered 128 registers r17-r31 in 16-23. */ 129 130 #define FIRST_PSEUDO_REGISTER 35 131 132 #define HW_TO_GCC_REGNO(X) \ 133 ((X) < 16 || (X) > 31 ? (X) \ 134 : (X) & 1 ? ((X) - 16) / 2 + 16 \ 135 : ((X) - 16) / 2 + 24) 136 137 #define GCC_TO_HW_REGNO(X) \ 138 ((X) < 16 || (X) > 31 ? (X) \ 139 : (X) < 24 ? ((X) - 16) * 2 + 17 \ 140 : ((X) - 24) * 2 + 16) 141 142 #define DBX_REGISTER_NUMBER(X) GCC_TO_HW_REGNO(X) 143 144 #define REGISTER_NAMES { \ 145 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ 146 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ 147 "r17", "r19", "r21", "r23", "r25", "r27", "r29", "r31", \ 148 "r16", "r18", "r20", "r22", "r24", "r26", "r28", "r30", \ 149 "?ap", "?fp", "?sr_f" } 150 151 #define FIXED_REGISTERS \ 152 { 1, 1, 0, 0, 0, 0, 0, 0, \ 153 0, 0, 1, 0, 0, 0, 0, 0, \ 154 0, 0, 0, 0, 0, 0, 0, 0, \ 155 0, 0, 0, 0, 0, 0, 0, 0, \ 156 1, 1, 1 } 157 158 /* Caller saved/temporary registers + args + fixed */ 159 #define CALL_USED_REGISTERS \ 160 { 1, 1, 0, 1, 1, 1, 1, 1, \ 161 1, 1, 1, 1, 1, 1, 0, 1, \ 162 1, 1, 1, 1, 1, 1, 1, 1, \ 163 0, 0, 0, 0, 0, 0, 0, 0, \ 164 1, 1, 1 } 165 166 /* List the order in which to allocate registers. Each register must 167 be listed once, even those in FIXED_REGISTERS. 168 169 ??? Note that placing REAL_PIC_OFFSET_TABLE_REGNUM (r16 = 24) first 170 happens to make it most likely selected *as* the pic register when 171 compiling without optimization, simply because the pic pseudo happens 172 to be allocated with the lowest pseudo regno. */ 173 174 #define REG_ALLOC_ORDER { \ 175 16, 17, 18, 19, 20, 21, 22, 23, /* r17-r31 (odd), non-saved */ \ 176 13, 15, /* non-saved */ \ 177 12, 11, /* non-saved return values */ \ 178 8, 7, 6, 5, 4, 3, /* non-saved argument regs */ \ 179 24, /* r16, saved, pic reg */ \ 180 25, 26, 27, 28, 29, 30, 31, /* r18-r31 (even), saved */ \ 181 14, /* r14, saved */ \ 182 2, /* saved hard frame pointer */ \ 183 9, /* saved return address */ \ 184 0, /* fixed zero reg */ \ 185 1, /* fixed stack pointer */ \ 186 10, /* fixed thread pointer */ \ 187 32, 33, 34, /* fixed ap, fp, sr[f], */ \ 188 } 189 190 enum reg_class 191 { 192 NO_REGS, 193 SIBCALL_REGS, 194 DOUBLE_REGS, 195 GOT_REGS, 196 GENERAL_REGS, 197 FLAG_REGS, 198 ALL_REGS, 199 LIM_REG_CLASSES 200 }; 201 202 #define N_REG_CLASSES (int) LIM_REG_CLASSES 203 204 #define REG_CLASS_NAMES { \ 205 "NO_REGS", \ 206 "SIBCALL_REGS", \ 207 "DOUBLE_REGS", \ 208 "GOT_REGS", \ 209 "GENERAL_REGS", \ 210 "FLAG_REGS", \ 211 "ALL_REGS" } 212 213 /* The SIBCALL_REGS must be call-clobbered, and not used as a temporary 214 in the epilogue. This excludes R9 (LR), R11 (STATIC_CHAIN), and 215 R13 (PE_TMP_REGNUM). */ 216 #define SIBCALL_REGS_MASK 0x00ff95f8u 217 218 #define REG_CLASS_CONTENTS \ 219 { { 0x00000000, 0x00000000 }, \ 220 { SIBCALL_REGS_MASK, 0 }, \ 221 { 0x7f7ffffe, 0x00000000 }, \ 222 { 0xfffffdff, 0x00000000 }, \ 223 { 0xffffffff, 0x00000003 }, \ 224 { 0x00000000, 0x00000004 }, \ 225 { 0xffffffff, 0x00000007 } \ 226 } 227 228 /* A C expression whose value is a register class containing hard 229 register REGNO. In general there is more that one such class; 230 choose a class which is "minimal", meaning that no smaller class 231 also contains the register. */ 232 #define REGNO_REG_CLASS(REGNO) \ 233 ((REGNO) >= SR_F_REGNUM ? FLAG_REGS \ 234 : (REGNO) < 32 && ((SIBCALL_REGS_MASK >> (REGNO)) & 1) ? SIBCALL_REGS \ 235 : GENERAL_REGS) 236 237 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 238 do { \ 239 if (GET_MODE_CLASS (MODE) == MODE_INT \ 240 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 241 (MODE) = word_mode; \ 242 } while (0) 243 244 /* A macro whose definition is the name of the class to which a valid 245 base register must belong. A base register is one used in an 246 address which is the register value plus a displacement. */ 247 #define BASE_REG_CLASS GENERAL_REGS 248 249 #define INDEX_REG_CLASS NO_REGS 250 251 /* Assembly definitions. */ 252 253 #define ASM_APP_ON "" 254 #define ASM_APP_OFF "" 255 256 #define ASM_COMMENT_START "# " 257 258 #define GLOBAL_ASM_OP "\t.global\t" 259 #define TEXT_SECTION_ASM_OP "\t.section\t.text" 260 #define DATA_SECTION_ASM_OP "\t.section\t.data" 261 #define BSS_SECTION_ASM_OP "\t.section\t.bss" 262 #define SBSS_SECTION_ASM_OP "\t.section\t.sbss" 263 264 /* This is how to output an assembler line 265 that says to advance the location counter 266 to a multiple of 2**LOG bytes. */ 267 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 268 do \ 269 { \ 270 if ((LOG) != 0) \ 271 fprintf (FILE, "\t.align %d\n", 1 << (LOG)); \ 272 } \ 273 while (0) 274 275 /* This is used in crtstuff to create call stubs in the 276 _init() and _fini() functions. Defining this here saves 277 a few bytes created by the dummy call_xxx() functions. */ 278 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ 279 asm (SECTION_OP "\n" \ 280 " l.jal " #FUNC "\n" \ 281 " l.nop\n" \ 282 " .previous"); 283 284 285 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) (code == '#') 286 287 /* Calling convention definitions. */ 288 #define CUMULATIVE_ARGS int 289 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 290 do { (CUM) = 0; } while (0) 291 292 293 /* Trampolines, for nested functions */ 294 #define TRAMPOLINE_SIZE 20 295 #define TRAMPOLINE_ALIGNMENT 32 296 297 /* Pointer mode */ 298 #define Pmode SImode 299 #define FUNCTION_MODE SImode 300 #define STACK_POINTER_REGNUM SP_REGNUM 301 #define FRAME_POINTER_REGNUM SFP_REGNUM 302 #define HARD_FRAME_POINTER_REGNUM HFP_REGNUM 303 #define STATIC_CHAIN_REGNUM RV_REGNUM 304 305 /* The register number of the arg pointer register, which is used to 306 access the function's argument list. */ 307 #define ARG_POINTER_REGNUM AP_REGNUM 308 309 /* Position Independent Code. See or1k_init_pic_reg. */ 310 #define REAL_PIC_OFFSET_TABLE_REGNUM HW_TO_GCC_REGNO (16) 311 312 /* ??? Follow i386 in working around gimple costing estimation, which 313 happens without properly initializing the pic_offset_table pseudo. */ 314 #define PIC_OFFSET_TABLE_REGNUM \ 315 (pic_offset_table_rtx ? INVALID_REGNUM : REAL_PIC_OFFSET_TABLE_REGNUM) 316 317 /* A C expression that is nonzero if REGNO is the number of a hard 318 register in which function arguments are sometimes passed. */ 319 #define FUNCTION_ARG_REGNO_P(r) (r >= 3 && r <= 8) 320 321 #define MAX_REGS_PER_ADDRESS 1 322 323 /* The ELIMINABLE_REGS macro specifies a table of register pairs used to 324 eliminate unneeded registers that point into the stack frame. Note, 325 the only elimination attempted by the compiler is to replace references 326 to the frame pointer with references to the stack pointer. */ 327 328 #define ELIMINABLE_REGS \ 329 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ 330 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ 331 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ 332 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }} 333 334 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 335 do { \ 336 (OFFSET) = or1k_initial_elimination_offset ((FROM), (TO)); \ 337 } while (0) 338 339 #define REGNO_OK_FOR_INDEX_P(REGNO) 0 340 #define REGNO_OK_FOR_BASE_P(REGNO) ((REGNO) <= SFP_REGNUM) 341 342 /* If defined, the maximum amount of space required for outgoing 343 arguments will be computed and placed into the variable 344 'crtl->outgoing_args_size'. No space will be pushed 345 onto the stack for each call; instead, the function prologue 346 should increase the stack frame size by this amount. */ 347 #define ACCUMULATE_OUTGOING_ARGS 1 348 349 /* Stack layout and stack pointer usage. */ 350 351 /* This plus ARG_POINTER_REGNUM points to the first word of incoming args. */ 352 #define FIRST_PARM_OFFSET(FNDECL) (0) 353 354 /* This plus STACK_POINTER_REGNUM points to the first work of outgoing args. */ 355 #define STACK_POINTER_OFFSET (0) 356 357 /* Define this macro if pushing a word onto the stack moves the stack 358 pointer to a smaller address. */ 359 #define STACK_GROWS_DOWNWARD 1 360 361 #define FRAME_GROWS_DOWNWARD 1 362 363 /* An alias for a machine mode name. This is the machine mode that 364 elements of a jump-table should have. */ 365 #define CASE_VECTOR_MODE SImode 366 367 #define STORE_FLAG_VALUE 1 368 369 /* Indicates how loads of narrow mode values are loaded into words. */ 370 #define LOAD_EXTEND_OP(MODE) (ZERO_EXTEND) 371 372 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 373 the stack pointer does not matter. */ 374 #define EXIT_IGNORE_STACK 1 375 376 /* Macros related to the access of the stack frame chain. */ 377 #define INITIAL_FRAME_ADDRESS_RTX or1k_initial_frame_addr () 378 #define DYNAMIC_CHAIN_ADDRESS or1k_dynamic_chain_addr 379 #define RETURN_ADDR_RTX or1k_return_addr 380 381 /* Always pass the SYMBOL_REF for direct calls to the expanders. */ 382 #define NO_FUNCTION_CSE 1 383 384 #define NO_PROFILE_COUNTERS 1 385 386 /* Emit rtl for profiling. Output assembler code to call "_mcount" for 387 profiling a function entry. */ 388 #define PROFILE_HOOK(LABEL) \ 389 { \ 390 rtx fun; \ 391 fun = gen_rtx_SYMBOL_REF (Pmode, "_mcount"); \ 392 emit_library_call (fun, LCT_NORMAL, VOIDmode); \ 393 } 394 395 /* All the work is done in PROFILE_HOOK, but this is still required. */ 396 #define FUNCTION_PROFILER(STREAM, LABELNO) do { } while (0) 397 398 /* Dwarf 2 Support */ 399 #define DWARF2_DEBUGGING_INFO 1 400 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNUM) 401 #define DWARF_FRAME_RETURN_COLUMN LR_REGNUM 402 403 /* Describe how we implement __builtin_eh_return. */ 404 #define EH_RETURN_REGNUM HW_TO_GCC_REGNO (23) 405 /* Use r25, r27, r29 and r31 (clobber regs) for exception data. 406 Recall that these are remapped consecutively. */ 407 #define EH_RETURN_DATA_REGNO(N) \ 408 ((N) < 4 ? HW_TO_GCC_REGNO (25) + (N) : INVALID_REGNUM) 409 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_RETURN_REGNUM) 410 411 /* Select a format to encode pointers in exception handling data. */ 412 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ 413 (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4) 414 415 #endif /* GCC_OR1K_H */ 416