1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" { target { ! ilp32 } } } } */ 2 3 #include "test_sve_acle.h" 4 5 /* 6 ** ldff1sw_s64_base: 7 ** ldff1sw z0\.d, p0/z, \[x0\] 8 ** ret 9 */ 10 TEST_LOAD (ldff1sw_s64_base, svint64_t, int32_t, 11 z0 = svldff1sw_s64 (p0, x0), 12 z0 = svldff1sw_s64 (p0, x0)) 13 14 /* 15 ** ldff1sw_s64_index: 16 ** ldff1sw z0\.d, p0/z, \[x0, x1, lsl 2\] 17 ** ret 18 */ 19 TEST_LOAD (ldff1sw_s64_index, svint64_t, int32_t, 20 z0 = svldff1sw_s64 (p0, x0 + x1), 21 z0 = svldff1sw_s64 (p0, x0 + x1)) 22 23 /* Moving the constant into a register would also be OK. */ 24 /* 25 ** ldff1sw_s64_1: 26 ** inch x0 27 ** ldff1sw z0\.d, p0/z, \[x0\] 28 ** ret 29 */ 30 TEST_LOAD (ldff1sw_s64_1, svint64_t, int32_t, 31 z0 = svldff1sw_s64 (p0, x0 + svcntd ()), 32 z0 = svldff1sw_s64 (p0, x0 + svcntd ())) 33 34 /* Moving the constant into a register would also be OK. */ 35 /* 36 ** ldff1sw_s64_m1: 37 ** dech x0 38 ** ldff1sw z0\.d, p0/z, \[x0\] 39 ** ret 40 */ 41 TEST_LOAD (ldff1sw_s64_m1, svint64_t, int32_t, 42 z0 = svldff1sw_s64 (p0, x0 - svcntd ()), 43 z0 = svldff1sw_s64 (p0, x0 - svcntd ())) 44 45 /* 46 ** ldff1sw_vnum_s64_0: 47 ** ldff1sw z0\.d, p0/z, \[x0\] 48 ** ret 49 */ 50 TEST_LOAD (ldff1sw_vnum_s64_0, svint64_t, int32_t, 51 z0 = svldff1sw_vnum_s64 (p0, x0, 0), 52 z0 = svldff1sw_vnum_s64 (p0, x0, 0)) 53 54 /* Moving the constant into a register would also be OK. */ 55 /* 56 ** ldff1sw_vnum_s64_1: 57 ** inch x0 58 ** ldff1sw z0\.d, p0/z, \[x0\] 59 ** ret 60 */ 61 TEST_LOAD (ldff1sw_vnum_s64_1, svint64_t, int32_t, 62 z0 = svldff1sw_vnum_s64 (p0, x0, 1), 63 z0 = svldff1sw_vnum_s64 (p0, x0, 1)) 64 65 /* Moving the constant into a register would also be OK. */ 66 /* 67 ** ldff1sw_vnum_s64_m1: 68 ** dech x0 69 ** ldff1sw z0\.d, p0/z, \[x0\] 70 ** ret 71 */ 72 TEST_LOAD (ldff1sw_vnum_s64_m1, svint64_t, int32_t, 73 z0 = svldff1sw_vnum_s64 (p0, x0, -1), 74 z0 = svldff1sw_vnum_s64 (p0, x0, -1)) 75 76 /* Using MUL to calculate an index would also be OK. */ 77 /* 78 ** ldff1sw_vnum_s64_x1: 79 ** cnth (x[0-9]+) 80 ** madd (x[0-9]+), (x1, \1|\1, x1), x0 81 ** ldff1sw z0\.d, p0/z, \[\2\] 82 ** ret 83 */ 84 TEST_LOAD (ldff1sw_vnum_s64_x1, svint64_t, int32_t, 85 z0 = svldff1sw_vnum_s64 (p0, x0, x1), 86 z0 = svldff1sw_vnum_s64 (p0, x0, x1)) 87