1 /* $NetBSD: db_interface.c,v 1.71 2014/02/28 10:16:51 skrll Exp $ */
2
3 /*
4 * Mach Operating System
5 * Copyright (c) 1991,1990 Carnegie Mellon University
6 * All Rights Reserved.
7 *
8 * Permission to use, copy, modify and distribute this software and its
9 * documentation is hereby granted, provided that both the copyright
10 * notice and this permission notice appear in all copies of the
11 * software, derivative works or modified versions, and any portions
12 * thereof, and that both notices appear in supporting documentation.
13 *
14 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
15 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
16 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
17 *
18 * Carnegie Mellon requests users of this software to return to
19 *
20 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
21 * School of Computer Science
22 * Carnegie Mellon University
23 * Pittsburgh PA 15213-3890
24 *
25 * any improvements or extensions that they make and grant Carnegie the
26 * rights to redistribute these changes.
27 *
28 * db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
29 */
30
31 /*
32 * Interface to new debugger.
33 */
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.71 2014/02/28 10:16:51 skrll Exp $");
37
38 #include "opt_ddb.h"
39 #include "opt_multiprocessor.h"
40
41 #include "ioapic.h"
42 #include "lapic.h"
43
44 #include <sys/param.h>
45 #include <sys/proc.h>
46 #include <sys/reboot.h>
47 #include <sys/systm.h>
48 #include <sys/atomic.h>
49 #include <sys/cpu.h>
50
51 #include <uvm/uvm_extern.h>
52
53 #include <dev/cons.h>
54
55 #include <machine/cpufunc.h>
56 #include <machine/db_machdep.h>
57 #include <machine/cpuvar.h>
58 #if NIOAPIC > 0
59 #include <machine/i82093var.h>
60 #endif
61 #if NLAPIC > 0
62 #include <machine/i82489reg.h>
63 #include <machine/i82489var.h>
64 #endif
65
66 #include <ddb/db_sym.h>
67 #include <ddb/db_command.h>
68 #include <ddb/db_extern.h>
69 #include <ddb/db_access.h>
70 #include <ddb/db_output.h>
71 #include <ddb/ddbvar.h>
72
73 extern const char *const trap_type[];
74 extern int trap_types;
75
76 int db_active = 0;
77 db_regs_t ddb_regs; /* register state */
78
79 void db_mach_cpu (db_expr_t, bool, db_expr_t, const char *);
80
81 const struct db_command db_machine_command_table[] = {
82 #ifdef MULTIPROCESSOR
83 { DDB_ADD_CMD("cpu", db_mach_cpu, 0,
84 "switch to another cpu", "cpu-no", NULL) },
85 #endif
86
87 { DDB_ADD_CMD(NULL, NULL, 0, NULL,NULL,NULL) },
88 };
89
90 void kdbprinttrap(int, int);
91 #ifdef MULTIPROCESSOR
92 extern void ddb_ipi(int, struct trapframe);
93 extern void ddb_ipi_tss(struct i386tss *);
94 static void ddb_suspend(struct trapframe *);
95 #ifndef XEN
96 int ddb_vec;
97 #endif /* XEN */
98 static bool ddb_mp_online;
99 #endif
100
101 db_regs_t *ddb_regp = 0;
102
103 #define NOCPU -1
104
105 int ddb_cpu = NOCPU;
106
107 typedef void (vector)(void);
108 extern vector Xintrddbipi;
109
110 void
db_machine_init(void)111 db_machine_init(void)
112 {
113
114 #ifdef MULTIPROCESSOR
115 #ifndef XEN
116 ddb_vec = idt_vec_alloc(0xf0, 0xff);
117 idt_vec_set(ddb_vec, &Xintrddbipi);
118 #else
119 /* Initialised as part of xen_ipi_init() */
120 #endif /* XEN */
121 #endif
122 }
123
124 #ifdef MULTIPROCESSOR
125
126 __cpu_simple_lock_t db_lock;
127
128 static int
db_suspend_others(void)129 db_suspend_others(void)
130 {
131 int cpu_me = cpu_number();
132 int win;
133
134 #ifndef XEN
135 if (ddb_vec == 0)
136 return 1;
137 #endif /* XEN */
138
139 __cpu_simple_lock(&db_lock);
140 if (ddb_cpu == NOCPU)
141 ddb_cpu = cpu_me;
142 win = (ddb_cpu == cpu_me);
143 __cpu_simple_unlock(&db_lock);
144 if (win) {
145 #ifdef XEN
146 xen_broadcast_ipi(XEN_IPI_DDB);
147 #else
148 x86_ipi(ddb_vec, LAPIC_DEST_ALLEXCL, LAPIC_DLMODE_FIXED);
149 #endif /* XEN */
150 }
151 ddb_mp_online = x86_mp_online;
152 x86_mp_online = false;
153 return win;
154 }
155
156 static void
db_resume_others(void)157 db_resume_others(void)
158 {
159 CPU_INFO_ITERATOR cii;
160 struct cpu_info *ci;
161
162 x86_mp_online = ddb_mp_online;
163 __cpu_simple_lock(&db_lock);
164 ddb_cpu = NOCPU;
165 __cpu_simple_unlock(&db_lock);
166
167 for (CPU_INFO_FOREACH(cii, ci)) {
168 if (ci->ci_flags & CPUF_PAUSE)
169 atomic_and_32(&ci->ci_flags, ~CPUF_PAUSE);
170 }
171 }
172
173 #endif
174
175 /*
176 * Print trap reason.
177 */
178 void
kdbprinttrap(int type,int code)179 kdbprinttrap(int type, int code)
180 {
181 db_printf("kernel: %s trap ", (type & T_USER) ? "user" : "supervisor");
182 type &= ~T_USER;
183 if (type >= trap_types || type < 0)
184 db_printf("type %d", type);
185 else
186 db_printf("%s", trap_type[type]);
187 db_printf(", code=%x\n", code);
188 }
189
190 /*
191 * kdb_trap - field a TRACE or BPT trap
192 */
193 int
kdb_trap(int type,int code,db_regs_t * regs)194 kdb_trap(int type, int code, db_regs_t *regs)
195 {
196 int s, flags;
197 db_regs_t dbreg;
198
199 flags = regs->tf_err & TC_FLAGMASK;
200 regs->tf_err &= ~TC_FLAGMASK;
201
202 switch (type) {
203 case T_NMI: /* NMI */
204 printf("NMI ... going to debugger\n");
205 /*FALLTHROUGH*/
206 case T_BPTFLT: /* breakpoint */
207 case T_TRCTRAP: /* single_step */
208 case -1: /* keyboard interrupt */
209 break;
210 default:
211 if (!db_onpanic && db_recover == 0)
212 return (0);
213
214 kdbprinttrap(type, code);
215 if (db_recover != 0) {
216 db_error("Faulted in DDB; continuing...\n");
217 /*NOTREACHED*/
218 }
219 }
220
221 #ifdef MULTIPROCESSOR
222 if (!db_suspend_others()) {
223 ddb_suspend(regs);
224 } else {
225 curcpu()->ci_ddb_regs = &dbreg;
226 ddb_regp = &dbreg;
227 #endif
228 /* XXX Should switch to kdb's own stack here. */
229 ddb_regs = *regs;
230 if (!(flags & TC_TSS) && KERNELMODE(regs->tf_cs, regs->tf_eflags)) {
231 /*
232 * Kernel mode - esp and ss not saved
233 */
234 ddb_regs.tf_esp = (int)®s->tf_esp; /* kernel stack pointer */
235 ddb_regs.tf_ss = x86_getss();
236 }
237
238 ddb_regs.tf_cs &= 0xffff;
239 ddb_regs.tf_ds &= 0xffff;
240 ddb_regs.tf_es &= 0xffff;
241 ddb_regs.tf_fs &= 0xffff;
242 ddb_regs.tf_gs &= 0xffff;
243 ddb_regs.tf_ss &= 0xffff;
244 s = splhigh();
245 db_active++;
246 cnpollc(true);
247 db_trap(type, code);
248 cnpollc(false);
249 db_active--;
250 splx(s);
251 #ifdef MULTIPROCESSOR
252 db_resume_others();
253 }
254 #endif
255 ddb_regp = &dbreg;
256
257 regs->tf_gs = ddb_regs.tf_gs;
258 regs->tf_fs = ddb_regs.tf_fs;
259 regs->tf_es = ddb_regs.tf_es;
260 regs->tf_ds = ddb_regs.tf_ds;
261 regs->tf_edi = ddb_regs.tf_edi;
262 regs->tf_esi = ddb_regs.tf_esi;
263 regs->tf_ebp = ddb_regs.tf_ebp;
264 regs->tf_ebx = ddb_regs.tf_ebx;
265 regs->tf_edx = ddb_regs.tf_edx;
266 regs->tf_ecx = ddb_regs.tf_ecx;
267 regs->tf_eax = ddb_regs.tf_eax;
268 regs->tf_eip = ddb_regs.tf_eip;
269 regs->tf_cs = ddb_regs.tf_cs;
270 regs->tf_eflags = ddb_regs.tf_eflags;
271 if (!(flags & TC_TSS) && !KERNELMODE(regs->tf_cs, regs->tf_eflags)) {
272 /* ring transit - saved esp and ss valid */
273 regs->tf_esp = ddb_regs.tf_esp;
274 regs->tf_ss = ddb_regs.tf_ss;
275 }
276
277 #ifdef TRAPLOG
278 wrmsr(MSR_DEBUGCTLMSR, 0x1);
279 #endif
280
281 return (1);
282 }
283
284 void
cpu_Debugger(void)285 cpu_Debugger(void)
286 {
287 breakpoint();
288 }
289
290 #ifdef MULTIPROCESSOR
291
292 /*
293 * Called when we receive a debugger IPI (inter-processor interrupt).
294 * As with trap() in trap.c, this function is called from an assembly
295 * language IDT gate entry routine which prepares a suitable stack frame,
296 * and restores this frame after the exception has been processed. Note
297 * that the effect is as if the arguments were passed call by reference.
298 */
299 void
ddb_ipi(int cpl,struct trapframe frame)300 ddb_ipi(int cpl, struct trapframe frame)
301 {
302
303 ddb_suspend(&frame);
304 }
305
306 void
ddb_ipi_tss(struct i386tss * tss)307 ddb_ipi_tss(struct i386tss *tss)
308 {
309 struct trapframe tf;
310
311 tf.tf_gs = tss->tss_gs;
312 tf.tf_fs = tss->tss_fs;
313 tf.tf_es = tss->__tss_es;
314 tf.tf_ds = tss->__tss_ds;
315 tf.tf_edi = tss->__tss_edi;
316 tf.tf_esi = tss->__tss_esi;
317 tf.tf_ebp = tss->tss_ebp;
318 tf.tf_ebx = tss->__tss_ebx;
319 tf.tf_edx = tss->__tss_edx;
320 tf.tf_ecx = tss->__tss_ecx;
321 tf.tf_eax = tss->__tss_eax;
322 tf.tf_trapno = 0;
323 tf.tf_err = TC_TSS;
324 tf.tf_eip = tss->__tss_eip;
325 tf.tf_cs = tss->__tss_cs;
326 tf.tf_eflags = tss->__tss_eflags;
327 tf.tf_esp = tss->tss_esp;
328 tf.tf_ss = tss->__tss_ss;
329
330 ddb_suspend(&tf);
331 }
332
333 static void
ddb_suspend(struct trapframe * frame)334 ddb_suspend(struct trapframe *frame)
335 {
336 volatile struct cpu_info *ci = curcpu();
337 db_regs_t regs;
338 int flags;
339
340 regs = *frame;
341 flags = regs.tf_err & TC_FLAGMASK;
342 regs.tf_err &= ~TC_FLAGMASK;
343 if (!(flags & TC_TSS) && KERNELMODE(regs.tf_cs, regs.tf_eflags)) {
344 /*
345 * Kernel mode - esp and ss not saved
346 */
347 regs.tf_esp = (int)&frame->tf_esp; /* kernel stack pointer */
348 regs.tf_ss = x86_getss();
349 }
350
351 ci->ci_ddb_regs = ®s;
352
353 atomic_or_32(&ci->ci_flags, CPUF_PAUSE);
354 while (ci->ci_flags & CPUF_PAUSE)
355 ;
356 ci->ci_ddb_regs = 0;
357 tlbflushg();
358 }
359
360
361 extern void cpu_debug_dump(void); /* XXX */
362
363 void
db_mach_cpu(db_expr_t addr,bool have_addr,db_expr_t count,const char * modif)364 db_mach_cpu(
365 db_expr_t addr,
366 bool have_addr,
367 db_expr_t count,
368 const char * modif)
369 {
370 struct cpu_info *ci;
371 if (!have_addr) {
372 cpu_debug_dump();
373 return;
374 }
375
376 if (addr < 0) {
377 db_printf("%ld: CPU out of range\n", addr);
378 return;
379 }
380 ci = cpu_lookup(addr);
381 if (ci == NULL) {
382 db_printf("CPU %ld not configured\n", addr);
383 return;
384 }
385 if (ci != curcpu()) {
386 if (!(ci->ci_flags & CPUF_PAUSE)) {
387 db_printf("CPU %ld not paused\n", addr);
388 return;
389 }
390 }
391 if (ci->ci_ddb_regs == 0) {
392 db_printf("CPU %ld has no saved regs\n", addr);
393 return;
394 }
395 db_printf("using CPU %ld", addr);
396 ddb_regp = ci->ci_ddb_regs;
397 }
398
399
400 #endif
401