1 /*	$NetBSD: xdreg.h,v 1.7 2011/02/01 19:36:24 chuck Exp $	*/
2 
3 /*
4  * Copyright (c) 1995 Charles D. Cranor
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 /*
29  * x d r e g . h
30  *
31  * this file contains the description of the Xylogics 753/7053's hardware
32  * data structures.
33  *
34  * author: Chuck Cranor <chuck@netbsd>
35  */
36 
37 #define XDC_MAXDEV    4       /* max devices per controller */
38 #define XDC_RESETUSEC 1000000 /* max time for xdc reset (page 21 says 1sec) */
39 #define XDC_MAXIOPB   31      /* max number of iopbs that can be active */
40 #define XDC_MAXTIME   4*1000000 /* four seconds before we give up and reset */
41 #define XDC_MAXTRIES  4       /* max number of times to retry an operation */
42 #define XDC_THROTTLE  32      /* DMA throttle */
43 #define XDC_INTERLEAVE 0      /* interleave (for format param) */
44 #define XDC_DPARAM     0      /* dparam (drive param) XDDP_EC32 or 0 */
45 
46 /*
47  * xdc device interface
48  * (lives in VME address space)
49  */
50 
51 struct xdc {
52   volatile u_char filler0;
53   volatile u_char xdc_iopbaddr0;       /* iopb byte 0 (LSB) */
54   volatile u_char filler1;
55   volatile u_char xdc_iopbaddr1;       /* iopb byte 1 */
56   volatile u_char filler2;
57   volatile u_char xdc_iopbaddr2;       /* iopb byte 2 */
58   volatile u_char filler3;
59   volatile u_char xdc_iopbaddr3;       /* iopb byte 3 (MSB) */
60   volatile u_char filler4;
61   volatile u_char xdc_iopbamod;        /* iopb address modifier */
62   volatile u_char filler5;
63   volatile u_char xdc_csr;             /* control and status register */
64   volatile u_char filler6;
65   volatile u_char xdc_f_err;           /* fatal error register */
66 };
67 
68 /*
69  * xdc_iopbamod: addressing modes
70  * When doing DMA, if the maximum address of the buffer is greater than
71  * 24 bits then you must use the 32 bit mode.   Note that on many systems
72  * (e.g. sun-4/300) DVMA space is smaller than 24 bits, so there is no
73  * need for the 32 bit mode.   However, the 32-bit mode hooks are in
74  * the driver in case it ever gets ported to an environment that needs it.
75  */
76 
77 #define XDC_ADDRMOD   0x3d    /* standard address modifer, 24 bit max */
78 #define XDC_ADDRMOD32 0x0d    /* 32 bit version above */
79 
80 /*
81  * xdc_csr
82  */
83 
84 #define XDC_RMAINTMD 0x80     /* reserved maintenance mode (write) */
85 #define XDC_BUSY     0x80     /* busy (read) */
86 #define XDC_F_ERROR  0x40     /* fatal error (read) */
87 #define XDC_MAINTMOD 0x20     /* maintenance mode (read/write) */
88 #define XDC_RESET    0x08     /* soft reset (read/write) */
89 #define XDC_ADDIOPB  0x04     /* add iopb/add pending (write) */
90 #define XDC_ADDING   0x04     /* iopb add is pending (read) */
91 #define XDC_CLRRIO   0x02     /* clear RIO (remove iopb) request (write) */
92 #define XDC_REMIOPB  0x02     /* remove iopb (read) */
93 #define XDC_RBUSYSEM 0x01     /* register busy semaphore (read/write) */
94 
95 /*
96  * Input/Output Parameter Block (iopb)
97  *
98  * all controller commands are done via iopb's.   to start a command you
99  * must do this:
100  * [1] allocate space in DVMA space for the iopb
101  * [2] fill out all the fields of the iopb
102  * [3] check to see if controller can accept an iopb (XDC_ADDING bit clear)
103  * [4] put the DVMA address of the iopb in the xdc registers (in vme space)
104  * [5] set the XDC_ADDIOPB bit in the xdc csr
105  * [6] <command started>
106  *
107  * when the controller is done with a command it may interrupt (if you
108  * ask it to) and it will set the XDC_REMIOPB bit in the csr.   the address
109  * of the finished iopb will be in the xdc registers.   after that is
110  * read, set the XDC_CLRRIO to clear the iopb out of memory.
111  *
112  * the format of the iopb is described in section 4 of the manual.
113  */
114 
115 struct xd_iopb {
116                                  /* section 4.1.1: byte 0 */
117   volatile u_char errs:1;        /* error summary bit, only valid if
118 				    "done" is set.  must clear "done"
119 				    and "errs" bits before starting an
120 				    operation */
121   volatile u_char done:1;        /* "done" bit */
122   volatile u_char chen:1;        /* chain enable, "next iopb" is valid,
123 				    note xd returns one iopb at a time */
124   volatile u_char sgm:1;         /* scatter/gather mode */
125   volatile u_char comm:4;        /* command number (see table 4-2) */
126 #define XDCMD_NOP 0x0            /* no-op */
127 #define XDCMD_WR  0x1            /* write */
128 #define XDCMD_RD  0x2            /* read */
129 #define XDCMD_SK  0x3            /* seek */
130 #define XDCMD_RST 0x4            /* drive reset */
131 #define XDCMD_WRP 0x5            /* write params */
132 #define XDCMD_RDP 0x6            /* read params */
133 #define XDCMD_XWR 0x7            /* extended write */
134 #define XDCMD_XRD 0x8            /* extended read */
135 #define XDCMD_TST 0x9            /* diagnostic tests */
136                                  /* 0xa to 0xf are reserved */
137                                  /* section 4.1.2: byte 1 */
138   volatile u_char errnum;        /* status byte 1 (non-zero if error) */
139                                  /* section 4.1.3: byte 2 */
140   volatile u_char status;        /* status byte 2 (see below) */
141 #define XDST_SR   0x40           /* slipped revolution */
142 #define XDST_CSE  0x20           /* count sectors executed */
143 #define XDST_WRPT 0x10           /* write protected drive */
144 #define XDST_DFLT 0x08           /* disk fault */
145 #define XDST_SKER 0x04           /* seek error: >max, or timeout */
146 #define XDST_ONCL 0x02           /* on-cylinder */
147 #define XDST_DRDY 0x01           /* drive is ready! */
148                                  /* section 4.1.4: byte 3 */
149   volatile u_char istat;         /* internal status: reserved for xylogics */
150                                  /* section 4.1.5: byte 4 */
151   volatile u_char subfun;        /* sub-function of command (see below) */
152 #define XDFUN_R   0x00           /* XDCMD_SK: report current addr */
153 #define XDFUN_SR  0x01           /* XDCMD_SK: seek and report addr */
154 #define XDFUN_SRI 0x02           /* XDCMD_SK: start seek, report comp imm */
155 #define XDFUN_CTL 0x00           /* XDCMD_{WRP,RDP}: controller params */
156 #define XDFUN_DRV 0x80           /* XDCMD_{WRP,RDP}: drive params */
157 #define XDFUN_FMT 0x81           /* XDCMD_{WRP,RDP}: format params,XWR form.*/
158 #define XDFUN_STX 0xa0           /* XDCMD_RDP: read drive status extended */
159 #define XDFUN_THD 0x80           /* XDCMD_{XWR,XRD}: track headers */
160 #define XDFUN_VFY 0x81           /* XDCMD_XRD: verify data */
161 #define XDFUN_HDR 0x82           /* XDCMD_{XWR,XRD}: header, verify,data, ecc*/
162 #define XDFUN_DM  0xa0           /* XDCMD_{XWR,XRD}: defect map */
163 #define XDFUN_DMX 0xa1           /* XDCMD_{XWR,XRD}: defect map extended */
164                                  /* section 4.1.6: byte 5 */
165   volatile u_char fixd:1;        /* fixed media (vs removable) */
166   volatile u_char reserved1:4;   /* reserved */
167   volatile u_char unit:3;        /* unit number */
168                                  /* note: 6 to 13 are overloaded (see below) */
169                                  /* section 4.1.7: byte 6 */
170   volatile u_char lll:5;         /* linked list length */
171   volatile u_char intl:3;        /* interrupt level */
172                                  /* section 4.1.8: byte 7 */
173   volatile u_char intr_vec;      /* interrupt vector */
174                                  /* section 4.1.9: bytes 8 and 9 */
175   volatile u_short sectcnt;      /* sector count (# to xfer) */
176                                  /* section 4.1.10: byte a and b */
177   volatile u_short cylno;        /* cylinder number */
178                                  /* section 4.1.11: byte c */
179   volatile u_char headno;        /* head number */
180                                  /* section 4.1.12: byte d */
181   volatile u_char sectno;        /* sector number */
182                                  /* section 4.1.13: byte e */
183   volatile u_char addrmod;       /* addr modifier (bits 7,6 must be zero) */
184                                  /* section 4.1.14: byte f */
185   volatile u_char naddrmod;      /* next (in chain) address iobp ad. modifer */
186                                  /* section 4.1.15: bytes 0x10 to 0x13 */
187   volatile u_long daddr;         /* DMA data address */
188                                  /* section 4.1.16: bytes 0x14 to 0x17 */
189   volatile u_long nextiopb;      /* next iopb (in chain) address */
190                                  /* section 4.1.17: bytes 0x18, 0x19 */
191   volatile u_short cksum;        /* iopb checksum */
192                                  /* section 4.1.18: bytes 0x1a, 0x1b */
193   volatile u_short eccpattern;   /* ECC pattern word (ecc mode 0) */
194                                  /* section 4.1.19: bytes 0x1c, 0x1d */
195   volatile u_short eccoffword;   /* ECC offset word (ecc mode 0) */
196 };
197 
198 /*
199  * some commands overload bytes 6 to 0x13 of the iopb with different meanings.
200  * these commands include:
201  *   section 4.2: controller parameters
202  *   section 4.3: drive parameters
203  *   sectino 4.4: format parameters
204  *
205  * note that the commands that overload the iopb are not part of the
206  * "critical data path" of the driver.   so, we handle them by defining
207  * alternate iopb structures for these commands... it only costs us an
208  * extra pointer.
209  */
210 
211 /*
212  * controller parameters iopb: redefines bytes: 8 -> 0xe, 0x10 -> 0x13
213  */
214 
215 struct xd_iopb_ctrl {
216   volatile u_char same[8];       /* same as xd_iopb */
217                                  /* section 4.2.1: byte 8 */
218   volatile u_char param_a;       /* param A (see below) */
219 #define XDPA_AUD  0x80           /* auto-update iopb fields when cmd done */
220 #define XDPA_TMOD 0x40           /* long-word transfer mode (vs word) */
221 #define XDPA_DACF 0x20           /* ignore vme ACFAIL signal */
222 #define XDPA_ICS  0x10           /* checksum check (adds 100usec per xfer) */
223 #define XDPA_EDT  0x08           /* enable on-board DMA timeout timer */
224 #define XDPA_NPRM 0x04           /* enable VME non-priv request mode */
225                                  /* rest must be zero */
226                                  /* section 4.2.2: byte 9 */
227   volatile u_char param_b;       /* param B (see below) */
228 #define XDPB_TDT 0xc0            /* throttle dead time (see 8.11, below) */
229 #define XDPB_ROR 0x10            /* release on request */
230 #define XDPB_DRA 0x01            /* disable read ahead */
231                                  /* TDT values: */
232 #define XDPB_TDT_0USEC    0x00   /* no TDT */
233 #define XDPB_TDT_3_2USEC  0x40   /* 3.2 usec */
234 #define XDPB_TDT_6_4USEC  0x80   /* 6.4 usec */
235 #define XDPB_TDT_12_8USEC 0xc0   /* 12.8 usec */
236                                  /* section 4.2.3: byte a */
237   volatile u_char param_c;       /* param C (see below) */
238 #define XDPC_OVS  0x80           /* over-lapped seek */
239 #define XDPC_COP  0x40           /* command optimiziation (elevator alg.) */
240 #define XDPC_ASR  0x10           /* auto-seek retry */
241 #define XDPC_RBC  0x04           /* retry before correction if ECC error */
242 #define XDPC_ECCM 0x03           /* ECC mode (0, 1, and 2) */
243 #define XDPC_ECC0 0x00           /* ECC mode 0 */
244 #define XDPC_ECC1 0x01           /* ECC mode 1 */
245 #define XDPC_ECC2 0x02           /* ECC mode 2 */
246                                  /* section 4.2.4: byte b */
247   volatile u_char throttle;      /* max DMA xfers per master (0==256) */
248                                  /* section 4.2.5: byte c */
249   volatile u_char eprom_lvl;     /* EPROM release level */
250   volatile u_char delay;         /* delay (see note below) */
251                                  /* section 4.2.6: byte e */
252   volatile u_char ctype;         /* controller type */
253 #define XDCT_753 0x53            /* xylogic 753/7053 */
254   volatile u_char same2;         /* byte f: same as xd_iopb */
255                                  /* section 4.2.7: byte 0x10, 0x11 */
256   volatile u_short eprom_partno; /* eprom part number */
257                                  /* section 4.2.8: byte 12 */
258   volatile u_char eprom_rev;     /* eprom revision number */
259 };
260 
261 /*
262  * Note on byte 0xd ("delay"): This byte is not documented in the
263  * Xylogics manual.  However, I contacted Xylogics and found out what
264  * it does.  The controller sorts read commands into groups of
265  * contiguous sectors.  After it processes a group of contiguous
266  * sectors rather than immediately going on to the next group of
267  * contiguous sectors, the controller can delay for a certain amount
268  * of time in hopes of getting another cluster of reads in the same
269  * area of the disk (thus avoiding a long seek).  Byte 0xd controls
270  * how long it waits before giving up and going on and doing the next
271  * contiguous cluster.
272  *
273  * it is unclear what unit the delay is in, but it looks like sun
274  * uses the value "20" for sun3's, and "0" for sparc, except for the
275  * 4/300 (where it is "4").   [see /sys/sundev/xd_conf.c on any 4.1.3
276  * machine for how sun configures its controller...]
277  */
278 
279 #define XDC_DELAY_SUN3  20
280 #define XDC_DELAY_4_300 4
281 #define XDC_DELAY_SPARC 0
282 
283 /*
284  * drive parameters iopb: redefines bytes: 6, 8, 9, a, b, c, d, e
285  */
286 
287 struct xd_iopb_drive {
288   volatile u_char same[6];       /* same as xd_iopb */
289                                  /* section 4.3.1: byte 6 */
290   volatile u_char dparam_ipl;    /* drive params | interrupt level */
291 #define XDDP_EC32 0x10           /* 32 bit ECC mode */
292   volatile u_char same1;         /* byte 7: same */
293                                  /* section 4.3.2: byte 8 */
294   volatile u_char maxsect;       /* max sector/last head (<= byte d) */
295                                  /* section 4.3.3: byte 9 */
296   volatile u_char headoff;       /* head offset */
297                                  /* section 4.3.4: bytes 0xa, 0xb */
298   volatile u_short maxcyl;       /* max cyl (zero based!) */
299                                  /* section 4.3.5: byte 0xc */
300   volatile u_char maxhead;       /* max head (zero based!) */
301                                  /* section 4.3.6: byte 0xd */
302   volatile u_char maxsector;     /* max sector of disk (zero based!) */
303                                  /* section 4.3.7: byte 0xe */
304   volatile u_char sectpertrk;    /* sectors per track, not zero base, no runt*/
305 };
306 
307 /*
308  * format parameters iopb: redefines bytes: 6, 8, 9, a, b, c, d, 0x10, 0x11
309  */
310 
311 struct xd_iopb_format {
312   volatile u_char same[6];       /* smae as xd_iopb */
313                                  /* section 4.4.1: byte 6 */
314   volatile u_char interleave_ipl;/* (interleave << 4) | interrupt level */
315                                  /* interleave ratio 1:1 to 16:1 */
316   volatile u_char same1;         /* byte 7: same */
317                                  /* section 4.4.2: byte 8 */
318   volatile u_char field1;        /* >= 1, xylogic says should be 1 */
319 #define XDFM_FIELD1 0x01         /* xylogic value */
320                                  /* section 4.4.3: byte 9 */
321   volatile u_char field2;        /* >0, field1+field2 <= 255 */
322 #define XDFM_FIELD2 0x0a         /* xylogic value */
323                                  /* section 4.4.4: byte a */
324   volatile u_char field3;        /* >= field1+field2 */
325 #define XDFM_FIELD3 0x1b         /* xylogic value */
326                                  /* section 4.4.5: byte b */
327   volatile u_char field4;        /* field4 */
328 #define XDFM_FIELD4 0x14         /* xylogic value */
329                                  /* section 4.4.6: bytes 0xc, 0xd */
330   volatile u_short bytespersec;  /* bytes per sector */
331 #define XDFM_BPS    0x200        /* must be 512! */
332   volatile u_char same2[2];      /* bytes e, f */
333                                  /* section 4.4.7: byte 0x10 */
334   volatile u_char field6;        /* field 6 */
335 #define XDFM_FIELD6 0x0a         /* xylogic value */
336                                  /* section 4.4.8: byte 0x11 */
337   volatile u_char field7;        /* field 7, >= 1 */
338 #define XDFM_FIELD7 0x03         /* xylogic value */
339 };
340 
341 
342 /*
343  * errors: errors come from either the fatal error register or the
344  * iopb
345  */
346 
347 #define XD_ERA_MASK 0xf0         /* error action mask */
348 #define XD_ERA_PROG 0x10         /* program error */
349 #define XD_ERA_PRG2 0x20         /* program error */
350 #define XD_ERA_SOFT 0x30         /* soft error: we recovered */
351 #define XD_ERA_HARD 0x40         /* hard error: retry */
352 #define XD_ERA_RSET 0x60         /* hard error: reset, then retry */
353 #define XD_ERA_WPRO 0x90         /* write protected */
354 
355 /* software error codes */
356 #define XD_ERR_FAIL 0xff         /* general total failure */
357 /* no error */
358 #define XD_ERR_AOK  0x00         /* success */
359 /* non-retryable programming error */
360 #define XD_ERR_ICYL 0x10         /* illegal cyl */
361 #define XD_ERR_IHD  0x11         /* illegal head */
362 #define XD_ERR_ISEC 0x12         /* illegal sector */
363 #define XD_ERR_CZER 0x13         /* count zero */
364 #define XD_ERR_UIMP 0x14         /* unknown command */
365 #define XD_ERR_IF1  0x15         /* illegal field 1 */
366 #define XD_ERR_IF2  0x16         /* illegal field 2 */
367 #define XD_ERR_IF3  0x17         /* illegal field 3 */
368 #define XD_ERR_IF4  0x18         /* illegal field 4 */
369 #define XD_ERR_IF5  0x19         /* illegal field 5 */
370 #define XD_ERR_IF6  0x1a         /* illegal field 6 */
371 #define XD_ERR_IF7  0x1b         /* illegal field 7 */
372 #define XD_ERR_ISG  0x1c         /* illegal scatter/gather */
373 #define XD_ERR_ISPT 0x1d         /* not enough sectors per track */
374 #define XD_ERR_ALGN 0x1e         /* next iopb allignment error */
375 #define XD_ERR_SGAL 0x1f         /* scatter gather address alignment error */
376 #define XD_ERR_SGEC 0x20         /* scatter gather with auto ECC */
377 /* successfully recovered soft errors */
378 #define XD_ERR_SECC 0x30         /* soft ecc corrected */
379 #define XD_ERR_SIGN 0x31         /* ecc ignored */
380 #define XD_ERR_ASEK 0x32         /* auto-seek retry recovered */
381 #define XD_ERR_RTRY 0x33         /* soft retry recovered */
382 /* hard errors: please retry */
383 #define XD_ERR_HECC 0x40         /* hard data ECC */
384 #define XD_ERR_NHDR 0x41         /* header not found */
385 #define XD_ERR_NRDY 0x42         /* drive not ready */
386 #define XD_ERR_TOUT 0x43         /* timeout */
387 #define XD_ERR_VTIM 0x44         /* VME DMA timeout */
388 #define XD_ERR_DSEQ 0x45         /* disk sequencer error */
389 #define XD_ERR_HDEC 0x48         /* header ECC error */
390 #define XD_ERR_RVFY 0x49         /* ready verify */
391 #define XD_ERR_VFER 0x4a         /* fatal VME DMA error */
392 #define XD_ERR_VBUS 0x4b         /* VME bus error */
393 /* hard error: reset and retry */
394 #define XD_ERR_DFLT 0x60         /* drive fault */
395 #define XD_ERR_HECY 0x61         /* header error/cyl */
396 #define XD_ERR_HEHD 0x62         /* header error/head */
397 #define XD_ERR_NOCY 0x63         /* not on cylinder */
398 #define XD_ERR_SEEK 0x64         /* seek error */
399 /* fatal hardware error */
400 #define XD_ERR_ILSS 0x70         /* illegal sector size */
401 /* misc */
402 #define XD_ERR_SEC  0x80         /* soft ecc */
403 /* requires manual intervention */
404 #define XD_ERR_WPER 0x90         /* write protected */
405 /* FATAL errors */
406 #define XD_ERR_IRAM 0xe1         /* IRAM self test failed */
407 #define XD_ERR_MT3  0xe3         /* maint test 3 failed (DSKCEL RAM) */
408 #define XD_ERR_MT4  0xe4         /* maint test 4 failed (Header shift reg) */
409 #define XD_ERR_MT5  0xe5         /* maint test 5 failed (VMEDMA regs) */
410 #define XD_ERR_MT6  0xe6         /* maint test 6 failed (REGCEL chip) */
411 #define XD_ERR_MT7  0xe7         /* maint test 7 failed (buff. parity) */
412 #define XD_ERR_MT8  0xe8         /* maint test 8 failed (fifo) */
413 #define XD_ERR_IOCK 0xf0         /* iopb checksume miscompare */
414 #define XD_ERR_IODM 0xf1         /* iopb DMA fatal */
415 #define XD_ERR_IOAL 0xf2         /* iopb allignment error */
416 #define XD_ERR_FIRM 0xf3         /* firmware error n*/
417 #define XD_ERR_MMOD 0xf5         /* illegal maint mode test number */
418 #define XD_ERR_ACFL 0xf6         /* ACFAIL asserted */
419