1 /*	$NetBSD: dwc2.h,v 1.9 2016/02/24 22:17:54 skrll Exp $	*/
2 
3 /*-
4  * Copyright (c) 2013 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Nick Hudson
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _EXTERNAL_BSD_DWC2_DWC2_H_
33 #define _EXTERNAL_BSD_DWC2_DWC2_H_
34 
35 #include <sys/param.h>
36 
37 #include <sys/callout.h>
38 #include <sys/kernel.h>
39 #include <sys/proc.h>
40 #include <sys/workqueue.h>
41 
42 #include <linux/list.h>
43 #include <linux/workqueue.h>
44 
45 #include "opt_usb.h"
46 // #define VERBOSE_DEBUG
47 // #define DWC2_DUMP_FRREM
48 // #define CONFIG_USB_DWC2_TRACK_MISSED_SOFS
49 
50 #define CONFIG_USB_DWC2_HOST		1
51 #define CONFIG_USB_DWC2_DUAL_ROLE	0
52 #define CONFIG_USB_DWC2_PERIPHERAL	0
53 
54 typedef int irqreturn_t;
55 #define	IRQ_NONE 0
56 #define IRQ_HANDLED 1
57 
58 #define	u8	uint8_t
59 #define	u16	uint16_t
60 #define	s16	int16_t
61 #define	u32	uint32_t
62 #define	u64	uint64_t
63 
64 #define	dma_addr_t	bus_addr_t
65 
66 #define DWC2_READ_4(hsotg, reg) \
67     bus_space_read_4((hsotg)->hsotg_sc->sc_iot, (hsotg)->hsotg_sc->sc_ioh, (reg))
68 #define DWC2_WRITE_4(hsotg, reg, data)  \
69     bus_space_write_4((hsotg)->hsotg_sc->sc_iot, (hsotg)->hsotg_sc->sc_ioh, (reg), (data));
70 
71 #ifdef DWC2_DEBUG
72 extern int dwc2debug;
73 #define WARN_ON(x)	KASSERT(!(x))
74 
75 #define	dev_info(d,fmt,...) do {			\
76 	printf("%s: " fmt, device_xname(d), 		\
77 	    ## __VA_ARGS__);				\
78 } while (0)
79 #define	dev_warn(d,fmt,...) do {			\
80 	printf("%s: " fmt, device_xname(d), 		\
81 	    ## __VA_ARGS__);				\
82 } while (0)
83 #define	dev_err(d,fmt,...) do {				\
84 	printf("%s: " fmt, device_xname(d), 		\
85 	    ## __VA_ARGS__);				\
86 } while (0)
87 #define	dev_dbg(d,fmt,...) do {				\
88 	if (dwc2debug >= 1) {				\
89 	    printf("%s: " fmt, device_xname(d), 	\
90 		    ## __VA_ARGS__);			\
91 	}						\
92 } while (0)
93 #define	dev_vdbg(d,fmt,...) do {			\
94 	if (dwc2debug >= 2) {				\
95 	    printf("%s: " fmt, device_xname(d), 	\
96 		    ## __VA_ARGS__);			\
97 	}						\
98 } while (0)
99 #else
100 #define WARN_ON(x)
101 #define	dev_info(...) do { } while (0)
102 #define	dev_warn(...) do { } while (0)
103 #define	dev_err(...) do { } while (0)
104 #define	dev_dbg(...) do { } while (0)
105 #define	dev_vdbg(...) do { } while (0)
106 #endif
107 
108 #define jiffies			hardclock_ticks
109 #define msecs_to_jiffies	mstohz
110 
111 #define gfp_t		int
112 #define GFP_KERNEL	 KM_SLEEP
113 #define GFP_ATOMIC	 KM_NOSLEEP
114 
115 enum usb_otg_state {
116 	OTG_STATE_RESERVED = 0,
117 
118 	OTG_STATE_A_HOST,
119 	OTG_STATE_A_PERIPHERAL,
120 	OTG_STATE_A_SUSPEND,
121 	OTG_STATE_B_HOST,
122 	OTG_STATE_B_PERIPHERAL,
123 };
124 
125 #define usleep_range(l, u)	do { DELAY(u); } while (0)
126 
127 #define spinlock_t		kmutex_t
128 #define spin_lock_init(lock)	mutex_init(lock, MUTEX_DEFAULT, IPL_VM)
129 #define	spin_lock(l)		do { mutex_spin_enter(l); } while (0)
130 #define	spin_unlock(l)		do { mutex_spin_exit(l); } while (0)
131 
132 #define	spin_lock_irqsave(l, f)		\
133 	do { mutex_spin_enter(l); (void)(f); } while (0)
134 
135 #define	spin_unlock_irqrestore(l, f)	\
136 	do { mutex_spin_exit(l); (void)(f); } while (0)
137 
138 #define	IRQ_RETVAL(r)	(r)
139 
140 #define	USB_ENDPOINT_XFER_CONTROL	UE_CONTROL		/* 0 */
141 #define	USB_ENDPOINT_XFER_ISOC		UE_ISOCHRONOUS		/* 1 */
142 #define	USB_ENDPOINT_XFER_BULK		UE_BULK			/* 2 */
143 #define	USB_ENDPOINT_XFER_INT		UE_INTERRUPT		/* 3 */
144 
145 #define USB_DIR_IN			UE_DIR_IN
146 #define USB_DIR_OUT			UE_DIR_OUT
147 
148 #define	USB_PORT_FEAT_CONNECTION	UHF_PORT_CONNECTION
149 #define	USB_PORT_FEAT_ENABLE		UHF_PORT_ENABLE
150 #define	USB_PORT_FEAT_SUSPEND		UHF_PORT_SUSPEND
151 #define	USB_PORT_FEAT_OVER_CURRENT	UHF_PORT_OVER_CURRENT
152 #define	USB_PORT_FEAT_RESET		UHF_PORT_RESET
153 // #define	USB_PORT_FEAT_L1		5	/* L1 suspend */
154 #define	USB_PORT_FEAT_POWER		UHF_PORT_POWER
155 #define	USB_PORT_FEAT_LOWSPEED		UHF_PORT_LOW_SPEED
156 #define	USB_PORT_FEAT_C_CONNECTION	UHF_C_PORT_CONNECTION
157 #define	USB_PORT_FEAT_C_ENABLE		UHF_C_PORT_ENABLE
158 #define	USB_PORT_FEAT_C_SUSPEND		UHF_C_PORT_SUSPEND
159 #define	USB_PORT_FEAT_C_OVER_CURRENT	UHF_C_PORT_OVER_CURRENT
160 #define	USB_PORT_FEAT_C_RESET		UHF_C_PORT_RESET
161 #define	USB_PORT_FEAT_TEST              UHF_PORT_TEST
162 #define	USB_PORT_FEAT_INDICATOR         UHF_PORT_INDICATOR
163 #define	USB_PORT_FEAT_C_PORT_L1         UHF_C_PORT_L1
164 
165 #define	C_HUB_LOCAL_POWER		UHF_C_HUB_LOCAL_POWER
166 #define	C_HUB_OVER_CURRENT		UHF_C_HUB_OVER_CURRENT
167 
168 #define USB_REQ_GET_STATUS		UR_GET_STATUS
169 #define USB_REQ_CLEAR_FEATURE		UR_CLEAR_FEATURE
170 #define USB_REQ_SET_FEATURE		UR_SET_FEATURE
171 #define USB_REQ_GET_DESCRIPTOR		UR_GET_DESCRIPTOR
172 
173 #define	ClearHubFeature		((UT_WRITE_CLASS_DEVICE << 8) | USB_REQ_CLEAR_FEATURE)
174 #define	ClearPortFeature	((UT_WRITE_CLASS_OTHER << 8) | USB_REQ_CLEAR_FEATURE)
175 #define	GetHubDescriptor	((UT_READ_CLASS_DEVICE << 8) | USB_REQ_GET_DESCRIPTOR)
176 #define	GetHubStatus		((UT_READ_CLASS_DEVICE << 8) | USB_REQ_GET_STATUS)
177 #define	GetPortStatus		((UT_READ_CLASS_OTHER << 8) | USB_REQ_GET_STATUS)
178 #define	SetHubFeature		((UT_WRITE_CLASS_DEVICE << 8) | USB_REQ_SET_FEATURE)
179 #define	SetPortFeature		((UT_WRITE_CLASS_OTHER << 8) | USB_REQ_SET_FEATURE)
180 
181 #define	USB_PORT_STAT_CONNECTION	UPS_CURRENT_CONNECT_STATUS
182 #define	USB_PORT_STAT_ENABLE		UPS_PORT_ENABLED
183 #define	USB_PORT_STAT_SUSPEND		UPS_SUSPEND
184 #define	USB_PORT_STAT_OVERCURRENT	UPS_OVERCURRENT_INDICATOR
185 #define	USB_PORT_STAT_RESET		UPS_RESET
186 #define	USB_PORT_STAT_L1		UPS_PORT_L1
187 #define	USB_PORT_STAT_POWER		UPS_PORT_POWER
188 #define	USB_PORT_STAT_LOW_SPEED		UPS_LOW_SPEED
189 #define	USB_PORT_STAT_HIGH_SPEED        UPS_HIGH_SPEED
190 #define	USB_PORT_STAT_TEST              UPS_PORT_TEST
191 #define	USB_PORT_STAT_INDICATOR         UPS_PORT_INDICATOR
192 
193 #define	USB_PORT_STAT_C_CONNECTION	UPS_C_CONNECT_STATUS
194 #define	USB_PORT_STAT_C_ENABLE		UPS_C_PORT_ENABLED
195 #define	USB_PORT_STAT_C_SUSPEND		UPS_C_SUSPEND
196 #define	USB_PORT_STAT_C_OVERCURRENT	UPS_C_OVERCURRENT_INDICATOR
197 #define	USB_PORT_STAT_C_RESET		UPS_C_PORT_RESET
198 #define	USB_PORT_STAT_C_L1		UPS_C_PORT_L1
199 
200 #define	USB_DT_HUB			UDESC_HUB
201 
202 /* See USB 2.0 spec Table 11-13, offset 3 */
203 #define HUB_CHAR_LPSM		UHD_PWR
204 #define HUB_CHAR_COMMON_LPSM	UHD_PWR_GANGED
205 #define HUB_CHAR_INDV_PORT_LPSM	UHD_PWR_INDIVIDUAL
206 #define HUB_CHAR_NO_LPSM	UHD_PWR_NO_SWITCH
207 
208 #define HUB_CHAR_COMPOUND	UHD_COMPOUND
209 
210 #define HUB_CHAR_OCPM		UHD_OC
211 #define HUB_CHAR_COMMON_OCPM	UHD_OC_GLOBAL
212 #define HUB_CHAR_INDV_PORT_OCPM	UHD_OC_INDIVIDUAL
213 #define HUB_CHAR_NO_OCPM	UHD_OC_NONE
214 
215 #define HUB_CHAR_TTTT		UHD_TT_THINK
216 #define HUB_CHAR_PORTIND	UHD_PORT_IND
217 
218 enum usb_dr_mode {
219 	USB_DR_MODE_UNKNOWN,
220 	USB_DR_MODE_HOST,
221 	USB_DR_MODE_PERIPHERAL,
222 	USB_DR_MODE_OTG,
223 };
224 
225 struct usb_phy;
226 struct usb_hcd;
227 
228 static inline int
usb_phy_set_suspend(struct usb_phy * x,int suspend)229 usb_phy_set_suspend(struct usb_phy *x, int suspend)
230 {
231 
232 	return 0;
233 }
234 
235 static inline void
usb_hcd_resume_root_hub(struct usb_hcd * hcd)236 usb_hcd_resume_root_hub(struct usb_hcd *hcd)
237 {
238 
239 	return;
240 }
241 
242 static inline int
usb_disabled(void)243 usb_disabled(void)
244 {
245 
246 	return 0;
247 }
248 
249 static inline void
udelay(unsigned long usecs)250 udelay(unsigned long usecs)
251 {
252 
253 	DELAY(usecs);
254 }
255 
256 static inline void
ndelay(unsigned long nsecs)257 ndelay(unsigned long nsecs)
258 {
259 
260 	DELAY(nsecs / 1000);
261 }
262 
263 static inline void
msleep(unsigned int msec)264 msleep(unsigned int msec)
265 {
266 	if (cold ||
267 	    ((hz < 1000) && (msec < (1000/hz))))
268 		udelay(msec * 1000);
269 	else
270 		(void)kpause("mdelay", false, mstohz(msec), NULL);
271 }
272 
273 #define	EREMOTEIO	EIO
274 #define	ECOMM		EIO
275 #define	ENOTSUPP	ENOTSUP
276 
277 #define NS_TO_US(ns)	((ns + 500L) / 1000L)
278 
279 #define USB_RESUME_TIMEOUT	40 /* ms */
280 
281 #endif
282