1 #ifndef __USB_EHCI_H 2 #define __USB_EHCI_H 3 4 // usb-ehci.c 5 void ehci_setup(void); 6 void ehci_wait_controllers(void); 7 struct usbdevice_s; 8 struct usb_endpoint_descriptor; 9 struct usb_pipe; 10 struct usb_pipe *ehci_realloc_pipe(struct usbdevice_s *usbdev 11 , struct usb_pipe *upipe 12 , struct usb_endpoint_descriptor *epdesc); 13 int ehci_send_pipe(struct usb_pipe *p, int dir, const void *cmd 14 , void *data, int datasize); 15 int ehci_poll_intr(struct usb_pipe *p, void *data); 16 17 18 /**************************************************************** 19 * ehci structs and flags 20 ****************************************************************/ 21 22 struct ehci_caps { 23 u8 caplength; 24 u8 reserved_01; 25 u16 hciversion; 26 u32 hcsparams; 27 u32 hccparams; 28 u64 portroute; 29 } PACKED; 30 31 #define HCC_64BIT_ADDR 1 32 33 #define HCS_N_PORTS_MASK 0xf 34 35 struct ehci_regs { 36 u32 usbcmd; 37 u32 usbsts; 38 u32 usbintr; 39 u32 frindex; 40 u32 ctrldssegment; 41 u32 periodiclistbase; 42 u32 asynclistbase; 43 u32 reserved[9]; 44 u32 configflag; 45 u32 portsc[0]; 46 } PACKED; 47 48 #define CMD_PARK (1<<11) 49 #define CMD_PARK_CNT(c) (((c)>>8)&3) 50 #define CMD_LRESET (1<<7) 51 #define CMD_IAAD (1<<6) 52 #define CMD_ASE (1<<5) 53 #define CMD_PSE (1<<4) 54 #define CMD_HCRESET (1<<1) 55 #define CMD_RUN (1<<0) 56 57 #define STS_ASS (1<<15) 58 #define STS_PSS (1<<14) 59 #define STS_RECL (1<<13) 60 #define STS_HALT (1<<12) 61 #define STS_IAA (1<<5) 62 #define STS_FATAL (1<<4) 63 #define STS_FLR (1<<3) 64 #define STS_PCD (1<<2) 65 #define STS_ERR (1<<1) 66 #define STS_INT (1<<0) 67 68 #define FLAG_CF (1<<0) 69 70 #define PORT_WKOC_E (1<<22) 71 #define PORT_WKDISC_E (1<<21) 72 #define PORT_WKCONN_E (1<<20) 73 #define PORT_TEST_PKT (0x4<<16) 74 #define PORT_LED_OFF (0<<14) 75 #define PORT_LED_AMBER (1<<14) 76 #define PORT_LED_GREEN (2<<14) 77 #define PORT_LED_MASK (3<<14) 78 #define PORT_OWNER (1<<13) 79 #define PORT_POWER (1<<12) 80 #define PORT_LINESTATUS_MASK (3<<10) 81 #define PORT_LINESTATUS_KSTATE (1<<10) 82 #define PORT_RESET (1<<8) 83 #define PORT_SUSPEND (1<<7) 84 #define PORT_RESUME (1<<6) 85 #define PORT_OCC (1<<5) 86 #define PORT_OC (1<<4) 87 #define PORT_PEC (1<<3) 88 #define PORT_PE (1<<2) 89 #define PORT_CSC (1<<1) 90 #define PORT_CONNECT (1<<0) 91 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC) 92 93 94 #define EHCI_QH_ALIGN 128 // Can't span a 4K boundary, so increase from 32 95 96 struct ehci_qh { 97 u32 next; 98 u32 info1; 99 u32 info2; 100 u32 current; 101 102 u32 qtd_next; 103 u32 alt_next; 104 u32 token; 105 u32 buf[5]; 106 u32 buf_hi[5]; 107 } PACKED; 108 109 #define QH_CONTROL (1 << 27) 110 #define QH_MAXPACKET_SHIFT 16 111 #define QH_MAXPACKET_MASK (0x7ff << QH_MAXPACKET_SHIFT) 112 #define QH_HEAD (1 << 15) 113 #define QH_TOGGLECONTROL (1 << 14) 114 #define QH_SPEED_SHIFT 12 115 #define QH_SPEED_MASK (0x3 << QH_SPEED_SHIFT) 116 #define QH_EP_SHIFT 8 117 #define QH_EP_MASK (0xf << QH_EP_SHIFT) 118 #define QH_DEVADDR_SHIFT 0 119 #define QH_DEVADDR_MASK (0x7f << QH_DEVADDR_SHIFT) 120 121 #define QH_SMASK_SHIFT 0 122 #define QH_SMASK_MASK (0xff << QH_SMASK_SHIFT) 123 #define QH_CMASK_SHIFT 8 124 #define QH_CMASK_MASK (0xff << QH_CMASK_SHIFT) 125 #define QH_HUBADDR_SHIFT 16 126 #define QH_HUBADDR_MASK (0x7f << QH_HUBADDR_SHIFT) 127 #define QH_HUBPORT_SHIFT 23 128 #define QH_HUBPORT_MASK (0x7f << QH_HUBPORT_SHIFT) 129 #define QH_MULT_SHIFT 30 130 #define QH_MULT_MASK (0x3 << QH_MULT_SHIFT) 131 132 #define EHCI_PTR_BITS 0x001F 133 #define EHCI_PTR_TERM 0x0001 134 #define EHCI_PTR_QH 0x0002 135 136 137 #define EHCI_QTD_ALIGN 64 // Can't span a 4K boundary, so increase from 32 138 139 struct ehci_qtd { 140 u32 qtd_next; 141 u32 alt_next; 142 u32 token; 143 u32 buf[5]; 144 u32 buf_hi[5]; 145 /* keep struct size a multiple of 64 bytes, as we're allocating 146 arrays. Without this padding, the second qtd could have the 147 wrong alignment. */ 148 } PACKED __aligned(EHCI_QTD_ALIGN); 149 150 #define QTD_TOGGLE (1 << 31) 151 #define QTD_LENGTH_SHIFT 16 152 #define QTD_LENGTH_MASK (0x7fff << QTD_LENGTH_SHIFT) 153 #define QTD_CERR_SHIFT 10 154 #define QTD_CERR_MASK (0x3 << QTD_CERR_SHIFT) 155 #define QTD_IOC (1 << 15) 156 #define QTD_PID_OUT (0x0 << 8) 157 #define QTD_PID_IN (0x1 << 8) 158 #define QTD_PID_SETUP (0x2 << 8) 159 #define QTD_STS_ACTIVE (1 << 7) 160 #define QTD_STS_HALT (1 << 6) 161 #define QTD_STS_DBE (1 << 5) 162 #define QTD_STS_BABBLE (1 << 4) 163 #define QTD_STS_XACT (1 << 3) 164 #define QTD_STS_MMF (1 << 2) 165 #define QTD_STS_STS (1 << 1) 166 #define QTD_STS_PING (1 << 0) 167 168 #define ehci_explen(len) (((len) << QTD_LENGTH_SHIFT) & QTD_LENGTH_MASK) 169 170 #define ehci_maxerr(err) (((err) << QTD_CERR_SHIFT) & QTD_CERR_MASK) 171 172 173 struct ehci_framelist { 174 u32 links[1024]; 175 } PACKED; 176 177 #endif // usb-ehci.h 178