1 #ifndef CPUINTRF_H 2 #define CPUINTRF_H 3 4 #include "osd_cpu.h" 5 6 /* The old system is obsolete and no longer supported by the core */ 7 #define NEW_INTERRUPT_SYSTEM 1 8 9 #define MAX_IRQ_LINES 8 /* maximum number of IRQ lines per CPU */ 10 11 #define CLEAR_LINE 0 /* clear (a fired, held or pulsed) line */ 12 #define ASSERT_LINE 1 /* assert an interrupt immediately */ 13 #define HOLD_LINE 2 /* hold interrupt line until enable is true */ 14 #define PULSE_LINE 3 /* pulse interrupt line for one instruction */ 15 16 #define MAX_REGS 64 /* maximum number of register of any CPU */ 17 18 #define IRQ_LINE_NMI 10 19 /* Values passed to the cpu_info function of a core to retrieve information */ 20 enum { 21 CPU_INFO_REG, 22 CPU_INFO_FLAGS=MAX_REGS, 23 CPU_INFO_NAME, 24 CPU_INFO_FAMILY, 25 CPU_INFO_VERSION, 26 CPU_INFO_FILE, 27 CPU_INFO_CREDITS, 28 CPU_INFO_REG_LAYOUT, 29 CPU_INFO_WIN_LAYOUT 30 }; 31 32 #define CPU_IS_LE 0 /* emulated CPU is little endian */ 33 #define CPU_IS_BE 1 /* emulated CPU is big endian */ 34 35 /* 36 * This value is passed to cpu_get_reg to retrieve the previous 37 * program counter value, ie. before a CPU emulation started 38 * to fetch opcodes and arguments for the current instrution. 39 */ 40 #define REG_PREVIOUSPC -1 41 42 /* 43 * This value is passed to cpu_get_reg/cpu_set_reg, instead of one of 44 * the names from the enum a CPU core defines for it's registers, 45 * to get or set the contents of the memory pointed to by a stack pointer. 46 * You can specify the n'th element on the stack by (REG_SP_CONTENTS-n), 47 * ie. lower negative values. The actual element size (uint16_t or uint32_t) 48 * depends on the CPU core. 49 * This is also used to replace the cpu_geturnpc() function. 50 */ 51 #define REG_SP_CONTENTS -2 52 53 /* 54 * These flags can be defined in the makefile (or project) to 55 * exclude (zero) or include (non zero) specific CPU cores 56 */ 57 #ifndef HAS_GENSYNC 58 #define HAS_GENSYNC 0 59 #endif 60 #ifndef HAS_Z80 61 #define HAS_Z80 0 62 #endif 63 #ifndef HAS_Z80_VM 64 #define HAS_Z80_VM 0 65 #endif 66 #ifndef HAS_8080 67 #define HAS_8080 0 68 #endif 69 #ifndef HAS_8085A 70 #define HAS_8085A 0 71 #endif 72 #ifndef HAS_M6502 73 #define HAS_M6502 0 74 #endif 75 #ifndef HAS_M65C02 76 #define HAS_M65C02 0 77 #endif 78 #ifndef HAS_M65SC02 79 #define HAS_M65SC02 0 80 #endif 81 #ifndef HAS_M65CE02 82 #define HAS_M65CE02 0 83 #endif 84 #ifndef HAS_M6509 85 #define HAS_M6509 0 86 #endif 87 #ifndef HAS_M6510 88 #define HAS_M6510 0 89 #endif 90 #ifndef HAS_N2A03 91 #define HAS_N2A03 0 92 #endif 93 #ifndef HAS_H6280 94 #define HAS_H6280 0 95 #endif 96 #ifndef HAS_I86 97 #define HAS_I86 0 98 #endif 99 #ifndef HAS_V20 100 #define HAS_V20 0 101 #endif 102 #ifndef HAS_V30 103 #define HAS_V30 0 104 #endif 105 #ifndef HAS_V33 106 #define HAS_V33 0 107 #endif 108 #ifndef HAS_I8035 109 #define HAS_I8035 0 110 #endif 111 #ifndef HAS_I8039 112 #define HAS_I8039 0 113 #endif 114 #ifndef HAS_I8048 115 #define HAS_I8048 0 116 #endif 117 #ifndef HAS_N7751 118 #define HAS_N7751 0 119 #endif 120 #ifndef HAS_M6800 121 #define HAS_M6800 0 122 #endif 123 #ifndef HAS_M6801 124 #define HAS_M6801 0 125 #endif 126 #ifndef HAS_M6802 127 #define HAS_M6802 0 128 #endif 129 #ifndef HAS_M6803 130 #define HAS_M6803 0 131 #endif 132 #ifndef HAS_M6808 133 #define HAS_M6808 0 134 #endif 135 #ifndef HAS_HD63701 136 #define HAS_HD63701 0 137 #endif 138 #ifndef HAS_M6805 139 #define HAS_M6805 0 140 #endif 141 #ifndef HAS_M68705 142 #define HAS_M68705 0 143 #endif 144 #ifndef HAS_HD63705 145 #define HAS_HD63705 0 146 #endif 147 #ifndef HAS_HD6309 148 #define HAS_HD6309 0 149 #endif 150 #ifndef HAS_M6809 151 #define HAS_M6809 0 152 #endif 153 #ifndef HAS_KONAMI 154 #define HAS_KONAMI 0 155 #endif 156 #ifndef HAS_M68000 157 #define HAS_M68000 0 158 #endif 159 #ifndef HAS_M68010 160 #define HAS_M68010 0 161 #endif 162 #ifndef HAS_M68020 163 #define HAS_M68020 0 164 #endif 165 #ifndef HAS_T11 166 #define HAS_T11 0 167 #endif 168 #ifndef HAS_S2650 169 #define HAS_S2650 0 170 #endif 171 #ifndef HAS_TMS34010 172 #define HAS_TMS34010 0 173 #endif 174 #ifndef HAS_TMS9900 175 #define HAS_TMS9900 0 176 #endif 177 #ifndef HAS_TMS9940 178 #define HAS_TMS9940 0 179 #endif 180 #ifndef HAS_TMS9980 181 #define HAS_TMS9980 0 182 #endif 183 #ifndef HAS_TMS9985 184 #define HAS_TMS9985 0 185 #endif 186 #ifndef HAS_TMS9989 187 #define HAS_TMS9989 0 188 #endif 189 #ifndef HAS_TMS9995 190 #define HAS_TMS9995 0 191 #endif 192 #ifndef HAS_TMS99105A 193 #define HAS_TMS99105A 0 194 #endif 195 #ifndef HAS_TMS99110A 196 #define HAS_TMS99110A 0 197 #endif 198 #ifndef HAS_Z8000 199 #define HAS_Z8000 0 200 #endif 201 #ifndef HAS_TMS320C10 202 #define HAS_TMS320C10 0 203 #endif 204 #ifndef HAS_CCPU 205 #define HAS_CCPU 0 206 #endif 207 #ifndef HAS_PDP1 208 #define HAS_PDP1 0 209 #endif 210 #ifndef HAS_ADSP2100 211 #define HAS_ADSP2100 0 212 #endif 213 214 /* ASG 971222 -- added this generic structure */ 215 struct cpu_interface 216 { 217 unsigned cpu_num; 218 void (*reset)(void *param); 219 void (*exit)(void); 220 int (*execute)(int cycles); 221 void (*burn)(int cycles); 222 unsigned (*get_context)(void *reg); 223 void (*set_context)(void *reg); 224 unsigned (*get_pc)(void); 225 void (*set_pc)(unsigned val); 226 unsigned (*get_sp)(void); 227 void (*set_sp)(unsigned val); 228 unsigned (*get_reg)(int regnum); 229 void (*set_reg)(int regnum, unsigned val); 230 void (*set_nmi_line)(int linestate); 231 void (*set_irq_line)(int irqline, int linestate); 232 void (*set_irq_callback)(int(*callback)(int irqline)); 233 void (*internal_interrupt)(int type); 234 void (*cpu_state_save)(void *file); 235 void (*cpu_state_load)(void *file); 236 const char* (*cpu_info)(void *context,int regnum); 237 unsigned (*cpu_dasm)(char *buffer,unsigned pc); 238 unsigned num_irqs; 239 int default_vector; 240 int *icount; 241 double overclock; 242 int no_int, irq_int, nmi_int; 243 int (*memory_read)(int offset); 244 void (*memory_write)(int offset, int data); 245 void (*set_op_base)(int pc); 246 int address_shift; 247 unsigned address_bits, endianess, align_unit, max_inst_len; 248 unsigned abits1, abits2, abitsmin; 249 }; 250 251 extern struct cpu_interface cpuintf[]; 252 253 void cpu_init(void); 254 void cpu_run(void); 255 256 /* optional watchdog */ 257 void watchdog_reset_w(int offset,int data); 258 int watchdog_reset_r(int offset); 259 /* Use this function to reset the machine */ 260 void machine_reset(void); 261 /* Use this function to reset a single CPU */ 262 void cpu_set_reset_line(int cpu,int state); 263 /* Use this function to halt a single CPU */ 264 void cpu_set_halt_line(int cpu,int state); 265 266 /* This function returns CPUNUM current status (running or halted) */ 267 int cpu_getstatus(int cpunum); 268 int cpu_gettotalcpu(void); 269 int cpu_getactivecpu(void); 270 void cpu_setactivecpu(int cpunum); 271 272 /* Returns the current program counter */ 273 unsigned cpu_get_pc(void); 274 /* Set the current program counter */ 275 void cpu_set_pc(unsigned val); 276 277 /* Returns the current stack pointer */ 278 unsigned cpu_get_sp(void); 279 /* Set the current stack pointer */ 280 void cpu_set_sp(unsigned val); 281 282 /* Get the active CPUs context and return it's size */ 283 unsigned cpu_get_context(void *context); 284 /* Set the active CPUs context */ 285 void cpu_set_context(void *context); 286 287 /* Returns a specific register value (mamedbg) */ 288 unsigned cpu_get_reg(int regnum); 289 /* Sets a specific register value (mamedbg) */ 290 void cpu_set_reg(int regnum, unsigned val); 291 292 /* Returns previous pc (start of opcode causing read/write) */ 293 /* int cpu_getpreviouspc(void); */ 294 #define cpu_getpreviouspc() cpu_get_reg(REG_PREVIOUSPC) 295 296 /* Returns the return address from the top of the stack (Z80 only) */ 297 /* int cpu_getreturnpc(void); */ 298 /* This can now be handled with a generic function */ 299 #define cpu_geturnpc() cpu_get_reg(REG_SP_CONTENTS) 300 301 int cycles_currently_ran(void); 302 int cycles_left_to_run(void); 303 304 /* Returns the number of CPU cycles which take place in one video frame */ 305 int cpu_gettotalcycles(void); 306 /* Returns the number of CPU cycles before the next interrupt handler call */ 307 int cpu_geticount(void); 308 /* Returns the number of CPU cycles before the end of the current video frame */ 309 int cpu_getfcount(void); 310 /* Returns the number of CPU cycles in one video frame */ 311 int cpu_getfperiod(void); 312 /* Scales a given value by the ratio of fcount / fperiod */ 313 int cpu_scalebyfcount(int value); 314 /* Returns the current scanline number */ 315 int cpu_getscanline(void); 316 /* Returns the amount of time until a given scanline */ 317 double cpu_getscanlinetime(int scanline); 318 /* Returns the duration of a single scanline */ 319 double cpu_getscanlineperiod(void); 320 /* Returns the duration of a single scanline in cycles */ 321 int cpu_getscanlinecycles(void); 322 /* Returns the number of cycles since the beginning of this frame */ 323 int cpu_getcurrentcycles(void); 324 /* Returns the current horizontal beam position in pixels */ 325 int cpu_gethorzbeampos(void); 326 /* 327 Returns the number of times the interrupt handler will be called before 328 the end of the current video frame. This is can be useful to interrupt 329 handlers to synchronize their operation. If you call this from outside 330 an interrupt handler, add 1 to the result, i.e. if it returns 0, it means 331 that the interrupt handler will be called once. 332 */ 333 int cpu_getiloops(void); 334 335 /* Returns the current VBLANK state */ 336 int cpu_getvblank(void); 337 338 /* Returns the number of the video frame we are currently playing */ 339 int cpu_getcurrentframe(void); 340 341 342 /* generate a trigger after a specific period of time */ 343 void cpu_triggertime (double duration, int trigger); 344 /* generate a trigger now */ 345 void cpu_trigger (int trigger); 346 347 /* burn CPU cycles until a timer trigger */ 348 void cpu_spinuntil_trigger (int trigger); 349 /* burn CPU cycles until the next interrupt */ 350 void cpu_spinuntil_int (void); 351 /* burn CPU cycles until our timeslice is up */ 352 void cpu_spin (void); 353 /* burn CPU cycles for a specific period of time */ 354 void cpu_spinuntil_time (double duration); 355 356 /* yield our timeslice for a specific period of time */ 357 void cpu_yielduntil_trigger (int trigger); 358 /* yield our timeslice until the next interrupt */ 359 void cpu_yielduntil_int (void); 360 /* yield our current timeslice */ 361 void cpu_yield (void); 362 /* yield our timeslice for a specific period of time */ 363 void cpu_yielduntil_time (double duration); 364 365 /* set the NMI line state for a CPU, normally use PULSE_LINE */ 366 void cpu_set_nmi_line(int cpunum, int state); 367 /* set the IRQ line state for a specific irq line of a CPU */ 368 /* normally use state HOLD_LINE, irqline 0 for first IRQ type of a cpu */ 369 void cpu_set_irq_line(int cpunum, int irqline, int state); 370 /* this is to be called by CPU cores only! */ 371 void cpu_generate_internal_interrupt(int cpunum, int type); 372 /* set the vector to be returned during a CPU's interrupt acknowledge cycle */ 373 void cpu_irq_line_vector_w(int cpunum, int irqline, int vector); 374 375 /* use these in your write memory/port handles to set an IRQ vector */ 376 /* offset corresponds to the irq line number here */ 377 void cpu_0_irq_line_vector_w(int offset, int data); 378 void cpu_1_irq_line_vector_w(int offset, int data); 379 void cpu_2_irq_line_vector_w(int offset, int data); 380 void cpu_3_irq_line_vector_w(int offset, int data); 381 void cpu_4_irq_line_vector_w(int offset, int data); 382 void cpu_5_irq_line_vector_w(int offset, int data); 383 void cpu_6_irq_line_vector_w(int offset, int data); 384 void cpu_7_irq_line_vector_w(int offset, int data); 385 386 /* Obsolete functions: avoid to use them in new drivers if possible. */ 387 388 /* cause an interrupt on a CPU */ 389 void cpu_cause_interrupt(int cpu,int type); 390 void cpu_clear_pending_interrupts(int cpu); 391 void interrupt_enable_w(int offset,int data); 392 void interrupt_vector_w(int offset,int data); 393 int interrupt(void); 394 int nmi_interrupt(void); 395 int m68_level1_irq(void); 396 int m68_level2_irq(void); 397 int m68_level3_irq(void); 398 int m68_level4_irq(void); 399 int m68_level5_irq(void); 400 int m68_level6_irq(void); 401 int m68_level7_irq(void); 402 int ignore_interrupt(void); 403 404 /* CPU context access */ 405 void* cpu_getcontext (int _activecpu); 406 int cpu_is_saving_context(int _activecpu); 407 408 /*************************************************************************** 409 * Get information for the currently active CPU 410 * cputype is a value from the CPU enum in driver.h 411 ***************************************************************************/ 412 /* Return number of address bits */ 413 unsigned cpu_address_bits(void); 414 /* Return address mask */ 415 unsigned cpu_address_mask(void); 416 /* Return address shift factor (TMS34010 bit addressing mode) */ 417 int cpu_address_shift(void); 418 /* Return endianess of the emulated CPU (CPU_IS_LE or CPU_IS_BE) */ 419 unsigned cpu_endianess(void); 420 /* Return opcode align unit (1 byte, 2 word, 4 dword) */ 421 unsigned cpu_align_unit(void); 422 /* Return maximum instruction length */ 423 unsigned cpu_max_inst_len(void); 424 425 /* Return name of the active CPU */ 426 const char *cpu_name(void); 427 /* Return family name of the active CPU */ 428 const char *cpu_core_family(void); 429 /* Return core version of the active CPU */ 430 const char *cpu_core_version(void); 431 /* Return core filename of the active CPU */ 432 const char *cpu_core_file(void); 433 /* Return credits info for of the active CPU */ 434 const char *cpu_core_credits(void); 435 /* Return register layout definition for the active CPU */ 436 const char *cpu_reg_layout(void); 437 /* Return (debugger) window layout definition for the active CPU */ 438 const char *cpu_win_layout(void); 439 440 /* Disassemble an instruction at PC into the given buffer */ 441 unsigned cpu_dasm(char *buffer, unsigned pc); 442 /* Return a string describing the currently set flag (status) bits of the active CPU */ 443 const char *cpu_flags(void); 444 /* Return a string with a register name and hex value for the active CPU */ 445 /* regnum is a value defined in the CPU cores header files */ 446 const char *cpu_dump_reg(int regnum); 447 /* Return a string describing the active CPUs current state */ 448 const char *cpu_dump_state(void); 449 450 /*************************************************************************** 451 * Get information for a specific CPU type 452 * cputype is a value from the CPU enum in driver.h 453 ***************************************************************************/ 454 /* Return address shift factor */ 455 /* TMS320C10 -1: word addressing mode, TMS34010 3: bit addressing mode */ 456 int cputype_address_shift(int cputype); 457 /* Return number of address bits */ 458 unsigned cputype_address_bits(int cputype); 459 /* Return address mask */ 460 unsigned cputype_address_mask(int cputype); 461 /* Return endianess of the emulated CPU (CPU_IS_LE or CPU_IS_BE) */ 462 unsigned cputype_endianess(int cputype); 463 /* Return opcode align unit (1 byte, 2 word, 4 dword) */ 464 unsigned cputype_align_unit(int cputype); 465 /* Return maximum instruction length */ 466 unsigned cputype_max_inst_len(int cputype); 467 468 /* Return name of the CPU */ 469 const char *cputype_name(int cputype); 470 /* Return family name of the CPU */ 471 const char *cputype_core_family(int cputype); 472 /* Return core version number of the CPU */ 473 const char *cputype_core_version(int cputype); 474 /* Return core filename of the CPU */ 475 const char *cputype_core_file(int cputype); 476 /* Return credits for the CPU core */ 477 const char *cputype_core_credits(int cputype); 478 /* Return register layout definition for the CPU core */ 479 const char *cputype_reg_layout(int cputype); 480 /* Return (debugger) window layout definition for the CPU core */ 481 const char *cputype_win_layout(int cputype); 482 483 /*************************************************************************** 484 * Get (or set) information for a numbered CPU of the running machine 485 * cpunum is a value between 0 and cpu_gettotalcpu() - 1 486 ***************************************************************************/ 487 /* Return number of address bits */ 488 unsigned cpunum_address_bits(int cputype); 489 /* Return address mask */ 490 unsigned cpunum_address_mask(int cputype); 491 /* Return endianess of the emulated CPU (CPU_LSB_FIRST or CPU_MSB_FIRST) */ 492 unsigned cpunum_endianess(int cputype); 493 /* Return opcode align unit (1 byte, 2 word, 4 dword) */ 494 unsigned cpunum_align_unit(int cputype); 495 /* Return maximum instruction length */ 496 unsigned cpunum_max_inst_len(int cputype); 497 498 /* Get a register value for the specified CPU number of the running machine */ 499 unsigned cpunum_get_reg(int cpunum, int regnum); 500 /* Set a register value for the specified CPU number of the running machine */ 501 void cpunum_set_reg(int cpunum, int regnum, unsigned val); 502 503 /* Return (debugger) register layout definition for the CPU core */ 504 const char *cpunum_reg_layout(int cpunum); 505 /* Return (debugger) window layout definition for the CPU core */ 506 const char *cpunum_win_layout(int cpunum); 507 508 unsigned cpunum_dasm(int cpunum,char *buffer,unsigned pc); 509 /* Return a string describing the currently set flag (status) bits of the CPU */ 510 const char *cpunum_flags(int cpunum); 511 /* Return a string with a register name and value */ 512 /* regnum is a value defined in the CPU cores header files */ 513 const char *cpunum_dump_reg(int cpunum, int regnum); 514 /* Return a string describing the CPUs current state */ 515 const char *cpunum_dump_state(int cpunum); 516 /* Return a name for the specified cpu number */ 517 const char *cpunum_name(int cpunum); 518 /* Return a family name for the specified cpu number */ 519 const char *cpunum_core_family(int cpunum); 520 /* Return a version for the specified cpu number */ 521 const char *cpunum_core_version(int cpunum); 522 /* Return a the source filename for the specified cpu number */ 523 const char *cpunum_core_file(int cpunum); 524 /* Return a the credits for the specified cpu number */ 525 const char *cpunum_core_credits(int cpunum); 526 527 /* Dump all of the running machines CPUs state to stderr */ 528 void cpu_dump_states(void); 529 530 /* daisy-chain link */ 531 typedef struct { 532 void (*reset)(int); /* reset callback */ 533 int (*interrupt_entry)(int); /* entry callback */ 534 void (*interrupt_reti)(int); /* reti callback */ 535 int irq_param; /* callback paramater */ 536 } Z80_DaisyChain; 537 538 #define Z80_MAXDAISY 4 /* maximum of daisy chan device */ 539 540 #define Z80_INT_REQ 0x01 /* interrupt request mask */ 541 #define Z80_INT_IEO 0x02 /* interrupt disable mask(IEO) */ 542 543 #define Z80_VECTOR(device,state) (((device)<<8)|(state)) 544 545 #ifndef inline 546 #define inline inline 547 #endif 548 549 #include <string.h> 550 #include <stdlib.h> 551 #include <stdio.h> 552 553 #define cpu_readmem16 memory_read 554 #define cpu_readport16 memory_readport 555 #define cpu_writeport16 memory_writeport 556 #define cpu_writemem16 memory_write 557 #define cpu_readop memory_readop 558 #define cpu_readop_arg memory_read 559 #define logerror(x, ...) 560 #define change_pc16(x) 561 #define CALL_MAME_DEBUG 562 563 #define ADDRESS_SPACES 3 /* maximum number of address spaces */ 564 #define ADDRESS_SPACE_PROGRAM 0 /* program address space */ 565 #define ADDRESS_SPACE_DATA 1 /* data address space */ 566 #define ADDRESS_SPACE_IO 2 /* I/O address space */ 567 568 enum 569 { 570 /* internal flags (not for use by drivers!) */ 571 INTERNAL_CLEAR_LINE = 100 + CLEAR_LINE, 572 INTERNAL_ASSERT_LINE = 100 + ASSERT_LINE, 573 574 /* input lines */ 575 MAX_INPUT_LINES = 32+3, 576 INPUT_LINE_IRQ0 = 0, 577 INPUT_LINE_IRQ1 = 1, 578 INPUT_LINE_IRQ2 = 2, 579 INPUT_LINE_IRQ3 = 3, 580 INPUT_LINE_IRQ4 = 4, 581 INPUT_LINE_IRQ5 = 5, 582 INPUT_LINE_IRQ6 = 6, 583 INPUT_LINE_IRQ7 = 7, 584 INPUT_LINE_IRQ8 = 8, 585 INPUT_LINE_IRQ9 = 9, 586 INPUT_LINE_NMI = MAX_INPUT_LINES - 3, 587 588 /* special input lines that are implemented in the core */ 589 INPUT_LINE_RESET = MAX_INPUT_LINES - 2, 590 INPUT_LINE_HALT = MAX_INPUT_LINES - 1, 591 592 /* output lines */ 593 MAX_OUTPUT_LINES = 32 594 }; 595 596 enum 597 { 598 /* --- the following bits of info are returned as 64-bit signed integers --- */ 599 CPUINFO_INT_FIRST = 0x00000, 600 601 CPUINFO_INT_CONTEXT_SIZE = CPUINFO_INT_FIRST, /* R/O: size of CPU context in bytes */ 602 CPUINFO_INT_INPUT_LINES, /* R/O: number of input lines */ 603 CPUINFO_INT_OUTPUT_LINES, /* R/O: number of output lines */ 604 CPUINFO_INT_DEFAULT_IRQ_VECTOR, /* R/O: default IRQ vector */ 605 CPUINFO_INT_ENDIANNESS, /* R/O: either CPU_IS_BE or CPU_IS_LE */ 606 CPUINFO_INT_CLOCK_DIVIDER, /* R/O: internal clock divider */ 607 CPUINFO_INT_MIN_INSTRUCTION_BYTES, /* R/O: minimum bytes per instruction */ 608 CPUINFO_INT_MAX_INSTRUCTION_BYTES, /* R/O: maximum bytes per instruction */ 609 CPUINFO_INT_MIN_CYCLES, /* R/O: minimum cycles for a single instruction */ 610 CPUINFO_INT_MAX_CYCLES, /* R/O: maximum cycles for a single instruction */ 611 612 CPUINFO_INT_DATABUS_WIDTH, /* R/O: data bus size for each address space (8,16,32,64) */ 613 CPUINFO_INT_DATABUS_WIDTH_LAST = CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACES - 1, 614 CPUINFO_INT_ADDRBUS_WIDTH, /* R/O: address bus size for each address space (12-32) */ 615 CPUINFO_INT_ADDRBUS_WIDTH_LAST = CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACES - 1, 616 CPUINFO_INT_ADDRBUS_SHIFT, /* R/O: shift applied to addresses each address space (+3 means >>3, -1 means <<1) */ 617 CPUINFO_INT_ADDRBUS_SHIFT_LAST = CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACES - 1, 618 619 CPUINFO_INT_SP, /* R/W: the current stack pointer value */ 620 CPUINFO_INT_PC, /* R/W: the current PC value */ 621 CPUINFO_INT_PREVIOUSPC, /* R/W: the previous PC value */ 622 CPUINFO_INT_INPUT_STATE, /* R/W: states for each input line */ 623 CPUINFO_INT_INPUT_STATE_LAST = CPUINFO_INT_INPUT_STATE + MAX_INPUT_LINES - 1, 624 CPUINFO_INT_OUTPUT_STATE, /* R/W: states for each output line */ 625 CPUINFO_INT_OUTPUT_STATE_LAST = CPUINFO_INT_OUTPUT_STATE + MAX_OUTPUT_LINES - 1, 626 CPUINFO_INT_REGISTER, /* R/W: values of up to MAX_REGs registers */ 627 CPUINFO_INT_REGISTER_LAST = CPUINFO_INT_REGISTER + MAX_REGS - 1, 628 629 CPUINFO_INT_CPU_SPECIFIC = 0x08000, /* R/W: CPU-specific values start here */ 630 631 /* --- the following bits of info are returned as pointers to data or functions --- */ 632 CPUINFO_PTR_FIRST = 0x10000, 633 634 CPUINFO_PTR_SET_INFO = CPUINFO_PTR_FIRST, /* R/O: void (*set_info)(uint32_t state, int64_t data, void *ptr) */ 635 CPUINFO_PTR_GET_CONTEXT, /* R/O: void (*get_context)(void *buffer) */ 636 CPUINFO_PTR_SET_CONTEXT, /* R/O: void (*set_context)(void *buffer) */ 637 CPUINFO_PTR_INIT, /* R/O: void (*init)(void) */ 638 CPUINFO_PTR_RESET, /* R/O: void (*reset)(void *param) */ 639 CPUINFO_PTR_EXIT, /* R/O: void (*exit)(void) */ 640 CPUINFO_PTR_EXECUTE, /* R/O: int (*execute)(int cycles) */ 641 CPUINFO_PTR_BURN, /* R/O: void (*burn)(int cycles) */ 642 CPUINFO_PTR_DISASSEMBLE, /* R/O: void (*disassemble)(char *buffer, offs_t pc) */ 643 CPUINFO_PTR_IRQ_CALLBACK, /* R/W: int (*irqcallback)(int state) */ 644 CPUINFO_PTR_INSTRUCTION_COUNTER, /* R/O: int *icount */ 645 CPUINFO_PTR_REGISTER_LAYOUT, /* R/O: struct debug_register_layout *layout */ 646 CPUINFO_PTR_WINDOW_LAYOUT, /* R/O: struct debug_window_layout *layout */ 647 CPUINFO_PTR_INTERNAL_MEMORY_MAP, /* R/O: construct_map_t map */ 648 CPUINFO_PTR_INTERNAL_MEMORY_MAP_LAST = CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACES - 1, 649 CPUINFO_PTR_DEBUG_REGISTER_LIST, /* R/O: int *list: list of registers for NEW_DEBUGGER */ 650 651 CPUINFO_PTR_CPU_SPECIFIC = 0x18000, /* R/W: CPU-specific values start here */ 652 653 /* --- the following bits of info are returned as nullptr-terminated strings --- */ 654 CPUINFO_STR_FIRST = 0x20000, 655 656 CPUINFO_STR_NAME = CPUINFO_STR_FIRST, /* R/O: name of the CPU */ 657 CPUINFO_STR_CORE_FAMILY, /* R/O: family of the CPU */ 658 CPUINFO_STR_CORE_VERSION, /* R/O: version of the CPU core */ 659 CPUINFO_STR_CORE_FILE, /* R/O: file containing the CPU core */ 660 CPUINFO_STR_CORE_CREDITS, /* R/O: credits for the CPU core */ 661 CPUINFO_STR_FLAGS, /* R/O: string representation of the main flags value */ 662 CPUINFO_STR_REGISTER, /* R/O: string representation of up to MAX_REGs registers */ 663 CPUINFO_STR_REGISTER_LAST = CPUINFO_STR_REGISTER + MAX_REGS - 1, 664 665 CPUINFO_STR_CPU_SPECIFIC = 0x28000 /* R/W: CPU-specific values start here */ 666 }; 667 668 #endif /* CPUINTRF_H */ 669