1 /* 2 * Copyright (c) 2016-2018, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codec_def_encode_hevc.h 24 //! \brief Defines encode HEVC types and macros shared by CodecHal, MHW, and DDI layer 25 //! \details Applies to HEVC encode only. Should not contain any DDI specific code. 26 //! 27 #ifndef __CODEC_DEF_ENCODE_HEVC_H__ 28 #define __CODEC_DEF_ENCODE_HEVC_H__ 29 30 #include "codec_def_common_hevc.h" 31 #include "codec_def_common_encode.h" 32 33 // HEVC 34 #define CODEC_MAX_NUM_REF_FRAME_HEVC 15 35 #define CODEC_NUM_REF_FRAME_HEVC_WP 3 // number of reference frames used for weighted prediction 36 #define HEVC_NUM_MAX_TILE_ROW 22 37 #define HEVC_NUM_MAX_TILE_COLUMN 20 38 #define CODECHAL_HEVC_MAX_NUM_SLICES_LVL_6 600 39 #define CODECHAL_HEVC_MAX_NUM_SLICES_LVL_5 200 40 #define CODECHAL_MAX_CUR_NUM_REF_FRAME_HEVC 8 41 #define CODECHAL_NUM_INTERNAL_NV12_RT_HEVC 16 42 #define CODECHAL_ENCODE_HEVC_MAX_NUM_ROI 16 43 44 // HEVC VDENC 45 #define ENCODE_HEVC_VDENC_NUM_MAX_SLICES 70 46 #define ENCODE_VDENC_HEVC_MAX_STREAMINROI_G10 3 47 #define ENCODE_VDENC_HEVC_MAX_ROI_NUMBER_G10 8 48 #define ENCODE_VDENC_HEVC_MAX_DIRTYRECT_G10 256 49 #define ENCODE_VDENC_HEVC_ROI_BLOCKSIZE_G10 2 // 0:8x8, 1:16x16, 2:32x32, 3:64x64 50 #define ENCODE_VDENC_HEVC_MIN_ROI_DELTA_QP_G10 -8 51 #define ENCODE_VDENC_HEVC_MAX_ROI_DELTA_QP_G10 7 // Max delta QP for VDEnc ROI 52 #define ENCODE_VDENC_HEVC_PADDING_DW_SIZE 8 53 54 // HEVC DP 55 #define ENCODE_DP_HEVC_NUM_MAX_VME_L0_REF_G9 3 56 #define ENCODE_DP_HEVC_NUM_MAX_VME_L1_REF_G9 1 57 #define ENCODE_DP_HEVC_MAX_NUM_ROI 16 58 #define ENCODE_DP_HEVC_ROI_BLOCK_SIZE 1 //From DDI, 0:8x8, 1:16x16, 2:32x32, 3:64x64 59 #define ENCODE_DP_HEVC_ROI_BLOCK_Width 16 60 #define ENCODE_DP_HEVC_ROI_BLOCK_HEIGHT 16 61 62 typedef enum 63 { 64 ENCODE_HEVC_BIT_DEPTH_8 = 0, 65 ENCODE_HEVC_BIT_DEPTH_10 = 1, 66 ENCODE_HEVC_BIT_DEPTH_12 = 2, 67 ENCODE_HEVC_BIT_DEPTH_16 = 3, 68 } ENCODE_HEVC_BIT_DEPTH; 69 70 //! 71 //! \enum HEVC_NAL_UNIT_TYPE 72 //! \brief HEVC NAL unit type 73 //! 74 typedef enum 75 { 76 HEVC_NAL_UT_TRAIL_N = 0x00, //!< Coded slice segment of a non-TSA, non-STSA trailing picture - slice_segment_layer_rbsp, VLC 77 HEVC_NAL_UT_TRAIL_R = 0x01, //!< Coded slice segment of a non-TSA, non-STSA trailing picture - slice_segment_layer_rbsp, VLC 78 HEVC_NAL_UT_TSA_N = 0x02, //!< Coded slice segment of a TSA picture - slice_segment_layer_rbsp, VLC 79 HEVC_NAL_UT_TSA_R = 0x03, //!< Coded slice segment of a TSA picture - slice_segment_layer_rbsp, VLC 80 HEVC_NAL_UT_STSA_N = 0x04, //!< Coded slice of an STSA picture - slice_layer_rbsp, VLC 81 HEVC_NAL_UT_STSA_R = 0x05, //!< Coded slice of an STSA picture - slice_layer_rbsp, VLC 82 HEVC_NAL_UT_RADL_N = 0x06, //!< Coded slice of an RADL picture - slice_layer_rbsp, VLC 83 HEVC_NAL_UT_RADL_R = 0x07, //!< Coded slice of an RADL picture - slice_layer_rbsp, VLC 84 HEVC_NAL_UT_RASL_N = 0x08, //!< Coded slice of an RASL picture - slice_layer_rbsp, VLC 85 HEVC_NAL_UT_RASL_R = 0x09, //!< Coded slice of an RASL picture - slice_layer_rbsp, VLC 86 /* 0x0a..0x0f - Reserved */ 87 HEVC_NAL_UT_BLA_W_LP = 0x10, //!< Coded slice segment of an BLA picture - slice_segment_layer_rbsp, VLC 88 HEVC_NAL_UT_BLA_W_DLP = 0x11, //!< Coded slice segment of an BLA picture - slice_segment_layer_rbsp, VLC 89 HEVC_NAL_UT_BLA_N_LP = 0x12, //!< Coded slice segment of an BLA picture - slice_segment_layer_rbsp, VLC 90 HEVC_NAL_UT_IDR_W_DLP = 0x13, //!< Coded slice segment of an IDR picture - slice_segment_layer_rbsp, VLC 91 HEVC_NAL_UT_IDR_N_LP = 0x14, //!< Coded slice segment of an IDR picture - slice_segment_layer_rbsp, VLC 92 HEVC_NAL_UT_CRA = 0x15, //!< Coded slice segment of an CRA picture - slice_segment_layer_rbsp, VLC 93 HEVC_NAL_UT_RSV_IRAP_VCL23 = 0x17, //!< Reserved IRAP VCL NAL unit type 94 /* 0x16..0x1f - Reserved */ 95 HEVC_NAL_UT_VPS = 0x20, //!< Video parameter set - video_parameter_set_rbsp, non-VLC 96 HEVC_NAL_UT_SPS = 0x21, //!< Sequence parameter set - seq_parameter_set_rbsp, non-VLC 97 HEVC_NAL_UT_PPS = 0x22, //!< Picture parameter set - pic_parameter_set_rbsp, non-VLC 98 HEVC_NAL_UT_AUD = 0x23, //!< Access unit delimiter - access_unit_delimiter_rbsp, non-VLC 99 HEVC_NAL_UT_EOS = 0x24, //!< End of sequence - end_of_seq_rbsp, non-VLC 100 HEVC_NAL_UT_EOB = 0x25, //!< End of bitsteam - end_of_bitsteam_rbsp, non-VLC 101 HEVC_NAL_UT_FD = 0x26, //!< Filler data - filler_data_rbsp, non-VLC 102 HEVC_NAL_UT_PREFIX_SEI = 0x27, //!< Supplemental enhancement information (SEI) - sei_rbsp, non_VLC 103 HEVC_NAL_UT_SUFFIX_SEI = 0x28, //!< Supplemental enhancement information (SEI) - sei_rbsp, non_VLC 104 105 //this should be the last element of this enum 106 //chagne this value if NAL unit type increased 107 HEVC_MAX_NAL_UNIT_TYPE = 0x3f, 108 } HEVC_NAL_UNIT_TYPE; 109 110 typedef struct _CODEC_FRAMERATE 111 { 112 uint32_t Numerator; 113 uint32_t Denominator; 114 }CODEC_FRAMERATE; 115 116 /*! \brief Provides the picture-level parameters of a compressed picture for HEVC decoding. 117 * 118 * The framework is expected to only send a sequence parameter compressed buffer for the first picture(first Execute() call) in a sequence, associated with a RAP(IDR, CRA, BLA) picture. 119 */ 120 typedef struct _CODEC_HEVC_ENCODE_SEQUENCE_PARAMS 121 { 122 /*! \brief Plus 1 specifies the width of each encoded picture in units of minimum coding block size. 123 * 124 * The encoded picture width in units of luma samples equals (wFrameWidthInMinCbMinus1 + 1) * (1 << (log2_min_coding_block_size_minus3 + 3)) 125 * Programming Note: HW requres surface allocation Y offset of chroma plain to be multiple of 32 pixels. And HEVC spec requires frame resolution to be multiple of minimal CU (could be 8 pixels) horizontally and vertically. Framework needs to pad accordingly. If source resolution is different from what is actually encoded (padding happens), cropping information should be provided in the SPS header accordingly. 126 */ 127 uint16_t wFrameWidthInMinCbMinus1; 128 /*! \brief Plus 1 specifies the height of each encoded picture in units of minimum coding block size. 129 * 130 * The encoded picture height in units of luma samples equals (wFrameHeightInMinCbMinus1 + 1) * (1 << (log2_min_coding_block_size_minus3 + 3)) 131 */ 132 uint16_t wFrameHeightInMinCbMinus1; 133 uint8_t general_profile_idc; //!< Same as HEVC syntax element 134 /*! \brief Equal to syntax element general_level_idc / 3 135 * 136 * Value range of general_level_idc is 30 times [1, 2, 2.1, 3, 3.1, 4, 4.1, 5, 5.1, 5.2, 6, 6.1, 6.2]. 137 * Programming Note: HW requres surface allocation Y offset of chroma plain to be multiple of 32 pixels. And HEVC spec requires frame resolution to be multiple of minimal CU (could be 8 pixels) horizontally and vertically. Framework needs to pad accordingly. If source resolution is different from what is actually encoded (padding happens), cropping information should be provided in the SPS header accordingly. 138 */ 139 uint8_t Level; 140 uint8_t general_tier_flag; //!< Same as HEVC syntax element 141 142 uint16_t GopPicSize; //!< Distance between IRAP pictures. 143 /*! \brief Distance between anchor frames (I or P). 144 * 145 * Here, P may also means low delay B (GPB) frames. 146 * Programming Note: GopPicSize > GopRefDist should be ensured by application. It is required by BRC. 147 */ 148 uint8_t GopRefDist; 149 uint8_t GopOptFlag : 2; 150 uint8_t : 6; 151 152 uint8_t TargetUsage; 153 /*! \brief Specifies rate control method. 154 * 155 * \n 1: CBR 156 * \n 2: VBR 157 * \n 3: CQP, if set, internal BRC, multi-pass and panic mode will be disabled 158 * \n 4: AVBR, if set, HRD compliance is not guaranteed. Buffering period SEI and picture timing SEI messages are not necessary for AVBR. 159 * \n 5: QVBR 160 * \n 6: Reserved 161 * \n 7: Reserved 162 * \n 8: VCM, defined for video converencing 163 * \n 9: ICQ 164 * \n Programming note: Define the minimum value as indicated above for AVBR accuracy & convergence, clamp any value that is less than the minimum value to the minimum value. Define the maximum value for AVBR accuracy as 100 (10%) and for AVBR convergence as 500, clamp any value that is greater than the maximum value to the maximum value. The maximum & minimum value may be adjusted when necessary. If bResetBRC is set to 1 for a non-I picture, driver shall not insert SPS into bitstream. Driver needs to calculate the maximum allowed frame size per profile/level for all RateControlMethod except CQP, and use the calculated value to program kernel for non AVBR modes; for AVBR mode, driver needs to clamp the upper bound of UserMaxFrameSize to the calculated value and use the clamped UserMaxFrameSize to program kernel. If IWD_VBR is set, driver programs it the same as VBR except not to enable panic mode. 165 */ 166 uint8_t RateControlMethod; 167 uint32_t TargetBitRate; //!< Target bit rate Kbit per second 168 uint32_t MaxBitRate; //!< Maximum bit rate Kbit per second 169 /*! \brief Minimun bit rate Kbit per second. 170 * 171 * This is used in VBR control. For CBR control, this field is ignored. 172 */ 173 uint32_t MinBitRate; 174 CODEC_FRAMERATE FrameRate; //!< Actual frame rate is the decimal derivative of FrameRate.Numerator / FrameRate.Denominator. 175 uint32_t InitVBVBufferFullnessInBit; //!< Initial VBV buffer fullness in bits. 176 /*! \brief VBV buffer size in bit unit. 177 * 178 * The HEVC spec defines a max coded picture buffer size for each level. 179 */ 180 uint32_t VBVBufferSizeInBit; 181 182 union 183 { 184 struct 185 { 186 /*! \brief Indicate if a BRC reset is desired to set a new bit rate or frame rate. 187 * 188 * This setting is only valid if RateControlMethod is AVBR or VBR and the current picture is an I picture. If the frame resolution is changed, it should be set with IDR picture. It should not be set when RateControlMethod is CBR or CQP. The following table indicates which BRC parameters can be changed via a BRC reset. 189 * 190 * \n BRC Parameters Changes allowed via reset 191 * \n Profile & Level Yes 192 * \n UserMaxFrameSize Yes 193 * \n InitVBVBufferFullnessInBit No 194 * \n TargetBitRate Yes 195 * \n VBVBufferSizeInBit No 196 * \n MaxBitRate Yes 197 * \n FramesPer100Sec * No 198 * \n RateControlMethod No 199 * \n GopPicSize No 200 * \n GopRefDist No 201 * \n GopOptFlag Yes 202 * \n FrameWidth No 203 * \n FrameHeight No 204 * \n AVBRAccuracy No 205 * \n AVBRConvergence No 206 * \n Note: when resolution (FrameWidth and/or FrameHeight) changes, framework should re-start a new bit stream and not using BRC reset. 207 */ 208 uint32_t bResetBRC : 1; 209 /*! \brief Indicates the global search options. 210 * 211 * It is only valid if EnhancedEncInput is reported as a capability. 212 * \n - 0 : Default - option internally selected based on target usage 213 * \n - 1 : Long - SHME enabled 214 * \n - 2 : Medium - HME only enabled, SHME disabled 215 * \n - 3 : Short - SHME/HME disabled 216 */ 217 uint32_t GlobalSearch : 2; 218 219 /*! \brief Indicates the local search options. 220 * 221 * It is only valid if EnhancedEncInput is reported as a capability. 222 * \n - 0 : Default - option internally selected based on target usage 223 * \n - 1 : Tiny – MaxLenSP = 4, Reference Window = 24x24 SP = Spiral 224 * \n - 2 : Small – MaxLenSP = 9, Reference Window = 28x28 SP = Spiral 225 * \n - 3 : Square – MaxLenSP = 16, Reference Window = 32x32 SP = Spiral 226 * \n - 4 : Diamond – MaxLenSP = 16, Reference Window = 48x40 SP = Diamond 227 * \n - 5 : Large Diamond – MaxLenSP = 30, Reference Window = 48x40 SP = Diamond 228 * \n - 6 : Exhaustive – MaxLenSP = 57, Reference Window = 48x40 SP = Spiral 229 * \n - 7 : Heavy Horizontal – MaxLenSP = 57, Reference Window = 64x32 SP = Spiral 230 * \n - 8 : Heavy Vertical – MaxLenSP = 57, Reference Window = 32x64 SP = Spiral 231 */ 232 uint32_t LocalSearch : 4; 233 /*! \brief Indicates the EarlySkip control. 234 * 235 * It is only valid if EnhancedEncInput is reported as a capability. 236 * \n - 0 : Default, decided internally 237 * \n - 1 : EarlySkip enabled 238 * \n - 2 : EarlySkip disabled 239 */ 240 uint32_t EarlySkip : 2; 241 /*! \brief Indicates that MB BRC is enabled. 242 * 243 * It is only valid if MBBRCSupport is reported as a capability. Currently MB BRC can be applied to all bit rate control methods except CQP. 244 * \n - 0 : Default, decided internally based on target usage. 245 * \n - 1 : MB BRC enabled. 246 * \n - 2 : MB BRC disabled. 247 * \n - Other values are reserved. 248 */ 249 uint32_t MBBRC : 4; 250 /*! \brief Indicates that Parallel BRC is enabled. 251 * 252 * It is only valid if ParallelBRC is reported as a capability. 253 * \n - 0 : no parallel BRC required. 254 * \n - 1 : request parallel BRC. 255 */ 256 uint32_t ParallelBRC : 1; 257 /*! \brief Indicates that Dynamic Slice Size Control is enabled. 258 * 259 * It is only valid if SliceByteSizeControl is reported as a capability. When enabled, the slice information that app provides will be applied as "supper slice". It means that GPU may further split the slice region that slice control data specifies into finer slice segments based on slice size upper limit (MaxSliceSize). GPU will duplicate the slice header bit stream for each splitted slice segments while updating the necessary fields such as slice_segment_address. 260 */ 261 uint32_t SliceSizeControl : 1; 262 /*! \brief Specifies input source format 263 * 264 * \n 0: YUV420 265 * \n 1: YUV422 266 * \n 2: YUV444 267 * \n 3: RGB 268 * \n Note1: Encoder cannot do up-sampling. For example, if source format is YUV422, the encoder can generates bit stream of 420 or 422 only. It cannot generate YUV444 format. But it may generates RGB format. 269 * Note2: For RGB, the actual input source format is also determined by flag DisplayFormatSwizzle (formats below is in MSB->LSB order). 270 * \n - If DisplayFromatSwizzle is 0, and 8b intut is specified the format is A8B8G8R8, if 10 bit is specified the format is A2B10G10R10 271 * \n - If DisplayFromatSwizzle is 0, and 8b intut is specified the format is A8R8G8B8, if 10 bit is specified the format is A2R10G10B10 272 */ 273 uint32_t SourceFormat : 2; 274 /*! \brief Specifies input source bit depth. 275 * 276 * \n 0: 8b 277 * \n 1: 10b 278 * \n 2: 12b 279 * \n 3: 16b 280 * \n Note: Encoder cannot do up-sampling. For example, if source bit depth is 10b, the encoder can generates bit stream of 8b or 10b only, and that it cannot generate 12b format. It is subjected to the limit set by MaxEncodedBitDepth. 281 */ 282 uint32_t SourceBitDepth : 2; 283 /*! \brief Enable QP Adjustment at CQP mode. 284 * 285 * \n - 0 : no QP adjustment. 286 * \n - 1 : enable QP adjustment. 287 * \n Note: Basically ENC may define fine-tune QP adjustment based on motion search result, which is similar as MBBRC for BRC mode. With BRC modes, this flag should be set to 0. 288 */ 289 uint32_t QpAdjustment : 1; 290 /*! \brief Indicates ROI[] value is in delta QP. 291 * 292 * It is valid only when parameter NumROI is greater than 0 and either ROIDeltaQPSupport or ROIBRCPriorityLevelSupport equals to 1. 293 * \n - 0 : ROI[] value is in priority. 294 * \n - 1 : ROI[] value is in delta QP. 295 * \n Note: ROIValueInDeltaQP must be set to 1 for CQP. Currently only ROIValueInDeltaQP equal 1 is validated. 296 */ 297 uint32_t ROIValueInDeltaQP : 1; 298 /*! \brief Indicates block level absolute QP value is provided. 299 * 300 * \n - 0 : block level absolute QP value is not provided. 301 * \n - 1 : block level absolute QP value is provided. 302 */ 303 uint32_t BlockQPforNonRectROI : 1; 304 /*! \brief Enables tile based encoding. 305 * 306 * \n - 0 : tile based encoding disabled. 307 * \n - 1 : tile based encoding enabled. 308 */ 309 uint32_t EnableTileBasedEncode : 1; 310 /*! \brief Indicates if BRC can use larger P/B frame size than UserMaxPBFrameSize 311 * 312 * \n - 0 : BRC can not use larger P/B frame size than UserMaxPBFrameSize. 313 * \n - 1 : BRC can use larger P/B frame size than UserMaxPBFrameSize. 314 */ 315 uint32_t bAutoMaxPBFrameSizeForSceneChange : 1; 316 /*! \brief Enables streaming buffer in LLC 317 * 318 * \n - 0 : streaming buffer by LLC is disabled. 319 * \n - 1 : streaming buffer by LLC is enabled. 320 */ 321 uint32_t EnableStreamingBufferLLC : 1; 322 /*! \brief Enables streaming buffer in DDR 323 * 324 * \n - 0 : streaming buffer by DDR is disabled. 325 * \n - 1 : streaming buffer by DDR is enabled. 326 */ 327 uint32_t EnableStreamingBufferDDR : 1; 328 329 /*! \brief Low Delay Mode 330 * 331 * \n - 0 : Random Access B. 332 * \n - 1 : Low delay encoding with P or LDB. 333 */ 334 uint32_t LowDelayMode : 1; 335 336 /*! \brief Disable HRD conformance 337 * 338 * \n - 0 : HRD conformance is enabled. 339 * \n - 1 : HRD conformance is disabled (aka no panic mode). 340 */ 341 uint32_t DisableHRDConformance : 1; 342 343 /*! \brief Hierarchical Mini GOP 344 * 345 * \n - 0 : Flat GOP (No Hierarchical Mini GOP). 346 * \n - 1 : Hierarchical Mini GOP. 347 */ 348 uint32_t HierarchicalFlag : 1; 349 350 uint32_t ReservedBits : 3; 351 }; 352 uint32_t SeqFlags; 353 }; 354 355 /*! \brief Framework defined maximum frame size in bytes for I frames. 356 * 357 * Applicable for all RateControlMethod values except CQP; guarantees that the compressed frame size will be less than this value. If UserMaxPBFrameSize equals 0, UserMaxIFrameSize will be used for all frame types. Maximum allowed frame size per profile/level will be calculated in driver and be used when UserMaxIFrameSize and UserMaxPBFrameSize are both set to 0. 358 */ 359 uint32_t UserMaxIFrameSize; 360 /*! \brief Framework defined maximum frame size in bytes for P & B frames. 361 * 362 * Applicable for all RateControlMethod values except CQP; guarantees that the compressed frame size will be less than this value. If UserMaxPBFrameSize equals 0, UserMaxIFrameSize will be used for all frame types. Maximum allowed frame size per profile/level will be calculated in driver and be used when UserMaxIFrameSize and UserMaxPBFrameSize are both set to 0. 363 */ 364 uint32_t UserMaxPBFrameSize; 365 /*! \brief For Constant Rate Factor BRC method, it indicates the measure of quality. 366 * 367 * The range is from 1 – 51, with 1 being the best quality. 368 */ 369 uint8_t ICQQualityFactor; 370 371 /*! \brief Specigy session that IPU and GPU communicate on. 372 * 373 * It is for streaming buffer. 374 */ 375 uint8_t StreamBufferSessionID; 376 377 uint8_t Reserved16b; 378 379 /*! \brief Number of B frames per level in BGOP (between each two consecutive anchor frames). 380 * 381 * \n NumOfBInGop[0] – regular B, or no reference to other B frames. 382 * \n NumOfBInGop[1] – B1, reference to only I, P or regular B frames. 383 * \n NumOfBInGop[2] – B2, references include B1. 384 * \n Invalid when ParallelBRC is disabled (value 0). 385 */ 386 uint32_t NumOfBInGop[3]; // depricated 387 388 union 389 { 390 struct 391 { 392 /*! \brief Same as syntax element. 393 * 394 * When the scaling_list_enable_flag is set to disable, the scaling matrix is still sent to the PAK, and with all entries programmed to the same value of 16. 395 */ 396 uint32_t scaling_list_enable_flag : 1; 397 uint32_t sps_temporal_mvp_enable_flag : 1; //!< Same as HEVC syntax element 398 uint32_t strong_intra_smoothing_enable_flag : 1; //!< Same as HEVC syntax element 399 uint32_t amp_enabled_flag : 1; //!< Same as HEVC syntax element 400 /*! \brief Same as syntax element sample_adaptive_offset_enabled_flag. 401 * 402 * Programming notes: must be 0 on SKL 403 */ 404 uint32_t SAO_enabled_flag : 1; 405 /*! \brief Same as syntax element. 406 * 407 * Programming note: must be 0 on SKL. 408 */ 409 uint32_t pcm_enabled_flag : 1; 410 uint32_t pcm_loop_filter_disable_flag : 1; //!< Same as HEVC syntax element 411 uint32_t reserved : 1; 412 uint32_t chroma_format_idc : 2; //!< Same as HEVC syntax element 413 uint32_t separate_colour_plane_flag : 1; //!< Same as HEVC syntax element 414 uint32_t palette_mode_enabled_flag : 1; 415 uint32_t RGBEncodingEnable : 1; 416 uint32_t PrimaryChannelForRGBEncoding : 2; 417 uint32_t SecondaryChannelForRGBEncoding : 2; 418 uint32_t : 15; // [0] 419 }; 420 uint32_t EncodeTools; 421 }; 422 423 /*! \brief Specifies the maximum size of a coding block 424 * 425 * Corresponds to HEVC spec variable Log2CtbSize - 3. The full value range is [0..3], inclusive. 426 * Programming note: On SKL, must be set at 2. 427 */ 428 uint8_t log2_max_coding_block_size_minus3; 429 /*! \brief Specifies the minimum size of a coding block. 430 * 431 * Corresponds to HEVC spec variable Log2MinCbSize - 3. The full value range is [0..3], inclusive. 432 * Programming note: On SKL, must be set at 0. 433 */ 434 uint8_t log2_min_coding_block_size_minus3; 435 /*! \brief Specifies the maximum size of a transform unit. 436 * 437 * Corresponds to HEVC spec variable Log2MaxTrafoSize - 2. The value range is [0..3], inclusive. 438 * Programming note: On SKL, must be set to 3 to indicate 32x32. 439 */ 440 uint8_t log2_max_transform_block_size_minus2; 441 /*! \brief Specifies the minimum size of a transform unit. 442 * 443 * Corresponds to HEVC spec variable Log2MinTrafoSize - 2. The value range is [0..3], inclusive. 444 * Programming note: On SKL, must be set to 0 to indicate 4x4. 445 */ 446 uint8_t log2_min_transform_block_size_minus2; 447 /*! \brief Same as HEVC syntax element. 448 * 449 * Programming note: On SKL, must be set to 2. 450 */ 451 uint8_t max_transform_hierarchy_depth_intra; 452 /*! \brief Same as HEVC syntax element. 453 * 454 * Programming note: On SKL, must be set to 2. 455 */ 456 uint8_t max_transform_hierarchy_depth_inter; 457 /*! \brief Specifies the minimum size of I_PCM coding blocks. 458 * 459 * Corresponds to HEVC spec variable Log2MinIpcmCbSizeY. 460 */ 461 uint8_t log2_min_PCM_cb_size_minus3; 462 /*! \brief Specifies the maximum size of I_PCM coding blocks. 463 * 464 * Corresponds to HEVC spec variable Log2MaxIpcmCbSizeY. 465 */ 466 uint8_t log2_max_PCM_cb_size_minus3; 467 uint8_t bit_depth_luma_minus8; //!< Same as HEVC syntax element 468 uint8_t bit_depth_chroma_minus8; //!< Same as HEVC syntax element 469 uint8_t pcm_sample_bit_depth_luma_minus1; //!< Same as HEVC syntax element 470 uint8_t pcm_sample_bit_depth_chroma_minus1; //!< Same as HEVC syntax element 471 472 uint8_t bVideoSurveillance; 473 474 /*! \brief This flag is used for compatibility between various DDIs. 475 * 476 * Do NOT proram a kernel or otherwise make decisions based on this value. Instead use the flag inside CODEC_HEVC_ENCODE_PICTURE_PARAMS. 477 */ 478 uint8_t bScreenContent; 479 480 /*! \brief Indicates the uncompressed input color space 481 * 482 * Valid only when input is ARGB format. 483 */ 484 ENCODE_INPUT_COLORSPACE InputColorSpace; 485 486 /*! \brief Provides a hint to encoder about the scenario for the encoding session. 487 * 488 * BRC algorithm may tune differently based on this info. 489 */ 490 ENCODE_SCENARIO ScenarioInfo; 491 492 ENCODE_CONTENT contentInfo; 493 494 /*! \brief Indicates the tolerance the application has to variations in the frame size. 495 * 496 * It affects the BRC algorithm used, but may or may not have an effect based on the combination of other BRC parameters. Only valid when the driver reports support for FrameSizeToleranceSupport. 497 */ 498 ENCODE_FRAMESIZE_TOLERANCE FrameSizeTolerance; 499 500 501 uint16_t SlidingWindowSize; 502 uint32_t MaxBitRatePerSlidingWindow; 503 uint32_t MinBitRatePerSlidingWindow; 504 505 /*! \brief Indicates number of frames to lookahead. 506 * 507 * Range is [0~127]. Default is 0 which means lookahead disabled. Valid only when LookaheadBRCSupport is 1. When not 0, application should send LOOKAHEADDATA to driver. 508 */ 509 uint8_t LookaheadDepth; 510 511 uint32_t motion_vector_resolution_control_idc; 512 uint32_t intra_boundary_filtering_disabled_flag; 513 uint8_t palette_max_size; 514 uint8_t delta_palette_max_predictor_size; 515 } CODEC_HEVC_ENCODE_SEQUENCE_PARAMS, *PCODEC_HEVC_ENCODE_SEQUENCE_PARAMS; 516 517 /*! \brief Provides the picture-level parameters of a compressed picture for HEVC decoding. 518 */ 519 typedef struct _CODEC_HEVC_ENCODE_PICTURE_PARAMS 520 { 521 /*! \brief Specifies the uncompressed source surface of the frame for the current picture to be encode. 522 * 523 * The PicFlags regarding reference usage are expected to be valid at this time. 524 */ 525 CODEC_PICTURE CurrOriginalPic; 526 /*! \brief Specifies the uncompressed surface of the reconstructed frame for the current encoded picture. 527 * 528 * The PicFlags regarding reference usage are expected to be valid at this time. 529 * The recon surface may be of different format and different bit depth from that of source. 530 * The framework needs to specify it through chroma_format_idc and bit_depth_luma_minus8 531 * and bit_depth_chroma_minus8 in SPS data structure. 532 */ 533 CODEC_PICTURE CurrReconstructedPic; 534 /*! \brief Specifies the collocated reference picture’s index into the RefFrameList[]. 535 * 536 * Application should generate collocated_ref_idx from collocated_from_l0_flag value per slice. When the HEVC syntax element slice_temporal_mvp_enable_flag takes value 0, CollocatedRefPicIndex should take value 0xFF. 537 */ 538 uint8_t CollocatedRefPicIndex; 539 /*! \brief Each entry of the list specifies the frame index of the reference pictures. 540 * 541 * The value of FrameIdx specifies the index of RefFrameList structure. And valid value range is [0..14, 0x7F]. Invalid entries are indicated by setting PicFlags to PICTURE_INVALID. 542 * RefFrameList[] should include all the reference pictures in DPB, which means either the picture is referred by current picture or future pictures, it should have a valid entry in it. 543 */ 544 CODEC_PICTURE RefFrameList[CODEC_MAX_NUM_REF_FRAME_HEVC]; 545 int32_t CurrPicOrderCnt; //!< Picture Order Count value of current picture. 546 /*! \brief Picture Order Count values of reference pictures corresponding to the entries of RefFrameList[]. 547 * 548 * For invalid entries of RefFrameList[], its RefFramePOCList value can be ignored. 549 */ 550 int32_t RefFramePOCList[CODEC_MAX_NUM_REF_FRAME_HEVC]; 551 552 /*! \brief Specifies picture coding type. 553 * 554 * \n 1: I picture 555 * \n 2: P picture 556 * \n 3: B picture 557 * \n 4: B1 picutre 558 * \n 5: B2 picture 559 * \n For B1 and B2 explanation refer to NumOfBInGop[] 560 */ 561 uint8_t CodingType; 562 uint8_t HierarchLevelPlus1; 563 uint16_t NumSlices; 564 565 union 566 { 567 struct 568 { 569 uint32_t tiles_enabled_flag : 1; //!< Same as HEVC syntax element 570 uint32_t entropy_coding_sync_enabled_flag : 1; //!< Same as HEVC syntax element 571 /*! \brief Same as HEVC syntax element. 572 * 573 * Programming note: On SKL, must be set to 0. 574 */ 575 uint32_t sign_data_hiding_flag : 1; 576 /*! \brief Same as HEVC syntax element. 577 * 578 * Programming note: On SKL, must be set to 0. 579 */ 580 uint32_t constrained_intra_pred_flag : 1; 581 /*! \brief Same as HEVC syntax element. 582 * 583 * Programming note: On SKL, must be set to 0. 584 */ 585 uint32_t transform_skip_enabled_flag : 1; 586 uint32_t transquant_bypass_enabled_flag : 1; //!< Same as HEVC syntax element 587 uint32_t cu_qp_delta_enabled_flag : 1; //!< Same as HEVC syntax element 588 uint32_t weighted_pred_flag : 1; //!< Same as HEVC syntax element 589 uint32_t weighted_bipred_flag : 1; //!< Same as HEVC syntax element 590 uint32_t loop_filter_across_slices_flag : 1; //!< Same as HEVC syntax element of seq_loop_filter_across_slices_enabled_flag 591 uint32_t loop_filter_across_tiles_flag : 1; //!< Same as HEVC syntax element 592 /*! \brief A combination of HEVC syntax element of sps_scaling_list_data_present_flag and pps_scaling_list_data_present_flag. 593 * 594 * If the value is 1, application will send a quantization matrix (scaling list) buffer to DDI. Otherwise not. If scaling_list_enable_flag is 0. This flag should also be 0. 595 */ 596 uint32_t scaling_list_data_present_flag : 1; 597 uint32_t dependent_slice_segments_enabled_flag : 1; //!< Same as HEVC syntax element 598 uint32_t bLastPicInSeq : 1; 599 uint32_t bLastPicInStream : 1; 600 uint32_t bUseRawPicForRef : 1; 601 uint32_t bEmulationByteInsertion : 1; 602 uint32_t BRCPrecision : 2; 603 /*! \brief Specifies that slice level reporting may be requested for this frame. 604 * 605 * If this flag is set, then slice level parameter reporting will be set up for this frame. Only valid if SliceLevelReportSupport is reported as a capability, else this flag is ignored. 606 */ 607 uint32_t bEnableSliceLevelReport : 1; 608 /*! \brief Specifies whether intra refresh is enabled in colum/row, or disabled. 609 * 610 * It applies to P picture only (not valid with IBP) and is effective only when RollingIntraRefresh capability is set.. 611 * \n - 0: disabled 612 * \n - 1: enabled in colum 613 * \n - 2: enabled in row 614 * \n Programming Note: When RollingIntraRefresh is used, there are some restrictions the application must obey. 615 * \n - No B frames. 616 * \n - No multiple references. 617 * \n Additionally the driver will disable Multiple Prediction (MultiPred). This is to simplify the kernel when ensuring inter serach doesn’t refer to illegal regions. 618 */ 619 uint32_t bEnableRollingIntraRefresh : 2; 620 /*! \brief Same as HEVC syntax element 621 * 622 */ 623 uint32_t no_output_of_prior_pics_flag : 1; 624 /*! \brief Requests GPU to determine weighted prediction factors. 625 * 626 * Is valid when either weighted_pred_flag or weighted_bipred_flag is turned on. 627 * In this case, the following parameters in slice control data structure shall be ignored: luma_log2_weight_denom, delta_chroma_log2_weight_denom, luma_offset[2][15], delta_luma_weight[2][15], chroma_offset[2][15][2], and delta_chroma_weight[2][15][2]. 628 */ 629 uint32_t bEnableGPUWeightedPrediction : 1; 630 /*! \brief Indicates that the allocated source buffer format is a swizzle format from display. 631 * 632 * Framework still allocates the buffer as a standard FOURCC format. The swizzled format will be reported as supported for the encoder configuration during capability reporting. 633 * \n Source/Raw Allocated Buffer Format, DisplayFormatSwizzle, Layout Format in Buffer 634 * \n - YUY2, 0, YUY2 635 * \n - YUY2, 1, 2YUY (Y0U0Y1V0) 636 * \n - AYUV, 0, AYUV 637 * \n - AYUV, 1, YUXV 638 */ 639 uint32_t bDisplayFormatSwizzle : 1; 640 uint32_t deblocking_filter_override_enabled_flag : 1; 641 uint32_t pps_deblocking_filter_disabled_flag : 1; 642 uint32_t bEnableCTULevelReport : 1; // [0..1] 643 uint32_t bEnablePartialFrameUpdate : 1; 644 uint32_t reservedbits : 3; 645 }; 646 uint32_t PicFlags; 647 }; 648 649 char QpY; //!< QpY = pic_init_qp_minus26 + 26 650 uint8_t diff_cu_qp_delta_depth; //!< Same as HEVC syntax element 651 char pps_cb_qp_offset; //!< Same as HEVC syntax element 652 char pps_cr_qp_offset; //!< Same as HEVC syntax element 653 uint8_t num_tile_columns_minus1; //!< Same as HEVC syntax element 654 uint8_t num_tile_rows_minus1; //!< Same as HEVC syntax element 655 /*! \brief Same as HEVC syntax elements of column_width_minus1 + 1 in PPS of HEVC bitstreams. 656 * 657 * Driver expected to calculate the size of last column from frame resolution. 658 */ 659 uint16_t tile_column_width[20]; 660 /*! \brief Same as HEVC syntax elements of row_height_minus1 + 1 in PPS of HEVC bitstreams. 661 * 662 * Driver expected to calculate the size of last row from frame resolution. 663 */ 664 uint16_t tile_row_height[22]; 665 /*! \brief Same as HEVC syntax element. 666 * 667 * Programming note: On SKL, must be set to 0. 668 */ 669 uint8_t log2_parallel_merge_level_minus2; 670 uint8_t num_ref_idx_l0_default_active_minus1; //!< Same as HEVC syntax element 671 uint8_t num_ref_idx_l1_default_active_minus1; //!< Same as HEVC syntax element 672 /*! \brief Specifies the CTU bit size limit based on spec requirement, or other value for special purpose. 673 * 674 * If the value is set 0, no bit size limit is checked. 675 */ 676 uint32_t LcuMaxBitsizeAllowed; 677 /*! \brief Indicates the column or row location in block unit which is dictated by IntraRefreshBlockUnitSize from encoding capability. 678 * 679 * Ignored if bEnableRollingIntraRefresh is 0. 680 * If IntraInsertionSize is equal or larger than the LCU size (CTB), IntraInsertionLocation has to be aligned with LCU boundaries. Otherwise, IntraInsertionLocation could have an offset of integer multiple of the block unit size from LCU boundary and must make sure that IntraInsertionLocation + IntraInsertionSize -1 would reside in the same LCU region. 681 */ 682 uint16_t IntraInsertionLocation; 683 /*! \brief Indicates the number of columns or rows in block unit which is dictated by IntraRefreshBlockUnitSize from encoding capability. 684 * 685 * Ignored if bEnableRollingIntraRefresh is 0. 686 * If IntraInsertionSize is equal or larger than the LCU size (CTB), it has to be multiple of LCU size. Otherwise, it can only be integer multiple of the block unit size (equal or smaller than LCU). 687 * When RateControlMode takes VCM mode. IntraInsertionSize defines the number of LCUs to be turn into Intra LCUs when bEnableRollingIntraRefresh is 1. 688 */ 689 uint16_t IntraInsertionSize; 690 /*! \brief Indicates the Qp difference for inserted intra columns or rows. 691 * 692 * Framework can use this to adjust intra Qp based on bitrate & max frame size. It is ignored if bEnableRollingIntraRefresh is 0. Value range [-8..7]. Driver will clamp it if out of range. 693 */ 694 char QpDeltaForInsertedIntra; 695 /*! \brief Arbitrary number set by the host decoder to use as a tag in the status report feedback data. 696 * 697 * The value should not equal 0, and should be different in each call to Execute. 698 */ 699 uint32_t StatusReportFeedbackNumber; 700 701 /*! \brief Same as HEVC syntax element 702 * 703 */ 704 uint8_t slice_pic_parameter_set_id; 705 /*! \brief Same as HEVC syntax element 706 * 707 */ 708 uint8_t nal_unit_type; 709 bool bUsedAsRef; 710 711 /*! \brief Slice byte size upper limit. 712 * 713 * Used when SliceSizeControl is enabled. Currently only valid for VDENC. 714 */ 715 uint32_t MaxSliceSizeInBytes; 716 717 /*! \brief Number of Region Of Interest (ROI). 718 * 719 * Value range is 0 to 16 inclusively. If no ROI to be set, this value shall be set to 0. 720 */ 721 uint8_t NumROI; 722 /*! \brief Defines ROI settings. 723 * 724 * Value entries are ROI[0] up to ROI[NumROI – 1], inclusively, if NumROI > 0. And it can be ignored otherwise. 725 */ 726 CODEC_ROI ROI[16]; 727 /*! \brief Distinct delta QP values assigned to the ROI 728 * 729 * Value entries are distinct and within [MinDeltaQp..MaxDeltaQp]. 730 */ 731 int8_t ROIDistinctDeltaQp[8]; 732 uint32_t RollingIntraReferenceLocation[16]; 733 /*! \brief Dictates the value of delta QP for any ROI should be within [MinDeltaQp..MaxDeltaQp] 734 * 735 * Applies only to BRC case. 736 */ 737 char MaxDeltaQp; 738 /*! \brief Dictates the value of delta QP for any ROI should be within [MinDeltaQp..MaxDeltaQp] 739 * 740 * Applies only to BRC case. 741 */ 742 char MinDeltaQp; 743 744 union 745 { 746 struct 747 { 748 uint32_t EnableCustomRoudingIntra : 1; 749 uint32_t RoundingOffsetIntra : 7; 750 uint32_t EnableCustomRoudingInter : 1; 751 uint32_t RoundingOffsetInter : 7; 752 uint32_t reservedbits : 16; 753 } fields; 754 755 uint32_t value; 756 } CustomRoundingOffsetsParams; 757 758 /*! \brief Specifies skip frames. 759 * 760 * 0: Encode as normal, no skip. 761 * 1: One or more frames were skipped prior to the current frame, encode the current frame as normal. The driver will pass the NumSkipFrames and SizeSkipFrames to BRC for adjustment. 762 */ 763 uint8_t SkipFrameFlag; 764 /*! \brief The number of frames skipped prior to the current frame. 765 * 766 * Valid when SkipFlag = 1. 767 */ 768 uint8_t NumSkipFrames; 769 /*! \brief Differs in meaning based on value of SkipFrameFlag 770 * 771 * SkipFrameFlag = 1, the size of the skipped frames in bits. 772 * Note: Currently kernel only supports 16 bits for SizeSkipFrames. 773 */ 774 uint32_t SizeSkipFrames; 775 776 uint8_t BRCMaxQp; //!< Specifies the maximum Qp to be used for BRC. 777 /*! \brief Specifies the minimum Qp to be used for BRC. 778 * 779 * BRCMaxQp and BRCMinQp may be set at a per frame type (I, P, B) granularity. 780 * BRCMaxQp and BRCMinQp should be set to zero if Qp control is not desired. 781 * If non-zero min/max QP is passed for I-frame, it will be used for I, P and B frames. 782 * If non-zero min/max QP is passed for P-frame also, then P and B frame will be updated to this. I-frame remains unchanged. 783 * If non-zero min/max QP is passed for B-frame also, then B-frame will be updated to this. I and P frame remains unchanged. 784 * If new QP values are passed in between the sequence, then it will be updated for that frame-type and any other frame types that are not explicitly set. Eg. if min/max QP for P-frame was passed separately, and an update for I-frame is received, then only I-frame values are updated. P and B will continue to use old values. But, if P-frame and B-frame were never explicitly set then updating I-frame will also update P and B. 785 * If the application wants to keep the current non-zero min/max QP settings, then min/max QP should be set to zero, so the driver will not change previously set values and continue to use them. 786 * Min QP is expected to be less than or equal to Max QP. Driver clamps max QP to [1, 51] and min QP to [1, max QP]. Zero QP is not used. 787 * Only single PAK pass is supported plus the IPCM pass. Panic mode is disabled. This is because min/maxQP requirement conflicts with the HRD compliancy requirement, so the HRD compliancy restriction is relaxed. 788 */ 789 uint8_t BRCMinQp; 790 791 /*! \brief Indicates that an HMEOffset will be sent by the application in HMEOffset for each reference. 792 * 793 * This offset will be added to the co-located (0, 0) location before HME search is performed. This is only valid if HMEOffsetSupport is reported as supported as a capability, else this flag is ignored. 794 */ 795 uint8_t bEnableHMEOffset; 796 /*! \brief Specifies the HME offsets. 797 * 798 * Curently the supported range is -128 to +127, programmed in 4x downscaled HME precision, not the original size. HMEOffset[i][j] where: 799 * \n - i – RefFrameList Index 800 * \n - j – 0 = x, 1 = y Coordinates 801 * \n So for example, HMEOffset[i] specifies the (x, y) offset corresponding to the ith entry in RefFrameList. 802 * Programming Note: The HME offset must be a multiple of 4x4 to align to the 4x4 HME block, so the driver must align the application supplied value. 803 */ 804 int16_t HMEOffset[15][2]; 805 806 /*! \brief Number of dirty rectangles. 807 * 808 * If no dirty rectangle to be set, this value shall be set to 0. Encoder does not have number of dirty rectangle limitation. 809 */ 810 uint8_t NumDirtyRects; 811 /*! \brief Buffer containing an array of NumDirtyRects number of dirty rectangle elements 812 * 813 * It’s framework's responsibility to ensure that the content in non-dirty rectangle region is the same as previous frame. 814 */ 815 PCODEC_ROI pDirtyRect; 816 /*! \brief Number of moving rectangles. 817 * 818 * If no moving rectangle to be set, this value shall be set to 0. 819 */ 820 uint8_t NumMoveRects; 821 //MOVE_RECT *pMoveRect; \\!< Buffer containing an array of NumMoveRects number of moving rectangle elements. 822 823 /*! \brief Provides a hint to encoder about the content for the encoding session. 824 * 825 * Hint is of the format CODEC_CONTENT. 826 */ 827 uint32_t bScreenContent; 828 829 uint16_t LcuMaxBitsizeAllowedHigh16b; 830 831 /*! \brief Picture parameter, Same as syntax element. 832 * 833 */ 834 uint32_t pps_curr_pic_ref_enabled_flag; 835 uint32_t residual_adaptive_colour_transform_enabled_flag; 836 uint32_t pps_slice_act_qp_offsets_present_flag; 837 uint8_t PredictorPaletteSize; 838 uint16_t PredictorPaletteEntries[3][128]; 839 char pps_act_y_qp_offset_plus5; 840 char pps_act_cb_qp_offset_plus5; 841 char pps_act_cr_qp_offset_plus3; 842 } CODEC_HEVC_ENCODE_PICTURE_PARAMS, *PCODEC_HEVC_ENCODE_PICTURE_PARAMS; 843 844 /*! \brief Slice-level parameters of a compressed picture for HEVC encoding. 845 */ 846 typedef struct _CODEC_HEVC_ENCODE_SLICE_PARAMS 847 { 848 /*! \brief Same as HEVC syntax element. 849 * 850 * For first slice in the picture, slice_segment_address shall be set to 0. 851 */ 852 uint32_t slice_segment_address; 853 uint32_t NumLCUsInSlice; //!< Specifies the number of LCUs in the current slice. 854 /*! \brief Specifies the surfaces of reference pictures. 855 * 856 * The value of FrameIdx specifies the index of RefFrameList structure, PicFlags has no meaning. 857 * RefPicIdx[0][15] corresponds to reference list 0 and RefPicIdx[1][15] corresponds to reference list 1. 858 * Each list may contain duplicated reference picture indexes. Same as RefFrameList[] from picture parameter data structure, the bPicEntry of invalid entries should take value 0xFF. 859 * Must be same across all slices. 860 */ 861 CODEC_PICTURE RefPicList[2][CODEC_MAX_NUM_REF_FRAME_HEVC]; 862 /*! \brief Same as HEVC syntax element. 863 * 864 * If num_ref_idx_active_override_flag == 0, host encoder shall set their values with num_ref_idx_l0_default_minus1. 865 * Must be same across all slices. 866 */ 867 uint8_t num_ref_idx_l0_active_minus1; 868 /*! \brief Same as HEVC syntax element. 869 * 870 * If num_ref_idx_active_override_flag == 0, host encoder shall set their values with num_ref_idx_l1_default_minus1. 871 * Must be same across all slices. 872 */ 873 uint8_t num_ref_idx_l1_active_minus1; 874 875 union 876 { 877 struct 878 { 879 uint32_t bLastSliceOfPic : 1; //!< Specifies if current slice is the last slice of picture. 880 uint32_t dependent_slice_segment_flag : 1; //!< Same as HEVC syntax element 881 uint32_t slice_temporal_mvp_enable_flag : 1; //!< Same as HEVC syntax element 882 /*! \brief Same as HEVC syntax element. 883 * 884 * HEVC has three slice types, B, P, and I slices, and their corresponding values are 0, 1, and 2. 885 */ 886 uint32_t slice_type : 2; 887 uint32_t slice_sao_luma_flag : 1; //!< Same as HEVC syntax element 888 uint32_t slice_sao_chroma_flag : 1; //!< Same as HEVC syntax element 889 /*! \brief Same as HEVC syntax element. 890 * 891 * Programming note: On SKL, must be 0. 892 */ 893 uint32_t mvd_l1_zero_flag : 1; 894 uint32_t cabac_init_flag : 1; //!< Same as HEVC syntax element 895 /*! \brief Same as HEVC syntax element. 896 * 897 * Affects the decoding process accordingly if it appears in slice header of the bitstream. Otherwise, host encode should set it to be the value of pic_disable_deblocking_filter_flag in picture parameter set bit stream. 898 */ 899 uint32_t slice_deblocking_filter_disable_flag : 1; 900 uint32_t collocated_from_l0_flag : 1; //!< Same as HEVC syntax element 901 uint32_t : 21; 902 }; 903 uint32_t SliceFlags; 904 }; 905 906 /*! \brief Same as HEVC syntax element. 907 * 908 * Must be the same across all slices. 909 */ 910 char slice_qp_delta; 911 char slice_cb_qp_offset; //!< Same as HEVC syntax element, [-12..12] 912 char slice_cr_qp_offset; //!< Same as HEVC syntax element, [-12..12] 913 char beta_offset_div2; //!< Same as HEVC syntax element 914 char tc_offset_div2; //!< Same as HEVC syntax element 915 /*! \brief Same as HEVC syntax element. 916 * 917 * Specifies the base 2 logarithm of the denominator for all luma weighting factors. Value range: 0 to 7, inclusive. 918 */ 919 uint8_t luma_log2_weight_denom; 920 /*! \brief Same as HEVC syntax element. 921 * 922 * Framework is expected to ensure that the spec variable ChromaLog2WeightDenom, which is luma_log2_weight_denom plus delta_chroma_log2_weight_denom, specifies the base 2 logarithm of the denominator for all chroma weighting factors, with value range: 0 to 7, inclusive. 923 */ 924 char delta_chroma_log2_weight_denom; 925 /*! \brief Specifies the additive offsets applied to the luma prediction values for list 0 and list 1. 926 * 927 * Its values correspond to HEVC syntax elements luma_offset_l0, and luma_offset_l1. In luma_offset[i][j]: 928 * \n - i equal to 0 is for reference picture list 0, equal to 1 is for reference picture list 1. 929 * \n - j is for reference list index [0..14]. 930 * \n Value range: [-128..127], inclusive. When luma_weight_l0_flag or luma_weight_l1_flag take value 0, corresponding luma_offset should be set 0. 931 */ 932 char luma_offset[2][CODEC_MAX_NUM_REF_FRAME_HEVC]; 933 /*! \brief Specifies the difference of the weighting factor applied to the luma prediction value for list 0/1 prediction using RefPicList. 934 * 935 * Corresponds to syntax element delta_luma_weight_l0, and delta_luma_weight_l1. In delta_luma_weight[i][j]: 936 * \n - i equal to 0 is for reference picture list 0, equal to 1 is for reference picture list 1. 937 * \n - j is for reference list index [0..14]. 938 * \n Value range: [-127..128], inclusive. When luma_weight_l0_flag or luma_weight_l1_flag take value 0, corresponding delta_luma_weight should be set 0. 939 */ 940 char delta_luma_weight[2][CODEC_MAX_NUM_REF_FRAME_HEVC]; 941 /*! \brief Corresponds to HEVC spec variable ChromaOffsetL0 and ChromaOffsetL1. 942 * 943 * In chroma_offset[i][j][k]: 944 * \n - i equal to 0 is for reference picture list 0, equal to 1 is for reference picture list 1. 945 * \n - j is for reference list index [0..14]. 946 * \n - k equal to 0 is for Cb, and equal to 1 is for Cr. 947 * \n Value range: [-128..127], inclusive. When chroma_weight_l0_flag or chroma_weight_l1_flag take value 0, corresponding chroma_offset should be set 0. 948 */ 949 char chroma_offset[2][CODEC_MAX_NUM_REF_FRAME_HEVC][2]; 950 /*! \brief Specifies the difference of the weighting factor applied to the chroma prediction values for list 0/1 prediction using RefPicList. 951 * 952 * Corresponds to HEVC syntax elements delta_chroma_weight_l0 and delta_chroma_weight_l1. In delta_chroma_weight[i][j][k]: 953 * \n - i equal to 0 is for reference picture list 0, equal to 1 is for reference picture list 1. 954 * \n - j is for reference list index [0..14]. 955 * \n - k equal to 0 is for Cb, and equal to 1 is for Cr. 956 * \n Value range: [-127..128], inclusive. When chroma_weight_l0_flag or chroma_weight_l1_flag take value 0, corresponding delta_chroma_weight should be set 0. 957 */ 958 char delta_chroma_weight[2][CODEC_MAX_NUM_REF_FRAME_HEVC][2]; 959 960 /*! \brief Specifies the maximum number of merging MVP candidates supported in the slice. 961 * 962 * Corresponds to HEVC spec variable MaxNumMergeCand. 963 */ 964 uint8_t MaxNumMergeCand; 965 /*! \brief ???? 966 * 967 * ???? 968 */ 969 uint16_t slice_id; 970 /*! \brief ???? 971 * 972 * ???? 973 */ 974 uint16_t BitLengthSliceHeaderStartingPortion; 975 /*! \brief ???? 976 * 977 * ???? 978 */ 979 uint32_t SliceHeaderByteOffset; 980 /*! \brief ???? 981 * 982 * ???? 983 */ 984 uint32_t SliceQpDeltaBitOffset; 985 /*! \brief Bit offset of syntax element pred_weight_table() in slice segment header. 986 * 987 * It aligns with the starting position of the current packed slice header. It is used when encoder prefers to override the weighted prediction parameters passed in from DDI. 988 */ 989 uint32_t PredWeightTableBitOffset; 990 /*! \brief Bit length of syntax element pred_weight_table() in slice segment header. 991 * 992 * It is used when encoder prefers to override the weighted prediction parameters passed in from DDI. 993 */ 994 uint32_t PredWeightTableBitLength; 995 /*! \brief Bit offset of syntax element slice_sao_luma_flag in slice segment header. 996 * 997 * It aligns with the starting position of the current packed slice header. BRC kernel may use it to update the slice_sao_luma_flag and slice_sao_chroma_flag values. The value is invalid if SAO_enabled_flag is false. 998 */ 999 uint32_t SliceSAOFlagBitOffset; 1000 } CODEC_HEVC_ENCODE_SLICE_PARAMS, *PCODEC_HEVC_ENCODE_SLICE_PARAMS; 1001 1002 //! 1003 //! \struct CodecEncodeHevcFeiPicParams 1004 //! \brief Codec encode HEVC FEI pic params 1005 //! 1006 struct CodecEncodeHevcFeiPicParams 1007 { 1008 MOS_RESOURCE resCTBCtrl; // input CTB control buffer 1009 MOS_RESOURCE resCTBCmd; // ENC CTB cmd output buffer or PAK CTB cmd input buffer 1010 MOS_RESOURCE resCURecord; // ENC CU record output buffer or PAK CU record input buffer 1011 MOS_RESOURCE resMVPredictor; // input external MV predictor surface 1012 MOS_RESOURCE resCTBQp; // input QP per CTB surface 1013 MOS_RESOURCE resDistortion; // ENC or ENC_PAK Distortion output surface 1014 1015 uint32_t NumMVPredictorsL0; 1016 uint32_t NumMVPredictorsL1; 1017 1018 bool bCTBCmdCuRecordEnable; 1019 bool bDistortionEnable; 1020 1021 /** \brief control parameters */ 1022 uint32_t SearchPath; 1023 uint32_t LenSP; 1024 uint32_t MultiPredL0; 1025 uint32_t MultiPredL1; 1026 uint32_t SubPelMode; 1027 uint32_t MVPredictorInput; 1028 1029 bool AdaptiveSearch; 1030 bool bPerBlockQP; 1031 bool bPerCTBInput; 1032 bool bColocatedCTBDistortion; 1033 bool bForceLCUSplit; 1034 bool bEnableCU64Check; 1035 bool bEnableCU64AmpCheck; 1036 bool bCU64SkipCheckOnly; 1037 1038 uint32_t RefWidth; 1039 uint32_t RefHeight; 1040 uint32_t SearchWindow; 1041 uint32_t MaxNumIMESearchCenter; 1042 uint32_t FastIntraMode; 1043 uint32_t NumConcurrentEncFramePartition; 1044 1045 /** \brief add for mutlple pass pak */ 1046 uint32_t dwMaxFrameSize; 1047 uint32_t dwNumPasses; //number of QPs 1048 uint8_t *pDeltaQp; //list of detla QPs 1049 }; 1050 #endif // __CODEC_DEF_ENCODE_HEVC_H__ 1051