1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright 2018-2020 Purism SPC 4 */ 5 6/dts-v1/; 7 8#include "dt-bindings/input/input.h" 9#include <dt-bindings/interrupt-controller/irq.h> 10#include "dt-bindings/pwm/pwm.h" 11#include "dt-bindings/usb/pd.h" 12#include "imx8mq.dtsi" 13 14/ { 15 model = "Purism Librem 5"; 16 compatible = "purism,librem5", "fsl,imx8mq"; 17 18 backlight_dsi: backlight-dsi { 19 compatible = "led-backlight"; 20 leds = <&led_backlight>; 21 }; 22 23 pmic_osc: clock-pmic { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <32768>; 27 clock-output-names = "pmic_osc"; 28 }; 29 30 chosen { 31 stdout-path = &uart1; 32 }; 33 34 gpio-keys { 35 compatible = "gpio-keys"; 36 pinctrl-names = "default"; 37 pinctrl-0 = <&pinctrl_keys>; 38 39 vol-down { 40 label = "VOL_DOWN"; 41 gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; 42 linux,code = <KEY_VOLUMEDOWN>; 43 }; 44 45 vol-up { 46 label = "VOL_UP"; 47 gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; 48 linux,code = <KEY_VOLUMEUP>; 49 }; 50 }; 51 52 reg_aud_1v8: regulator-audio-1v8 { 53 compatible = "regulator-fixed"; 54 pinctrl-names = "default"; 55 pinctrl-0 = <&pinctrl_audiopwr>; 56 regulator-name = "AUDIO_PWR_EN"; 57 regulator-min-microvolt = <1800000>; 58 regulator-max-microvolt = <1800000>; 59 gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; 60 enable-active-high; 61 }; 62 63 reg_gnss: regulator-gnss { 64 compatible = "regulator-fixed"; 65 pinctrl-names = "default"; 66 pinctrl-0 = <&pinctrl_gnsspwr>; 67 regulator-name = "GNSS"; 68 regulator-min-microvolt = <3300000>; 69 regulator-max-microvolt = <3300000>; 70 gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>; 71 enable-active-high; 72 }; 73 74 reg_hub: regulator-hub { 75 compatible = "regulator-fixed"; 76 pinctrl-names = "default"; 77 pinctrl-0 = <&pinctrl_hub_pwr>; 78 regulator-name = "HUB"; 79 regulator-min-microvolt = <3300000>; 80 regulator-max-microvolt = <3300000>; 81 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; 82 enable-active-high; 83 }; 84 85 reg_lcd_1v8: regulator-lcd-1v8 { 86 compatible = "regulator-fixed"; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&pinctrl_dsien>; 89 regulator-name = "LCD_1V8"; 90 regulator-min-microvolt = <1800000>; 91 regulator-max-microvolt = <1800000>; 92 vin-supply = <®_vdd_1v8>; 93 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; 94 enable-active-high; 95 /* Otherwise i2c3 is not functional */ 96 regulator-always-on; 97 }; 98 99 reg_lcd_3v4: regulator-lcd-3v4 { 100 compatible = "regulator-fixed"; 101 regulator-name = "LCD_3V4"; 102 pinctrl-names = "default"; 103 pinctrl-0 = <&pinctrl_dsibiasen>; 104 vin-supply = <®_vsys_3v4>; 105 gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>; 106 enable-active-high; 107 }; 108 109 reg_vdd_sen: regulator-vdd-sen { 110 compatible = "regulator-fixed"; 111 regulator-name = "VDD_SEN"; 112 regulator-min-microvolt = <3300000>; 113 regulator-max-microvolt = <3300000>; 114 }; 115 116 reg_vdd_1v8: regulator-vdd-1v8 { 117 compatible = "regulator-fixed"; 118 regulator-name = "VDD_1V8"; 119 regulator-min-microvolt = <1800000>; 120 regulator-max-microvolt = <1800000>; 121 vin-supply = <&buck7_reg>; 122 }; 123 124 reg_vdd_3v3: regulator-vdd-3v3 { 125 compatible = "regulator-fixed"; 126 regulator-name = "VDD_3V3"; 127 regulator-min-microvolt = <3300000>; 128 regulator-max-microvolt = <3300000>; 129 }; 130 131 reg_vsys_3v4: regulator-vsys-3v4 { 132 compatible = "regulator-fixed"; 133 regulator-name = "VSYS_3V4"; 134 regulator-min-microvolt = <3400000>; 135 regulator-max-microvolt = <3400000>; 136 regulator-always-on; 137 }; 138 139 reg_wifi_3v3: regulator-wifi-3v3 { 140 compatible = "regulator-fixed"; 141 regulator-name = "3V3_WIFI"; 142 regulator-min-microvolt = <3300000>; 143 regulator-max-microvolt = <3300000>; 144 }; 145 146 sound { 147 compatible = "simple-audio-card"; 148 pinctrl-names = "default"; 149 pinctrl-0 = <&pinctrl_hp>; 150 simple-audio-card,name = "Librem 5"; 151 simple-audio-card,format = "i2s"; 152 simple-audio-card,widgets = 153 "Headphone", "Headphones", 154 "Microphone", "Headset Mic", 155 "Microphone", "Digital Mic", 156 "Speaker", "Speaker"; 157 simple-audio-card,routing = 158 "Headphones", "HPOUTL", 159 "Headphones", "HPOUTR", 160 "Speaker", "SPKOUTL", 161 "Speaker", "SPKOUTR", 162 "Headset Mic", "MICBIAS", 163 "IN3R", "Headset Mic", 164 "DMICDAT", "Digital Mic"; 165 simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>; 166 167 simple-audio-card,cpu { 168 sound-dai = <&sai2>; 169 }; 170 171 simple-audio-card,codec { 172 sound-dai = <&codec>; 173 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>; 174 frame-master; 175 bitclock-master; 176 }; 177 }; 178 179 sound-wwan { 180 compatible = "simple-audio-card"; 181 simple-audio-card,name = "Modem"; 182 simple-audio-card,format = "i2s"; 183 184 simple-audio-card,cpu { 185 sound-dai = <&sai6>; 186 frame-inversion; 187 }; 188 189 simple-audio-card,codec { 190 sound-dai = <&bm818_codec>; 191 frame-master; 192 bitclock-master; 193 }; 194 }; 195 196 bm818_codec: sound-wwan-codec { 197 compatible = "broadmobi,bm818", "option,gtm601"; 198 #sound-dai-cells = <0>; 199 }; 200 201 vibrator { 202 compatible = "pwm-vibrator"; 203 pwms = <&pwm1 0 1000000000 0>; 204 pwm-names = "enable"; 205 vcc-supply = <®_vdd_3v3>; 206 }; 207}; 208 209&A53_0 { 210 cpu-supply = <&buck2_reg>; 211}; 212 213&A53_1 { 214 cpu-supply = <&buck2_reg>; 215}; 216 217&A53_2 { 218 cpu-supply = <&buck2_reg>; 219}; 220 221&A53_3 { 222 cpu-supply = <&buck2_reg>; 223}; 224 225&ddrc { 226 operating-points-v2 = <&ddrc_opp_table>; 227 228 ddrc_opp_table: ddrc-opp-table { 229 compatible = "operating-points-v2"; 230 231 opp-25M { 232 opp-hz = /bits/ 64 <25000000>; 233 }; 234 235 opp-100M { 236 opp-hz = /bits/ 64 <100000000>; 237 }; 238 239 opp-800M { 240 opp-hz = /bits/ 64 <800000000>; 241 }; 242 }; 243}; 244 245&dphy { 246 status = "okay"; 247}; 248 249&ecspi1 { 250 pinctrl-names = "default"; 251 pinctrl-0 = <&pinctrl_ecspi1>; 252 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 253 #address-cells = <1>; 254 #size-cells = <0>; 255 status = "okay"; 256 257 nor_flash: flash@0 { 258 compatible = "jedec,spi-nor"; 259 reg = <0>; 260 spi-max-frequency = <1000000>; 261 #address-cells = <1>; 262 #size-cells = <1>; 263 264 partition@0 { 265 label = "protected0"; 266 reg = <0x0 0x30000>; 267 read-only; 268 }; 269 270 partition@30000 { 271 label = "protected1"; 272 reg = <0x30000 0x10000>; 273 read-only; 274 }; 275 276 partition@40000 { 277 label = "rw"; 278 reg = <0x40000 0x1C0000>; 279 }; 280 }; 281}; 282 283&gpio1 { 284 pinctrl-names = "default"; 285 pinctrl-0 = <&pinctrl_pmic_5v>; 286 287 pmic-5v-hog { 288 gpio-hog; 289 gpios = <1 GPIO_ACTIVE_HIGH>; 290 input; 291 lane-mapping = "pmic-5v"; 292 }; 293}; 294 295&iomuxc { 296 pinctrl_audiopwr: audiopwrgrp { 297 fsl,pins = < 298 /* AUDIO_POWER_EN_3V3 */ 299 MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x83 300 >; 301 }; 302 303 pinctrl_bl: blgrp { 304 fsl,pins = < 305 /* BACKLINGE_EN */ 306 MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14 0x83 307 >; 308 }; 309 310 pinctrl_charger_in: chargeringrp { 311 fsl,pins = < 312 /* CHRG_INT */ 313 MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x80 314 /* CHG_STATUS_B */ 315 MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x80 316 >; 317 }; 318 319 pinctrl_dsibiasen: dsibiasengrp { 320 fsl,pins = < 321 /* DSI_BIAS_EN */ 322 MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20 0x83 323 >; 324 }; 325 326 pinctrl_dsien: dsiengrp { 327 fsl,pins = < 328 /* DSI_EN_3V3 */ 329 MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x83 330 >; 331 }; 332 333 pinctrl_dsirst: dsirstgrp { 334 fsl,pins = < 335 /* DSI_RST */ 336 MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29 0x83 337 /* DSI_TE */ 338 MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28 0x83 339 /* TP_RST */ 340 MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24 0x83 341 >; 342 }; 343 344 pinctrl_ecspi1: ecspigrp { 345 fsl,pins = < 346 MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x83 347 MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x83 348 MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19 349 MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x83 350 >; 351 }; 352 353 pinctrl_gauge: gaugegrp { 354 fsl,pins = < 355 /* BAT_LOW */ 356 MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x80 357 >; 358 }; 359 360 pinctrl_gnsspwr: gnsspwrgrp { 361 fsl,pins = < 362 /* GPS3V3_EN */ 363 MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x83 364 >; 365 }; 366 367 pinctrl_haptic: hapticgrp { 368 fsl,pins = < 369 /* MOTO */ 370 MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x83 371 >; 372 }; 373 374 pinctrl_hp: hpgrp { 375 fsl,pins = < 376 /* HEADPHONE_DET_1V8 */ 377 MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x180 378 >; 379 }; 380 381 pinctrl_hub_pwr: hubpwrgrp { 382 fsl,pins = < 383 /* HUB_PWR_3V3_EN */ 384 MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x83 385 >; 386 }; 387 388 pinctrl_i2c1: i2c1grp { 389 fsl,pins = < 390 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000026 391 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000026 392 >; 393 }; 394 395 pinctrl_i2c2: i2c2grp { 396 fsl,pins = < 397 MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000026 398 MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000026 399 >; 400 }; 401 402 pinctrl_i2c3: i2c3grp { 403 fsl,pins = < 404 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000026 405 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000026 406 >; 407 }; 408 409 pinctrl_i2c4: i2c4grp { 410 fsl,pins = < 411 MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000026 412 MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000026 413 >; 414 }; 415 416 pinctrl_keys: keysgrp { 417 fsl,pins = < 418 /* VOL- */ 419 MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01C0 420 /* VOL+ */ 421 MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01C0 422 >; 423 }; 424 425 pinctrl_led_b: ledbgrp { 426 fsl,pins = < 427 /* LED_B */ 428 MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT 0x06 429 >; 430 }; 431 432 pinctrl_led_g: ledggrp { 433 fsl,pins = < 434 /* LED_G */ 435 MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT 0x06 436 >; 437 }; 438 439 pinctrl_led_r: ledrgrp { 440 fsl,pins = < 441 /* LED_R */ 442 MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT 0x06 443 >; 444 }; 445 446 pinctrl_mag: maggrp { 447 fsl,pins = < 448 /* INT_MAG */ 449 MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x80 450 >; 451 }; 452 453 pinctrl_pmic: pmicgrp { 454 fsl,pins = < 455 /* PMIC_NINT */ 456 MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x80 457 >; 458 }; 459 460 pinctrl_pmic_5v: pmic5vgrp { 461 fsl,pins = < 462 /* PMIC_5V */ 463 MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x80 464 >; 465 }; 466 467 pinctrl_prox: proxgrp { 468 fsl,pins = < 469 /* INT_LIGHT */ 470 MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x80 471 >; 472 }; 473 474 pinctrl_rtc: rtcgrp { 475 fsl,pins = < 476 /* RTC_INT */ 477 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x80 478 >; 479 }; 480 481 pinctrl_sai2: sai2grp { 482 fsl,pins = < 483 MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 484 MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 485 MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6 486 MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6 487 MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 488 >; 489 }; 490 491 pinctrl_sai6: sai6grp { 492 fsl,pins = < 493 MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0xd6 494 MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0xd6 495 MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0xd6 496 MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6 497 >; 498 }; 499 500 pinctrl_tcpc: tcpcgrp { 501 fsl,pins = < 502 /* TCPC_INT */ 503 MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01C0 504 >; 505 }; 506 507 pinctrl_touch: touchgrp { 508 fsl,pins = < 509 /* TP_INT */ 510 MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27 0x80 511 >; 512 }; 513 514 pinctrl_typec: typecgrp { 515 fsl,pins = < 516 /* TYPEC_MUX_EN */ 517 MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x83 518 >; 519 }; 520 521 pinctrl_uart1: uart1grp { 522 fsl,pins = < 523 MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 524 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 525 >; 526 }; 527 528 pinctrl_uart2: uart2grp { 529 fsl,pins = < 530 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49 531 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49 532 >; 533 }; 534 535 pinctrl_uart3: uart3grp { 536 fsl,pins = < 537 MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 538 MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 539 >; 540 }; 541 542 pinctrl_uart4: uart4grp { 543 fsl,pins = < 544 MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 545 MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 546 MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 547 MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 548 >; 549 }; 550 551 pinctrl_usdhc1: usdhc1grp { 552 fsl,pins = < 553 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83 554 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3 555 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3 556 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3 557 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3 558 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3 559 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3 560 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3 561 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3 562 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3 563 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83 564 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 565 >; 566 }; 567 568 pinctrl_usdhc1_100mhz: usdhc1grp100mhz { 569 fsl,pins = < 570 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d 571 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd 572 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd 573 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd 574 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd 575 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd 576 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd 577 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd 578 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd 579 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd 580 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d 581 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 582 >; 583 }; 584 585 pinctrl_usdhc1_200mhz: usdhc1grp200mhz { 586 fsl,pins = < 587 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f 588 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf 589 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf 590 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf 591 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf 592 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf 593 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf 594 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf 595 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf 596 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf 597 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f 598 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 599 >; 600 }; 601 602 pinctrl_usdhc2: usdhc2grp { 603 fsl,pins = < 604 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80 605 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 606 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 607 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 608 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 609 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 610 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 611 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1 612 >; 613 }; 614 615 pinctrl_usdhc2_100mhz: usdhc2grp100mhz { 616 fsl,pins = < 617 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80 618 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d 619 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd 620 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd 621 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd 622 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd 623 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd 624 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1 625 >; 626 }; 627 628 pinctrl_usdhc2_200mhz: usdhc2grp200mhz { 629 fsl,pins = < 630 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80 631 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f 632 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf 633 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf 634 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf 635 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf 636 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf 637 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1 638 >; 639 }; 640 641 pinctrl_wdog: wdoggrp { 642 fsl,pins = < 643 /* nWDOG */ 644 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x1f 645 >; 646 }; 647}; 648 649&i2c1 { 650 clock-frequency = <387000>; 651 pinctrl-names = "default"; 652 pinctrl-0 = <&pinctrl_i2c1>; 653 status = "okay"; 654 655 typec_pd: usb-pd@3f { 656 compatible = "ti,tps6598x"; 657 reg = <0x3f>; 658 pinctrl-names = "default"; 659 pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>; 660 interrupt-parent = <&gpio1>; 661 interrupts = <10 IRQ_TYPE_LEVEL_LOW>; 662 interrupt-names = "irq"; 663 664 connector { 665 ports { 666 #address-cells = <1>; 667 #size-cells = <0>; 668 669 port@0 { 670 reg = <0>; 671 672 usb_con_hs: endpoint { 673 remote-endpoint = <&typec_hs>; 674 }; 675 }; 676 677 port@1 { 678 reg = <1>; 679 680 usb_con_ss: endpoint { 681 remote-endpoint = <&typec_ss>; 682 }; 683 }; 684 }; 685 }; 686 }; 687 688 pmic: pmic@4b { 689 compatible = "rohm,bd71837"; 690 reg = <0x4b>; 691 pinctrl-names = "default"; 692 pinctrl-0 = <&pinctrl_pmic>; 693 clocks = <&pmic_osc>; 694 clock-names = "osc"; 695 clock-output-names = "pmic_clk"; 696 interrupt-parent = <&gpio1>; 697 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 698 rohm,reset-snvs-powered; 699 700 regulators { 701 buck1_reg: BUCK1 { 702 regulator-name = "buck1"; 703 regulator-min-microvolt = <700000>; 704 regulator-max-microvolt = <1300000>; 705 regulator-boot-on; 706 regulator-ramp-delay = <1250>; 707 rohm,dvs-run-voltage = <900000>; 708 rohm,dvs-idle-voltage = <850000>; 709 rohm,dvs-suspend-voltage = <800000>; 710 regulator-always-on; 711 }; 712 713 buck2_reg: BUCK2 { 714 regulator-name = "buck2"; 715 regulator-min-microvolt = <700000>; 716 regulator-max-microvolt = <1300000>; 717 regulator-boot-on; 718 regulator-ramp-delay = <1250>; 719 rohm,dvs-run-voltage = <1000000>; 720 rohm,dvs-idle-voltage = <900000>; 721 regulator-always-on; 722 }; 723 724 buck3_reg: BUCK3 { 725 regulator-name = "buck3"; 726 regulator-min-microvolt = <700000>; 727 regulator-max-microvolt = <1300000>; 728 regulator-boot-on; 729 rohm,dvs-run-voltage = <900000>; 730 }; 731 732 buck4_reg: BUCK4 { 733 regulator-name = "buck4"; 734 regulator-min-microvolt = <700000>; 735 regulator-max-microvolt = <1300000>; 736 rohm,dvs-run-voltage = <1000000>; 737 }; 738 739 buck5_reg: BUCK5 { 740 regulator-name = "buck5"; 741 regulator-min-microvolt = <700000>; 742 regulator-max-microvolt = <1350000>; 743 regulator-boot-on; 744 regulator-always-on; 745 }; 746 747 buck6_reg: BUCK6 { 748 regulator-name = "buck6"; 749 regulator-min-microvolt = <3000000>; 750 regulator-max-microvolt = <3300000>; 751 regulator-boot-on; 752 regulator-always-on; 753 }; 754 755 buck7_reg: BUCK7 { 756 regulator-name = "buck7"; 757 regulator-min-microvolt = <1605000>; 758 regulator-max-microvolt = <1995000>; 759 regulator-boot-on; 760 regulator-always-on; 761 }; 762 763 buck8_reg: BUCK8 { 764 regulator-name = "buck8"; 765 regulator-min-microvolt = <800000>; 766 regulator-max-microvolt = <1400000>; 767 regulator-boot-on; 768 regulator-always-on; 769 }; 770 771 ldo1_reg: LDO1 { 772 regulator-name = "ldo1"; 773 regulator-min-microvolt = <3000000>; 774 regulator-max-microvolt = <3300000>; 775 regulator-boot-on; 776 /* leave on for snvs power button */ 777 regulator-always-on; 778 }; 779 780 ldo2_reg: LDO2 { 781 regulator-name = "ldo2"; 782 regulator-min-microvolt = <900000>; 783 regulator-max-microvolt = <900000>; 784 regulator-boot-on; 785 /* leave on for snvs power button */ 786 regulator-always-on; 787 }; 788 789 ldo3_reg: LDO3 { 790 regulator-name = "ldo3"; 791 regulator-min-microvolt = <1800000>; 792 regulator-max-microvolt = <3300000>; 793 regulator-boot-on; 794 regulator-always-on; 795 }; 796 797 ldo4_reg: LDO4 { 798 regulator-name = "ldo4"; 799 regulator-min-microvolt = <900000>; 800 regulator-max-microvolt = <1800000>; 801 regulator-boot-on; 802 regulator-always-on; 803 }; 804 805 ldo5_reg: LDO5 { 806 /* VDD_PHY_0V9 - MIPI and HDMI domains */ 807 regulator-name = "ldo5"; 808 regulator-min-microvolt = <1800000>; 809 regulator-max-microvolt = <3300000>; 810 regulator-always-on; 811 }; 812 813 ldo6_reg: LDO6 { 814 /* VDD_PHY_0V9 - MIPI, HDMI and USB domains */ 815 regulator-name = "ldo6"; 816 regulator-min-microvolt = <900000>; 817 regulator-max-microvolt = <1800000>; 818 regulator-boot-on; 819 regulator-always-on; 820 }; 821 822 ldo7_reg: LDO7 { 823 /* VDD_PHY_3V3 - USB domain */ 824 regulator-name = "ldo7"; 825 regulator-min-microvolt = <1800000>; 826 regulator-max-microvolt = <3300000>; 827 regulator-boot-on; 828 regulator-always-on; 829 }; 830 }; 831 }; 832 833 rtc@68 { 834 compatible = "microcrystal,rv4162"; 835 reg = <0x68>; 836 pinctrl-names = "default"; 837 pinctrl-0 = <&pinctrl_rtc>; 838 interrupt-parent = <&gpio1>; 839 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 840 }; 841}; 842 843&i2c2 { 844 clock-frequency = <387000>; 845 pinctrl-names = "default"; 846 pinctrl-0 = <&pinctrl_i2c2>; 847 status = "okay"; 848 849 magnetometer@1e { 850 compatible = "st,lsm9ds1-magn"; 851 reg = <0x1e>; 852 pinctrl-names = "default"; 853 pinctrl-0 = <&pinctrl_mag>; 854 interrupt-parent = <&gpio3>; 855 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; 856 vdd-supply = <®_vdd_sen>; 857 vddio-supply = <®_vdd_1v8>; 858 }; 859 860 regulator@3e { 861 compatible = "tps65132"; 862 reg = <0x3e>; 863 864 reg_lcd_avdd: outp { 865 regulator-name = "LCD_AVDD"; 866 vin-supply = <®_lcd_3v4>; 867 }; 868 869 reg_lcd_avee: outn { 870 regulator-name = "LCD_AVEE"; 871 vin-supply = <®_lcd_3v4>; 872 }; 873 }; 874 875 proximity: prox@60 { 876 compatible = "vishay,vcnl4040"; 877 reg = <0x60>; 878 pinctrl-names = "default"; 879 pinctrl-0 = <&pinctrl_prox>; 880 interrupt-parent = <&gpio3>; 881 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 882 }; 883 884 accel_gyro: accel-gyro@6a { 885 compatible = "st,lsm9ds1-imu"; 886 reg = <0x6a>; 887 vdd-supply = <®_vdd_sen>; 888 vddio-supply = <®_vdd_1v8>; 889 }; 890}; 891 892&i2c3 { 893 clock-frequency = <387000>; 894 pinctrl-names = "default"; 895 pinctrl-0 = <&pinctrl_i2c3>; 896 status = "okay"; 897 898 codec: audio-codec@1a { 899 compatible = "wlf,wm8962"; 900 reg = <0x1a>; 901 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>; 902 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>; 903 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 904 assigned-clock-rates = <24576000>; 905 #sound-dai-cells = <0>; 906 mic-cfg = <0x200>; 907 DCVDD-supply = <®_aud_1v8>; 908 DBVDD-supply = <®_aud_1v8>; 909 AVDD-supply = <®_aud_1v8>; 910 CPVDD-supply = <®_aud_1v8>; 911 MICVDD-supply = <®_aud_1v8>; 912 PLLVDD-supply = <®_aud_1v8>; 913 SPKVDD1-supply = <®_vsys_3v4>; 914 SPKVDD2-supply = <®_vsys_3v4>; 915 gpio-cfg = < 916 0x0000 /* n/c */ 917 0x0001 /* gpio2, 1: default */ 918 0x0013 /* gpio3, 2: dmicclk */ 919 0x0000 /* n/c, 3: default */ 920 0x8014 /* gpio5, 4: dmic_dat */ 921 0x0000 /* gpio6, 5: default */ 922 >; 923 }; 924 925 backlight@36 { 926 compatible = "ti,lm36922"; 927 reg = <0x36>; 928 pinctrl-names = "default"; 929 pinctrl-0 = <&pinctrl_bl>; 930 #address-cells = <1>; 931 #size-cells = <0>; 932 enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 933 vled-supply = <®_vsys_3v4>; 934 ti,ovp-microvolt = <25000000>; 935 936 led_backlight: led@0 { 937 reg = <0>; 938 label = ":backlight"; 939 linux,default-trigger = "backlight"; 940 led-max-microamp = <20000>; 941 }; 942 }; 943 944 touchscreen@38 { 945 compatible = "edt,edt-ft5506"; 946 reg = <0x38>; 947 pinctrl-names = "default"; 948 pinctrl-0 = <&pinctrl_touch>; 949 interrupt-parent = <&gpio1>; 950 interrupts = <27 IRQ_TYPE_EDGE_FALLING>; 951 touchscreen-size-x = <720>; 952 touchscreen-size-y = <1440>; 953 vcc-supply = <®_lcd_1v8>; 954 }; 955}; 956 957&i2c4 { 958 clock-frequency = <387000>; 959 pinctrl-names = "default"; 960 pinctrl-0 = <&pinctrl_i2c4>; 961 status = "okay"; 962 963 bat: fuel-gauge@36 { 964 compatible = "maxim,max17055"; 965 reg = <0x36>; 966 interrupt-parent = <&gpio3>; 967 interrupts = <20 IRQ_TYPE_LEVEL_LOW>; 968 pinctrl-names = "default"; 969 pinctrl-0 = <&pinctrl_gauge>; 970 maxim,over-heat-temp = <700>; 971 maxim,over-volt = <4500>; 972 maxim,rsns-microohm = <5000>; 973 }; 974 975 bq25895: charger@6a { 976 compatible = "ti,bq25895", "ti,bq25890"; 977 reg = <0x6a>; 978 pinctrl-names = "default"; 979 pinctrl-0 = <&pinctrl_charger_in>; 980 interrupt-parent = <&gpio3>; 981 interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 982 phys = <&usb3_phy0>; 983 ti,precharge-current = <130000>; /* uA */ 984 ti,minimum-sys-voltage = <3700000>; /* uV */ 985 ti,boost-voltage = <5000000>; /* uV */ 986 ti,boost-max-current = <500000>; /* uA */ 987 ti,use-vinmin-threshold = <1>; /* enable VINDPM */ 988 ti,vinmin-threshold = <3900000>; /* uV */ 989 monitored-battery = <&bat>; 990 power-supplies = <&typec_pd>; 991 }; 992}; 993 994&lcdif { 995 status = "okay"; 996}; 997 998&mipi_dsi { 999 #address-cells = <1>; 1000 #size-cells = <0>; 1001 status = "okay"; 1002 1003 lcd_panel: panel@0 { 1004 compatible = "mantix,mlaf057we51-x"; 1005 reg = <0>; 1006 pinctrl-names = "default"; 1007 pinctrl-0 = <&pinctrl_dsirst>; 1008 avdd-supply = <®_lcd_avdd>; 1009 avee-supply = <®_lcd_avee>; 1010 vddi-supply = <®_lcd_1v8>; 1011 backlight = <&backlight_dsi>; 1012 reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; 1013 1014 port { 1015 panel_in: endpoint { 1016 remote-endpoint = <&mipi_dsi_out>; 1017 }; 1018 }; 1019 }; 1020 1021 ports { 1022 port@1 { 1023 reg = <1>; 1024 1025 mipi_dsi_out: endpoint { 1026 remote-endpoint = <&panel_in>; 1027 }; 1028 }; 1029 }; 1030}; 1031 1032&pgc_gpu { 1033 power-supply = <&buck3_reg>; 1034}; 1035 1036&pgc_mipi { 1037 power-supply = <&ldo5_reg>; 1038}; 1039 1040&pgc_vpu { 1041 power-supply = <&buck4_reg>; 1042}; 1043 1044&pwm1 { 1045 pinctrl-names = "default"; 1046 pinctrl-0 = <&pinctrl_haptic>; 1047 status = "okay"; 1048}; 1049 1050&pwm2 { 1051 pinctrl-names = "default"; 1052 pinctrl-0 = <&pinctrl_led_b>; 1053 status = "okay"; 1054}; 1055 1056&pwm3 { 1057 pinctrl-names = "default"; 1058 pinctrl-0 = <&pinctrl_led_g>; 1059 status = "okay"; 1060}; 1061 1062&pwm4 { 1063 pinctrl-names = "default"; 1064 pinctrl-0 = <&pinctrl_led_r>; 1065 status = "okay"; 1066}; 1067 1068&sai2 { 1069 pinctrl-names = "default"; 1070 pinctrl-0 = <&pinctrl_sai2>; 1071 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>; 1072 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 1073 assigned-clock-rates = <24576000>; 1074 status = "okay"; 1075}; 1076 1077&sai6 { 1078 pinctrl-names = "default"; 1079 pinctrl-0 = <&pinctrl_sai6>; 1080 assigned-clocks = <&clk IMX8MQ_CLK_SAI6>; 1081 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 1082 assigned-clock-rates = <24576000>; 1083 fsl,sai-synchronous-rx; 1084 status = "okay"; 1085}; 1086 1087&snvs_pwrkey { 1088 status = "okay"; 1089}; 1090 1091&snvs_rtc { 1092 status = "disabled"; 1093}; 1094 1095&uart1 { /* console */ 1096 pinctrl-names = "default"; 1097 pinctrl-0 = <&pinctrl_uart1>; 1098 status = "okay"; 1099}; 1100 1101&uart2 { /* TPS - GPS - DEBUG */ 1102 pinctrl-names = "default"; 1103 pinctrl-0 = <&pinctrl_uart2>; 1104 status = "okay"; 1105 1106 gnss { 1107 compatible = "globaltop,pa6h"; 1108 vcc-supply = <®_gnss>; 1109 current-speed = <9600>; 1110 }; 1111}; 1112 1113&uart3 { /* SMC */ 1114 pinctrl-names = "default"; 1115 pinctrl-0 = <&pinctrl_uart3>; 1116 status = "okay"; 1117}; 1118 1119&uart4 { /* BT */ 1120 pinctrl-names = "default"; 1121 pinctrl-0 = <&pinctrl_uart4>; 1122 uart-has-rtscts; 1123 status = "okay"; 1124}; 1125 1126&usb3_phy0 { 1127 status = "okay"; 1128}; 1129 1130&usb3_phy1 { 1131 vbus-supply = <®_hub>; 1132 status = "okay"; 1133}; 1134 1135&usb_dwc3_0 { 1136 #address-cells = <1>; 1137 #size-cells = <0>; 1138 dr_mode = "otg"; 1139 snps,dis_u3_susphy_quirk; 1140 status = "okay"; 1141 1142 port@0 { 1143 reg = <0>; 1144 1145 typec_hs: endpoint { 1146 remote-endpoint = <&usb_con_hs>; 1147 }; 1148 }; 1149 1150 port@1 { 1151 reg = <1>; 1152 1153 typec_ss: endpoint { 1154 remote-endpoint = <&usb_con_ss>; 1155 }; 1156 }; 1157}; 1158 1159&usb_dwc3_1 { 1160 dr_mode = "host"; 1161 status = "okay"; 1162 #address-cells = <1>; 1163 #size-cells = <0>; 1164 1165 /* Microchip USB2642 */ 1166 hub@1 { 1167 compatible = "usb424,2640"; 1168 reg = <1>; 1169 #address-cells = <1>; 1170 #size-cells = <0>; 1171 1172 mass-storage@1 { 1173 compatible = "usb424,4041"; 1174 reg = <1>; 1175 }; 1176 }; 1177}; 1178 1179&usdhc1 { 1180 assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>; 1181 assigned-clock-rates = <400000000>; 1182 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 1183 pinctrl-0 = <&pinctrl_usdhc1>; 1184 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 1185 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 1186 bus-width = <8>; 1187 vmmc-supply = <®_vdd_3v3>; 1188 power-supply = <®_vdd_1v8>; 1189 non-removable; 1190 status = "okay"; 1191}; 1192 1193&usdhc2 { 1194 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>; 1195 assigned-clock-rates = <200000000>; 1196 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 1197 pinctrl-0 = <&pinctrl_usdhc2>; 1198 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 1199 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 1200 bus-width = <4>; 1201 vmmc-supply = <®_wifi_3v3>; 1202 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 1203 disable-wp; 1204 cap-sdio-irq; 1205 keep-power-in-suspend; 1206 wakeup-source; 1207 status = "okay"; 1208}; 1209 1210&wdog1 { 1211 pinctrl-names = "default"; 1212 pinctrl-0 = <&pinctrl_wdog>; 1213 fsl,ext-reset-output; 1214 status = "okay"; 1215}; 1216