1 /*
2  * Copyright ©  2014 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sub license, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the
13  * next paragraph) shall be included in all copies or substantial portions
14  * of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *     Midhunchandra Kodiyath <midhunchandra.kodiyath@intel.com>
26  *
27  */
28 
29 #include "media_drv_kernels.h"
30 #include "media_drv_hw.h"
31 #include "media_drv_hw_g75.h"
32 #include "media_drv_gpe_utils.h"
33 #include "media_drv_defines.h"
34 #include "media_drv_common.h"
35 #include "media_drv_surface.h"
36 #include "media_drv_render.h"
37 #include <va/va_enc_vp8.h>
38 #include <math.h>
39 
40 //#define DEBUG
41 struct hw_codec_info gen75_hw_codec_info = {
42   .max_width = 4096,
43   .max_height = 4096,
44   .vp8_enc_hybrid_support = 1,
45   .tiled_surface = 1,
46   .vp8_enc_hybrid_support=1,
47   .vp9_dec_hybrid_support = 1,
48   .ratecontrol= VA_RC_CBR | VA_RC_CQP | VA_RC_VBR,
49   .render_init = media_drv_gen75_render_init,
50  };
51 
52 const SURFACE_SET_PARAMS surface_set_params_init = {
53   0,				//vert_line_stride_offset
54   0,				//vert_line_stride
55   0,				//pitch
56   0,				//tiling
57   0,				//format
58   0,				//offset
59   0,				//size
60   FALSE,			//surface_is_2d
61   FALSE,			//surface_is_uv_2d
62   FALSE,			//surface_is_raw
63   FALSE,			//media_block_raw
64   FALSE,			//advance_state
65   FALSE,			//writable
66   0,				//uv_direction
67   0,				//cacheability_control
68   0,				// binding_table_offset
69   0,				//surface_state_offset
70   {NULL, 0, 0, 0, 0, 0, 0, NULL, 0, 0, 0, 0},	// binding_surface_state
71   NULL,				//surface_2d
72   {NULL, 0, 0, 0, 0, 0, 0, NULL, 0, 0, 0, 0}	//buf_object
73 };
74 
75 MEDIA_KERNEL media_hybrid_vp8_kernels[] = {
76   {
77    (BYTE *) "VP8_MBENC_I",
78    0,
79    MEDIA_VP8_MBENC_I,
80    MEDIA_VP8_MBENC_I_SZ,
81    NULL,
82    0},
83   {
84    (BYTE *) "VP8_MBENC_ICHROMA",
85    0,
86    MEDIA_VP8_MBENC_ICHROMA,
87    MEDIA_VP8_MBENC_ICHROMA_SZ,
88    NULL,
89    0},
90   {
91    (BYTE *) "VP8_MBENC_FRM_P",
92    0,
93    MEDIA_VP8_MBENC_FRM_P,
94    MEDIA_VP8_MBENC_FRM_P_SZ,
95    NULL,
96    0},
97   {
98    (BYTE *) "VP8_MBENC_ILuma",
99    0,
100    MEDIA_VP8_MBENC_ILuma,
101    MEDIA_VP8_MBENC_ILuma_SZ,
102    NULL,
103    0},
104   {
105    (BYTE *) "VP8_INTRA_DIS_BRC",
106    0,
107    MEDIA_VP8_INTRA_DIS_BRC,
108    MEDIA_VP8_INTRA_DIS_BRC_SZ,
109    NULL,
110    0},
111   {
112    (BYTE *) "VP8_HME_P",
113    0,
114    MEDIA_VP8_HME_P,
115    MEDIA_VP8_HME_P_SZ,
116    NULL,
117    0},
118   {
119    (BYTE *) "VP8_HME_DOWNSCALE",
120    0,
121    MEDIA_VP8_HME_DOWNSCALE,
122    MEDIA_VP8_HME_DOWNSCALE_SZ,
123    NULL,
124    0},
125 
126   {
127    (BYTE *) "VP8_PAK_PHASE2",
128    0,
129    MEDIA_VP8_PAK_PHASE2,
130    MEDIA_VP8_PAK_PHASE2_SZ,
131    NULL,
132    0},
133   {
134    (BYTE *) "VP8_PAK_PHASE1",
135    0,
136    MEDIA_VP8_PAK_PHASE1,
137    MEDIA_VP8_PAK_PHASE1_SZ,
138    NULL,
139    0},
140   {
141    (BYTE *) "VP8_BRC_INIT",
142    0,
143    MEDIA_VP8_BRC_INIT,
144    MEDIA_VP8_BRC_INIT_SZ,
145    NULL,
146    0},
147 
148   {
149    (BYTE *) "VP8_BRC_RESET",
150    0,
151    MEDIA_VP8_BRC_RESET,
152    MEDIA_VP8_BRC_RESET_SZ,
153    NULL,
154    0},
155 
156   {
157    (BYTE *) "VP8_BRC_UPDATE",
158    0,
159    MEDIA_VP8_BRC_UPDATE,
160    MEDIA_VP8_BRC_UPDATE_SZ,
161    NULL,
162    0}
163 
164 };
165 
166 const SURFACE_STATE_ADV_G7 SURFACE_STATE_ADV_INIT_G7 = {
167   //dw0
168   {0},
169   {
170 //dw1
171    0,
172    0,
173    0,
174    0},
175   {
176 //dw2
177    0,
178    FALSE,
179    FALSE,
180    0,
181    0,
182    0,
183    FALSE,
184    0,
185    0},
186   {
187 //dw3
188    0,
189    0,
190    0,
191    0},
192   {
193 //dw4
194    0,
195    0,
196    0,
197    0},
198 //dw5
199   {0},
200   //dw6
201   {0},
202 //dw7
203   {0}
204 };
205 
206 const SURFACE_STATE_G7 SURFACE_STATE_INIT_G7 = {
207   //dw0
208   {
209    FALSE,			// cube_pos_z:1;
210    FALSE,			//cube_neg_z:1
211    FALSE,			//cube_pos_y:1
212    FALSE,			//cube_neg_y:1
213    FALSE,			//cube_pos_x:1
214    FALSE,			//cube_neg_x:1
215    0,				// media_boundry_pix_mode:2
216    0,				//render_cache_read_write:1
217    0,				//reserved0
218    1,				//surface_array_spacing:1
219    0,				//vert_line_stride_ofs:1
220    0,				//vert_line_stride:1
221    0,				//tile_walk:1
222    FALSE,			//tiled_surface:1;
223    0,				//horizontal_alignment:1;
224    0,				//vertical_alignment:2;
225    STATE_SURFACEFORMAT_R8_UNORM,	// surface_format:9;
226    0,				//min_mag_state_not_eq:1;
227    FALSE,			//surface_array:1;
228    1				//MEDIA_SURFACE_2D  // surface_type:3;
229    },
230 
231   //dw1
232   {
233    0},
234 
235   //dw22
236   {
237    0,
238    0},
239 
240   //dw3
241   {
242    0,
243    0},
244 
245   //dw4
246   {
247    0,
248    0,
249    0,
250    0,
251    0,
252    0},
253 
254   //dw5
255   {
256    0,
257    0,
258    0,
259    0,
260    0,
261    0,
262    0},
263 
264   //dw6
265   {
266    0,
267    0},
268 
269   //dw7
270   {
271    0,
272    0,
273    HSW_SCS_ALPHA,
274    HSW_SCS_BLUE,
275    HSW_SCS_GREEN,
276    HSW_SCS_RED,
277    0,
278    0,
279    0,
280    0}
281 };
282 
283 const UINT16 quant_dc_vp8_g75[MAX_QP_VP8] = {
284   4, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 16, 17, 17,
285   18, 19, 20, 20, 21, 21, 22, 22, 23, 23, 24, 25, 25, 26, 27, 28,
286   29, 30, 31, 32, 33, 34, 35, 36, 37, 37, 38, 39, 40, 41, 42, 43,
287   44, 45, 46, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
288   59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
289   75, 76, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
290   91, 93, 95, 96, 98, 100, 101, 102, 104, 106, 108, 110, 112, 114, 116, 118,
291   122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 143, 145, 148, 151, 154,
292   157
293 };
294 
295 const UINT16 quant_ac_vp8_g75[MAX_QP_VP8] = {
296   4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
297   20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
298   36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,
299   52, 53, 54, 55, 56, 57, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76,
300   78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108,
301   110, 112, 114, 116, 119, 122, 125, 128, 131, 134, 137, 140, 143, 146, 149,
302   152,
303   155, 158, 161, 164, 167, 170, 173, 177, 181, 185, 189, 193, 197, 201, 205,
304   209,
305   213, 217, 221, 225, 229, 234, 239, 245, 249, 254, 259, 264, 269, 274, 279,
306   284
307 };
308 
309 const UINT16 quant_dc2_vp8_g75[MAX_QP_VP8] = {
310   8, 10, 12, 14, 16, 18, 20, 20, 22, 24, 26, 28, 30, 32, 34, 34,
311   36, 38, 40, 40, 42, 42, 44, 44, 46, 46, 48, 50, 50, 52, 54, 56,
312   58, 60, 62, 64, 66, 68, 70, 72, 74, 74, 76, 78, 80, 82, 84, 86,
313   88, 90, 92, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116,
314   118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 142, 144, 146,
315   148,
316   150, 152, 152, 154, 156, 158, 160, 162, 164, 166, 168, 170, 172, 174, 176,
317   178,
318   182, 186, 190, 192, 196, 200, 202, 204, 208, 212, 216, 220, 224, 228, 232,
319   236,
320   244, 248, 252, 256, 260, 264, 268, 272, 276, 280, 286, 290, 296, 302, 308,
321   314
322 };
323 
324 const UINT16 quant_ac2_vp8_g75[MAX_QP_VP8] = {
325   8, 8, 9, 10, 12, 13, 15, 17, 18, 20, 21, 23, 24, 26, 27, 29,
326   31, 32, 34, 35, 37, 38, 40, 41, 43, 44, 46, 48, 49, 51, 52, 54,
327   55, 57, 58, 60, 62, 63, 65, 66, 68, 69, 71, 72, 74, 75, 77, 79,
328   80, 82, 83, 85, 86, 88, 89, 93, 96, 99, 102, 105, 108, 111, 114, 117,
329   120, 124, 127, 130, 133, 136, 139, 142, 145, 148, 151, 155, 158, 161, 164,
330   167,
331   170, 173, 176, 179, 184, 189, 193, 198, 203, 207, 212, 217, 221, 226, 230,
332   235,
333   240, 244, 249, 254, 258, 263, 268, 274, 280, 286, 292, 299, 305, 311, 317,
334   323,
335   330, 336, 342, 348, 354, 362, 370, 379, 385, 393, 401, 409, 416, 424, 432,
336   440
337 };
338 
339 const UINT16 quant_dc_uv_vp8_g75[MAX_QP_VP8] = {
340   4, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 16, 17, 17,
341   18, 19, 20, 20, 21, 21, 22, 22, 23, 23, 24, 25, 25, 26, 27, 28,
342   29, 30, 31, 32, 33, 34, 35, 36, 37, 37, 38, 39, 40, 41, 42, 43,
343   44, 45, 46, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
344   59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
345   75, 76, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
346   91, 93, 95, 96, 98, 100, 101, 102, 104, 106, 108, 110, 112, 114, 116, 118,
347   122, 124, 126, 128, 130, 132, 132, 132, 132, 132, 132, 132, 132, 132, 132,
348   132
349 };
350 
351 const BYTE frame_i_vme_cost_vp8_g75[128][4] = {
352   {0x05, 0x1f, 0x02, 0x09},
353   {0x05, 0x1f, 0x02, 0x09},
354   {0x08, 0x2b, 0x03, 0x0e},
355   {0x08, 0x2b, 0x03, 0x0e},
356   {0x0a, 0x2f, 0x04, 0x12},
357   {0x0a, 0x2f, 0x04, 0x12},
358   {0x0d, 0x39, 0x05, 0x17},
359   {0x0d, 0x39, 0x05, 0x17},
360   {0x0d, 0x39, 0x05, 0x17},
361   {0x0f, 0x3b, 0x06, 0x1b},
362   {0x0f, 0x3b, 0x06, 0x1b},
363   {0x19, 0x3d, 0x07, 0x20},
364   {0x19, 0x3d, 0x07, 0x20},
365   {0x1a, 0x3f, 0x08, 0x24},
366   {0x1a, 0x3f, 0x08, 0x24},
367   {0x1a, 0x3f, 0x08, 0x24},
368   {0x1b, 0x48, 0x09, 0x29},
369   {0x1b, 0x48, 0x09, 0x29},
370   {0x1d, 0x49, 0x09, 0x2d},
371   {0x1d, 0x49, 0x09, 0x2d},
372   {0x1d, 0x49, 0x09, 0x2d},
373   {0x1d, 0x49, 0x09, 0x2d},
374   {0x1e, 0x4a, 0x0a, 0x32},
375   {0x1e, 0x4a, 0x0a, 0x32},
376   {0x1e, 0x4a, 0x0a, 0x32},
377   {0x1e, 0x4a, 0x0a, 0x32},
378   {0x1f, 0x4b, 0x0b, 0x36},
379   {0x1f, 0x4b, 0x0b, 0x36},
380   {0x1f, 0x4b, 0x0b, 0x36},
381   {0x28, 0x4c, 0x0c, 0x3b},
382   {0x28, 0x4c, 0x0c, 0x3b},
383   {0x29, 0x4d, 0x0d, 0x3f},
384   {0x29, 0x4d, 0x0d, 0x3f},
385   {0x29, 0x4e, 0x0e, 0x44},
386   {0x29, 0x4e, 0x0e, 0x44},
387   {0x2a, 0x4f, 0x0f, 0x48},
388   {0x2a, 0x4f, 0x0f, 0x48},
389   {0x2b, 0x58, 0x10, 0x4d},
390   {0x2b, 0x58, 0x10, 0x4d},
391   {0x2b, 0x58, 0x11, 0x51},
392   {0x2b, 0x58, 0x11, 0x51},
393   {0x2b, 0x58, 0x11, 0x51},
394   {0x2c, 0x58, 0x12, 0x56},
395   {0x2c, 0x58, 0x12, 0x56},
396   {0x2c, 0x59, 0x13, 0x5a},
397   {0x2c, 0x59, 0x13, 0x5a},
398   {0x2d, 0x59, 0x14, 0x5f},
399   {0x2d, 0x59, 0x14, 0x5f},
400   {0x2e, 0x5a, 0x15, 0x63},
401   {0x2e, 0x5a, 0x15, 0x63},
402   {0x2e, 0x5a, 0x16, 0x68},
403   {0x2e, 0x5a, 0x16, 0x68},
404   {0x2e, 0x5a, 0x16, 0x68},
405   {0x2f, 0x5b, 0x17, 0x6c},
406   {0x2f, 0x5b, 0x17, 0x6c},
407   {0x38, 0x5b, 0x18, 0x71},
408   {0x38, 0x5b, 0x18, 0x71},
409   {0x38, 0x5c, 0x19, 0x76},
410   {0x38, 0x5c, 0x19, 0x76},
411   {0x38, 0x5c, 0x1a, 0x7a},
412   {0x38, 0x5c, 0x1a, 0x7a},
413   {0x39, 0x5d, 0x1a, 0x7f},
414   {0x39, 0x5d, 0x1a, 0x7f},
415   {0x39, 0x5d, 0x1b, 0x83},
416   {0x39, 0x5d, 0x1b, 0x83},
417   {0x39, 0x5e, 0x1c, 0x88},
418   {0x39, 0x5e, 0x1c, 0x88},
419   {0x3a, 0x5e, 0x1d, 0x8c},
420   {0x3a, 0x5e, 0x1d, 0x8c},
421   {0x3a, 0x5f, 0x1e, 0x91},
422   {0x3a, 0x5f, 0x1e, 0x91},
423   {0x3a, 0x5f, 0x1f, 0x95},
424   {0x3a, 0x5f, 0x1f, 0x95},
425   {0x3a, 0x68, 0x20, 0x9a},
426   {0x3a, 0x68, 0x20, 0x9a},
427   {0x3b, 0x68, 0x21, 0x9e},
428   {0x3b, 0x68, 0x21, 0x9e},
429   {0x3b, 0x68, 0x22, 0xa3},
430   {0x3b, 0x68, 0x22, 0xa3},
431   {0x3b, 0x68, 0x23, 0xa7},
432   {0x3b, 0x68, 0x23, 0xa7},
433   {0x3c, 0x68, 0x24, 0xac},
434   {0x3c, 0x68, 0x24, 0xac},
435   {0x3c, 0x68, 0x24, 0xac},
436   {0x3c, 0x69, 0x25, 0xb0},
437   {0x3c, 0x69, 0x25, 0xb0},
438   {0x3c, 0x69, 0x26, 0xb5},
439   {0x3c, 0x69, 0x26, 0xb5},
440   {0x3d, 0x69, 0x27, 0xb9},
441   {0x3d, 0x69, 0x27, 0xb9},
442   {0x3d, 0x69, 0x28, 0xbe},
443   {0x3d, 0x69, 0x28, 0xbe},
444   {0x3d, 0x6a, 0x29, 0xc2},
445   {0x3d, 0x6a, 0x29, 0xc2},
446   {0x3e, 0x6a, 0x2a, 0xc7},
447   {0x3e, 0x6a, 0x2a, 0xc7},
448   {0x3e, 0x6a, 0x2b, 0xcb},
449   {0x3e, 0x6a, 0x2b, 0xd0},
450   {0x3f, 0x6b, 0x2c, 0xd4},
451   {0x3f, 0x6b, 0x2d, 0xd9},
452   {0x3f, 0x6b, 0x2e, 0xdd},
453   {0x48, 0x6b, 0x2f, 0xe2},
454   {0x48, 0x6b, 0x2f, 0xe2},
455   {0x48, 0x6c, 0x30, 0xe6},
456   {0x48, 0x6c, 0x31, 0xeb},
457   {0x48, 0x6c, 0x32, 0xf0},
458   {0x48, 0x6c, 0x33, 0xf4},
459   {0x48, 0x6c, 0x34, 0xf9},
460   {0x49, 0x6d, 0x35, 0xfd},
461   {0x49, 0x6d, 0x36, 0xff},
462   {0x49, 0x6d, 0x37, 0xff},
463   {0x49, 0x6d, 0x38, 0xff},
464   {0x49, 0x6e, 0x3a, 0xff},
465   {0x49, 0x6e, 0x3b, 0xff},
466   {0x4a, 0x6e, 0x3c, 0xff},
467   {0x4a, 0x6f, 0x3d, 0xff},
468   {0x4a, 0x6f, 0x3d, 0xff},
469   {0x4a, 0x6f, 0x3e, 0xff},
470   {0x4a, 0x6f, 0x3f, 0xff},
471   {0x4a, 0x6f, 0x40, 0xff},
472   {0x4b, 0x78, 0x41, 0xff},
473   {0x4b, 0x78, 0x42, 0xff},
474   {0x4b, 0x78, 0x43, 0xff},
475   {0x4b, 0x78, 0x44, 0xff},
476   {0x4b, 0x78, 0x46, 0xff},
477   {0x4c, 0x78, 0x47, 0xff},
478   {0x4c, 0x79, 0x49, 0xff},
479   {0x4c, 0x79, 0x4a, 0xff}
480 };
481 
482 const UINT cost_table_vp8_g75[128][7] = {
483   {0x398f0500, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x0b0a0907, 0x08, 0x0e},
484   {0x3b8f0600, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x0b0a0907, 0x0a, 0x11},
485   {0x3e8f0700, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x0b0a0907, 0x0c, 0x14},
486   {0x488f0800, 0x6f6f6f6f, 0x0000006f, 0x06040402, 0x0b0a0907, 0x0f, 0x18},
487   {0x498f0a00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x1b1a190e, 0x11, 0x1b},
488   {0x4a8f0b00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x1b1a190e, 0x13, 0x1e},
489   {0x4b8f0c00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x1b1a190e, 0x15, 0x22},
490   {0x4b8f0c00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x1b1a190e, 0x15, 0x22},
491   {0x4d8f0d00, 0x6f6f6f6f, 0x0000006f, 0x0d080805, 0x1b1a190e, 0x17, 0x25},
492   {0x4e8f0e00, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x281f1e1a, 0x19, 0x29},
493   {0x4f8f0f00, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x281f1e1a, 0x1b, 0x2c},
494   {0x588f1800, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x281f1e1a, 0x1d, 0x2f},
495   {0x588f1900, 0x6f6f6f6f, 0x0000006f, 0x190b0c07, 0x281f1e1a, 0x1f, 0x33},
496   {0x598f1900, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x2b2a291e, 0x21, 0x36},
497   {0x5a8f1a00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x2b2a291e, 0x23, 0x3a},
498   {0x5a8f1a00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x2b2a291e, 0x23, 0x3a},
499   {0x5a8f1a00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x2b2a291e, 0x25, 0x3d},
500   {0x5b8f1b00, 0x6f6f6f6f, 0x0000006f, 0x1c0f0f0a, 0x2b2a291e, 0x27, 0x40},
501   {0x5b8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x2d2c2b29, 0x2a, 0x44},
502   {0x5b8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x2d2c2b29, 0x2a, 0x44},
503   {0x5c8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x2d2c2b29, 0x2c, 0x47},
504   {0x5c8f1c00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x2d2c2b29, 0x2c, 0x47},
505   {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x2d2c2b29, 0x2e, 0x4a},
506   {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x2d2c2b29, 0x2e, 0x4a},
507   {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x2d2c2b29, 0x30, 0x4e},
508   {0x5d8f1d00, 0x6f6f6f6f, 0x0000006f, 0x2819190c, 0x2d2c2b29, 0x30, 0x4e},
509   {0x5e8f1e00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x382f2e2a, 0x32, 0x51},
510   {0x5e8f1f00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x382f2e2a, 0x34, 0x55},
511   {0x5e8f1f00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x382f2e2a, 0x34, 0x55},
512   {0x5f8f1f00, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x382f2e2a, 0x36, 0x58},
513   {0x688f2800, 0x6f6f6f6f, 0x0000006f, 0x291b1b0f, 0x382f2e2a, 0x38, 0x5b},
514   {0x688f2800, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x3938382c, 0x3a, 0x5f},
515   {0x688f2800, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x3938382c, 0x3c, 0x62},
516   {0x688f2900, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x3938382c, 0x3e, 0x65},
517   {0x698f2900, 0x6f6f6f6f, 0x0000006f, 0x2b1d1d18, 0x3938382c, 0x40, 0x69},
518   {0x698f2900, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x3b3a392e, 0x43, 0x6c},
519   {0x698f2900, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x3b3a392e, 0x45, 0x70},
520   {0x6a8f2a00, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x3b3a392e, 0x47, 0x73},
521   {0x6a8f2a00, 0x6f6f6f6f, 0x0000006f, 0x2c1f1f19, 0x3b3a392e, 0x49, 0x76},
522   {0x6a8f2a00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x3c3b3a38, 0x4b, 0x7a},
523   {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x3c3b3a38, 0x4d, 0x7d},
524   {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x3c3b3a38, 0x4d, 0x7d},
525   {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x3c3b3a38, 0x4f, 0x81},
526   {0x6b8f2b00, 0x6f6f6f6f, 0x0000006f, 0x2e28281b, 0x3c3b3a38, 0x51, 0x84},
527   {0x6b8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x3d3c3b38, 0x53, 0x87},
528   {0x6c8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x3d3c3b38, 0x55, 0x8b},
529   {0x6c8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x3d3c3b38, 0x57, 0x8e},
530   {0x6c8f2c00, 0x6f6f6f6f, 0x0000006f, 0x2f29291c, 0x3d3c3b38, 0x59, 0x91},
531   {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x3f3e3c39, 0x5b, 0x95},
532   {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x3f3e3c39, 0x5e, 0x98},
533   {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x3f3e3c39, 0x60, 0x9c},
534   {0x6d8f2d00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x3f3e3c39, 0x60, 0x9c},
535   {0x6d8f2e00, 0x6f6f6f6f, 0x0000006f, 0x382a2a1d, 0x3f3e3c39, 0x62, 0x9f},
536   {0x6e8f2e00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x483f3e3a, 0x64, 0xa2},
537   {0x6e8f2e00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x483f3e3a, 0x66, 0xa6},
538   {0x6e8f2e00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x483f3e3a, 0x68, 0xa9},
539   {0x6f8f2f00, 0x6f6f6f6f, 0x0000006f, 0x392b2b1e, 0x483f3e3a, 0x6a, 0xad},
540   {0x6f8f2f00, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x48483f3b, 0x6c, 0xb0},
541   {0x6f8f2f00, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x48483f3b, 0x6e, 0xb3},
542   {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x48483f3b, 0x70, 0xb7},
543   {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3a2c2c1f, 0x48483f3b, 0x72, 0xba},
544   {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x4948483c, 0x74, 0xbd},
545   {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x4948483c, 0x76, 0xc1},
546   {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x4948483c, 0x79, 0xc4},
547   {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2d2d28, 0x4948483c, 0x7b, 0xc8},
548   {0x788f3800, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x4a49483d, 0x7d, 0xcb},
549   {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x4a49483d, 0x7f, 0xce},
550   {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x4a49483d, 0x81, 0xd2},
551   {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3b2e2e29, 0x4a49483d, 0x83, 0xd5},
552   {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x4a4a493e, 0x85, 0xd9},
553   {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x4a4a493e, 0x87, 0xdc},
554   {0x798f3900, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x4a4a493e, 0x89, 0xdf},
555   {0x798f3a00, 0x6f6f6f6f, 0x0000006f, 0x3c2f2f29, 0x4a4a493e, 0x8b, 0xe3},
556   {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x4b4a493f, 0x8d, 0xe6},
557   {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x4b4a493f, 0x8f, 0xe9},
558   {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x4b4a493f, 0x91, 0xed},
559   {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3d38382a, 0x4b4a493f, 0x94, 0xf0},
560   {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x4c4b4a48, 0x96, 0xf4},
561   {0x7a8f3a00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x4c4b4a48, 0x98, 0xf7},
562   {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x4c4b4a48, 0x9a, 0xfa},
563   {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3e38382b, 0x4c4b4a48, 0x9c, 0xfe},
564   {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x4d4c4b48, 0x9e, 0xff},
565   {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x4d4c4b48, 0x9e, 0xff},
566   {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x4d4c4b48, 0xa0, 0xff},
567   {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x4d4c4b48, 0xa2, 0xff},
568   {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f38392b, 0x4d4c4b48, 0xa4, 0xff},
569   {0x7b8f3b00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x4d4c4b48, 0xa6, 0xff},
570   {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x4d4c4b48, 0xa8, 0xff},
571   {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x4d4c4b48, 0xaa, 0xff},
572   {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x3f39392c, 0x4d4c4b48, 0xac, 0xff},
573   {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x4e4d4c49, 0xaf, 0xff},
574   {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x4e4d4c49, 0xb1, 0xff},
575   {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x4e4d4c49, 0xb3, 0xff},
576   {0x7c8f3c00, 0x6f6f6f6f, 0x0000006f, 0x48393a2c, 0x4e4d4c49, 0xb5, 0xff},
577   {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x483a3a2d, 0x4f4d4c49, 0xb7, 0xff},
578   {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x483a3a2d, 0x4f4d4c49, 0xb9, 0xff},
579   {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x483a3a2d, 0x4f4d4c49, 0xbd, 0xff},
580   {0x7d8f3d00, 0x6f6f6f6f, 0x0000006f, 0x493a3b2e, 0x4f4e4d4a, 0xc1, 0xff},
581   {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493a3b2e, 0x4f4e4d4a, 0xc5, 0xff},
582   {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493b3b2e, 0x584f4e4a, 0xc8, 0xff},
583   {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493b3b2e, 0x584f4e4a, 0xcc, 0xff},
584   {0x7e8f3e00, 0x6f6f6f6f, 0x0000006f, 0x493b3c2f, 0x584f4e4b, 0xd0, 0xff},
585   {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x493b3c2f, 0x584f4e4b, 0xd2, 0xff},
586   {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x493b3c2f, 0x584f4e4b, 0xd4, 0xff},
587   {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x4a3c3c2f, 0x58584f4b, 0xd8, 0xff},
588   {0x7f8f3f00, 0x6f6f6f6f, 0x0000006f, 0x4a3c3c2f, 0x58584f4b, 0xdc, 0xff},
589   {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4a3c3d38, 0x59584f4c, 0xe0, 0xff},
590   {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4a3c3d38, 0x59584f4c, 0xe5, 0xff},
591   {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3d38, 0x5958584c, 0xe9, 0xff},
592   {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3d38, 0x5958584c, 0xed, 0xff},
593   {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3e38, 0x5959584c, 0xf1, 0xff},
594   {0x888f4800, 0x6f6f6f6f, 0x0000006f, 0x4b3d3e38, 0x5959584c, 0xf5, 0xff},
595   {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4b3e3e39, 0x5a59584d, 0xfe, 0xff},
596   {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3e3e39, 0x5a59594d, 0xff, 0xff},
597   {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3e3e39, 0x5a59594d, 0xff, 0xff},
598   {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3f3f39, 0x5a5a594e, 0xff, 0xff},
599   {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4c3f3f39, 0x5a5a594e, 0xff, 0xff},
600   {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4d3f3f3a, 0x5b5a594e, 0xff, 0xff},
601   {0x898f4900, 0x6f6f6f6f, 0x0000006f, 0x4d3f3f3a, 0x5b5a594e, 0xff, 0xff},
602   {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x5b5a594f, 0xff, 0xff},
603   {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x5b5a594f, 0xff, 0xff},
604   {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x5b5b5a4f, 0xff, 0xff},
605   {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4d48483a, 0x5b5b5a4f, 0xff, 0xff},
606   {0x8a8f4a00, 0x6f6f6f6f, 0x0000006f, 0x4e48483a, 0x5c5b5a58, 0xff, 0xff},
607   {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4e48483b, 0x5c5b5a58, 0xff, 0xff},
608   {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4e48483b, 0x5c5b5a58, 0xff, 0xff},
609   {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4f48493b, 0x5d5c5b58, 0xff, 0xff},
610   {0x8b8f4b00, 0x6f6f6f6f, 0x0000006f, 0x4f49493b, 0x5d5c5b58, 0xff, 0xff}
611 };
612 
613 const UINT new_mv_skip_threshold_VP8_g75[128] = {
614   111, 120, 129, 137, 146, 155, 163, 172, 180, 189, 198, 206, 215, 224, 232,
615   241,
616   249, 258, 267, 275, 284, 293, 301, 310, 318, 327, 336, 344, 353, 362, 370,
617   379,
618   387, 396, 405, 413, 422, 431, 439, 448, 456, 465, 474, 482, 491, 500, 508,
619   517,
620   525, 534, 543, 551, 560, 569, 577, 586, 594, 603, 612, 620, 629, 638, 646,
621   655,
622   663, 672, 681, 689, 698, 707, 715, 724, 733, 741, 750, 758, 767, 776, 784,
623   793,
624   802, 810, 819, 827, 836, 845, 853, 862, 871, 879, 888, 896, 905, 914, 922,
625   931,
626   940, 948, 957, 965, 974, 983, 991, 1000, 1009, 1017, 1026, 1034, 1043, 1052,
627   1060, 1069,
628   1078, 1086, 1095, 1103, 1112, 1121, 1129, 1138, 1147, 1155, 1164, 1172,
629   1181, 1190, 1198, 1208
630 };
631 
632 const UINT single_su_vp8_g75[14] = {
633   0x00000000, 0x00000000, 0x00000000, 0x00000000,
634   0x00000000, 0x00000000, 0x00000000, 0x00000000,
635   0x00000000, 0x00000000, 0x00000000, 0x00000000,
636   0x00000000, 0x00000000
637 };
638 
639 const BYTE fullspiral_48x40_vp8_g75[56] = {
640   0x0F, 0xF0, 0x01, 0x01,
641   0x10, 0x10, 0x0F, 0x0F,
642   0x0F, 0xF0, 0xF0, 0xF0,
643   0x01, 0x01, 0x01, 0x01,
644   0x10, 0x10, 0x10, 0x10,
645   0x0F, 0x0F, 0x0F, 0x0F,
646   0x0F, 0xF0, 0xF0, 0xF0,
647   0xF0, 0x0F, 0x01, 0x01,
648   0x01, 0x01, 0x01, 0x01,
649   0x10, 0x10, 0x10, 0x10,
650   0x10, 0x10, 0x0F, 0x0F,
651   0x0F, 0x0F, 0x0F, 0x0F,
652   0x0F, 0xF0, 0xF0, 0xF0,
653   0xF0, 0xF0, 0xF0, 0xF0
654 };
655 
656 const BYTE rasterscan_48x40_vp8_g75[56] = {
657   0x11, 0x01, 0x01, 0x01,
658   0x11, 0x01, 0x01, 0x01,
659   0x11, 0x01, 0x01, 0x01,
660   0x11, 0x01, 0x01, 0x01,
661   0x11, 0x01, 0x01, 0x01,
662   0x01, 0x01, 0x01, 0x01,
663   0x00, 0x01, 0x01, 0x01,
664   0x00, 0x00, 0x00, 0x00,
665   0x00, 0x00, 0x00, 0x00,
666   0x00, 0x00, 0x00, 0x00,
667   0x00, 0x00, 0x00, 0x00,
668   0x00, 0x00, 0x00, 0x00,
669   0x00, 0x00, 0x00, 0x00,
670   0x00, 0x00, 0x00, 0x00
671 };
672 
673 const BYTE diamond_vp8_g75[56] = {
674   0x0F, 0xF1, 0x0F, 0x12,	//5
675   0x0D, 0xE2, 0x22, 0x1E,	//9
676   0x10, 0xFF, 0xE2, 0x20,	//13
677   0xFC, 0x06, 0xDD,		//16
678   0x2E, 0xF1, 0x3F, 0xD3, 0x11, 0x3D, 0xF3, 0x1F,	//24
679   0xEB, 0xF1, 0xF1, 0xF1,	//28
680   0x4E, 0x11, 0x12, 0xF2, 0xF1,	//33
681   0xE0, 0xFF, 0xFF, 0x0D, 0x1F, 0x1F,	//39
682   0x20, 0x11, 0xCF, 0xF1, 0x05, 0x11,	//45
683   0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	//51
684   0x00, 0x00, 0x00, 0x00, 0x00, 0x00
685 };
686 
687 
688 const UINT16 mv_ref_cost_context_vp8_g75[6][4][2] = {
689   {{1328, 10},
690    {2047, 1},
691    {2047, 1},
692    {214, 304},
693    },
694   {{1072, 21},
695    {979, 27},
696    {1072, 21},
697    {321, 201},
698    },
699   {{235, 278},
700    {511, 107},
701    {553, 93},
702    {488, 115},
703    },
704   {{534, 99},
705    {560, 92},
706    {255, 257},
707    {505, 109},
708    },
709   {{174, 361},
710    {238, 275},
711    {255, 257},
712    {744, 53},
713    },
714   {{32, 922},
715    {113, 494},
716    {255, 257},
717    {816, 43},
718    },
719 };
720 
721 static const UINT16 mb_mode_cost_luma_vp8_g75[10] =
722   { 657, 869, 915, 917, 208, 0, 0, 0, 0, 0 };
723 
724 static const UINT16 block_mode_cost_vp8_g75[10][10][10] = {
725   {
726    {37, 1725, 1868, 1151, 1622, 2096, 2011, 1770, 2218, 2128},
727    {139, 759, 1683, 911, 1455, 1846, 1570, 1295, 1792, 1648},
728    {560, 1383, 408, 639, 1612, 1174, 1562, 1736, 847, 991},
729    {191, 1293, 1299, 466, 1774, 1840, 1784, 1691, 1698, 1505},
730    {211, 1624, 1294, 779, 714, 1622, 2222, 1554, 1706, 903},
731    {297, 1259, 1098, 1062, 1583, 618, 1053, 1889, 851, 1127},
732    {275, 703, 1356, 1111, 1597, 1075, 656, 1529, 1531, 1275},
733    {150, 1046, 1760, 1039, 1353, 1981, 2174, 728, 1730, 1379},
734    {516, 1414, 741, 1045, 1495, 738, 1288, 1619, 442, 1200},
735    {424, 1365, 706, 825, 1197, 1453, 1191, 1462, 1186, 519},
736 
737    },
738   {
739    {393, 515, 1491, 549, 1598, 1524, 964, 1126, 1651, 2172},
740    {693, 237, 1954, 641, 1525, 2073, 1183, 971, 1973, 2235},
741    {560, 739, 855, 836, 1224, 1115, 966, 839, 1076, 767},
742    {657, 368, 1406, 425, 1672, 1853, 1210, 1125, 1969, 1542},
743    {321, 1056, 1776, 774, 803, 3311, 1265, 1177, 1366, 636},
744    {693, 510, 949, 877, 1049, 658, 882, 1178, 1515, 1111},
745    {744, 377, 1278, 958, 1576, 1168, 477, 1146, 1838, 1501},
746    {488, 477, 1767, 973, 1107, 1511, 1773, 486, 1527, 1449},
747    {744, 1004, 695, 1012, 1326, 834, 1215, 774, 724, 704},
748    {522, 567, 1036, 1082, 1039, 1333, 873, 1135, 1189, 677},
749 
750    },
751   {
752    {103, 1441, 1000, 864, 1513, 1928, 1832, 1916, 1663, 1567},
753    {304, 872, 1100, 515, 1416, 1417, 3463, 1051, 1305, 1227},
754    {684, 2176, 242, 729, 1867, 1496, 2056, 1544, 1038, 930},
755    {534, 1198, 669, 300, 1805, 1377, 2165, 1894, 1249, 1153},
756    {346, 1602, 1178, 612, 997, 3381, 1335, 1328, 997, 646},
757    {393, 1027, 649, 813, 1276, 945, 1545, 1278, 875, 1031},
758    {528, 996, 930, 617, 1086, 1190, 621, 2760, 787, 1347},
759    {216, 873, 1595, 738, 1339, 3896, 3898, 743, 1343, 1605},
760    {675, 1580, 543, 749, 1859, 1245, 1589, 2377, 384, 1075},
761    {594, 1163, 415, 684, 1474, 1080, 1491, 1478, 1077, 801},
762    },
763   {
764    {238, 1131, 1483, 398, 1510, 1651, 1495, 1545, 1970, 2090},
765    {499, 456, 1499, 449, 1558, 1691, 1272, 969, 2114, 2116},
766    {675, 1386, 318, 645, 1449, 1588, 1666, 1925, 979, 859},
767    {467, 957, 1223, 238, 1825, 1704, 1608, 1560, 1665, 1376},
768    {331, 1460, 1238, 627, 787, 1882, 3928, 1544, 1897, 579},
769    {457, 1038, 903, 784, 1158, 725, 955, 1517, 842, 1016},
770    {505, 497, 1131, 812, 1508, 1206, 703, 1072, 1254, 1256},
771    {397, 741, 1336, 642, 1506, 1852, 1340, 599, 1854, 1000},
772    {625, 1212, 597, 750, 1291, 1057, 1401, 1401, 527, 954},
773    {499, 1041, 654, 752, 1299, 1217, 1605, 1424, 1377, 505},
774    },
775   {
776    {263, 1094, 1218, 602, 938, 1487, 1231, 1016, 1724, 1448},
777    {452, 535, 1728, 562, 1008, 1471, 1473, 873, 3182, 1136},
778    {553, 1570, 935, 1093, 826, 1339, 879, 1007, 1006, 476},
779    {365, 900, 1050, 582, 866, 1398, 1236, 1123, 1608, 1039},
780    {294, 2044, 1790, 1143, 430, 1642, 3688, 1549, 2080, 704},
781    {703, 1210, 958, 815, 1211, 960, 623, 2455, 815, 559},
782    {675, 574, 862, 1261, 866, 864, 761, 1267, 1014, 936},
783    {342, 1254, 1857, 989, 612, 1856, 1858, 553, 1840, 1037},
784    {553, 1316, 811, 1072, 1068, 728, 1328, 1317, 1064, 475},
785    {288, 1303, 1167, 1167, 823, 1634, 1636, 2497, 1294, 491},
786    },
787   {
788    {227, 1059, 1369, 1066, 1505, 740, 970, 1511, 972, 1775},
789    {516, 587, 1033, 646, 1188, 748, 978, 1445, 1294, 1450},
790    {684, 1048, 663, 747, 1126, 826, 1386, 1128, 635, 924},
791    {494, 814, 933, 510, 1606, 951, 878, 1344, 1031, 1347},
792    {553, 1071, 1327, 726, 809, 3376, 1330, 1324, 1062, 407},
793    {625, 1120, 988, 1121, 1197, 347, 1064, 1308, 862, 1206},
794    {633, 853, 1657, 1073, 1662, 634, 460, 1405, 811, 1155},
795    {505, 621, 1394, 876, 1394, 876, 878, 795, 878, 1399},
796    {684, 1302, 968, 1704, 1280, 561, 972, 1713, 387, 1104},
797    {397, 1447, 1060, 867, 957, 1058, 749, 1475, 1210, 660},
798    },
799   {
800    {331, 933, 1647, 761, 1647, 998, 513, 1402, 1461, 2219},
801    {573, 485, 1968, 641, 1570, 1198, 588, 1086, 1382, 1982},
802    {790, 942, 570, 790, 1607, 1005, 938, 1193, 714, 751},
803    {511, 745, 1152, 492, 1878, 1206, 596, 1867, 1617, 1157},
804    {452, 1308, 896, 896, 451, 1308, 3354, 1301, 1306, 794},
805    {693, 670, 1072, 1020, 1687, 566, 488, 1432, 1096, 3142},
806    {778, 566, 1993, 1283, 3139, 1251, 227, 1378, 1784, 1447},
807    {393, 937, 1091, 934, 939, 1348, 1092, 579, 1351, 1095},
808    {560, 1013, 1007, 1014, 1011, 644, 1165, 1155, 605, 1016},
809    {567, 627, 997, 793, 2562, 998, 849, 1260, 922, 748},
810    },
811   {
812    {338, 762, 1868, 717, 1247, 1757, 1263, 535, 1751, 2162},
813    {488, 442, 3235, 756, 1658, 1814, 1264, 528, 1857, 2119},
814    {522, 1087, 840, 1103, 843, 1354, 1098, 888, 946, 588},
815    {483, 688, 1502, 651, 1213, 1446, 1397, 491, 1908, 1253},
816    {452, 1386, 1910, 1175, 298, 1507, 3553, 930, 1904, 905},
817    {713, 839, 716, 715, 932, 719, 931, 848, 3088, 1042},
818    {516, 495, 1331, 1340, 1331, 1069, 665, 702, 1593, 1337},
819    {401, 977, 2167, 1537, 1069, 1764, 3810, 259, 3624, 1578},
820    {560, 1104, 601, 1371, 965, 658, 2704, 779, 967, 969},
821    {547, 1057, 801, 1141, 1133, 1397, 937, 605, 1252, 631},
822    },
823   {
824    {163, 1240, 925, 983, 1653, 1321, 1353, 1566, 946, 1601},
825    {401, 726, 758, 836, 1241, 926, 1656, 795, 1394, 1396},
826    {905, 1073, 366, 876, 1436, 1576, 1732, 2432, 459, 1019},
827    {594, 922, 835, 417, 1387, 1124, 1098, 2042, 843, 1023},
828    {415, 1262, 860, 1274, 758, 1272, 3318, 1010, 1276, 503},
829    {641, 1018, 1020, 1095, 1619, 667, 1371, 2348, 397, 849},
830    {560, 817, 903, 1014, 1420, 695, 756, 904, 821, 1421},
831    {406, 596, 1001, 993, 1257, 1258, 1260, 746, 1002, 1264},
832    {979, 1371, 780, 1188, 1693, 1024, 1286, 1699, 183, 1405},
833    {733, 1292, 458, 884, 1554, 889, 1151, 1286, 738, 740},
834    },
835   {
836    {109, 1377, 1177, 933, 1140, 1928, 1639, 1705, 1861, 1292},
837    {342, 570, 1081, 638, 1154, 1231, 1339, 1342, 1750, 1494},
838    {560, 1203, 345, 767, 1325, 1681, 1425, 1905, 1205, 786},
839    {406, 1027, 1011, 410, 1306, 1901, 1389, 1636, 1493, 776},
840    {206, 1329, 1337, 1037, 802, 1600, 3646, 1451, 1603, 693},
841    {472, 1167, 758, 911, 1424, 703, 2749, 1428, 703, 764},
842    {342, 780, 1139, 889, 1290, 1139, 781, 1544, 957, 1042},
843    {227, 888, 1039, 929, 988, 3753, 1707, 818, 1710, 1306},
844    {767, 1055, 627, 725, 1312, 980, 1065, 1324, 599, 811},
845    {304, 1372, 888, 1173, 979, 1578, 1580, 1974, 1318, 482},
846    }
847 };
848 
849 const BYTE brc_qpadjustment_distthreshold_maxframethreshold_distqpadjustment_IPB_vp8_g75[576] =
850 {
851   0x01, 0x03, 0x05, 0x07, 0x09, 0x01, 0x02, 0x03, 0x05, 0x07, 0x00, 0x00, 0x01, 0x02, 0x04, 0x00,
852   0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0xfb, 0xfc,
853   0xfe, 0xff, 0x00, 0xf9, 0xfa, 0xfc, 0xfe, 0xff, 0xf7, 0xf9, 0xfb, 0xfe, 0xff, 0x00, 0x04, 0x1e,
854   0x3c, 0x50, 0x78, 0x8c, 0xc8, 0xff, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00,
855   0x01, 0x02, 0x05, 0x08, 0x0a, 0x01, 0x02, 0x04, 0x06, 0x08, 0x00, 0x01, 0x02, 0x04, 0x06, 0x00,
856   0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xfe, 0xff, 0xff, 0x00, 0x00, 0xfd, 0xfe,
857   0xff, 0xff, 0x00, 0xfb, 0xfd, 0xfe, 0xff, 0x00, 0xf9, 0xfa, 0xfc, 0xfe, 0xff, 0x00, 0x04, 0x1e,
858   0x3c, 0x50, 0x78, 0x8c, 0xc8, 0xff, 0x04, 0x05, 0x06, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
859   0x01, 0x02, 0x05, 0x08, 0x0a, 0x01, 0x02, 0x04, 0x06, 0x08, 0x00, 0x01, 0x02, 0x04, 0x06, 0x00,
860   0x00, 0x00, 0x01, 0x02, 0xff, 0x00, 0x00, 0x00, 0x01, 0xfe, 0xff, 0xff, 0x00, 0x00, 0xfd, 0xfe,
861   0xff, 0xff, 0x00, 0xfb, 0xfd, 0xfe, 0xff, 0x00, 0xf9, 0xfa, 0xfc, 0xfe, 0xff, 0x00, 0x02, 0x14,
862   0x28, 0x46, 0x82, 0xa0, 0xc8, 0xff, 0x04, 0x05, 0x06, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
863   0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x06, 0x08, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05,
864   0x07, 0x09, 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x04, 0x06, 0x07, 0xfe, 0xff, 0x00, 0x00, 0x00,
865   0x01, 0x02, 0x03, 0x05, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfc, 0xfe, 0xff,
866   0x00, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfb, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfa,
867   0xfc, 0xfe, 0xff, 0x00, 0x00, 0x01, 0x03, 0x05, 0xfa, 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x01, 0x03,
868   0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
869   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
870   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
871   0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05,
872   0x06, 0x08, 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x08, 0xfe, 0xff, 0x00, 0x00, 0x00,
873   0x02, 0x04, 0x05, 0x06, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff,
874   0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x04, 0x05, 0xfc,
875   0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x05, 0xfb, 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01,
876   0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
877   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
878   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
879   0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05,
880   0x06, 0x08, 0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x05, 0x07, 0x08, 0xfe, 0xff, 0x00, 0x00, 0x00,
881   0x02, 0x04, 0x05, 0x06, 0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff,
882   0x00, 0x00, 0x00, 0x01, 0x04, 0x05, 0xfc, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x04, 0x05, 0xfc,
883   0xfd, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01, 0x05, 0xfb, 0xfc, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x01,
884   0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
885   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
886   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
887 };
888 
889 const BYTE brc_iframe_cost_table_vp8_g75 [512] = /* 128 * 4 */
890 {
891   0x5,
892   0x5,
893   0x8,
894   0x8,
895   0xa,
896   0xa,
897   0xd,
898   0xd,
899   0xd,
900   0xf,
901   0xf,
902   0x19,
903   0x19,
904   0x1a,
905   0x1a,
906   0x1a,
907   0x1b,
908   0x1b,
909   0x1d,
910   0x1d,
911   0x1d,
912   0x1d,
913   0x1e,
914   0x1e,
915   0x1e,
916   0x1e,
917   0x1f,
918   0x1f,
919   0x1f,
920   0x28,
921   0x28,
922   0x29,
923   0x29,
924   0x29,
925   0x29,
926   0x2a,
927   0x2a,
928   0x2b,
929   0x2b,
930   0x2b,
931   0x2b,
932   0x2b,
933   0x2c,
934   0x2c,
935   0x2c,
936   0x2c,
937   0x2d,
938   0x2d,
939   0x2e,
940   0x2e,
941   0x2e,
942   0x2e,
943   0x2e,
944   0x2f,
945   0x2f,
946   0x38,
947   0x38,
948   0x38,
949   0x38,
950   0x38,
951   0x38,
952   0x39,
953   0x39,
954   0x39,
955   0x39,
956   0x39,
957   0x39,
958   0x3a,
959   0x3a,
960   0x3a,
961   0x3a,
962   0x3a,
963   0x3a,
964   0x3a,
965   0x3a,
966   0x3b,
967   0x3b,
968   0x3b,
969   0x3b,
970   0x3b,
971   0x3b,
972   0x3c,
973   0x3c,
974   0x3c,
975   0x3c,
976   0x3c,
977   0x3c,
978   0x3c,
979   0x3d,
980   0x3d,
981   0x3d,
982   0x3d,
983   0x3d,
984   0x3d,
985   0x3e,
986   0x3e,
987   0x3e,
988   0x3e,
989   0x3f,
990   0x3f,
991   0x3f,
992   0x48,
993   0x48,
994   0x48,
995   0x48,
996   0x48,
997   0x48,
998   0x48,
999   0x49,
1000   0x49,
1001   0x49,
1002   0x49,
1003   0x49,
1004   0x49,
1005   0x4a,
1006   0x4a,
1007   0x4a,
1008   0x4a,
1009   0x4a,
1010   0x4a,
1011   0x4b,
1012   0x4b,
1013   0x4b,
1014   0x4b,
1015   0x4b,
1016   0x4c,
1017   0x4c,
1018   0x4c,
1019   0x1f,
1020   0x1f,
1021   0x2b,
1022   0x2b,
1023   0x2f,
1024   0x2f,
1025   0x39,
1026   0x39,
1027   0x39,
1028   0x3b,
1029   0x3b,
1030   0x3d,
1031   0x3d,
1032   0x3f,
1033   0x3f,
1034   0x3f,
1035   0x48,
1036   0x48,
1037   0x49,
1038   0x49,
1039   0x49,
1040   0x49,
1041   0x4a,
1042   0x4a,
1043   0x4a,
1044   0x4a,
1045   0x4b,
1046   0x4b,
1047   0x4b,
1048   0x4c,
1049   0x4c,
1050   0x4d,
1051   0x4d,
1052   0x4e,
1053   0x4e,
1054   0x4f,
1055   0x4f,
1056   0x58,
1057   0x58,
1058   0x58,
1059   0x58,
1060   0x58,
1061   0x58,
1062   0x58,
1063   0x59,
1064   0x59,
1065   0x59,
1066   0x59,
1067   0x5a,
1068   0x5a,
1069   0x5a,
1070   0x5a,
1071   0x5a,
1072   0x5b,
1073   0x5b,
1074   0x5b,
1075   0x5b,
1076   0x5c,
1077   0x5c,
1078   0x5c,
1079   0x5c,
1080   0x5d,
1081   0x5d,
1082   0x5d,
1083   0x5d,
1084   0x5e,
1085   0x5e,
1086   0x5e,
1087   0x5e,
1088   0x5f,
1089   0x5f,
1090   0x5f,
1091   0x5f,
1092   0x68,
1093   0x68,
1094   0x68,
1095   0x68,
1096   0x68,
1097   0x68,
1098   0x68,
1099   0x68,
1100   0x68,
1101   0x68,
1102   0x68,
1103   0x69,
1104   0x69,
1105   0x69,
1106   0x69,
1107   0x69,
1108   0x69,
1109   0x69,
1110   0x69,
1111   0x6a,
1112   0x6a,
1113   0x6a,
1114   0x6a,
1115   0x6a,
1116   0x6a,
1117   0x6b,
1118   0x6b,
1119   0x6b,
1120   0x6b,
1121   0x6b,
1122   0x6c,
1123   0x6c,
1124   0x6c,
1125   0x6c,
1126   0x6c,
1127   0x6d,
1128   0x6d,
1129   0x6d,
1130   0x6d,
1131   0x6e,
1132   0x6e,
1133   0x6e,
1134   0x6f,
1135   0x6f,
1136   0x6f,
1137   0x6f,
1138   0x6f,
1139   0x78,
1140   0x78,
1141   0x78,
1142   0x78,
1143   0x78,
1144   0x78,
1145   0x79,
1146   0x79,
1147   0x2,
1148   0x2,
1149   0x3,
1150   0x3,
1151   0x4,
1152   0x4,
1153   0x5,
1154   0x5,
1155   0x5,
1156   0x6,
1157   0x6,
1158   0x7,
1159   0x7,
1160   0x8,
1161   0x8,
1162   0x8,
1163   0x9,
1164   0x9,
1165   0x9,
1166   0x9,
1167   0x9,
1168   0x9,
1169   0xa,
1170   0xa,
1171   0xa,
1172   0xa,
1173   0xb,
1174   0xb,
1175   0xb,
1176   0xc,
1177   0xc,
1178   0xd,
1179   0xd,
1180   0xe,
1181   0xe,
1182   0xf,
1183   0xf,
1184   0x10,
1185   0x10,
1186   0x11,
1187   0x11,
1188   0x11,
1189   0x12,
1190   0x12,
1191   0x13,
1192   0x13,
1193   0x14,
1194   0x14,
1195   0x15,
1196   0x15,
1197   0x16,
1198   0x16,
1199   0x16,
1200   0x17,
1201   0x17,
1202   0x18,
1203   0x18,
1204   0x19,
1205   0x19,
1206   0x1a,
1207   0x1a,
1208   0x1a,
1209   0x1a,
1210   0x1b,
1211   0x1b,
1212   0x1c,
1213   0x1c,
1214   0x1d,
1215   0x1d,
1216   0x1e,
1217   0x1e,
1218   0x1f,
1219   0x1f,
1220   0x20,
1221   0x20,
1222   0x21,
1223   0x21,
1224   0x22,
1225   0x22,
1226   0x23,
1227   0x23,
1228   0x24,
1229   0x24,
1230   0x24,
1231   0x25,
1232   0x25,
1233   0x26,
1234   0x26,
1235   0x27,
1236   0x27,
1237   0x28,
1238   0x28,
1239   0x29,
1240   0x29,
1241   0x2a,
1242   0x2a,
1243   0x2b,
1244   0x2b,
1245   0x2c,
1246   0x2d,
1247   0x2e,
1248   0x2f,
1249   0x2f,
1250   0x30,
1251   0x31,
1252   0x32,
1253   0x33,
1254   0x34,
1255   0x35,
1256   0x36,
1257   0x37,
1258   0x38,
1259   0x3a,
1260   0x3b,
1261   0x3c,
1262   0x3d,
1263   0x3d,
1264   0x3e,
1265   0x3f,
1266   0x40,
1267   0x41,
1268   0x42,
1269   0x43,
1270   0x44,
1271   0x46,
1272   0x47,
1273   0x49,
1274   0x4a,
1275   0x9,
1276   0x9,
1277   0xe,
1278   0xe,
1279   0x12,
1280   0x12,
1281   0x17,
1282   0x17,
1283   0x17,
1284   0x1b,
1285   0x1b,
1286   0x20,
1287   0x20,
1288   0x24,
1289   0x24,
1290   0x24,
1291   0x29,
1292   0x29,
1293   0x2d,
1294   0x2d,
1295   0x2d,
1296   0x2d,
1297   0x32,
1298   0x32,
1299   0x32,
1300   0x32,
1301   0x36,
1302   0x36,
1303   0x36,
1304   0x3b,
1305   0x3b,
1306   0x3f,
1307   0x3f,
1308   0x44,
1309   0x44,
1310   0x48,
1311   0x48,
1312   0x4d,
1313   0x4d,
1314   0x51,
1315   0x51,
1316   0x51,
1317   0x56,
1318   0x56,
1319   0x5a,
1320   0x5a,
1321   0x5f,
1322   0x5f,
1323   0x63,
1324   0x63,
1325   0x68,
1326   0x68,
1327   0x68,
1328   0x6c,
1329   0x6c,
1330   0x71,
1331   0x71,
1332   0x76,
1333   0x76,
1334   0x7a,
1335   0x7a,
1336   0x7f,
1337   0x7f,
1338   0x83,
1339   0x83,
1340   0x88,
1341   0x88,
1342   0x8c,
1343   0x8c,
1344   0x91,
1345   0x91,
1346   0x95,
1347   0x95,
1348   0x9a,
1349   0x9a,
1350   0x9e,
1351   0x9e,
1352   0xa3,
1353   0xa3,
1354   0xa7,
1355   0xa7,
1356   0xac,
1357   0xac,
1358   0xac,
1359   0xb0,
1360   0xb0,
1361   0xb5,
1362   0xb5,
1363   0xb9,
1364   0xb9,
1365   0xbe,
1366   0xbe,
1367   0xc2,
1368   0xc2,
1369   0xc7,
1370   0xc7,
1371   0xcb,
1372   0xd0,
1373   0xd4,
1374   0xd9,
1375   0xdd,
1376   0xe2,
1377   0xe2,
1378   0xe6,
1379   0xeb,
1380   0xf0,
1381   0xf4,
1382   0xf9,
1383   0xfd,
1384   0x2,
1385   0x6,
1386   0xb,
1387   0x14,
1388   0x18,
1389   0x1d,
1390   0x21,
1391   0x26,
1392   0x2a,
1393   0x2f,
1394   0x33,
1395   0x38,
1396   0x3c,
1397   0x41,
1398   0x45,
1399   0x4e,
1400   0x53,
1401   0x5c,
1402   0x61
1403 };
1404 
1405 const UINT brc_pframe_cost_table_vp8_g75[256] =
1406 {
1407   0x06040402,
1408   0x06040402,
1409   0x06040402,
1410   0x06040402,
1411   0x0d080805,
1412   0x0d080805,
1413   0x0d080805,
1414   0x0d080805,
1415   0x0d080805,
1416   0x190b0c07,
1417   0x190b0c07,
1418   0x190b0c07,
1419   0x190b0c07,
1420   0x1c0f0f0a,
1421   0x1c0f0f0a,
1422   0x1c0f0f0a,
1423   0x1c0f0f0a,
1424   0x1c0f0f0a,
1425   0x2819190c,
1426   0x2819190c,
1427   0x2819190c,
1428   0x2819190c,
1429   0x2819190c,
1430   0x2819190c,
1431   0x2819190c,
1432   0x2819190c,
1433   0x291b1b0f,
1434   0x291b1b0f,
1435   0x291b1b0f,
1436   0x291b1b0f,
1437   0x291b1b0f,
1438   0x2b1d1d18,
1439   0x2b1d1d18,
1440   0x2b1d1d18,
1441   0x2b1d1d18,
1442   0x2c1f1f19,
1443   0x2c1f1f19,
1444   0x2c1f1f19,
1445   0x2c1f1f19,
1446   0x2e28281b,
1447   0x2e28281b,
1448   0x2e28281b,
1449   0x2e28281b,
1450   0x2e28281b,
1451   0x2f29291c,
1452   0x2f29291c,
1453   0x2f29291c,
1454   0x2f29291c,
1455   0x382a2a1d,
1456   0x382a2a1d,
1457   0x382a2a1d,
1458   0x382a2a1d,
1459   0x382a2a1d,
1460   0x392b2b1e,
1461   0x392b2b1e,
1462   0x392b2b1e,
1463   0x392b2b1e,
1464   0x3a2c2c1f,
1465   0x3a2c2c1f,
1466   0x3a2c2c1f,
1467   0x3a2c2c1f,
1468   0x3b2d2d28,
1469   0x3b2d2d28,
1470   0x3b2d2d28,
1471   0x3b2d2d28,
1472   0x3b2e2e29,
1473   0x3b2e2e29,
1474   0x3b2e2e29,
1475   0x3b2e2e29,
1476   0x3c2f2f29,
1477   0x3c2f2f29,
1478   0x3c2f2f29,
1479   0x3c2f2f29,
1480   0x3d38382a,
1481   0x3d38382a,
1482   0x3d38382a,
1483   0x3d38382a,
1484   0x3e38382b,
1485   0x3e38382b,
1486   0x3e38382b,
1487   0x3e38382b,
1488   0x3f38392b,
1489   0x3f38392b,
1490   0x3f38392b,
1491   0x3f38392b,
1492   0x3f38392b,
1493   0x3f39392c,
1494   0x3f39392c,
1495   0x3f39392c,
1496   0x3f39392c,
1497   0x48393a2c,
1498   0x48393a2c,
1499   0x48393a2c,
1500   0x48393a2c,
1501   0x483a3a2d,
1502   0x483a3a2d,
1503   0x483a3a2d,
1504   0x493a3b2e,
1505   0x493a3b2e,
1506   0x493b3b2e,
1507   0x493b3b2e,
1508   0x493b3c2f,
1509   0x493b3c2f,
1510   0x493b3c2f,
1511   0x4a3c3c2f,
1512   0x4a3c3c2f,
1513   0x4a3c3d38,
1514   0x4a3c3d38,
1515   0x4b3d3d38,
1516   0x4b3d3d38,
1517   0x4b3d3e38,
1518   0x4b3d3e38,
1519   0x4b3e3e39,
1520   0x4c3e3e39,
1521   0x4c3e3e39,
1522   0x4c3f3f39,
1523   0x4c3f3f39,
1524   0x4d3f3f3a,
1525   0x4d3f3f3a,
1526   0x4d48483a,
1527   0x4d48483a,
1528   0x4d48483a,
1529   0x4d48483a,
1530   0x4e48483a,
1531   0x4e48483b,
1532   0x4e48483b,
1533   0x4f48493b,
1534   0x4f49493b,
1535   0x0b0a0907,
1536   0x0b0a0907,
1537   0x0b0a0907,
1538   0x0b0a0907,
1539   0x1b1a190e,
1540   0x1b1a190e,
1541   0x1b1a190e,
1542   0x1b1a190e,
1543   0x1b1a190e,
1544   0x281f1e1a,
1545   0x281f1e1a,
1546   0x281f1e1a,
1547   0x281f1e1a,
1548   0x2b2a291e,
1549   0x2b2a291e,
1550   0x2b2a291e,
1551   0x2b2a291e,
1552   0x2b2a291e,
1553   0x2d2c2b29,
1554   0x2d2c2b29,
1555   0x2d2c2b29,
1556   0x2d2c2b29,
1557   0x2d2c2b29,
1558   0x2d2c2b29,
1559   0x2d2c2b29,
1560   0x2d2c2b29,
1561   0x382f2e2a,
1562   0x382f2e2a,
1563   0x382f2e2a,
1564   0x382f2e2a,
1565   0x382f2e2a,
1566   0x3938382c,
1567   0x3938382c,
1568   0x3938382c,
1569   0x3938382c,
1570   0x3b3a392e,
1571   0x3b3a392e,
1572   0x3b3a392e,
1573   0x3b3a392e,
1574   0x3c3b3a38,
1575   0x3c3b3a38,
1576   0x3c3b3a38,
1577   0x3c3b3a38,
1578   0x3c3b3a38,
1579   0x3d3c3b38,
1580   0x3d3c3b38,
1581   0x3d3c3b38,
1582   0x3d3c3b38,
1583   0x3f3e3c39,
1584   0x3f3e3c39,
1585   0x3f3e3c39,
1586   0x3f3e3c39,
1587   0x3f3e3c39,
1588   0x483f3e3a,
1589   0x483f3e3a,
1590   0x483f3e3a,
1591   0x483f3e3a,
1592   0x48483f3b,
1593   0x48483f3b,
1594   0x48483f3b,
1595   0x48483f3b,
1596   0x4948483c,
1597   0x4948483c,
1598   0x4948483c,
1599   0x4948483c,
1600   0x4a49483d,
1601   0x4a49483d,
1602   0x4a49483d,
1603   0x4a49483d,
1604   0x4a4a493e,
1605   0x4a4a493e,
1606   0x4a4a493e,
1607   0x4a4a493e,
1608   0x4b4a493f,
1609   0x4b4a493f,
1610   0x4b4a493f,
1611   0x4b4a493f,
1612   0x4c4b4a48,
1613   0x4c4b4a48,
1614   0x4c4b4a48,
1615   0x4c4b4a48,
1616   0x4d4c4b48,
1617   0x4d4c4b48,
1618   0x4d4c4b48,
1619   0x4d4c4b48,
1620   0x4d4c4b48,
1621   0x4d4c4b48,
1622   0x4d4c4b48,
1623   0x4d4c4b48,
1624   0x4d4c4b48,
1625   0x4e4d4c49,
1626   0x4e4d4c49,
1627   0x4e4d4c49,
1628   0x4e4d4c49,
1629   0x4f4d4c49,
1630   0x4f4d4c49,
1631   0x4f4d4c49,
1632   0x4f4e4d4a,
1633   0x4f4e4d4a,
1634   0x584f4e4a,
1635   0x584f4e4a,
1636   0x584f4e4b,
1637   0x584f4e4b,
1638   0x584f4e4b,
1639   0x58584f4b,
1640   0x58584f4b,
1641   0x59584f4c,
1642   0x59584f4c,
1643   0x5958584c,
1644   0x5958584c,
1645   0x5959584c,
1646   0x5959584c,
1647   0x5a59584d,
1648   0x5a59594d,
1649   0x5a59594d,
1650   0x5a5a594e,
1651   0x5a5a594e,
1652   0x5b5a594e,
1653   0x5b5a594e,
1654   0x5b5a594f,
1655   0x5b5a594f,
1656   0x5b5b5a4f,
1657   0x5b5b5a4f,
1658   0x5c5b5a58,
1659   0x5c5b5a58,
1660   0x5c5b5a58,
1661   0x5d5c5b58,
1662   0x5d5c5b58
1663 };
1664 
1665 const UINT16 brc_skip_mv_threshold_table_vp8_g75 [128] =
1666 {
1667   111,  120,  129,  137,  146,  155,  163,  172,  180,  189,  198,  206,  215,  224,  232,  241,
1668   249,  258,  267,  275,  284,  293,  301,  310,  318,  327,  336,  344,  353,  362,  370,  379,
1669   387,  396,  405,  413,  422,  431,  439,  448,  456,  465,  474,  482,  491,  500,  508,  517,
1670   525,  534,  543,  551,  560,  569,  577,  586,  594,  603,  612,  620,  629,  638,  646,  655,
1671   663,  672,  681,  689,  698,  707,  715,  724,  733,  741,  750,  758,  767,  776,  784,  793,
1672   802,  810,  819,  827,  836,  845,  853,  862,  871,  879,  888,  896,  905,  914,  922,  931,
1673   940,  948,  957,  965,  974,  983,  991, 1000, 1009, 1017, 1026, 1034, 1043, 1052, 1060, 1069,
1674   1078,1086, 1095, 1103, 1112, 1121, 1129, 1138, 1147, 1155, 1164, 1172, 1181, 1190, 1198, 1208
1675 };
1676 
1677 static VOID
media_gpe_interface_setup(MEDIA_GPE_CTX * gpe_ctx)1678 media_gpe_interface_setup (MEDIA_GPE_CTX *gpe_ctx)
1679 {
1680   struct gen6_interface_descriptor_data *desc;
1681   INT i;
1682   dri_bo *bo;
1683   BYTE *desc_ptr;
1684 
1685   bo = gpe_ctx->dynamic_state.res.bo;
1686   dri_bo_map (bo, 1);
1687   MEDIA_DRV_ASSERT (bo->virtual);
1688   desc_ptr = (BYTE *) bo->virtual + gpe_ctx->idrt_offset;
1689 
1690   desc = (struct gen6_interface_descriptor_data *) desc_ptr;
1691   for (i = 0; i < gpe_ctx->num_kernels; i++) {
1692     MEDIA_KERNEL *kernel;
1693     kernel = &gpe_ctx->kernels[i];
1694     MEDIA_DRV_ASSERT (sizeof (*desc) == 32);
1695     /*Setup the descritor table */
1696     memset (desc, 0, sizeof (*desc));
1697     desc->desc0.kernel_start_pointer = kernel->kernel_offset >> 6;
1698     desc->desc2.sampler_count = 4;
1699     desc->desc2.sampler_state_pointer =
1700       (gpe_ctx->sampler_offset +
1701        (i * gpe_ctx->sampler_size)) >> 5;;
1702     desc->desc3.binding_table_entry_count = 0;
1703     desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET (0) >> 5);
1704     desc->desc4.constant_urb_entry_read_offset = 0;
1705     desc->desc4.constant_urb_entry_read_length = (gpe_ctx->curbe_size + 31) >> 5;
1706     desc++;
1707   }
1708   dri_bo_unmap (bo);
1709 }
1710 
1711 VOID
media_interface_setup_me(MEDIA_ENCODER_CTX * encoder_context)1712 media_interface_setup_me (MEDIA_ENCODER_CTX * encoder_context)
1713 {
1714   ME_CONTEXT *me_ctx = &encoder_context->me_context;
1715 
1716   media_gpe_interface_setup (&me_ctx->gpe_context);
1717 }
1718 
1719 VOID
media_interface_setup_scaling(MEDIA_ENCODER_CTX * encoder_context)1720 media_interface_setup_scaling (MEDIA_ENCODER_CTX * encoder_context)
1721 {
1722   SCALING_CONTEXT *scaling_ctx = &encoder_context->scaling_context;
1723 
1724   media_gpe_interface_setup (&scaling_ctx->gpe_context);
1725 }
1726 
1727 VOID
media_interface_setup_mbpak(MEDIA_GPE_CTX * mbpak_gpe_ctx)1728 media_interface_setup_mbpak (MEDIA_GPE_CTX *mbpak_gpe_ctx)
1729 {
1730   struct gen6_interface_descriptor_data *desc;
1731   INT i;
1732   dri_bo *bo;
1733   BYTE *desc_ptr;
1734   bo = mbpak_gpe_ctx->dynamic_state.res.bo;
1735   dri_bo_map (bo, 1);
1736   MEDIA_DRV_ASSERT (bo->virtual);
1737   desc_ptr = (BYTE *) bo->virtual + mbpak_gpe_ctx->idrt_offset;
1738   desc = (struct gen6_interface_descriptor_data *) desc_ptr;
1739 
1740   for (i = 0; i < mbpak_gpe_ctx->num_kernels; i++)
1741     {
1742       MEDIA_KERNEL *kernel;
1743       kernel = &mbpak_gpe_ctx->kernels[i];
1744       MEDIA_DRV_ASSERT (sizeof (*desc) == 32);
1745       /*Setup the descritor table */
1746       memset (desc, 0, sizeof (*desc));
1747       desc->desc0.kernel_start_pointer = kernel->kernel_offset >> 6;
1748       desc->desc2.sampler_count = 0;	/* FIXME: */
1749       desc->desc2.sampler_state_pointer = 0;
1750       desc->desc3.binding_table_entry_count = 0;	//1; /* FIXME: */
1751       desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET (0) >> 5);
1752       desc->desc4.constant_urb_entry_read_offset = 0;
1753       desc->desc4.constant_urb_entry_read_length = (mbpak_gpe_ctx->curbe_size + 31) >> 5;	//CURBE_URB_ENTRY_LENGTH;
1754       desc++;
1755     }
1756   dri_bo_unmap (bo);
1757 }
1758 
1759 VOID
media_interface_setup_mbenc(MEDIA_ENCODER_CTX * encoder_context)1760 media_interface_setup_mbenc (MEDIA_ENCODER_CTX * encoder_context)
1761 {
1762   MBENC_CONTEXT *mbenc_ctx = &encoder_context->mbenc_context;
1763   MEDIA_GPE_CTX *mbenc_gpe_ctx = &mbenc_ctx->gpe_context;
1764   struct gen6_interface_descriptor_data *desc;
1765   INT i;
1766   dri_bo *bo;
1767   BYTE *desc_ptr;
1768   bo = mbenc_ctx->gpe_context.dynamic_state.res.bo;
1769   dri_bo_map (bo, 1);
1770   MEDIA_DRV_ASSERT (bo->virtual);
1771   desc_ptr = (BYTE *) bo->virtual + mbenc_gpe_ctx->idrt_offset;
1772 
1773   desc = (struct gen6_interface_descriptor_data *) desc_ptr;
1774   for (i = 0; i < mbenc_gpe_ctx->num_kernels; i++)
1775     {
1776       MEDIA_KERNEL *kernel;
1777       kernel = &mbenc_gpe_ctx->kernels[i];
1778       MEDIA_DRV_ASSERT (sizeof (*desc) == 32);
1779       /*Setup the descritor table */
1780       memset (desc, 0, sizeof (*desc));
1781       desc->desc0.kernel_start_pointer = kernel->kernel_offset >> 6;
1782       desc->desc2.sampler_count = 4;	/* FIXME: */
1783       desc->desc2.sampler_state_pointer =
1784 	(mbenc_gpe_ctx->sampler_offset +
1785 	 (i * mbenc_gpe_ctx->sampler_size)) >> 5;;
1786       desc->desc3.binding_table_entry_count = 0;	//1; /* FIXME: */
1787       desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET (0) >> 5);
1788       desc->desc4.constant_urb_entry_read_offset = 0;
1789       desc->desc4.constant_urb_entry_read_length = (mbenc_gpe_ctx->curbe_size + 31) >> 5;	//CURBE_URB_ENTRY_LENGTH;
1790       desc++;
1791     }
1792   dri_bo_unmap (bo);
1793 }
1794 
1795 VOID
media_interface_setup_brc_init_reset(MEDIA_ENCODER_CTX * encoder_context)1796 media_interface_setup_brc_init_reset (MEDIA_ENCODER_CTX * encoder_context)
1797 {
1798   BRC_INIT_RESET_CONTEXT *ctx = &encoder_context->brc_init_reset_context;
1799   MEDIA_GPE_CTX *gpe_ctx = &ctx->gpe_context;
1800   struct gen6_interface_descriptor_data *desc;
1801   INT i;
1802   dri_bo *bo;
1803   BYTE *desc_ptr;
1804   bo = gpe_ctx->dynamic_state.res.bo;
1805   dri_bo_map (bo, 1);
1806   MEDIA_DRV_ASSERT (bo->virtual);
1807   desc_ptr = (BYTE *) bo->virtual + gpe_ctx->idrt_offset;
1808   desc = (struct gen6_interface_descriptor_data *) desc_ptr;
1809 
1810   for (i = 0; i < gpe_ctx->num_kernels; i++) {
1811     MEDIA_KERNEL *kernel;
1812     kernel = &gpe_ctx->kernels[i];
1813     MEDIA_DRV_ASSERT (sizeof (*desc) == 32);
1814     /*Setup the descritor table */
1815     memset (desc, 0, sizeof (*desc));
1816     desc->desc0.kernel_start_pointer = kernel->kernel_offset >> 6;
1817     desc->desc2.sampler_count = 0;	/* FIXME: */
1818     desc->desc2.sampler_state_pointer = 0;
1819     desc->desc3.binding_table_entry_count = 0;	//1; /* FIXME: */
1820     desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET (0) >> 5);
1821     desc->desc4.constant_urb_entry_read_offset = 0;
1822     desc->desc4.constant_urb_entry_read_length = (gpe_ctx->curbe_size + 31) >> 5;	//CURBE_URB_ENTRY_LENGTH;
1823     desc++;
1824   }
1825   dri_bo_unmap (bo);
1826 }
1827 
1828 VOID
media_interface_setup_brc_update(MEDIA_ENCODER_CTX * encoder_context)1829 media_interface_setup_brc_update (MEDIA_ENCODER_CTX * encoder_context)
1830 {
1831   BRC_UPDATE_CONTEXT *ctx = &encoder_context->brc_update_context;
1832   MEDIA_GPE_CTX *gpe_ctx = &ctx->gpe_context;
1833   struct gen6_interface_descriptor_data *desc;
1834   INT i;
1835   dri_bo *bo;
1836   BYTE *desc_ptr;
1837   bo = gpe_ctx->dynamic_state.res.bo;
1838   dri_bo_map (bo, 1);
1839   MEDIA_DRV_ASSERT (bo->virtual);
1840   desc_ptr = (BYTE *) bo->virtual + gpe_ctx->idrt_offset;
1841   desc = (struct gen6_interface_descriptor_data *) desc_ptr;
1842 
1843   for (i = 0; i < gpe_ctx->num_kernels; i++)
1844   {
1845     MEDIA_KERNEL *kernel;
1846     kernel = &gpe_ctx->kernels[i];
1847     MEDIA_DRV_ASSERT (sizeof (*desc) == 32);
1848     /*Setup the descritor table */
1849     memset (desc, 0, sizeof (*desc));
1850     desc->desc0.kernel_start_pointer = kernel->kernel_offset >> 6;
1851     desc->desc2.sampler_count = 0;	/* FIXME: */
1852     desc->desc2.sampler_state_pointer = 0;
1853     desc->desc3.binding_table_entry_count = 0;	//1; /* FIXME: */
1854     desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET (0) >> 5);
1855     desc->desc4.constant_urb_entry_read_offset = 0;
1856     desc->desc4.constant_urb_entry_read_length = (gpe_ctx->curbe_size + 31) >> 5;	//CURBE_URB_ENTRY_LENGTH;
1857     desc++;
1858   }
1859   dri_bo_unmap (bo);
1860 }
1861 
1862 VOID
media_encode_init_mbenc_constant_buffer_vp8_g75(MBENC_CONSTANT_BUFFER_PARAMS_VP8 * params)1863   media_encode_init_mbenc_constant_buffer_vp8_g75
1864   (MBENC_CONSTANT_BUFFER_PARAMS_VP8 * params)
1865 {
1866   BYTE *cost_luma_buf, *block_mode_cost, *mode_cost_update;
1867   BOOL status;
1868   cost_luma_buf =
1869     (BYTE *) media_map_buffer_obj (params->mb_mode_cost_luma_buffer->bo);
1870   MEDIA_DRV_ASSERT (cost_luma_buf);
1871 
1872   media_drv_memset (cost_luma_buf,
1873 		    params->mb_mode_cost_luma_buffer->pitch *
1874 		    params->mb_mode_cost_luma_buffer->height);
1875 
1876   //fill surface with VP8_MB_MODE_COST_LUMA table for I frame
1877   status = media_drv_memcpy (cost_luma_buf,
1878 			     sizeof (mb_mode_cost_luma_vp8_g75),
1879 			     (VOID *) mb_mode_cost_luma_vp8_g75,
1880 			     sizeof (mb_mode_cost_luma_vp8_g75));
1881   if (status != TRUE)
1882     {
1883       media_unmap_buffer_obj (params->mb_mode_cost_luma_buffer->bo);
1884       MEDIA_DRV_ASSERT ("media_drv_memcpy failed");
1885     }
1886   media_unmap_buffer_obj (params->mb_mode_cost_luma_buffer->bo);
1887   block_mode_cost = media_map_buffer_obj (params->block_mode_cost_buffer->bo);
1888   MEDIA_DRV_ASSERT (block_mode_cost);
1889 
1890   media_drv_memset (block_mode_cost,
1891 		    params->block_mode_cost_buffer->pitch *
1892 		    params->block_mode_cost_buffer->height);
1893 
1894   status = media_drv_memcpy (block_mode_cost,
1895 			     sizeof (block_mode_cost_vp8_g75),
1896 			     (VOID *) block_mode_cost_vp8_g75,
1897 			     sizeof (block_mode_cost_vp8_g75));
1898   if (status != TRUE)
1899     {
1900       media_unmap_buffer_obj (params->block_mode_cost_buffer->bo);
1901       MEDIA_DRV_ASSERT ("media_drv_memcpy failed");
1902     }
1903   media_unmap_buffer_obj (params->block_mode_cost_buffer->bo);
1904 
1905   mode_cost_update =
1906     (BYTE *) media_map_buffer_obj (params->mode_cost_update_surface->bo);
1907   MEDIA_DRV_ASSERT (mode_cost_update);
1908 
1909   media_drv_memset (mode_cost_update, 64);
1910   // params->mode_cost_update_surface->bo_size);
1911 
1912   mode_cost_update[2] = 0x30;
1913   mode_cost_update[3] = 0x01;
1914 
1915   mode_cost_update[6] = 0x08;
1916   mode_cost_update[7] = 0x13;
1917 
1918   mode_cost_update[8] = 0x3c;
1919   mode_cost_update[9] = 0x07;
1920   mode_cost_update[10] = 0x65;
1921   mode_cost_update[11] = 0x03;
1922 
1923   mode_cost_update[14] = 0xc9;
1924   mode_cost_update[15] = 0x0d;
1925 
1926   mode_cost_update[24] = 0x14;
1927   mode_cost_update[25] = 0x02;
1928   mode_cost_update[26] = 0x62;
1929   mode_cost_update[27] = 0x03;
1930   mode_cost_update[28] = 0x04;
1931   mode_cost_update[29] = 0x02;
1932   mode_cost_update[30] = 0x6a;
1933 
1934   mode_cost_update[32] = 0x67;
1935   mode_cost_update[33] = 0x09;
1936   mode_cost_update[34] = 0x69;
1937   mode_cost_update[35] = 0x09;
1938 
1939   media_unmap_buffer_obj (params->mode_cost_update_surface->bo);
1940 }
1941 
1942 VOID
media_set_curbe_vp8_mbpak(struct encode_state * encode_state,MEDIA_MBPAK_CURBE_PARAMS_VP8 * params)1943 media_set_curbe_vp8_mbpak (struct encode_state *encode_state,
1944 			   MEDIA_MBPAK_CURBE_PARAMS_VP8 * params)
1945 {
1946   VAQMatrixBufferVP8 *quant_params =
1947     (VAQMatrixBufferVP8 *) encode_state->q_matrix->buffer;
1948   VAEncSequenceParameterBufferVP8 *seq_params =
1949     (VAEncSequenceParameterBufferVP8 *) encode_state->seq_param_ext->buffer;
1950   VAEncPictureParameterBufferVP8 *pic_params =
1951     (VAEncPictureParameterBufferVP8 *) encode_state->pic_param_ext->buffer;
1952   UINT shift_factor, mul_factor;
1953   UINT16 y_quanta_ac_idx, y_quanta_dc_idx, uv_quanta_dc_idx,
1954     uv_quanta_ac_idx, y2_quanta_ac_idx, y2_quanta_dc_idx;
1955   // qIndex should be the sum of base and delta qp values.
1956   y_quanta_ac_idx = quant_params->quantization_index[0];	/* Use entry 0 as for BDW segmentation is disabled */
1957   y_quanta_dc_idx =
1958     y_quanta_ac_idx +
1959     quant_params->quantization_index_delta[QUAND_INDEX_Y1_DC_VP8];
1960   uv_quanta_dc_idx =
1961     y_quanta_ac_idx +
1962     quant_params->quantization_index_delta[QUAND_INDEX_UV_DC_VP8];
1963   uv_quanta_ac_idx =
1964     y_quanta_ac_idx +
1965     quant_params->quantization_index_delta[QUAND_INDEX_UV_AC_VP8];
1966   y2_quanta_dc_idx =
1967     y_quanta_ac_idx +
1968     quant_params->quantization_index_delta[QUAND_INDEX_Y2_DC_VP8];
1969   y2_quanta_ac_idx =
1970     y_quanta_ac_idx +
1971     quant_params->quantization_index_delta[QUAND_INDEX_Y2_AC_VP8];
1972 
1973   shift_factor = 16;
1974   mul_factor = 1 << shift_factor;
1975 
1976   if (params->pak_phase_type == MBPAK_HYBRID_STATE_P1)
1977     {
1978       MEDIA_CURBE_DATA_MBPAK_P1_G75 *cmd =
1979 	(MEDIA_CURBE_DATA_MBPAK_P1_G75 *) params->curbe_cmd_buff;
1980 
1981 
1982       if (params->updated == TRUE)
1983 	{
1984 	  cmd->dw40.pak_per_mb_out_data_surf_bti = VP8_MBPAK_PER_MB_OUT_G75;
1985 	  cmd->dw41.mb_enc_curr_y_bti = VP8_MBPAK_CURR_Y_G75;
1986 	  cmd->dw42.pak_recon_y_bti = VP8_MBPAK_CURR_RECON_Y_G75;
1987 	  cmd->dw43.pak_last_ref_pic_y_bti = VP8_MBPAK_LAST_REF_Y_G75;
1988 	  cmd->dw44.pak_golden_ref_pic_y_bti = VP8_MBPAK_GOLDEN_REF_Y_G75;
1989 	  cmd->dw45.pak_alternate_ref_pic_y_bti =
1990 	    VP8_MBPAK_ALTERNATE_REF_Y_G75;
1991 	  cmd->dw46.pak_ind_mv_data_bti = VP8_MBPAK_IND_MV_DATA_G75;
1992 	  cmd->dw47.pak_kernel_debug_bti = VP8_MBPAK_DEBUG_STREAMOUT_G75;
1993 
1994 	  return;
1995 	}
1996 
1997       cmd->dw0.frame_width = (seq_params->frame_width + 15) & (~0xF);	/* kernel require MB boundary aligned dimensions */
1998       cmd->dw0.frame_height = (seq_params->frame_height + 15) & (~0xF);
1999 
2000       cmd->dw1.frame_type = 1;	/* phase1 is always for P frames only */
2001       cmd->dw1.recon_filter_type =
2002 	(pic_params->pic_flags.bits.version == 0) ? 0 /*6-tap filter */ :
2003 	((pic_params->pic_flags.bits.version == 3) ? 2
2004 	 /*full pixel mvs for chroma,half pixel mvs derived using bilinear filter for luma */
2005 	 : 1 /*bilinear filter */ );
2006       cmd->dw1.clamping_flag = pic_params->pic_flags.bits.clamping_type;
2007 
2008       cmd->dw2.y_dc_q_mul_factor_segment0 =
2009 	mul_factor / quant_dc_vp8_g75[y_quanta_dc_idx];
2010       cmd->dw2.y_ac_q_mul_factor_segment0 =
2011 	mul_factor / quant_ac_vp8_g75[y_quanta_ac_idx];
2012 
2013       cmd->dw3.y2_dc_q_mul_factor_segment0 =
2014 	mul_factor / quant_dc2_vp8_g75[y2_quanta_dc_idx];
2015       cmd->dw3.y2_ac_q_mul_factor_segment0 =
2016 	mul_factor / quant_ac2_vp8_g75[y2_quanta_ac_idx];
2017 
2018       cmd->dw4.uv_dc_q_mul_factor_segment0 =
2019 	mul_factor / quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2020       cmd->dw4.uv_ac_q_mul_factor_segment0 =
2021 	mul_factor / quant_ac_vp8_g75[uv_quanta_ac_idx];
2022 
2023       cmd->dw5.y_dc_inv_q_mul_factor_segment0 =
2024 	quant_dc_vp8_g75[y_quanta_dc_idx];
2025       cmd->dw5.y_ac_inv_q_mul_factor_segment0 =
2026 	quant_ac_vp8_g75[y_quanta_ac_idx];
2027 
2028       cmd->dw6.y2_dc_inv_q_mul_factor_segment0 =
2029 	quant_dc2_vp8_g75[y2_quanta_dc_idx];
2030       cmd->dw6.y2_ac_inv_q_mul_factor_segment0 =
2031 	quant_ac2_vp8_g75[y2_quanta_ac_idx];
2032 
2033       cmd->dw7.uv_dc_inv_q_mul_factor_segment0 =
2034 	quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2035       cmd->dw7.uv_ac_inv_q_mul_factor_segment0 =
2036 	quant_ac_vp8_g75[uv_quanta_ac_idx];
2037 
2038       cmd->dw8.y2_dc_q_shift_factor_segment0 = shift_factor;
2039       cmd->dw8.y2_ac_q_shift_factor_segment0 = shift_factor;
2040       cmd->dw8.y_dc_q_shift_factor_segment0 = shift_factor;
2041       cmd->dw8.y_ac_q_shift_factor_segment0 = shift_factor;
2042 
2043       cmd->dw9.uv_dc_q_shift_factor_segment0 = shift_factor;
2044       cmd->dw9.uv_ac_q_shift_factor_segment0 = shift_factor;
2045 
2046       if (pic_params->pic_flags.bits.segmentation_enabled)
2047 	{
2048 	  y_quanta_ac_idx = quant_params->quantization_index[1];
2049 	  y_quanta_dc_idx =
2050 	    y_quanta_ac_idx +
2051 	    quant_params->quantization_index_delta[QUAND_INDEX_Y1_DC_VP8];
2052 	  uv_quanta_dc_idx =
2053 	    y_quanta_ac_idx +
2054 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_DC_VP8];
2055 	  uv_quanta_ac_idx =
2056 	    y_quanta_ac_idx +
2057 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_AC_VP8];
2058 	  y2_quanta_dc_idx =
2059 	    y_quanta_ac_idx +
2060 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_DC_VP8];
2061 	  y2_quanta_ac_idx =
2062 	    y_quanta_ac_idx +
2063 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_AC_VP8];
2064 
2065 	  cmd->dw10.y_dc_q_mul_factor_segment1 =
2066 	    mul_factor / quant_dc_vp8_g75[y_quanta_dc_idx];
2067 	  cmd->dw10.y_ac_q_mul_factor_segment1 =
2068 	    mul_factor / quant_ac_vp8_g75[y_quanta_ac_idx];
2069 
2070 	  cmd->dw11.y2_dc_q_mul_factor_segment1 =
2071 	    mul_factor / quant_dc2_vp8_g75[y2_quanta_dc_idx];
2072 	  cmd->dw11.y2_ac_q_mul_factor_segment1 =
2073 	    mul_factor / quant_ac2_vp8_g75[y2_quanta_ac_idx];
2074 
2075 	  cmd->dw12.uv_dc_q_mul_factor_segment1 =
2076 	    mul_factor / quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2077 	  cmd->dw12.uv_ac_q_mul_factor_segment1 =
2078 	    mul_factor / quant_ac_vp8_g75[uv_quanta_ac_idx];
2079 
2080 	  cmd->dw13.y_dc_inv_q_mul_factor_segment1 =
2081 	    quant_dc_vp8_g75[y_quanta_dc_idx];
2082 	  cmd->dw13.y_ac_inv_q_mul_factor_segment1 =
2083 	    quant_ac_vp8_g75[y_quanta_ac_idx];
2084 
2085 	  cmd->dw14.y2_dc_inv_q_mul_factor_segment1 =
2086 	    quant_dc2_vp8_g75[y2_quanta_dc_idx];
2087 	  cmd->dw14.y2_ac_inv_q_mul_factor_segment1 =
2088 	    quant_ac2_vp8_g75[y2_quanta_ac_idx];
2089 
2090 	  cmd->dw15.uv_dc_inv_q_mul_factor_segment1 =
2091 	    quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2092 	  cmd->dw15.uv_ac_inv_q_mul_factor_segment1 =
2093 	    quant_ac_vp8_g75[uv_quanta_ac_idx];
2094 
2095 	  cmd->dw16.y2_dc_q_shift_factor_segment1 = shift_factor;
2096 	  cmd->dw16.y2_ac_q_shift_factor_segment1 = shift_factor;
2097 	  cmd->dw16.y_dc_q_shift_factor_segment1 = shift_factor;
2098 	  cmd->dw16.y_ac_q_shift_factor_segment1 = shift_factor;
2099 
2100 	  cmd->dw17.uv_dc_q_shift_factor_segment1 = shift_factor;
2101 	  cmd->dw17.uv_ac_q_shift_factor_segment1 = shift_factor;
2102 
2103 	  y_quanta_ac_idx = quant_params->quantization_index[2];
2104 	  y_quanta_dc_idx =
2105 	    y_quanta_ac_idx +
2106 	    quant_params->quantization_index_delta[QUAND_INDEX_Y1_DC_VP8];
2107 	  uv_quanta_dc_idx =
2108 	    y_quanta_ac_idx +
2109 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_DC_VP8];
2110 	  uv_quanta_ac_idx =
2111 	    y_quanta_ac_idx +
2112 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_AC_VP8];
2113 	  y2_quanta_dc_idx =
2114 	    y_quanta_ac_idx +
2115 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_DC_VP8];
2116 	  y2_quanta_ac_idx =
2117 	    y_quanta_ac_idx +
2118 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_AC_VP8];
2119 
2120 	  cmd->dw18.y_dc_q_mul_factor_segment2 =
2121 	    mul_factor / quant_dc_vp8_g75[y_quanta_dc_idx];
2122 	  cmd->dw18.y_ac_q_mul_factor_segment2 =
2123 	    mul_factor / quant_ac_vp8_g75[y_quanta_ac_idx];
2124 
2125 	  cmd->dw19.y2_dc_q_mul_factor_segment2 =
2126 	    mul_factor / quant_dc2_vp8_g75[y2_quanta_dc_idx];
2127 	  cmd->dw19.y2_ac_q_mul_factor_segment2 =
2128 	    mul_factor / quant_ac2_vp8_g75[y2_quanta_ac_idx];
2129 
2130 	  cmd->dw20.uv_dc_q_mul_factor_segment2 =
2131 	    mul_factor / quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2132 	  cmd->dw20.uv_ac_q_mul_factor_segment2 =
2133 	    mul_factor / quant_ac_vp8_g75[uv_quanta_ac_idx];
2134 
2135 	  cmd->dw21.y_dc_inv_q_mul_factor_segment2 =
2136 	    quant_dc_vp8_g75[y_quanta_dc_idx];
2137 	  cmd->dw21.y_ac_inv_q_mul_factor_segment2 =
2138 	    quant_ac_vp8_g75[y_quanta_ac_idx];
2139 
2140 	  cmd->dw22.y2_dc_inv_q_mul_factor_segment2 =
2141 	    quant_dc2_vp8_g75[y2_quanta_dc_idx];
2142 	  cmd->dw22.y2_ac_inv_q_mul_factor_segment2 =
2143 	    quant_ac2_vp8_g75[y2_quanta_ac_idx];
2144 
2145 	  cmd->dw23.uv_dc_inv_q_mul_factor_segment2 =
2146 	    quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2147 	  cmd->dw23.uv_ac_inv_q_mul_factor_segment2 =
2148 	    quant_ac_vp8_g75[uv_quanta_ac_idx];
2149 
2150 	  cmd->dw24.y2_dc_q_shift_factor_segment2 = shift_factor;
2151 	  cmd->dw24.y2_ac_q_shift_factor_segment2 = shift_factor;
2152 	  cmd->dw24.y_dc_q_shift_factor_segment2 = shift_factor;
2153 	  cmd->dw24.y_ac_q_shift_factor_segment2 = shift_factor;
2154 
2155 	  cmd->dw25.uv_dc_q_shift_factor_segment2 = shift_factor;
2156 	  cmd->dw25.uv_ac_q_shift_factor_segment2 = shift_factor;
2157 
2158 	  y_quanta_ac_idx = quant_params->quantization_index[3];
2159 	  y_quanta_dc_idx =
2160 	    y_quanta_ac_idx +
2161 	    quant_params->quantization_index_delta[QUAND_INDEX_Y1_DC_VP8];
2162 	  uv_quanta_dc_idx =
2163 	    y_quanta_ac_idx +
2164 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_DC_VP8];
2165 	  uv_quanta_ac_idx =
2166 	    y_quanta_ac_idx +
2167 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_AC_VP8];
2168 	  y2_quanta_dc_idx =
2169 	    y_quanta_ac_idx +
2170 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_DC_VP8];
2171 	  y2_quanta_ac_idx =
2172 	    y_quanta_ac_idx +
2173 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_AC_VP8];
2174 
2175 	  cmd->dw26.y_dc_q_mul_factor_segment3 =
2176 	    mul_factor / quant_dc_vp8_g75[y_quanta_dc_idx];
2177 	  cmd->dw26.y_ac_q_mul_factor_segment3 =
2178 	    mul_factor / quant_ac_vp8_g75[y_quanta_ac_idx];
2179 
2180 	  cmd->dw27.y2_dc_q_mul_factor_segment3 =
2181 	    mul_factor / quant_dc2_vp8_g75[y2_quanta_dc_idx];
2182 	  cmd->dw27.y2_ac_q_mul_factor_segment3 =
2183 	    mul_factor / quant_ac2_vp8_g75[y2_quanta_ac_idx];
2184 
2185 	  cmd->dw28.uv_dc_q_mul_factor_segment3 =
2186 	    mul_factor / quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2187 	  cmd->dw28.uv_ac_q_mul_factor_segment3 =
2188 	    mul_factor / quant_ac_vp8_g75[uv_quanta_ac_idx];
2189 
2190 	  cmd->dw29.y_dc_inv_q_mul_factor_segment3 =
2191 	    quant_dc_vp8_g75[y_quanta_dc_idx];
2192 	  cmd->dw29.y_ac_inv_q_mul_factor_segment3 =
2193 	    quant_ac_vp8_g75[y_quanta_ac_idx];
2194 
2195 	  cmd->dw30.y2_dc_inv_q_mul_factor_segment3 =
2196 	    quant_dc2_vp8_g75[y2_quanta_dc_idx];
2197 	  cmd->dw30.y2_ac_inv_q_mul_factor_segment3 =
2198 	    quant_ac2_vp8_g75[y2_quanta_ac_idx];
2199 
2200 	  cmd->dw31.uv_dc_inv_q_mul_factor_segment3 =
2201 	    quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2202 	  cmd->dw31.uv_ac_inv_q_mul_factor_segment3 =
2203 	    quant_ac_vp8_g75[uv_quanta_ac_idx];
2204 
2205 	  cmd->dw32.y2_dc_q_shift_factor_segment3 = shift_factor;
2206 	  cmd->dw32.y2_ac_q_shift_factor_segment3 = shift_factor;
2207 	  cmd->dw32.y_dc_q_shift_factor_segment3 = shift_factor;
2208 	  cmd->dw32.y_ac_q_shift_factor_segment3 = shift_factor;
2209 
2210 	  cmd->dw33.uv_dc_q_shift_factor_segment3 = shift_factor;
2211 	  cmd->dw33.uv_ac_q_shift_factor_segment3 = shift_factor;
2212 	}
2213 
2214       cmd->dw34.ref_frame_lf_delta0 = pic_params->ref_lf_delta[0];
2215       cmd->dw34.ref_frame_lf_delta1 = pic_params->ref_lf_delta[1];
2216       cmd->dw34.ref_frame_lf_delta2 = pic_params->ref_lf_delta[2];	/*referenceFrame loopfilter delta for last frame */
2217       cmd->dw34.ref_frame_lf_delta3 = pic_params->ref_lf_delta[3];	/*referenceFrame loopfilter delta for intra frame */
2218 
2219       cmd->dw35.mode_lf_delta0 = pic_params->mode_lf_delta[0];
2220       cmd->dw35.mode_lf_delta1 = pic_params->mode_lf_delta[1];
2221       cmd->dw35.mode_lf_delta2 = pic_params->mode_lf_delta[2];
2222       cmd->dw35.mode_lf_delta3 = pic_params->mode_lf_delta[3];
2223 
2224       cmd->dw36.lf_level0 = pic_params->loop_filter_level[0];
2225       cmd->dw36.lf_level1 = pic_params->loop_filter_level[1];
2226       cmd->dw36.lf_level2 = pic_params->loop_filter_level[2];
2227       cmd->dw36.lf_level3 = pic_params->loop_filter_level[3];
2228 
2229       cmd->dw40.pak_per_mb_out_data_surf_bti = VP8_MBPAK_PER_MB_OUT_G75;
2230       cmd->dw41.mb_enc_curr_y_bti = VP8_MBPAK_CURR_Y_G75;
2231       cmd->dw42.pak_recon_y_bti = VP8_MBPAK_CURR_RECON_Y_G75;
2232       cmd->dw43.pak_last_ref_pic_y_bti = VP8_MBPAK_LAST_REF_Y_G75;
2233       cmd->dw44.pak_golden_ref_pic_y_bti = VP8_MBPAK_GOLDEN_REF_Y_G75;
2234       cmd->dw45.pak_alternate_ref_pic_y_bti = VP8_MBPAK_ALTERNATE_REF_Y_G75;
2235       cmd->dw46.pak_ind_mv_data_bti = VP8_MBPAK_IND_MV_DATA_G75;
2236       cmd->dw47.pak_kernel_debug_bti = VP8_MBPAK_DEBUG_STREAMOUT_G75;
2237     }
2238   else
2239     {
2240       MEDIA_CURBE_DATA_MBPAK_P2_G75 *cmd =
2241 	(MEDIA_CURBE_DATA_MBPAK_P2_G75 *) params->curbe_cmd_buff;
2242 
2243       if (params->updated == TRUE)
2244 	{
2245 	  cmd->dw40.pak_per_mb_out_data_surf_bti = VP8_MBPAK_PER_MB_OUT_G75;
2246 	  cmd->dw41.mb_enc_curr_y_bti = VP8_MBPAK_CURR_Y_G75;
2247 	  cmd->dw42.pak_recon_y_bti = VP8_MBPAK_CURR_RECON_Y_G75;
2248 	  cmd->dw43.pak_row_buffer_y_bti = VP8_MBPAK_ROW_BUFF_Y_G75;
2249 	  cmd->dw44.pak_row_buffer_uv_bti = VP8_MBPAK_ROW_BUFF_UV_G75;
2250 	  cmd->dw45.pak_col_buffer_y_bti = VP8_MBPAK_COL_BUFF_Y_G75;
2251 	  cmd->dw46.pak_col_buffer_uv_bti = VP8_MBPAK_COL_BUFF_UV_G75;
2252 	  cmd->dw47.pak_kernel_debug_bti = VP8_MBPAK_DEBUG_STREAMOUT_G75;
2253 
2254 	  return;
2255 	}
2256 
2257       cmd->dw0.frame_width = (seq_params->frame_width + 15) & (~0xF);	/* kernel require MB boundary aligned dimensions */
2258       cmd->dw0.frame_height = (seq_params->frame_height + 15) & (~0xF);
2259 
2260       cmd->dw1.sharpness_level = pic_params->sharpness_level;
2261       cmd->dw1.loop_filter_type =
2262 	(pic_params->pic_flags.bits.version ==
2263 	 0) ? 0 /*normal loop filter */ : 1 /*simple loop filter */ ;
2264       cmd->dw1.frame_type = pic_params->pic_flags.bits.frame_type;
2265       cmd->dw1.clamping_flag = pic_params->pic_flags.bits.clamping_type;
2266 
2267       cmd->dw2.y_dc_q_mul_factor_segment0 =
2268 	mul_factor / quant_dc_vp8_g75[y_quanta_dc_idx];
2269       cmd->dw2.y_ac_q_mul_factor_segment0 =
2270 	mul_factor / quant_ac_vp8_g75[y_quanta_ac_idx];
2271 
2272       cmd->dw3.y2_dc_q_mul_factor_segment0 =
2273 	mul_factor / quant_dc2_vp8_g75[y2_quanta_dc_idx];
2274       cmd->dw3.y2_ac_q_mul_factor_segment0 =
2275 	mul_factor / quant_ac2_vp8_g75[y2_quanta_ac_idx];
2276 
2277       cmd->dw4.uv_dc_q_mul_factor_segment0 =
2278 	mul_factor / quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2279       cmd->dw4.uv_ac_q_mul_factor_segment0 =
2280 	mul_factor / quant_ac_vp8_g75[uv_quanta_ac_idx];
2281 
2282       cmd->dw5.y_dc_inv_q_mul_factor_segment0 =
2283 	quant_dc_vp8_g75[y_quanta_dc_idx];
2284       cmd->dw5.y_ac_inv_q_mul_factor_segment0 =
2285 	quant_ac_vp8_g75[y_quanta_ac_idx];
2286 
2287       cmd->dw6.y2_dc_inv_q_mul_factor_segment0 =
2288 	quant_dc2_vp8_g75[y2_quanta_dc_idx];
2289       cmd->dw6.y2_ac_inv_q_mul_factor_segment0 =
2290 	quant_ac2_vp8_g75[y2_quanta_ac_idx];
2291 
2292       cmd->dw7.uv_dc_inv_q_mul_factor_segment0 =
2293 	quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2294       cmd->dw7.uv_ac_inv_q_mul_factor_segment0 =
2295 	quant_ac_vp8_g75[uv_quanta_ac_idx];
2296 
2297       cmd->dw8.y2_dc_q_shift_factor_segment0 = shift_factor;
2298       cmd->dw8.y2_ac_q_shift_factor_segment0 = shift_factor;
2299       cmd->dw8.y_dc_q_shift_factor_segment0 = shift_factor;
2300       cmd->dw8.y_ac_q_shift_factor_segment0 = shift_factor;
2301 
2302       cmd->dw9.uv_dc_q_shift_factor_segment0 = shift_factor;
2303       cmd->dw9.uv_ac_q_shift_factor_segment0 = shift_factor;
2304 
2305       if (pic_params->pic_flags.bits.segmentation_enabled)
2306 	{
2307 	  y_quanta_ac_idx = quant_params->quantization_index[1];
2308 	  y_quanta_dc_idx =
2309 	    y_quanta_ac_idx +
2310 	    quant_params->quantization_index_delta[QUAND_INDEX_Y1_DC_VP8];
2311 	  uv_quanta_dc_idx =
2312 	    y_quanta_ac_idx +
2313 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_DC_VP8];
2314 	  uv_quanta_ac_idx =
2315 	    y_quanta_ac_idx +
2316 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_AC_VP8];
2317 	  y2_quanta_dc_idx =
2318 	    y_quanta_ac_idx +
2319 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_DC_VP8];
2320 	  y2_quanta_ac_idx =
2321 	    y_quanta_ac_idx +
2322 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_AC_VP8];
2323 
2324 	  cmd->dw10.y_dc_q_mul_factor_segment1 =
2325 	    mul_factor / quant_dc_vp8_g75[y_quanta_dc_idx];
2326 	  cmd->dw10.y_ac_q_mul_factor_segment1 =
2327 	    mul_factor / quant_ac_vp8_g75[y_quanta_ac_idx];
2328 
2329 	  cmd->dw11.y2_dc_q_mul_factor_segment1 =
2330 	    mul_factor / quant_dc2_vp8_g75[y2_quanta_dc_idx];
2331 	  cmd->dw11.y2_ac_q_mul_factor_segment1 =
2332 	    mul_factor / quant_ac2_vp8_g75[y2_quanta_ac_idx];
2333 
2334 	  cmd->dw12.uv_dc_q_mul_factor_segment1 =
2335 	    mul_factor / quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2336 	  cmd->dw12.uv_ac_q_mul_factor_segment1 =
2337 	    mul_factor / quant_ac_vp8_g75[uv_quanta_ac_idx];
2338 
2339 	  cmd->dw13.y_dc_inv_q_mul_factor_segment1 =
2340 	    quant_dc_vp8_g75[y_quanta_dc_idx];
2341 	  cmd->dw13.y_ac_inv_q_mul_factor_segment1 =
2342 	    quant_ac_vp8_g75[y_quanta_ac_idx];
2343 
2344 	  cmd->dw14.y2_dc_inv_q_mul_factor_segment1 =
2345 	    quant_dc2_vp8_g75[y2_quanta_dc_idx];
2346 	  cmd->dw14.y2_ac_inv_q_mul_factor_segment1 =
2347 	    quant_ac2_vp8_g75[y2_quanta_ac_idx];
2348 
2349 	  cmd->dw15.uv_dc_inv_q_mul_factor_segment1 =
2350 	    quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2351 	  cmd->dw15.uv_ac_inv_q_mul_factor_segment1 =
2352 	    quant_ac_vp8_g75[uv_quanta_ac_idx];
2353 
2354 	  cmd->dw16.y2_dc_q_shift_factor_segment1 = shift_factor;
2355 	  cmd->dw16.y2_ac_q_shift_factor_segment1 = shift_factor;
2356 	  cmd->dw16.y_dc_q_shift_factor_segment1 = shift_factor;
2357 	  cmd->dw16.y_ac_q_shift_factor_segment1 = shift_factor;
2358 
2359 	  cmd->dw17.uv_dc_q_shift_factor_segment1 = shift_factor;
2360 	  cmd->dw17.uv_ac_q_shift_factor_segment1 = shift_factor;
2361 
2362 	  y_quanta_ac_idx = quant_params->quantization_index[2];
2363 	  y_quanta_dc_idx =
2364 	    y_quanta_ac_idx +
2365 	    quant_params->quantization_index_delta[QUAND_INDEX_Y1_DC_VP8];
2366 	  uv_quanta_dc_idx =
2367 	    y_quanta_ac_idx +
2368 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_DC_VP8];
2369 	  uv_quanta_ac_idx =
2370 	    y_quanta_ac_idx +
2371 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_AC_VP8];
2372 	  y2_quanta_dc_idx =
2373 	    y_quanta_ac_idx +
2374 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_DC_VP8];
2375 	  y2_quanta_ac_idx =
2376 	    y_quanta_ac_idx +
2377 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_AC_VP8];
2378 
2379 	  cmd->dw18.y_dc_q_mul_factor_segment2 =
2380 	    mul_factor / quant_dc_vp8_g75[y_quanta_dc_idx];
2381 	  cmd->dw18.y_ac_q_mul_factor_segment2 =
2382 	    mul_factor / quant_ac_vp8_g75[y_quanta_ac_idx];
2383 
2384 	  cmd->dw19.y2_dc_q_mul_factor_segment2 =
2385 	    mul_factor / quant_dc2_vp8_g75[y2_quanta_dc_idx];
2386 	  cmd->dw19.y2_ac_q_mul_factor_segment2 =
2387 	    mul_factor / quant_ac2_vp8_g75[y2_quanta_ac_idx];
2388 
2389 	  cmd->dw20.uv_dc_q_mul_factor_segment2 =
2390 	    mul_factor / quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2391 	  cmd->dw20.uv_ac_q_mul_factor_segment2 =
2392 	    mul_factor / quant_ac_vp8_g75[uv_quanta_ac_idx];
2393 
2394 	  cmd->dw21.y_dc_inv_q_mul_factor_segment2 =
2395 	    quant_dc_vp8_g75[y_quanta_dc_idx];
2396 	  cmd->dw21.y_ac_inv_q_mul_factor_segment2 =
2397 	    quant_ac_vp8_g75[y_quanta_ac_idx];
2398 
2399 	  cmd->dw22.y2_dc_inv_q_mul_factor_segment2 =
2400 	    quant_dc2_vp8_g75[y2_quanta_dc_idx];
2401 	  cmd->dw22.y2_ac_inv_q_mul_factor_segment2 =
2402 	    quant_ac2_vp8_g75[y2_quanta_ac_idx];
2403 
2404 	  cmd->dw23.uv_dc_inv_q_mul_factor_segment2 =
2405 	    quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2406 	  cmd->dw23.uv_ac_inv_q_mul_factor_segment2 =
2407 	    quant_ac_vp8_g75[uv_quanta_ac_idx];
2408 
2409 	  cmd->dw24.y2_dc_q_shift_factor_segment2 = shift_factor;
2410 	  cmd->dw24.y2_ac_q_shift_factor_segment2 = shift_factor;
2411 	  cmd->dw24.y_dc_q_shift_factor_segment2 = shift_factor;
2412 	  cmd->dw24.y_ac_q_shift_factor_segment2 = shift_factor;
2413 
2414 	  cmd->dw25.uv_dc_q_shift_factor_segment2 = shift_factor;
2415 	  cmd->dw25.uv_ac_q_shift_factor_segment2 = shift_factor;
2416 
2417 	  y_quanta_ac_idx = quant_params->quantization_index[3];
2418 	  y_quanta_dc_idx =
2419 	    y_quanta_ac_idx +
2420 	    quant_params->quantization_index_delta[QUAND_INDEX_Y1_DC_VP8];
2421 	  uv_quanta_dc_idx =
2422 	    y_quanta_ac_idx +
2423 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_DC_VP8];
2424 	  uv_quanta_ac_idx =
2425 	    y_quanta_ac_idx +
2426 	    quant_params->quantization_index_delta[QUAND_INDEX_UV_AC_VP8];
2427 	  y2_quanta_dc_idx =
2428 	    y_quanta_ac_idx +
2429 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_DC_VP8];
2430 	  y2_quanta_ac_idx =
2431 	    y_quanta_ac_idx +
2432 	    quant_params->quantization_index_delta[QUAND_INDEX_Y2_AC_VP8];
2433 
2434 	  cmd->dw26.y_dc_q_mul_factor_segment3 =
2435 	    mul_factor / quant_dc_vp8_g75[y_quanta_dc_idx];
2436 	  cmd->dw26.y_ac_q_mul_factor_segment3 =
2437 	    mul_factor / quant_ac_vp8_g75[y_quanta_ac_idx];
2438 
2439 	  cmd->dw27.y2_dc_q_mul_factor_segment3 =
2440 	    mul_factor / quant_dc2_vp8_g75[y2_quanta_dc_idx];
2441 	  cmd->dw27.y2_ac_q_mul_factor_segment3 =
2442 	    mul_factor / quant_ac2_vp8_g75[y2_quanta_ac_idx];
2443 
2444 	  cmd->dw28.uv_dc_q_mul_factor_segment3 =
2445 	    mul_factor / quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2446 	  cmd->dw28.uv_ac_q_mul_factor_segment3 =
2447 	    mul_factor / quant_ac_vp8_g75[uv_quanta_ac_idx];
2448 
2449 	  cmd->dw29.y_dc_inv_q_mul_factor_segment3 =
2450 	    quant_dc_vp8_g75[y_quanta_dc_idx];
2451 	  cmd->dw29.y_ac_inv_q_mul_factor_segment3 =
2452 	    quant_ac_vp8_g75[y_quanta_ac_idx];
2453 
2454 	  cmd->dw30.y2_dc_inv_q_mul_factor_segment3 =
2455 	    quant_dc2_vp8_g75[y2_quanta_dc_idx];
2456 	  cmd->dw30.y2_ac_inv_q_mul_factor_segment3 =
2457 	    quant_ac2_vp8_g75[y2_quanta_ac_idx];
2458 
2459 	  cmd->dw31.uv_dc_inv_q_mul_factor_segment3 =
2460 	    quant_dc_uv_vp8_g75[uv_quanta_dc_idx];
2461 	  cmd->dw31.uv_ac_inv_q_mul_factor_segment3 =
2462 	    quant_ac_vp8_g75[uv_quanta_ac_idx];
2463 
2464 	  cmd->dw32.y2_dc_q_shift_factor_segment3 = shift_factor;
2465 	  cmd->dw32.y2_ac_q_shift_factor_segment3 = shift_factor;
2466 	  cmd->dw32.y_dc_q_shift_factor_segment3 = shift_factor;
2467 	  cmd->dw32.y_ac_q_shift_factor_segment3 = shift_factor;
2468 
2469 	  cmd->dw33.uv_dc_q_shift_factor_segment3 = shift_factor;
2470 	  cmd->dw33.uv_ac_q_shift_factor_segment3 = shift_factor;
2471 	}
2472 
2473       cmd->dw34.ref_frame_lf_delta0 = pic_params->ref_lf_delta[0];	/*referenceframe loopfilter delta for alt ref frame */
2474       cmd->dw34.ref_frame_lf_delta1 = pic_params->ref_lf_delta[1];	/*referenceframe loopfilter delta for golden frame */
2475       cmd->dw34.ref_frame_lf_delta2 = pic_params->ref_lf_delta[2];	/*referenceframe loopfilter delta for last frame */
2476       cmd->dw34.ref_frame_lf_delta3 = pic_params->ref_lf_delta[3];	/*referenceframe loopfilter delta for intra frame */
2477 
2478       cmd->dw35.mode_lf_delta0 = pic_params->mode_lf_delta[0];
2479       cmd->dw35.mode_lf_delta1 = pic_params->mode_lf_delta[1];
2480       cmd->dw35.mode_lf_delta2 = pic_params->mode_lf_delta[2];
2481       cmd->dw35.mode_lf_delta3 = pic_params->mode_lf_delta[3];
2482 
2483       cmd->dw36.lf_level0 = pic_params->loop_filter_level[0];
2484       cmd->dw36.lf_level1 = pic_params->loop_filter_level[1];
2485       cmd->dw36.lf_level2 = pic_params->loop_filter_level[2];
2486       cmd->dw36.lf_level3 = pic_params->loop_filter_level[3];
2487 
2488       cmd->dw40.pak_per_mb_out_data_surf_bti = VP8_MBPAK_PER_MB_OUT_G75;
2489       cmd->dw41.mb_enc_curr_y_bti = VP8_MBPAK_CURR_Y_G75;
2490       cmd->dw42.pak_recon_y_bti = VP8_MBPAK_CURR_RECON_Y_G75;
2491       cmd->dw43.pak_row_buffer_y_bti = VP8_MBPAK_ROW_BUFF_Y_G75;
2492       cmd->dw44.pak_row_buffer_uv_bti = VP8_MBPAK_ROW_BUFF_UV_G75;
2493       cmd->dw45.pak_col_buffer_y_bti = VP8_MBPAK_COL_BUFF_Y_G75;
2494       cmd->dw46.pak_col_buffer_uv_bti = VP8_MBPAK_COL_BUFF_UV_G75;
2495       cmd->dw47.pak_kernel_debug_bti = VP8_MBPAK_DEBUG_STREAMOUT_G75;
2496     }
2497 
2498 }
2499 
2500 VOID
media_set_curbe_i_vp8_mbenc(struct encode_state * encode_state,MEDIA_MBENC_CURBE_PARAMS_VP8 * params)2501 media_set_curbe_i_vp8_mbenc (struct encode_state *encode_state,
2502 			     MEDIA_MBENC_CURBE_PARAMS_VP8 * params)
2503 {
2504 
2505   VAQMatrixBufferVP8 *quant_params =
2506     (VAQMatrixBufferVP8 *) encode_state->q_matrix->buffer;
2507   VAEncSequenceParameterBufferVP8 *seq_params =
2508     (VAEncSequenceParameterBufferVP8 *) encode_state->seq_param_ext->buffer;
2509   VAEncPictureParameterBufferVP8 *pic_params =
2510     (VAEncPictureParameterBufferVP8 *) encode_state->pic_param_ext->buffer;
2511   UINT segmentation_enabled = pic_params->pic_flags.bits.segmentation_enabled;
2512   MEDIA_CURBE_DATA_MBENC_I_G75 *cmd =
2513     (MEDIA_CURBE_DATA_MBENC_I_G75 *) params->curbe_cmd_buff;
2514   UINT16 y_quanta_dc_idx, uv_quanta_dc_idx, uv_quanta_ac_idx;
2515 
2516   if (params->updated) {
2517       cmd->dw32.mb_enc_per_mb_out_data_surf_bti = 0;
2518       cmd->dw33.mb_enc_curr_y_bti = 1;
2519       cmd->dw34.mb_enc_curr_uv_bti = 1;	//2
2520       cmd->dw35.mb_mode_cost_luma_bti = 3;
2521       cmd->dw36.mb_enc_block_mode_cost_bti = 4;
2522       cmd->dw37.chroma_recon_surf_bti = 5;
2523       cmd->dw38.segmentation_map_bti = 6;
2524       cmd->dw39.histogram_bti = 7;
2525       cmd->dw40.mb_enc_vme_debug_stream_out_bti = 8;
2526       cmd->dw41.vme_bti = 9;
2527 
2528       return;
2529   }
2530 
2531   media_drv_memset (cmd, sizeof (*cmd));
2532 
2533   cmd->dw0.frame_width = (seq_params->frame_width + 15) & (~0xF);	/* kernel require MB boundary aligned dimensions */
2534   cmd->dw0.frame_height = (seq_params->frame_height + 15) & (~0xF);
2535   cmd->dw1.frame_type = 0;	/*key frame(I-frame) */
2536   cmd->dw1.enable_segmentation = segmentation_enabled;
2537   cmd->dw1.enable_hw_intra_prediction =
2538     (params->kernel_mode == PERFORMANCE_MODE) ? 1 : 0;
2539   cmd->dw1.enable_debug_dumps = 0;
2540   cmd->dw1.enable_chroma_ip_enhancement = 1;	/* always enabled and cannot be disabled */
2541   cmd->dw1.enable_mpu_histogram_update = 1;
2542   cmd->dw1.vme_enable_tm_check = 0;
2543   cmd->dw1.vme_distortion_measure = 2;	//defualt value is 2-HAAR transform
2544   cmd->dw1.reserved_mbz = 1;	//do we need to set this reserved bit to 1?
2545 
2546   y_quanta_dc_idx =
2547     quant_params->quantization_index[0] +
2548     quant_params->quantization_index_delta[0];
2549   y_quanta_dc_idx =
2550     y_quanta_dc_idx < 0 ? 0 : (y_quanta_dc_idx >
2551 			       MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2552 			       y_quanta_dc_idx);
2553   cmd->dw2.lambda_seg_0 =
2554     (UINT16) ((quant_dc_vp8_g75[y_quanta_dc_idx] *
2555 	       quant_dc_vp8_g75[y_quanta_dc_idx]) / 4);
2556 
2557   if (segmentation_enabled)
2558     {
2559       y_quanta_dc_idx =
2560 	quant_params->quantization_index[1] +
2561 	quant_params->quantization_index_delta[0];
2562       y_quanta_dc_idx =
2563 	y_quanta_dc_idx < 0 ? 0 : (y_quanta_dc_idx >
2564 				   MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2565 				   y_quanta_dc_idx);
2566       cmd->dw2.lambda_seg_1 =
2567 	(UINT16) ((quant_dc_vp8_g75[y_quanta_dc_idx] *
2568 		   quant_dc_vp8_g75[y_quanta_dc_idx]) / 4);
2569 
2570       y_quanta_dc_idx =
2571 	quant_params->quantization_index[2] +
2572 	quant_params->quantization_index_delta[0];
2573       y_quanta_dc_idx =
2574 	y_quanta_dc_idx < 0 ? 0 : (y_quanta_dc_idx >
2575 				   MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2576 				   y_quanta_dc_idx);
2577       cmd->dw3.lambda_seg_2 =
2578 	(UINT16) ((quant_dc_vp8_g75[y_quanta_dc_idx] *
2579 		   quant_dc_vp8_g75[y_quanta_dc_idx]) / 4);
2580 
2581       y_quanta_dc_idx =
2582 	quant_params->quantization_index[3] +
2583 	quant_params->quantization_index_delta[0];
2584       y_quanta_dc_idx =
2585 	y_quanta_dc_idx < 0 ? 0 : (y_quanta_dc_idx >
2586 				   MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2587 				   y_quanta_dc_idx);
2588       cmd->dw3.lambda_seg_3 =
2589 	(UINT16) ((quant_dc_vp8_g75[y_quanta_dc_idx] *
2590 		   quant_dc_vp8_g75[y_quanta_dc_idx]) / 4);
2591     }
2592 
2593   cmd->dw4.all_dc_bias_segment_0 = DC_BIAS_SEGMENT_DEFAULT_VAL_VP8;
2594   if (segmentation_enabled)
2595     {
2596       cmd->dw4.all_dc_bias_segment_1 = DC_BIAS_SEGMENT_DEFAULT_VAL_VP8;
2597       cmd->dw5.all_dc_bias_segment_2 = DC_BIAS_SEGMENT_DEFAULT_VAL_VP8;
2598       cmd->dw5.all_dc_bias_segment_3 = DC_BIAS_SEGMENT_DEFAULT_VAL_VP8;
2599     }
2600 
2601   uv_quanta_dc_idx =
2602     quant_params->quantization_index[0] +
2603     quant_params->quantization_index_delta[1];
2604   uv_quanta_dc_idx =
2605     uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2606 				MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2607 				uv_quanta_dc_idx);
2608   cmd->dw6.chroma_dc_de_quant_segment_0 = quant_dc_vp8_g75[uv_quanta_dc_idx];
2609   if (segmentation_enabled)
2610     {
2611       uv_quanta_dc_idx =
2612 	quant_params->quantization_index[1] +
2613 	quant_params->quantization_index_delta[1];
2614       uv_quanta_dc_idx =
2615 	uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2616 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2617 				    uv_quanta_dc_idx);
2618       cmd->dw6.chroma_dc_de_quant_segment_1 =
2619 	quant_dc_vp8_g75[uv_quanta_dc_idx];
2620       uv_quanta_dc_idx =
2621 	quant_params->quantization_index[2] +
2622 	quant_params->quantization_index_delta[1];
2623       uv_quanta_dc_idx =
2624 	uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2625 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2626 				    uv_quanta_dc_idx);
2627       cmd->dw7.chroma_dc_de_quant_segment_2 =
2628 	quant_dc_vp8_g75[uv_quanta_dc_idx];
2629       uv_quanta_dc_idx =
2630 	quant_params->quantization_index[3] +
2631 	quant_params->quantization_index_delta[1];
2632       uv_quanta_dc_idx =
2633 	uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2634 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2635 				    uv_quanta_dc_idx);
2636       cmd->dw7.chroma_dc_de_quant_segment_3 =
2637 	quant_dc_vp8_g75[uv_quanta_dc_idx];
2638     }
2639 
2640   uv_quanta_ac_idx =
2641     quant_params->quantization_index[0] +
2642     quant_params->quantization_index_delta[2];
2643   uv_quanta_ac_idx =
2644     uv_quanta_ac_idx < 0 ? 0 : (uv_quanta_ac_idx >
2645 				MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2646 				uv_quanta_ac_idx);
2647   cmd->dw8.chroma_ac_de_quant_segment0 = quant_ac_vp8_g75[uv_quanta_ac_idx];
2648   cmd->dw10.chroma_ac0_threshold0_segment0 =
2649     (UINT16) ((((((1) << 16) -
2650 		 1) * 1.0 / ((1 << 16) / quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2651 		((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7)) *
2652 	       (1 << 13) + 3400) / 2217.0);
2653   cmd->dw10.chroma_ac0_threshold1_segment0 =
2654     (UINT16) ((((((2) << 16) -
2655 		 1) * 1.0 / ((1 << 16) / quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2656 		((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7)) *
2657 	       (1 << 13) + 3400) / 2217.0);
2658   if (segmentation_enabled)
2659     {
2660       uv_quanta_ac_idx =
2661 	quant_params->quantization_index[1] +
2662 	quant_params->quantization_index_delta[2];
2663       uv_quanta_ac_idx =
2664 	uv_quanta_ac_idx < 0 ? 0 : (uv_quanta_ac_idx >
2665 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2666 				    uv_quanta_ac_idx);
2667       cmd->dw8.chroma_ac_de_quant_segment1 =
2668 	quant_ac_vp8_g75[uv_quanta_ac_idx];
2669       cmd->dw10.chroma_ac0_threshold0_segment0 =
2670 	(UINT16) ((((((1) << 16) -
2671 		     1) * 1.0 / ((1 << 16) /
2672 				 quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2673 		    ((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7)) *
2674 		   (1 << 13) + 3400) / 2217.0);
2675       cmd->dw10.chroma_ac0_threshold1_segment0 =
2676 	(UINT16) ((((((2) << 16) -
2677 		     1) * 1.0 / ((1 << 16) /
2678 				 quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2679 		    ((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7)) *
2680 		   (1 << 13) + 3400) / 2217.0);
2681 
2682       uv_quanta_ac_idx =
2683 	quant_params->quantization_index[2] +
2684 	quant_params->quantization_index_delta[2];
2685       uv_quanta_ac_idx =
2686 	uv_quanta_ac_idx < 0 ? 0 : (uv_quanta_ac_idx >
2687 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2688 				    uv_quanta_ac_idx);
2689       cmd->dw9.chroma_ac_de_quant_segment2 =
2690 	quant_ac_vp8_g75[uv_quanta_ac_idx];
2691       cmd->dw12.chroma_ac0_threshold0_segment2 =
2692 	(UINT16) ((((((1) << 16) -
2693 		     1) * 1.0 / ((1 << 16) /
2694 				 quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2695 		    ((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7)) *
2696 		   (1 << 13) + 3400) / 2217.0);
2697       cmd->dw12.chroma_ac0_threshold1_segment2 =
2698 	(UINT16) ((((((2) << 16) -
2699 		     1) * 1.0 / ((1 << 16) /
2700 				 quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2701 		    ((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7)) *
2702 		   (1 << 13) + 3400) / 2217.0);
2703 
2704       uv_quanta_ac_idx =
2705 	quant_params->quantization_index[3] +
2706 	quant_params->quantization_index_delta[2];
2707       uv_quanta_ac_idx =
2708 	uv_quanta_ac_idx < 0 ? 0 : (uv_quanta_ac_idx >
2709 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2710 				    uv_quanta_ac_idx);
2711       cmd->dw9.chroma_ac_de_quant_segment3 =
2712 	quant_ac_vp8_g75[uv_quanta_ac_idx];
2713       cmd->dw13.chroma_ac0_threshold0_segment3 =
2714 	(UINT16) ((((((1) << 16) -
2715 		     1) * 1.0 / ((1 << 16) /
2716 				 quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2717 		    ((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7)) *
2718 		   (1 << 13) + 3400) / 2217.0);
2719       cmd->dw13.chroma_ac0_threshold1_segment3 =
2720 	(UINT16) ((((((2) << 16) -
2721 		     1) * 1.0 / ((1 << 16) /
2722 				 quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2723 		    ((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7)) *
2724 		   (1 << 13) + 3400) / 2217.0);
2725     }
2726 
2727   uv_quanta_dc_idx =
2728     quant_params->quantization_index[0] +
2729     quant_params->quantization_index_delta[1];
2730   uv_quanta_dc_idx =
2731     uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2732 				MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2733 				uv_quanta_dc_idx);
2734   cmd->dw14.chroma_dc_threshold0_segment0 =
2735     (((1) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2736     ((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2737   cmd->dw14.chroma_dc_threshold1_segment0 =
2738     (((2) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2739     ((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2740   cmd->dw15.chroma_dc_threshold2_segment0 =
2741     (((3) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2742     ((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2743   cmd->dw15.chroma_dc_threshold3_segment0 =
2744     (((4) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2745     ((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2746   if (segmentation_enabled)
2747     {
2748       uv_quanta_dc_idx =
2749 	quant_params->quantization_index[1] +
2750 	quant_params->quantization_index_delta[1];
2751       uv_quanta_dc_idx =
2752 	uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2753 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2754 				    uv_quanta_dc_idx);
2755       cmd->dw16.chroma_dc_threshold0_segment1 =
2756 	(((1) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2757 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2758       cmd->dw16.chroma_dc_threshold1_segment1 =
2759 	(((2) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2760 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2761       cmd->dw17.chroma_dc_threshold2_segment1 =
2762 	(((3) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2763 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2764       cmd->dw17.chroma_dc_threshold3_segment1 =
2765 	(((4) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2766 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2767 
2768       uv_quanta_dc_idx =
2769 	quant_params->quantization_index[2] +
2770 	quant_params->quantization_index_delta[1];
2771       uv_quanta_dc_idx =
2772 	uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2773 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2774 				    uv_quanta_dc_idx);
2775       cmd->dw18.chroma_dc_threshold0_segment2 =
2776 	(((1) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2777 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2778       cmd->dw18.chroma_dc_threshold1_segment2 =
2779 	(((2) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2780 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2781       cmd->dw19.chroma_dc_threshold2_segment2 =
2782 	(((3) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2783 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2784       cmd->dw19.chroma_dc_threshold3_segment2 =
2785 	(((4) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2786 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2787 
2788       uv_quanta_dc_idx =
2789 	quant_params->quantization_index[3] +
2790 	quant_params->quantization_index_delta[1];
2791       uv_quanta_dc_idx =
2792 	uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2793 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2794 				    uv_quanta_dc_idx);
2795       cmd->dw20.chroma_dc_threshold0_segment3 =
2796 	(((1) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2797 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2798       cmd->dw20.chroma_dc_threshold1_segment3 =
2799 	(((2) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2800 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2801       cmd->dw21.chroma_dc_threshold2_segment3 =
2802 	(((3) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2803 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2804       cmd->dw21.chroma_dc_threshold3_segment3 =
2805 	(((4) << 16) - 1) / ((1 << 16) / quant_dc_vp8_g75[uv_quanta_dc_idx]) -
2806 	((48 * quant_dc_vp8_g75[uv_quanta_dc_idx]) >> 7);
2807     }
2808 
2809   uv_quanta_ac_idx =
2810     quant_params->quantization_index[0] +
2811     quant_params->quantization_index_delta[2];
2812   uv_quanta_ac_idx =
2813     uv_quanta_ac_idx < 0 ? 0 : (uv_quanta_ac_idx >
2814 				MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2815 				uv_quanta_ac_idx);
2816   cmd->dw22.chroma_ac1_threshold_segment0 =
2817     ((1 << (16)) - 1) / ((1 << 16) / quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2818     ((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7);
2819   if (segmentation_enabled)
2820     {
2821       uv_quanta_ac_idx =
2822 	quant_params->quantization_index[1] +
2823 	quant_params->quantization_index_delta[2];
2824       uv_quanta_ac_idx =
2825 	uv_quanta_ac_idx < 0 ? 0 : (uv_quanta_ac_idx >
2826 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2827 				    uv_quanta_ac_idx);
2828       cmd->dw22.chroma_ac1_threshold_segment1 =
2829 	((1 << (16)) - 1) / ((1 << 16) / quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2830 	((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7);
2831 
2832       uv_quanta_ac_idx =
2833 	quant_params->quantization_index[2] +
2834 	quant_params->quantization_index_delta[2];
2835       uv_quanta_ac_idx =
2836 	uv_quanta_ac_idx < 0 ? 0 : (uv_quanta_ac_idx >
2837 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2838 				    uv_quanta_ac_idx);
2839       cmd->dw23.chroma_ac1_threshold_segment2 =
2840 	((1 << (16)) - 1) / ((1 << 16) / quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2841 	((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7);
2842       uv_quanta_ac_idx =
2843 	quant_params->quantization_index[3] +
2844 	quant_params->quantization_index_delta[2];
2845       uv_quanta_ac_idx =
2846 	uv_quanta_ac_idx < 0 ? 0 : (uv_quanta_ac_idx >
2847 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2848 				    uv_quanta_ac_idx);
2849       cmd->dw23.chroma_ac1_threshold_segment3 =
2850 	((1 << (16)) - 1) / ((1 << 16) / quant_ac_vp8_g75[uv_quanta_ac_idx]) -
2851 	((48 * quant_ac_vp8_g75[uv_quanta_ac_idx]) >> 7);
2852     }
2853 
2854   uv_quanta_dc_idx =
2855     quant_params->quantization_index[0] +
2856     quant_params->quantization_index_delta[0];
2857   uv_quanta_dc_idx =
2858     uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2859 				MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2860 				uv_quanta_dc_idx);
2861 
2862   // if (params->brc_enabled)
2863   {
2864     cmd->dw24.vme_16x16_cost_segment0 =
2865       frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][0];
2866     cmd->dw25.vme_4x4_cost_segment0 =
2867       frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][1];
2868     cmd->dw26.vme_16x16_non_dc_penalty_segment0 =
2869       frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][2];
2870     cmd->dw27.vme_4x4_non_dc_penalty_segment0 =
2871       frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][3];
2872   }
2873 
2874   if (segmentation_enabled)
2875     {
2876       uv_quanta_dc_idx =
2877 	quant_params->quantization_index[1] +
2878 	quant_params->quantization_index_delta[0];
2879       uv_quanta_dc_idx =
2880 	uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2881 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2882 				    uv_quanta_dc_idx);
2883       cmd->dw24.vme_16x16_cost_segment1 =
2884 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][0];
2885       cmd->dw25.vme_4x4_cost_segment1 =
2886 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][1];
2887       cmd->dw26.vme_16x16_non_dc_penalty_segment1 =
2888 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][2];
2889       cmd->dw27.vme_4x4_non_dc_penalty_segment1 =
2890 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][3];
2891 
2892       uv_quanta_dc_idx =
2893 	quant_params->quantization_index[2] +
2894 	quant_params->quantization_index_delta[0];
2895       uv_quanta_dc_idx =
2896 	uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2897 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2898 				    uv_quanta_dc_idx);
2899       cmd->dw24.vme_16x16_cost_segment2 =
2900 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][0];
2901       cmd->dw25.vme_4x4_cost_segment2 =
2902 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][1];
2903       cmd->dw26.vme_16x16_non_dc_penalty_segment2 =
2904 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][2];
2905       cmd->dw27.vme_4x4_non_dc_penalty_segment2 =
2906 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][3];
2907 
2908       uv_quanta_dc_idx =
2909 	quant_params->quantization_index[3] +
2910 	quant_params->quantization_index_delta[0];
2911       uv_quanta_dc_idx =
2912 	uv_quanta_dc_idx < 0 ? 0 : (uv_quanta_dc_idx >
2913 				    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 :
2914 				    uv_quanta_dc_idx);
2915       cmd->dw24.vme_16x16_cost_segment3 =
2916 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][0];
2917       cmd->dw25.vme_4x4_cost_segment3 =
2918 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][1];
2919       cmd->dw26.vme_16x16_non_dc_penalty_segment3 =
2920 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][2];
2921       cmd->dw27.vme_4x4_non_dc_penalty_segment3 =
2922 	frame_i_vme_cost_vp8_g75[uv_quanta_dc_idx & 0x7F][3];
2923     }
2924   //pic_params->segmentation_enabled = 0;
2925 
2926   cmd->dw32.mb_enc_per_mb_out_data_surf_bti = 0;
2927   cmd->dw33.mb_enc_curr_y_bti = 1;
2928   cmd->dw34.mb_enc_curr_uv_bti = 1;	//2
2929   cmd->dw35.mb_mode_cost_luma_bti = 3;
2930   cmd->dw36.mb_enc_block_mode_cost_bti = 4;
2931   cmd->dw37.chroma_recon_surf_bti = 5;
2932   cmd->dw38.segmentation_map_bti = 6;
2933   cmd->dw39.histogram_bti = 7;
2934   cmd->dw40.mb_enc_vme_debug_stream_out_bti = 8;
2935   cmd->dw41.vme_bti = 9;
2936 
2937   if (params->mb_enc_iframe_dist_in_use)
2938     {
2939       cmd->dw42.idist_surface = 10;
2940       cmd->dw43.curr_y_surface4x_downscaled = 11;
2941       cmd->dw44.vme_coarse_intra_surface = 12;
2942     }
2943 }
2944 
2945 VOID
media_set_curbe_p_vp8_mbenc(struct encode_state * encode_state,MEDIA_MBENC_CURBE_PARAMS_VP8 * params)2946 media_set_curbe_p_vp8_mbenc (struct encode_state *encode_state,
2947 			     MEDIA_MBENC_CURBE_PARAMS_VP8 * params)
2948 {
2949   VAQMatrixBufferVP8 *quant_params =
2950     (VAQMatrixBufferVP8 *) encode_state->q_matrix->buffer;
2951   VAEncSequenceParameterBufferVP8 *seq_params =
2952     (VAEncSequenceParameterBufferVP8 *) encode_state->seq_param_ext->buffer;
2953   VAEncPictureParameterBufferVP8 *pic_params =
2954     (VAEncPictureParameterBufferVP8 *) encode_state->pic_param_ext->buffer;
2955   UINT segmentation_enabled = pic_params->pic_flags.bits.segmentation_enabled;
2956   UINT version = pic_params->pic_flags.bits.version;
2957   MEDIA_CURBE_DATA_MBENC_P_G75 *cmd =
2958     (MEDIA_CURBE_DATA_MBENC_P_G75 *) params->curbe_cmd_buff;;
2959   UINT16 luma_dc_seg0, luma_dc_seg1, luma_dc_seg2, luma_dc_seg3;
2960   UINT16 qp_seg0, qp_seg1, qp_seg2, qp_seg3;
2961 
2962   if (params->updated == TRUE)
2963     {
2964       cmd->dw81.per_mb_output_data_surface_bti = 0;
2965       cmd->dw82.current_picture_y_surface_bti = 1;
2966       cmd->dw83.current_picture_interleaved_uv_surface_bti = 1;
2967       cmd->dw84.hme_mv_data_surface_bti = 3;
2968       cmd->dw85.mv_data_surface_bti = 4;
2969       cmd->dw86.mb_count_per_reference_frame_bti = 5;
2970       cmd->dw87.vme_inter_prediction_bti = 8;
2971       cmd->dw88.last_picture_bti = 9;
2972       cmd->dw89.gold_picture_bti = 11;
2973       cmd->dw90.alternate_picture_bti = 13;
2974       cmd->dw91.per_mb_quant_data_bti = 15;
2975       cmd->dw92.segment_map_bti = 16;
2976       cmd->dw93.inter_prediction_distortion_bti = 17;
2977       cmd->dw94.histogram_bti = 18;
2978       cmd->dw95.pred_mv_data_bti = 19;
2979       cmd->dw96.mode_cost_update_bti = 20;
2980       cmd->dw97.kernel_debug_dump_bti = 21;
2981 
2982       return;
2983     }
2984 
2985   media_drv_memset (cmd, sizeof (MEDIA_CURBE_DATA_MBENC_P_G75));
2986 
2987   luma_dc_seg0 =
2988     quant_params->quantization_index[0] +
2989     quant_params->quantization_index_delta[0];
2990   luma_dc_seg1 =
2991     quant_params->quantization_index[1] +
2992     quant_params->quantization_index_delta[0];
2993   luma_dc_seg2 =
2994     quant_params->quantization_index[2] +
2995     quant_params->quantization_index_delta[0];
2996   luma_dc_seg3 =
2997     quant_params->quantization_index[3] +
2998     quant_params->quantization_index_delta[0];
2999 
3000   qp_seg0 =
3001     luma_dc_seg0 < 0 ? 0 : (luma_dc_seg0 >
3002 			    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 : luma_dc_seg0);
3003   qp_seg1 =
3004     luma_dc_seg1 < 0 ? 0 : (luma_dc_seg1 >
3005 			    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 : luma_dc_seg1);
3006   qp_seg2 =
3007     luma_dc_seg2 < 0 ? 0 : (luma_dc_seg2 >
3008 			    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 : luma_dc_seg2);
3009   qp_seg3 =
3010     luma_dc_seg3 < 0 ? 0 : (luma_dc_seg3 >
3011 			    MAX_QP_VP8_G75 ? MAX_QP_VP8_G75 : luma_dc_seg3);
3012 
3013   BYTE me_method = (params->kernel_mode == NORMAL_MODE) ? 6 : 4;
3014 
3015   //dw0
3016   cmd->dw0.frame_width = (seq_params->frame_width + 15) & (~0xF);
3017   cmd->dw0.frame_height = (seq_params->frame_height + 15) & (~0xF);
3018   // dw1
3019   cmd->dw1.frame_type = 1;	// P-frame
3020   cmd->dw1.motion_compensation_filter_type =
3021     (version == 0) ? 0 /*6-tap filter */ :
3022     ((version == 3) ? 2 : 1);
3023 
3024   cmd->dw1.hme_enable = params->hme_enabled;
3025   cmd->dw1.hme_combine_overlap = (params->kernel_mode == NORMAL_MODE) ? 1 : 2;
3026   cmd->dw1.multiple_pred_enable = 0;
3027   cmd->dw1.ref_ctrl = params->ref_frame_ctrl;
3028   cmd->dw1.enable_segmentation = segmentation_enabled;
3029   cmd->dw1.enable_segmentation_info_update = 0;
3030   cmd->dw1.multi_reference_qp_check = 1;
3031   cmd->dw1.mode_cost_enable_flag = 0;
3032   cmd->dw1.hme_coarse_shape = 2;
3033 
3034   if (params->brc_enabled)
3035     cmd->dw1.mode_cost_enable_flag = 1;
3036 
3037   //dw2
3038   cmd->dw2.lambda_intra_segment0 = quant_dc_vp8_g75[qp_seg0];
3039   cmd->dw2.lambda_inter_segment0 = (quant_dc_vp8_g75[qp_seg0] >> 2);
3040 
3041   if (segmentation_enabled)
3042     {
3043       //dw3
3044       cmd->dw3.lambda_intra_segment1 = (quant_dc_vp8_g75[qp_seg1]);
3045       cmd->dw3.lambda_inter_segment1 = (quant_dc_vp8_g75[qp_seg1] >> 2);
3046       //dw4
3047       cmd->dw4.lambda_intra_segment2 = (quant_dc_vp8_g75[qp_seg2]);
3048       cmd->dw4.lambda_inter_segment2 = (quant_dc_vp8_g75[qp_seg2] >> 2);
3049       //dw5
3050       cmd->dw5.lambda_intra_segment3 = (quant_dc_vp8_g75[qp_seg3]);
3051       cmd->dw5.lambda_inter_segment3 = (quant_dc_vp8_g75[qp_seg3] >> 2);
3052     }
3053 
3054   if (params->brc_enabled == TRUE)
3055     {
3056       cmd->dw2.lambda_intra_segment0 = cmd->dw3.lambda_intra_segment1 =
3057 	cmd->dw4.lambda_intra_segment2 = cmd->dw5.lambda_intra_segment3 = 0;
3058     }
3059 
3060   //dw6
3061   cmd->dw6.reference_frame_sign_bias_3 =
3062     pic_params->pic_flags.bits.sign_bias_golden;
3063   cmd->dw6.reference_frame_sign_bias_2 =
3064     pic_params->pic_flags.bits.sign_bias_alternate;
3065   cmd->dw6.reference_frame_sign_bias_1 =
3066     pic_params->pic_flags.bits.sign_bias_golden ^ pic_params->pic_flags.
3067     bits.sign_bias_alternate;
3068   cmd->dw6.reference_frame_sign_bias_0 = 0;
3069   //dw7
3070   cmd->dw7.raw_dist_threshold = 0;	//kernel is currently setting it to 0
3071   //dw8
3072   cmd->dw8.early_ime_successful_stop_threshold = 0;
3073   cmd->dw8.adaptive_search_enable =
3074     (params->kernel_mode != PERFORMANCE_MODE) ? 1 : 0;
3075   cmd->dw8.skip_mode_enable = 1;
3076   cmd->dw8.bidirectional_mix_disbale = 0;
3077   cmd->dw8.transform8x8_flag_for_inter_enable = 0;
3078   cmd->dw8.early_ime_success_enable = 0;
3079   //dw9
3080   cmd->dw9.ref_pixel_bias_enable = 0;
3081   cmd->dw9.unidirection_mix_enable = 0;
3082   cmd->dw9.bidirectional_weight = 0;
3083   cmd->dw9.ref_id_polarity_bits = 0;
3084   cmd->dw9.max_num_of_motion_vectors = 0 /* 32 */ ;	// from Bdw
3085   //dw10
3086   cmd->dw10.max_fixed_search_path_length =
3087     (params->kernel_mode ==
3088      NORMAL_MODE) ? 16 : ((params->kernel_mode == PERFORMANCE_MODE) ? 9 : 57);
3089   cmd->dw10.maximum_search_path_length = 57;
3090   //dw11
3091   cmd->dw11.submacro_block_subPartition_mask = 0 /* 0x30 */ ;	//from Bdw
3092   cmd->dw11.intra_sad_measure_adjustment = 2;
3093   cmd->dw11.inter_sad_measure_adjustment = 2;
3094   cmd->dw11.block_based_skip_enable = 0;
3095   cmd->dw11.bme_disable_for_fbr_message = 0 /* 1 */ ;	// from Bdw
3096   cmd->dw11.forward_trans_form_skip_check_enable = 0;
3097   cmd->dw11.process_inter_chroma_pixels_mode = 0;
3098   cmd->dw11.disable_field_cache_allocation = 0;
3099   cmd->dw11.skip_mode_type = 0;
3100   cmd->dw11.sub_pel_mode = 3;
3101   cmd->dw11.dual_search_path_option = 0;
3102   cmd->dw11.search_control = 0;
3103   cmd->dw11.reference_access = 0;
3104   cmd->dw11.source_access = 0;
3105   cmd->dw11.inter_mb_type_road_map = 0;
3106   cmd->dw11.source_block_size = 0;
3107   //dw12
3108   cmd->dw12.reference_search_windows_height =
3109     (params->kernel_mode != PERFORMANCE_MODE) ? 40 : 28;
3110   cmd->dw12.reference_search_windows_width =
3111     (params->kernel_mode != PERFORMANCE_MODE) ? 48 : 28;
3112   //dw13
3113   cmd->dw13.mode_0_3_cost_seg0 = cost_table_vp8_g75[qp_seg0][0];
3114   cmd->dw14.mode_4_7_cost_seg0 = cost_table_vp8_g75[qp_seg0][1];
3115   cmd->dw15.val = cost_table_vp8_g75[qp_seg0][2];
3116 
3117   if (params->brc_enabled == TRUE)
3118     {
3119       cmd->dw13.mode_0_3_cost_seg0 = cmd->dw14.mode_4_7_cost_seg0 =
3120 	cmd->dw15.val = 0;
3121     }
3122 
3123   // which table to load is selected by MEMethod parameter determined by the driver based on the usage model (normal/quality/performance)
3124   switch (me_method)
3125     {
3126     case 2:
3127       media_drv_memcpy (&(cmd->dw16), sizeof (single_su_vp8_g75),
3128 			(VOID *) single_su_vp8_g75,
3129 			sizeof (single_su_vp8_g75));
3130       break;
3131 
3132     case 3:
3133       media_drv_memcpy (&(cmd->dw16), sizeof (rasterscan_48x40_vp8_g75),
3134 			(VOID *) rasterscan_48x40_vp8_g75,
3135 			sizeof (rasterscan_48x40_vp8_g75));
3136       break;
3137 
3138     case 4:
3139     case 5:
3140       media_drv_memcpy (&(cmd->dw16), sizeof (fullspiral_48x40_vp8_g75),
3141 			(VOID *) fullspiral_48x40_vp8_g75,
3142 			sizeof (fullspiral_48x40_vp8_g75));
3143       break;
3144 
3145     case 6:
3146     default:
3147       media_drv_memcpy (&(cmd->dw16), sizeof (diamond_vp8_g75),
3148 			(VOID *) diamond_vp8_g75, sizeof (diamond_vp8_g75));
3149       break;
3150     }
3151   //dw30
3152   cmd->dw30.mv_cost_seg_val = cost_table_vp8_g75[qp_seg0][3];
3153   //dw31
3154   cmd->dw31.mv_cost_seg_val = cost_table_vp8_g75[qp_seg0][4];
3155   //dw32
3156   cmd->dw32.bilinear_enable = 0;
3157   cmd->dw32.intra_16x16_no_dc_penalty_segment0 =
3158     cost_table_vp8_g75[qp_seg0][5];
3159 
3160   if (params->brc_enabled == TRUE)
3161   {
3162     cmd->dw30.mv_cost_seg_val = cmd->dw31.mv_cost_seg_val = 0;
3163     cmd->dw32.intra_16x16_no_dc_penalty_segment0 = 0;
3164   }
3165 
3166   if (segmentation_enabled)
3167     {
3168       cmd->dw32.intra_16x16_no_dc_penalty_segment1 =
3169 	cost_table_vp8_g75[qp_seg1][5];
3170       cmd->dw33.intra_16x16_no_dc_penalty_segment2 =
3171 	cost_table_vp8_g75[qp_seg2][5];
3172       cmd->dw33.intra_16x16_no_dc_penalty_segment3 =
3173 	cost_table_vp8_g75[qp_seg3][5];
3174     }
3175 
3176   cmd->dw33.hme_combine_len = 8;	//based on target usage part of par file param
3177   //dw34 to dw57
3178   media_drv_memcpy (&(cmd->dw34), 24 * sizeof (UINT),
3179 		    (VOID *) mv_ref_cost_context_vp8_g75, 24 * sizeof (UINT));
3180 
3181   //dw58
3182   cmd->dw58.enc_cost_16x16 = 0;
3183   cmd->dw58.enc_cost_16x8 = 0x73C;
3184   //dw59
3185   cmd->dw59.enc_cost_8x8 = 0x365;
3186   cmd->dw59.enc_cost_4x4 = 0xDC9;
3187 
3188   //dw60
3189   if (cmd->dw1.mode_cost_enable_flag == 0) {
3190     cmd->dw60.frame_count_probability_ref_frame_cost_0 = 0x0204;
3191     cmd->dw60.frame_count_probability_ref_frame_cost_1 = 0x006a;
3192     //dw61
3193     cmd->dw61.frame_count_probability_ref_frame_cost_2 = 0x0967;
3194     cmd->dw61.frame_count_probability_ref_frame_cost_3 = 0x0969;
3195   }
3196 
3197   //dw62
3198   if (!params->brc_enabled) {
3199       MEDIA_ENCODER_VP8_SURFACE *vp8_surface;
3200       unsigned int qp;
3201 
3202       if (encode_state->ref_last_frame != NULL &&
3203 	  encode_state->ref_last_frame->bo != NULL &&
3204 	  encode_state->ref_last_frame->private_data) {
3205 	vp8_surface = (MEDIA_ENCODER_VP8_SURFACE *)encode_state->ref_last_frame->private_data;
3206 	qp = quant_dc_vp8_g75[vp8_surface->qp_index];
3207       } else {
3208 	qp = quant_dc_vp8_g75[qp_seg0];
3209       }
3210 
3211       cmd->dw62.average_qp_of_last_ref_frame = qp;
3212 
3213       if (encode_state->ref_gf_frame != NULL &&
3214 	  encode_state->ref_gf_frame->bo != NULL &&
3215 	  encode_state->ref_gf_frame->private_data) {
3216 	vp8_surface = (MEDIA_ENCODER_VP8_SURFACE *)encode_state->ref_gf_frame->private_data;
3217 	qp = quant_dc_vp8_g75[vp8_surface->qp_index];
3218       } else {
3219 	qp = quant_dc_vp8_g75[qp_seg0];
3220       }
3221 
3222       cmd->dw62.average_qp_of_gold_ref_frame = qp;
3223 
3224       if (encode_state->ref_arf_frame != NULL &&
3225 	  encode_state->ref_arf_frame->bo != NULL &&
3226 	  encode_state->ref_arf_frame->private_data) {
3227 	vp8_surface = (MEDIA_ENCODER_VP8_SURFACE *)encode_state->ref_arf_frame->private_data;
3228 	qp = quant_dc_vp8_g75[vp8_surface->qp_index];
3229       } else {
3230 	qp = quant_dc_vp8_g75[qp_seg0];
3231       }
3232 
3233       cmd->dw62.average_qp_of_alt_ref_frame = qp;
3234   } else {
3235     cmd->dw62.average_qp_of_last_ref_frame = quant_dc_vp8_g75[params->frame_update->ref_q_index[0]];
3236     cmd->dw62.average_qp_of_gold_ref_frame = quant_dc_vp8_g75[params->frame_update->ref_q_index[1]];
3237     cmd->dw62.average_qp_of_alt_ref_frame  = quant_dc_vp8_g75[params->frame_update->ref_q_index[2]];
3238   }
3239 
3240   //dw63
3241   cmd->dw63.intra_4x4_no_dc_penalty_segment0 = cost_table_vp8_g75[qp_seg0][6];
3242 
3243   if (segmentation_enabled)
3244     {
3245 
3246       cmd->dw63.intra_4x4_no_dc_penalty_segment1 =
3247 	cost_table_vp8_g75[qp_seg1][6];
3248       cmd->dw63.intra_4x4_no_dc_penalty_segment2 =
3249 	cost_table_vp8_g75[qp_seg2][6];
3250       cmd->dw63.intra_4x4_no_dc_penalty_segment3 =
3251 	cost_table_vp8_g75[qp_seg3][6];
3252 
3253       //dw64
3254       cmd->dw64.mode_cost_seg_1_val = cost_table_vp8_g75[qp_seg1][0];
3255       //dw65
3256       cmd->dw65.mode_cost_seg_1_val = cost_table_vp8_g75[qp_seg1][1];
3257       //dw66
3258       cmd->dw66.mode_cost_seg_1_val = cost_table_vp8_g75[qp_seg1][2];
3259       //dw67
3260       cmd->dw67.mv_cost_seg1_val = cost_table_vp8_g75[qp_seg1][3];
3261       //dw68
3262       cmd->dw68.mv_cost_seg1_val = cost_table_vp8_g75[qp_seg1][4];
3263       //dw69
3264       cmd->dw69.mv_cost_seg2_val = cost_table_vp8_g75[qp_seg2][0];
3265       //dw70
3266       cmd->dw70.mv_cost_seg2_val = cost_table_vp8_g75[qp_seg2][1];
3267       //dw71
3268       cmd->dw71.mv_cost_seg2_val = cost_table_vp8_g75[qp_seg2][2];
3269       //dw72
3270       cmd->dw72.mv_cost_seg2 = cost_table_vp8_g75[qp_seg2][3];
3271       //dw73
3272       cmd->dw73.mv_cost_seg2 = cost_table_vp8_g75[qp_seg2][4];
3273       //dw74
3274       cmd->dw74.mode_cost_seg3 = cost_table_vp8_g75[qp_seg3][0];
3275       //dw75
3276       cmd->dw75.mode_cost_seg3 = cost_table_vp8_g75[qp_seg3][1];
3277       //dw76
3278       cmd->dw76.mode_cost_seg3 = cost_table_vp8_g75[qp_seg3][2];
3279       //dw77
3280       cmd->dw77.mv_cost_seg3 = cost_table_vp8_g75[qp_seg3][3];
3281       //dw78
3282       cmd->dw78.mv_cost_seg3 = cost_table_vp8_g75[qp_seg3][4];
3283     }
3284 
3285   //dw79
3286   cmd->dw79.new_mv_skip_threshold_segment0 =
3287     new_mv_skip_threshold_VP8_g75[qp_seg0];
3288 
3289   if (segmentation_enabled)
3290     {
3291       cmd->dw79.new_mv_skip_threshold_segment1 =
3292 	new_mv_skip_threshold_VP8_g75[qp_seg1];
3293       //dw80
3294       cmd->dw80.new_mv_skip_threshold_segment2 =
3295 	new_mv_skip_threshold_VP8_g75[qp_seg2];
3296       cmd->dw80.new_mv_skip_threshold_segment3 =
3297 	new_mv_skip_threshold_VP8_g75[qp_seg3];
3298     }
3299 
3300   //setup binding table index entries
3301   cmd->dw81.per_mb_output_data_surface_bti = 0;
3302   cmd->dw82.current_picture_y_surface_bti = 1;
3303   cmd->dw83.current_picture_interleaved_uv_surface_bti = 1;
3304   cmd->dw84.hme_mv_data_surface_bti = 3;
3305   cmd->dw85.mv_data_surface_bti = 4;
3306   cmd->dw86.mb_count_per_reference_frame_bti = 5;
3307   cmd->dw87.vme_inter_prediction_bti = 8;
3308   cmd->dw88.last_picture_bti = 9;
3309   cmd->dw89.gold_picture_bti = 11;
3310   cmd->dw90.alternate_picture_bti = 13;
3311   cmd->dw91.per_mb_quant_data_bti = 15;
3312   cmd->dw92.segment_map_bti = 16;
3313   cmd->dw93.inter_prediction_distortion_bti = 17;
3314   cmd->dw94.histogram_bti = 18;
3315   cmd->dw95.pred_mv_data_bti = 19;
3316   cmd->dw96.mode_cost_update_bti = 20;
3317   cmd->dw97.kernel_debug_dump_bti = 21;
3318 
3319 }
3320 
3321 VOID
media_set_curbe_vp8_me(VP8_ME_CURBE_PARAMS * params)3322 media_set_curbe_vp8_me (VP8_ME_CURBE_PARAMS * params)
3323 {
3324   UINT me_mode = 0, scale_factor = 0, me_method = 0;
3325   MEDIA_CURBE_DATA_ME *cmd = (MEDIA_CURBE_DATA_ME *) params->curbe_cmd_buff;
3326 
3327   media_drv_memcpy (cmd, sizeof (MEDIA_CURBE_DATA_ME), ME_CURBE_INIT_DATA,
3328 		    sizeof (MEDIA_CURBE_DATA_ME));
3329   me_mode =
3330     params->
3331     me_16x_enabled ? (params->me_16x ? ME16x_BEFORE_ME4x : ME4x_AFTER_ME16x) :
3332     ME4x_ONLY;
3333   scale_factor = (me_mode == ME16x_BEFORE_ME4x) ? 16 : 4;
3334   cmd->dw1.max_num_mvs = 0x10;
3335   cmd->dw1.bi_weight = 0;
3336   cmd->dw2.max_num_su = 57;
3337   cmd->dw2.max_len_sp =
3338     (params->kernel_mode ==
3339      NORMAL_MODE) ? 25 : ((params->kernel_mode == PERFORMANCE_MODE) ? 9 : 57);
3340   cmd->dw3.sub_mb_part_mask = 0x3F /* 0x30 */ ;	// changed from default to match the kernel team's curbe data
3341   cmd->dw3.inter_sad = 0;
3342   cmd->dw3.intra_sad = 0;
3343   cmd->dw3.bme_disable_fbr = 1;
3344   cmd->dw3.sub_pel_mode = 3;
3345 
3346   cmd->dw4.picture_height_minus1 =
3347     HEIGHT_IN_MACROBLOCKS (params->frame_field_height / scale_factor) - 1;
3348   cmd->dw4.picture_width =
3349     HEIGHT_IN_MACROBLOCKS (params->frame_width / scale_factor);
3350   cmd->dw5.ref_height = (params->kernel_mode != PERFORMANCE_MODE) ? 40 : 28;
3351   cmd->dw5.ref_width = (params->kernel_mode != PERFORMANCE_MODE) ? 48 : 28;
3352 
3353   cmd->dw6.me_modes = me_mode;
3354   cmd->dw6.super_combine_dist =
3355     (params->kernel_mode ==
3356      NORMAL_MODE) ? 5 : ((params->kernel_mode == PERFORMANCE_MODE) ? 0 : 1);
3357   cmd->dw6.max_vmv_range = 0x7fc;
3358 
3359   cmd->dw13.num_ref_idx_l0_minus_one = 0;
3360   cmd->dw13.num_ref_idx_l1_minus_one = 0;
3361   me_method = (params->kernel_mode == NORMAL_MODE) ? 6 : 4;
3362   media_drv_memcpy (&(cmd->dw16), 14 * sizeof (UINT),
3363 		    SEARCH_PATH_TABLE[0][me_method], 14 * sizeof (UINT));
3364 
3365   cmd->dw32.mv_data_surf = VP8_ME_MV_DATA_SURFACE_G75;
3366   cmd->dw33.mv_data_inp_surf = VP8_16xME_MV_DATA_SURFACE_G75;
3367   cmd->dw34.dist_surf = VP8_ME_DISTORTION_SURFACE_G75;
3368   cmd->dw35.min_dist_brc_surf = VP8_ME_BRC_DISTORTION_SURFACE_G75;
3369   cmd->dw36.mb_enc_vme_interpred = VP8_ME_INTER_PRED_G75;
3370 
3371 }
3372 
3373 VOID
media_add_binding_table(MEDIA_GPE_CTX * gpe_ctx)3374 media_add_binding_table (MEDIA_GPE_CTX * gpe_ctx)
3375 {
3376   BYTE *binding_surface_state_buf = NULL;
3377   UINT i;
3378   binding_surface_state_buf =
3379     (BYTE *) media_map_buffer_obj (gpe_ctx->surface_state_binding_table.
3380 				   res.bo);
3381   media_drv_memset (binding_surface_state_buf,
3382 		    gpe_ctx->surface_state_binding_table.res.bo->size);
3383 
3384   for (i = 0; i < LAST_BINDING_TABLE_ENTRIES; i++)
3385     {
3386       *((UINT *) ((BYTE *) binding_surface_state_buf +
3387 		  BINDING_TABLE_OFFSET (i))) =
3388 	SURFACE_STATE_OFFSET (i); /*<< BINDING_TABLE_SURFACE_SHIFT */ ;
3389 
3390     }
3391   media_unmap_buffer_obj (gpe_ctx->surface_state_binding_table.res.bo);
3392 
3393 }
3394 
3395 static VOID
media_gpe_set_surface_tiling_g7(SURFACE_STATE_G7 * cmd,UINT tiling)3396 media_gpe_set_surface_tiling_g7 (SURFACE_STATE_G7 * cmd, UINT tiling)
3397 {
3398   switch (tiling)
3399     {
3400     case I915_TILING_NONE:
3401       cmd->dw0.tiled_surface = 0;
3402       cmd->dw0.tile_walk = 0;
3403       break;
3404     case I915_TILING_X:
3405       cmd->dw0.tiled_surface = 1;
3406       cmd->dw0.tile_walk = MEDIA_TILEWALK_XMAJOR;
3407       break;
3408     case I915_TILING_Y:
3409       cmd->dw0.tiled_surface = 1;
3410       cmd->dw0.tile_walk = MEDIA_TILEWALK_YMAJOR;
3411       break;
3412     }
3413 }
3414 
3415 static VOID
media_gpe_set_surface_tiling_adv_g7(SURFACE_STATE_ADV_G7 * cmd,UINT tiling)3416 media_gpe_set_surface_tiling_adv_g7 (SURFACE_STATE_ADV_G7 * cmd, UINT tiling)
3417 {
3418   switch (tiling)
3419     {
3420     case I915_TILING_NONE:
3421       cmd->ss2.tiled_surface = 0;
3422       cmd->ss2.tile_walk = 0;
3423       break;
3424     case I915_TILING_X:
3425       cmd->ss2.tiled_surface = 1;
3426       cmd->ss2.tile_walk = MEDIA_TILEWALK_XMAJOR;
3427       break;
3428     case I915_TILING_Y:
3429       cmd->ss2.tiled_surface = 1;
3430       cmd->ss2.tile_walk = MEDIA_TILEWALK_YMAJOR;
3431       break;
3432     }
3433 }
3434 
3435 VOID
media_set_surface_state_adv(SURFACE_STATE_ADV_G7 * cmd,SURFACE_SET_PARAMS * params,INT format)3436 media_set_surface_state_adv (SURFACE_STATE_ADV_G7 * cmd,
3437 			     SURFACE_SET_PARAMS * params, INT format)
3438 {
3439   cmd->ss0.surface_base_address = params->surface_2d->bo->offset;
3440   cmd->ss1.cbcr_pixel_offset_v_direction = params->uv_direction;
3441   cmd->ss1.width = params->surface_2d->width - 1;
3442   cmd->ss1.height = params->surface_2d->height - 1;
3443   cmd->ss2.surface_format = format;
3444   cmd->ss2.interleave_chroma = 1;
3445   media_gpe_set_surface_tiling_adv_g7 (cmd, params->surface_2d->tiling);
3446   cmd->ss2.pitch = params->surface_2d->pitch - 1;
3447   cmd->ss2.surface_object_control_data = params->cacheability_control;
3448   cmd->ss3.y_offset_for_cb = params->surface_2d->y_cb_offset;	//(params->surface_2d->width * params->surface_2d->height);
3449 }
3450 
3451 VOID
media_set_surface_state_buffer_surface(SURFACE_STATE_G7 * cmd,SURFACE_SET_PARAMS * params,INT format,INT pitch)3452 media_set_surface_state_buffer_surface (SURFACE_STATE_G7 * cmd,
3453 					SURFACE_SET_PARAMS * params,
3454 					INT format, INT pitch)
3455 {
3456 
3457   // cmd->dw0.vert_line_stride_offset          = params->vert_line_stride_offset;
3458   //cmd->dw0.vert_line_stride    = params->vert_line_stride;
3459   cmd->dw0.surface_format = format;
3460   cmd->dw0.surface_type = MEDIA_SURFACE_BUFFER;
3461   cmd->dw0.tiled_surface = 0;
3462   cmd->dw0.surface_array_spacing = 0x1;
3463   cmd->dw1.base_addr = params->buf_object.bo->offset + params->offset;
3464   cmd->dw2.width = (params->size - 1) & 0x7F;
3465   cmd->dw2.height = ((params->size - 1) & 0x1FFF80) >> 7;
3466   cmd->dw3.depth = ((params->size - 1) & 0xFE00000) >> 21;
3467   cmd->dw3.surface_pitch = pitch;
3468   //cmd->dw5.y_offset                     = offset;
3469   cmd->dw5.obj_ctrl_state = params->cacheability_control;
3470   cmd->dw7.shader_chanel_select_a = HSW_SCS_ALPHA;
3471   cmd->dw7.shader_chanel_select_b = HSW_SCS_BLUE;
3472   cmd->dw7.shader_chanel_select_g = HSW_SCS_GREEN;
3473   cmd->dw7.shader_chanel_select_r = HSW_SCS_RED;
3474 }
3475 
3476 VOID
media_set_surface_state_2d_surface(SURFACE_STATE_G7 * cmd,SURFACE_SET_PARAMS * params,INT format,UINT width,UINT height,UINT offset,UINT cbcr_offset,UINT y_offset)3477 media_set_surface_state_2d_surface (SURFACE_STATE_G7 * cmd,
3478 				    SURFACE_SET_PARAMS * params, INT format,
3479 				    UINT width, UINT height,
3480 				    UINT offset,
3481 				    UINT cbcr_offset, UINT y_offset)
3482 {
3483   cmd->dw0.vert_line_stride_offset = params->vert_line_stride_offset;
3484   cmd->dw0.vert_line_stride = params->vert_line_stride;
3485   cmd->dw0.surface_format = format;
3486   cmd->dw0.surface_type = MEDIA_SURFACE_2D;
3487   media_gpe_set_surface_tiling_g7 (cmd, params->surface_2d->tiling);
3488 
3489   cmd->dw0.surface_array_spacing = params->surface_2d->surface_array_spacing;
3490   cmd->dw1.base_addr = params->surface_2d->bo->offset + cbcr_offset;
3491   cmd->dw2.width = width - 1;
3492   cmd->dw2.height = height - 1;
3493   cmd->dw3.surface_pitch = params->surface_2d->pitch - 1;
3494   cmd->dw5.y_offset = y_offset;
3495   cmd->dw5.obj_ctrl_state = params->cacheability_control;
3496   cmd->dw7.shader_chanel_select_a = HSW_SCS_ALPHA;
3497   cmd->dw7.shader_chanel_select_b = HSW_SCS_BLUE;
3498   cmd->dw7.shader_chanel_select_g = HSW_SCS_GREEN;
3499   cmd->dw7.shader_chanel_select_r = HSW_SCS_RED;
3500 }
3501 
3502 VOID
media_add_surface_state(SURFACE_SET_PARAMS * params)3503 media_add_surface_state (SURFACE_SET_PARAMS * params)
3504 {
3505   UINT width, height, format, pitch, tile_alignment, y_offset = 0;
3506   UINT write_domain;
3507 
3508   write_domain = (params->writable) ? I915_GEM_DOMAIN_RENDER : 0x0; // I915_GEM_DOMAIN_RENDER Write domain
3509 
3510   if (params->surface_is_2d)
3511     {
3512       SURFACE_STATE_G7 *cmd =
3513 	(SURFACE_STATE_G7 *) (params->binding_surface_state.buf +
3514 			      params->surface_state_offset);
3515       *cmd = SURFACE_STATE_INIT_G7;
3516       width =
3517 	(params->media_block_raw) ? ((params->surface_2d->width +
3518 				      0x3) >> 2) : params->surface_2d->width;
3519       height = params->surface_2d->height;
3520       media_set_surface_state_2d_surface (cmd, params, params->format, width,
3521 					  height, 0, 0, 0);
3522 
3523       dri_bo_emit_reloc (params->binding_surface_state.bo,
3524 			 I915_GEM_DOMAIN_RENDER,
3525 			 write_domain,
3526 			 0,
3527 			 params->surface_state_offset +
3528 			 offsetof (SURFACE_STATE_G7, dw1),
3529 			 params->surface_2d->bo);
3530 
3531       *((UINT *) ((CHAR *) params->binding_surface_state.buf +
3532 		  params->binding_table_offset)) =
3533 	params->surface_state_offset /*<< BINDING_TABLE_SURFACE_SHIFT */ ;
3534     }
3535   else if (params->surface_is_uv_2d)
3536     {
3537       UINT cbcr_offset;
3538       SURFACE_STATE_G7 *cmd =
3539 	(SURFACE_STATE_G7 *) (params->binding_surface_state.buf +
3540 			      params->surface_state_offset);
3541       *cmd = SURFACE_STATE_INIT_G7;
3542       if (params->surface_2d->tiling == I915_TILING_Y)
3543 	{
3544 	  tile_alignment = 32;
3545 	}
3546       else if (params->surface_2d->tiling == I915_TILING_X)
3547 	{
3548 	  tile_alignment = 8;
3549 	}
3550       else
3551 	tile_alignment = 1;
3552       width =
3553 	(params->media_block_raw) ? ((params->surface_2d->width +
3554 				      0x3) >> 2) : params->surface_2d->width;
3555       height = params->surface_2d->height / 2;
3556       y_offset = (params->surface_2d->y_cb_offset % tile_alignment) >> 1;
3557       cbcr_offset =
3558 	ALIGN_FLOOR ( /*params->surface_2d->height */ params->surface_2d->
3559 		     y_cb_offset, tile_alignment) *	/*params->surface_2d->width */
3560 	params->surface_2d->pitch;
3561       //cbcr_offset = params->surface_2d->y_cb_offset;
3562       media_set_surface_state_2d_surface (cmd, params,
3563 					  STATE_SURFACEFORMAT_R16_UINT, width,
3564 					  height, 0, cbcr_offset, y_offset);
3565 
3566       dri_bo_emit_reloc (params->binding_surface_state.bo,
3567 			 I915_GEM_DOMAIN_RENDER,
3568 			 write_domain,
3569 			 cbcr_offset,
3570 			 params->surface_state_offset +
3571 			 offsetof (SURFACE_STATE_G7, dw1),
3572 			 params->surface_2d->bo);
3573 
3574       *((UINT *) ((CHAR *) params->binding_surface_state.buf +
3575 		  params->binding_table_offset)) =
3576 	params->surface_state_offset /*<< BINDING_TABLE_SURFACE_SHIFT */ ;
3577     }
3578   else if (params->advance_state)
3579     {
3580 
3581       SURFACE_STATE_ADV_G7 *cmd =
3582 	(SURFACE_STATE_ADV_G7 *) (params->binding_surface_state.buf +
3583 				  params->surface_state_offset);
3584       *cmd = SURFACE_STATE_ADV_INIT_G7;
3585       media_set_surface_state_adv (cmd, params, MFX_SURFACE_PLANAR_420_8);
3586 
3587       dri_bo_emit_reloc (params->binding_surface_state.bo,
3588 			 I915_GEM_DOMAIN_RENDER,
3589 			 write_domain,
3590 			 params->offset,
3591 			 params->surface_state_offset +
3592 			 offsetof (SURFACE_STATE_ADV_G7, ss0),
3593 			 params->surface_2d->bo);
3594       *((UINT *) ((CHAR *) params->binding_surface_state.buf +
3595 		  params->binding_table_offset)) =
3596 	params->surface_state_offset /*<< BINDING_TABLE_SURFACE_SHIFT */ ;
3597     }
3598   else
3599     {
3600 
3601       SURFACE_STATE_G7 *cmd =
3602 	(SURFACE_STATE_G7 *) (params->binding_surface_state.buf +
3603 			      params->surface_state_offset);
3604       *cmd = SURFACE_STATE_INIT_G7;
3605       MEDIA_DRV_ASSERT (params->buf_object.bo);
3606 
3607       if (params->surface_is_raw)
3608 	{
3609 	  format = STATE_SURFACEFORMAT_RAW;
3610 	  pitch = 0;
3611 	}
3612       else
3613 	{
3614 	  format = STATE_SURFACEFORMAT_R32_UINT;
3615 	  pitch = sizeof (UINT) - 1;
3616 	}
3617 
3618       media_set_surface_state_buffer_surface (cmd, params, format, pitch);
3619       dri_bo_emit_reloc (params->binding_surface_state.bo,
3620 			 I915_GEM_DOMAIN_RENDER,
3621 			 write_domain,
3622 			 params->offset,
3623 			 params->surface_state_offset +
3624 			 offsetof (SURFACE_STATE_G7, dw1),
3625 			 params->buf_object.bo);
3626 
3627       *((UINT *) ((CHAR *) params->binding_surface_state.buf +
3628 		  params->binding_table_offset)) =
3629 	params->surface_state_offset /*<< BINDING_TABLE_SURFACE_SHIFT */ ;
3630     }
3631 
3632 }
3633 
3634 VOID
media_surface_state_vp8_mbpak(MEDIA_ENCODER_CTX * encoder_context,struct encode_state * encode_state,MBPAK_SURFACE_PARAMS_VP8 * mbpak_sutface_params)3635 media_surface_state_vp8_mbpak (MEDIA_ENCODER_CTX * encoder_context,
3636 			       struct encode_state *encode_state,
3637 			       MBPAK_SURFACE_PARAMS_VP8 *
3638 			       mbpak_sutface_params)
3639 {
3640   MBPAK_CONTEXT *mbpak_ctx = &encoder_context->mbpak_context;
3641   MEDIA_GPE_CTX *mbpak_gpe_ctx = &mbpak_ctx->gpe_context;
3642   SURFACE_SET_PARAMS params;
3643   UINT kernel_dump_offset = 0;
3644   struct object_surface *obj_surface;
3645   //struct object_buffer *obj_buffer;
3646   BYTE *binding_surface_state_buf = NULL;
3647   MEDIA_RESOURCE surface_2d;	//={0,0,0};
3648 
3649   if (mbpak_sutface_params->mbpak_phase_type == MBPAK_HYBRID_STATE_P2)
3650     mbpak_gpe_ctx = &mbpak_ctx->gpe_context2;
3651 
3652   binding_surface_state_buf =
3653     (BYTE *) media_map_buffer_obj (mbpak_gpe_ctx->
3654 				   surface_state_binding_table.res.bo);
3655   //coded data buffer
3656   params = surface_set_params_init;
3657   params.binding_surface_state.bo =
3658     mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3659   params.binding_surface_state.buf = binding_surface_state_buf;
3660   params.binding_table_offset = BINDING_TABLE_OFFSET (0);
3661   params.surface_state_offset = SURFACE_STATE_OFFSET (0);
3662   obj_surface = encode_state->coded_buf_surface;
3663   OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3664   params.buf_object = surface_2d;
3665   //params.surface_is_raw = 1;
3666   params.offset = 0;
3667   params.offset = encoder_context->mb_data_offset;
3668   params.cacheability_control = mbpak_sutface_params->cacheability_control;
3669   params.size = encoder_context->mb_data_in_bytes;
3670   encoder_context->media_add_surface_state (&params);
3671   //current pic luma
3672   params = surface_set_params_init;
3673   params.binding_surface_state.bo =
3674     mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3675   params.binding_surface_state.buf = binding_surface_state_buf;
3676   params.surface_is_2d = 1;
3677   params.media_block_raw = 0;
3678   params.vert_line_stride_offset = 0;
3679   params.vert_line_stride = 0;
3680   params.format = STATE_SURFACEFORMAT_R8_UNORM;
3681   params.binding_table_offset = BINDING_TABLE_OFFSET (1);
3682   params.surface_state_offset = SURFACE_STATE_OFFSET (1);
3683   obj_surface = encode_state->input_yuv_object;
3684   OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3685   params.surface_2d = &surface_2d;
3686   params.cacheability_control = mbpak_sutface_params->cacheability_control;
3687   encoder_context->media_add_surface_state (&params);
3688 
3689 //current pic uv
3690   params = surface_set_params_init;
3691   params.binding_surface_state.bo =
3692     mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3693   params.binding_surface_state.buf = binding_surface_state_buf;
3694   params.surface_is_uv_2d = 1;
3695   params.media_block_raw = 0;
3696   params.vert_line_stride_offset = 0;
3697   params.vert_line_stride = 0;
3698   params.format = STATE_SURFACEFORMAT_R8_UNORM;
3699   params.binding_table_offset = BINDING_TABLE_OFFSET (2);
3700   params.surface_state_offset = SURFACE_STATE_OFFSET (2);
3701   obj_surface = encode_state->input_yuv_object;
3702   OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3703   params.surface_2d = &surface_2d;
3704   params.cacheability_control = mbpak_sutface_params->cacheability_control;
3705   encoder_context->media_add_surface_state (&params);
3706 
3707   //current reconstructed picture luma
3708   params = surface_set_params_init;
3709   params.binding_surface_state.bo =
3710     mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3711   params.binding_surface_state.buf = binding_surface_state_buf;
3712   params.surface_is_2d = 1;
3713   params.media_block_raw = 0;
3714   params.vert_line_stride_offset = 0;
3715   params.vert_line_stride = 0;
3716   params.format = STATE_SURFACEFORMAT_R8_UNORM;
3717   params.binding_table_offset = BINDING_TABLE_OFFSET (3);
3718   params.surface_state_offset = SURFACE_STATE_OFFSET (3);
3719   obj_surface = encode_state->reconstructed_object;
3720   OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3721   params.surface_2d = &surface_2d;
3722   params.cacheability_control = mbpak_sutface_params->cacheability_control;
3723   encoder_context->media_add_surface_state (&params);
3724 
3725 // current reconstructed picture uv
3726   params = surface_set_params_init;
3727   params.binding_surface_state.bo =
3728     mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3729   params.binding_surface_state.buf = binding_surface_state_buf;
3730   params.surface_is_uv_2d = 1;
3731   params.media_block_raw = 0;
3732   params.vert_line_stride_offset = 0;
3733   params.vert_line_stride = 0;
3734   params.format = STATE_SURFACEFORMAT_R8_UNORM;
3735   params.binding_table_offset = BINDING_TABLE_OFFSET (4);
3736   params.surface_state_offset = SURFACE_STATE_OFFSET (4);
3737   obj_surface = encode_state->reconstructed_object;
3738   OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3739   params.surface_2d = &surface_2d;
3740   params.cacheability_control = mbpak_sutface_params->cacheability_control;
3741   encoder_context->media_add_surface_state (&params);
3742 
3743   if (mbpak_sutface_params->mbpak_phase_type == MBPAK_HYBRID_STATE_P1)
3744     {
3745       //MV Data surface
3746       params = surface_set_params_init;
3747       params.binding_surface_state.bo =
3748 	mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3749       params.binding_surface_state.buf = binding_surface_state_buf;
3750       params.binding_table_offset = BINDING_TABLE_OFFSET (11);
3751       params.surface_state_offset = SURFACE_STATE_OFFSET (11);
3752       obj_surface = encode_state->coded_buf_surface;
3753       OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3754       params.buf_object = surface_2d;
3755       //params.surface_is_raw = 1;
3756       params.offset = encoder_context->mv_offset;
3757       params.size = encoder_context->mv_in_bytes;
3758 
3759       params.cacheability_control =
3760 	mbpak_sutface_params->cacheability_control;
3761       encoder_context->media_add_surface_state (&params);
3762 
3763       //last ref
3764       if (encode_state->ref_last_frame != NULL
3765 	  && encode_state->ref_last_frame->bo != NULL)
3766 	{
3767 	  params = surface_set_params_init;
3768 	  params.binding_surface_state.bo =
3769 	    mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3770 	  params.binding_surface_state.buf = binding_surface_state_buf;
3771 	  params.surface_is_2d = 1;
3772 	  params.media_block_raw = 1;
3773 
3774 	  //params.advance_state = 1;
3775 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
3776 	  params.binding_table_offset = BINDING_TABLE_OFFSET (5);
3777 	  params.surface_state_offset = SURFACE_STATE_OFFSET (5);
3778 	  obj_surface = encode_state->ref_last_frame;
3779 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3780 	  params.surface_2d = &surface_2d;
3781 	  params.cacheability_control =
3782 	    mbpak_sutface_params->cacheability_control;
3783 	  encoder_context->media_add_surface_state (&params);
3784 
3785 	  params = surface_set_params_init;
3786 	  params.binding_surface_state.bo =
3787 	    mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3788 	  params.binding_surface_state.buf = binding_surface_state_buf;
3789 	  params.surface_is_uv_2d = 1;
3790 	  params.media_block_raw = 1;
3791 	  //params.advance_state = 1;
3792 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
3793 	  params.binding_table_offset = BINDING_TABLE_OFFSET (6);
3794 	  params.surface_state_offset = SURFACE_STATE_OFFSET (6);
3795 	  obj_surface = encode_state->ref_last_frame;
3796 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3797 	  params.surface_2d = &surface_2d;
3798 	  params.cacheability_control =
3799 	    mbpak_sutface_params->cacheability_control;
3800 	  encoder_context->media_add_surface_state (&params);
3801 	}
3802 
3803       //goldeb ref
3804       if (encode_state->ref_gf_frame != NULL
3805 	  && encode_state->ref_gf_frame->bo != NULL)
3806 	{
3807 	  params = surface_set_params_init;
3808 	  params.binding_surface_state.bo =
3809 	    mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3810 	  params.binding_surface_state.buf = binding_surface_state_buf;
3811 	  //params.advance_state = 1;
3812 	  params.surface_is_2d = 1;
3813 	  params.media_block_raw = 1;
3814 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
3815 	  params.binding_table_offset = BINDING_TABLE_OFFSET (7);
3816 	  params.surface_state_offset = SURFACE_STATE_OFFSET (7);
3817 	  obj_surface = encode_state->ref_gf_frame;
3818 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3819 	  params.surface_2d = &surface_2d;
3820 	  params.cacheability_control =
3821 	    mbpak_sutface_params->cacheability_control;
3822 	  encoder_context->media_add_surface_state (&params);
3823 
3824 	  params = surface_set_params_init;
3825 	  params.binding_surface_state.bo =
3826 	    mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3827 	  params.binding_surface_state.buf = binding_surface_state_buf;
3828 	  //params.advance_state = 1;
3829 	  params.surface_is_uv_2d = 1;
3830 	  params.media_block_raw = 1;
3831 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
3832 	  params.binding_table_offset = BINDING_TABLE_OFFSET (8);
3833 	  params.surface_state_offset = SURFACE_STATE_OFFSET (8);
3834 	  obj_surface = encode_state->ref_gf_frame;
3835 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3836 	  params.surface_2d = &surface_2d;
3837 	  params.cacheability_control =
3838 	    mbpak_sutface_params->cacheability_control;
3839 	  encoder_context->media_add_surface_state (&params);
3840 
3841 	}
3842 
3843       //alterbate ref
3844       if (encode_state->ref_arf_frame != NULL
3845 	  && encode_state->ref_arf_frame->bo != NULL)
3846 	{
3847 	  params = surface_set_params_init;
3848 	  params.binding_surface_state.bo =
3849 	    mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3850 	  params.binding_surface_state.buf = binding_surface_state_buf;
3851 	  //params.advance_state = 1;
3852 	  params.surface_is_2d = 1;
3853 	  params.media_block_raw = 1;
3854 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
3855 	  params.binding_table_offset = BINDING_TABLE_OFFSET (9);
3856 	  params.surface_state_offset = SURFACE_STATE_OFFSET (9);
3857 	  obj_surface = encode_state->ref_arf_frame;
3858 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3859 	  params.surface_2d = &surface_2d;
3860 	  params.cacheability_control =
3861 	    mbpak_sutface_params->cacheability_control;
3862 	  encoder_context->media_add_surface_state (&params);
3863 
3864 	  params = surface_set_params_init;
3865 	  params.binding_surface_state.bo =
3866 	    mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3867 	  params.binding_surface_state.buf = binding_surface_state_buf;
3868 	  //params.advance_state = 1;
3869 	  params.surface_is_uv_2d = 1;
3870 	  params.media_block_raw = 1;
3871 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
3872 	  params.binding_table_offset = BINDING_TABLE_OFFSET (10);
3873 	  params.surface_state_offset = SURFACE_STATE_OFFSET (10);
3874 	  obj_surface = encode_state->ref_arf_frame;
3875 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
3876 	  params.surface_2d = &surface_2d;
3877 	  params.cacheability_control =
3878 	    mbpak_sutface_params->cacheability_control;
3879 	  encoder_context->media_add_surface_state (&params);
3880 
3881 	}
3882       kernel_dump_offset = 12;
3883     }
3884   else
3885     {
3886       //row buffer y
3887       params = surface_set_params_init;
3888       params.binding_surface_state.bo =
3889 	mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3890       params.binding_surface_state.buf = binding_surface_state_buf;
3891       params.binding_table_offset = BINDING_TABLE_OFFSET (5);
3892       params.surface_state_offset = SURFACE_STATE_OFFSET (5);
3893       params.buf_object = mbpak_ctx->row_buffer_y;
3894       //params.surface_is_raw = 1;
3895       params.size = mbpak_ctx->row_buffer_y.bo_size;
3896       params.cacheability_control =
3897 	mbpak_sutface_params->cacheability_control;
3898       encoder_context->media_add_surface_state (&params);
3899 
3900       //row buffer uv
3901       params = surface_set_params_init;
3902       params.binding_surface_state.bo =
3903 	mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3904       params.binding_surface_state.buf = binding_surface_state_buf;
3905       params.binding_table_offset = BINDING_TABLE_OFFSET (6);
3906       params.surface_state_offset = SURFACE_STATE_OFFSET (6);
3907       params.buf_object = mbpak_ctx->row_buffer_uv;
3908       //params.surface_is_raw = 1;
3909       params.size = mbpak_ctx->row_buffer_uv.bo_size;
3910       params.cacheability_control =
3911 	mbpak_sutface_params->cacheability_control;
3912       encoder_context->media_add_surface_state (&params);
3913 
3914       //column buffer .y
3915       params = surface_set_params_init;
3916       params.binding_surface_state.bo =
3917 	mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3918       params.binding_surface_state.buf = binding_surface_state_buf;
3919       params.binding_table_offset = BINDING_TABLE_OFFSET (7);
3920       params.surface_state_offset = SURFACE_STATE_OFFSET (7);
3921       params.buf_object = mbpak_ctx->column_buffer_y;
3922       //params.surface_is_raw = 1;
3923       params.cacheability_control =
3924 	mbpak_sutface_params->cacheability_control;
3925       params.size = mbpak_ctx->column_buffer_y.bo_size;
3926       encoder_context->media_add_surface_state (&params);
3927 
3928       //column buffer uv
3929       params = surface_set_params_init;
3930       params.binding_surface_state.bo =
3931 	mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3932       params.binding_surface_state.buf = binding_surface_state_buf;
3933       params.binding_table_offset = BINDING_TABLE_OFFSET (8);
3934       params.surface_state_offset = SURFACE_STATE_OFFSET (8);
3935       params.buf_object = mbpak_ctx->column_buffer_uv;
3936       //params.surface_is_raw = 1;
3937       params.size = mbpak_ctx->column_buffer_uv.bo_size;
3938       params.cacheability_control =
3939 	mbpak_sutface_params->cacheability_control;
3940       encoder_context->media_add_surface_state (&params);
3941       kernel_dump_offset = 12;
3942 
3943     }
3944 
3945   if (mbpak_sutface_params->kernel_dump)
3946     {
3947 
3948       params = surface_set_params_init;
3949       params.binding_surface_state.bo =
3950 	mbpak_gpe_ctx->surface_state_binding_table.res.bo;
3951       params.binding_surface_state.buf = binding_surface_state_buf;
3952       params.binding_table_offset = BINDING_TABLE_OFFSET (kernel_dump_offset);
3953       params.surface_state_offset = SURFACE_STATE_OFFSET (kernel_dump_offset);
3954       //FIXME:need to pass right buffer here..!
3955       params.buf_object = mbpak_sutface_params->kernel_dump_buffer;	//mbpak_ctx->kernel_dump_buffer;
3956       //params.surface_is_raw = 1;
3957       params.size =
3958 	WIDTH_IN_MACROBLOCKS (mbpak_sutface_params->orig_frame_width) *
3959 	HEIGHT_IN_MACROBLOCKS (mbpak_sutface_params->orig_frame_height) * 32;
3960       params.cacheability_control =
3961 	mbpak_sutface_params->cacheability_control;
3962       encoder_context->media_add_surface_state (&params);
3963 
3964     }
3965   media_unmap_buffer_obj (mbpak_gpe_ctx->surface_state_binding_table.res.bo);
3966 
3967 }
3968 
3969 
3970 VOID
media_surface_state_vp8_mbenc(MEDIA_ENCODER_CTX * encoder_context,struct encode_state * encode_state,MBENC_SURFACE_PARAMS_VP8 * mbenc_sutface_params)3971 media_surface_state_vp8_mbenc (MEDIA_ENCODER_CTX * encoder_context,
3972 			       struct encode_state *encode_state,
3973 			       MBENC_SURFACE_PARAMS_VP8 *
3974 			       mbenc_sutface_params)
3975 {
3976   MBENC_CONTEXT *mbenc_ctx = &encoder_context->mbenc_context;
3977   MEDIA_GPE_CTX *mbenc_gpe_ctx = &mbenc_ctx->gpe_context;
3978   BRC_INIT_RESET_CONTEXT *brc_init_reset_ctx = &encoder_context->brc_init_reset_context;
3979   //ME_CONTEXT *me_ctx = &encoder_context->me_context;
3980   UINT kernel_dump_offset = 0;
3981   SURFACE_SET_PARAMS params;
3982   struct object_surface *obj_surface;
3983   //struct object_buffer *obj_buffer;
3984   BYTE *binding_surface_state_buf = NULL;
3985   MEDIA_RESOURCE surface_2d;
3986   //MEDIA_RESOURCE *obj_buffer_res;
3987   binding_surface_state_buf =
3988     (BYTE *) media_map_buffer_obj (mbenc_gpe_ctx->
3989 				   surface_state_binding_table.res.bo);
3990   //media_drv_memset(binding_surface_state_buf,mbenc_gpe_ctx->surface_state_binding_table.res.bo->size);
3991   //coded data buffer
3992   params = surface_set_params_init;
3993   params.binding_surface_state.bo =
3994     mbenc_gpe_ctx->surface_state_binding_table.res.bo;
3995   params.binding_surface_state.buf = binding_surface_state_buf;
3996   params.binding_table_offset = BINDING_TABLE_OFFSET (0);
3997   params.surface_state_offset = SURFACE_STATE_OFFSET (0);
3998   obj_surface = encode_state->coded_buf_surface;
3999   OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4000   params.buf_object = surface_2d;
4001   // params.surface_is_raw = 1; // ???
4002   params.offset = 0;
4003   params.offset = encoder_context->mb_data_offset;
4004   params.size = encoder_context->mb_data_in_bytes;
4005   params.cacheability_control = mbenc_sutface_params->cacheability_control;
4006   encoder_context->media_add_surface_state (&params);
4007 //current pic luma
4008   params = surface_set_params_init;
4009   params.binding_surface_state.bo =
4010     mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4011   params.binding_surface_state.buf = binding_surface_state_buf;
4012   params.surface_is_2d = 1;
4013   params.media_block_raw = 1;
4014   params.vert_line_stride_offset = 0;
4015   params.vert_line_stride = 0;
4016   params.format = STATE_SURFACEFORMAT_R8_UNORM;
4017   params.binding_table_offset = BINDING_TABLE_OFFSET (1);
4018   params.surface_state_offset = SURFACE_STATE_OFFSET (1);
4019   obj_surface = encode_state->input_yuv_object;
4020   OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4021   params.surface_2d = &surface_2d;
4022   params.cacheability_control = mbenc_sutface_params->cacheability_control;
4023   encoder_context->media_add_surface_state (&params);
4024 
4025 //current pic uv
4026   params = surface_set_params_init;
4027   params.binding_surface_state.bo =
4028     mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4029   params.binding_surface_state.buf = binding_surface_state_buf;
4030   params.surface_is_uv_2d = 1;
4031   params.media_block_raw = 1;
4032   params.vert_line_stride_offset = 0;
4033   params.vert_line_stride = 0;
4034   params.format = STATE_SURFACEFORMAT_R8_UNORM;
4035   params.binding_table_offset = BINDING_TABLE_OFFSET (2);
4036   params.surface_state_offset = SURFACE_STATE_OFFSET (2);
4037   obj_surface = encode_state->input_yuv_object;
4038   OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4039   params.surface_2d = &surface_2d;
4040   params.cacheability_control = mbenc_sutface_params->cacheability_control;
4041   encoder_context->media_add_surface_state (&params);
4042 
4043 
4044   if (mbenc_sutface_params->pic_coding == FRAME_TYPE_I)
4045     {
4046       params = surface_set_params_init;
4047       params.binding_surface_state.bo =
4048 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4049       params.binding_surface_state.buf = binding_surface_state_buf;
4050       params.advance_state = 1;
4051       params.format = STATE_SURFACEFORMAT_R8_UNORM;
4052       params.binding_table_offset = BINDING_TABLE_OFFSET (9);
4053       params.surface_state_offset = SURFACE_STATE_OFFSET (9);
4054       obj_surface = encode_state->input_yuv_object;
4055       OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4056       params.surface_2d = &surface_2d;
4057       params.uv_direction = VDIRECTION_FULL_FRAME;
4058       params.cacheability_control =
4059 	mbenc_sutface_params->cacheability_control;
4060       encoder_context->media_add_surface_state (&params);
4061 
4062       //MBMode Cost Luma surface
4063       params = surface_set_params_init;
4064       params.binding_surface_state.bo =
4065 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4066       params.binding_surface_state.buf = binding_surface_state_buf;
4067       params.surface_is_2d = 1;
4068       params.format = STATE_SURFACEFORMAT_R8_UNORM;
4069       params.binding_table_offset = BINDING_TABLE_OFFSET (3);
4070       params.surface_state_offset = SURFACE_STATE_OFFSET (3);
4071       params.surface_2d = &mbenc_ctx->mb_mode_cost_luma_buffer;
4072       params.cacheability_control =
4073 	mbenc_sutface_params->cacheability_control;
4074       encoder_context->media_add_surface_state (&params);
4075 
4076       //Block Mode cost surface
4077       params = surface_set_params_init;
4078       params.binding_surface_state.bo =
4079 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4080       params.binding_surface_state.buf = binding_surface_state_buf;
4081       params.surface_is_2d = 1;
4082       params.format = STATE_SURFACEFORMAT_R8_UNORM;
4083       params.binding_table_offset = BINDING_TABLE_OFFSET (4);
4084       params.surface_state_offset = SURFACE_STATE_OFFSET (4);
4085       params.surface_2d = &mbenc_ctx->block_mode_cost_buffer;
4086       params.cacheability_control =
4087 	mbenc_sutface_params->cacheability_control;
4088       encoder_context->media_add_surface_state (&params);
4089 
4090       //Chroma Reconstruction Surface
4091       params = surface_set_params_init;
4092       params.binding_surface_state.bo =
4093 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4094       params.binding_surface_state.buf = binding_surface_state_buf;
4095       params.surface_is_2d = 1;
4096       params.writable = 1;
4097       params.media_block_raw = 1;
4098       params.format = STATE_SURFACEFORMAT_R8_UNORM;
4099       params.binding_table_offset = BINDING_TABLE_OFFSET (5);
4100       params.surface_state_offset = SURFACE_STATE_OFFSET (5);
4101       params.surface_2d = &mbenc_ctx->chroma_reconst_buffer;
4102       params.cacheability_control =
4103 	mbenc_sutface_params->cacheability_control;
4104       encoder_context->media_add_surface_state (&params);
4105 
4106       //histogram
4107       params = surface_set_params_init;
4108       params.binding_surface_state.bo =
4109 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4110       params.binding_surface_state.buf = binding_surface_state_buf;
4111       params.binding_table_offset = BINDING_TABLE_OFFSET (7);
4112       params.surface_state_offset = SURFACE_STATE_OFFSET (7);
4113       params.buf_object = mbenc_ctx->histogram_buffer;
4114       params.size = mbenc_ctx->histogram_buffer.bo_size;
4115 
4116       if (encoder_context->brc_enabled) {
4117 	params.buf_object = brc_init_reset_ctx->brc_history;
4118 	params.size = brc_init_reset_ctx->brc_history.bo_size;
4119 	assert(params.size == 544);
4120       }
4121 
4122       params.surface_is_raw = 1;
4123       params.cacheability_control =
4124 	mbenc_sutface_params->cacheability_control;
4125       encoder_context->media_add_surface_state (&params);
4126       kernel_dump_offset = 8;
4127       if (mbenc_sutface_params->iframe_dist_in_use) {
4128 	MEDIA_ENCODER_VP8_SURFACE *vp8_surface;
4129 
4130 	params = surface_set_params_init;
4131 	params.binding_surface_state.bo =
4132 	  mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4133 
4134 	params.binding_surface_state.buf = binding_surface_state_buf;
4135 	params.surface_is_2d = 1;
4136 	params.writable = 1;
4137 	params.media_block_raw = 1; /* media block read/write message */
4138 	params.vert_line_stride_offset = 0;
4139 	params.vert_line_stride = 0;
4140 	params.format = STATE_SURFACEFORMAT_R8_UNORM;
4141 	params.binding_table_offset = BINDING_TABLE_OFFSET (10);
4142 	params.surface_state_offset = SURFACE_STATE_OFFSET (10);
4143 	params.surface_2d = &brc_init_reset_ctx->brc_distortion;
4144 	media_add_surface_state (&params);
4145 
4146 	vp8_surface = encode_state->reconstructed_object->private_data;
4147 
4148 	if (vp8_surface && vp8_surface->scaled_4x_surface_obj) {
4149 	  params = surface_set_params_init;
4150 	  params.binding_surface_state.bo =
4151 	    mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4152 	  params.binding_surface_state.buf = binding_surface_state_buf;
4153 	  params.surface_is_2d = 1;
4154 	  params.vert_line_stride_offset = 0;
4155 	  params.vert_line_stride = 0;
4156 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
4157 	  params.binding_table_offset = BINDING_TABLE_OFFSET (11);
4158 	  params.surface_state_offset = SURFACE_STATE_OFFSET (11);
4159 	  obj_surface = vp8_surface->scaled_4x_surface_obj;
4160 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4161 	  params.surface_2d = &surface_2d;
4162 	  params.cacheability_control = mbenc_sutface_params->cacheability_control;
4163 	  encoder_context->media_add_surface_state (&params);
4164 
4165 	  params = surface_set_params_init;
4166 	  params.binding_surface_state.bo =
4167 	    mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4168 	  params.binding_surface_state.buf = binding_surface_state_buf;
4169 	  params.advance_state = 1;
4170 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
4171 	  params.binding_table_offset = BINDING_TABLE_OFFSET (12);
4172 	  params.surface_state_offset = SURFACE_STATE_OFFSET (12);
4173 	  obj_surface = vp8_surface->scaled_4x_surface_obj;
4174 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4175 	  params.surface_2d = &surface_2d;
4176 	  params.uv_direction = VDIRECTION_FULL_FRAME;
4177 	  params.cacheability_control = mbenc_sutface_params->cacheability_control;
4178 	  encoder_context->media_add_surface_state (&params);
4179 	}
4180       }
4181     }
4182   else
4183     {
4184       //MV Data surface
4185       params = surface_set_params_init;
4186       params.binding_surface_state.bo =
4187 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4188       params.binding_surface_state.buf = binding_surface_state_buf;
4189       params.binding_table_offset = BINDING_TABLE_OFFSET (4);
4190       params.surface_state_offset = SURFACE_STATE_OFFSET (4);
4191       obj_surface = encode_state->coded_buf_surface;
4192       OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4193       params.buf_object = surface_2d;
4194       params.media_block_raw = 1;
4195       params.surface_is_raw = 1;
4196       params.writable = 1;
4197       params.offset = encoder_context->mv_offset;
4198       params.size = encoder_context->mv_in_bytes;
4199       params.cacheability_control =
4200 	mbenc_sutface_params->cacheability_control;
4201       encoder_context->media_add_surface_state (&params);
4202       if (mbenc_sutface_params->hme_enabled)
4203 	{
4204 	  /*need to add me mv data buffer surface states here later */
4205 
4206 	}
4207 
4208       //reference frame mb count
4209       params = surface_set_params_init;
4210       params.binding_surface_state.bo =
4211 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4212       params.binding_surface_state.buf = binding_surface_state_buf;
4213       params.binding_table_offset = BINDING_TABLE_OFFSET (5);
4214       params.surface_state_offset = SURFACE_STATE_OFFSET (5);
4215       params.buf_object = mbenc_ctx->ref_frm_count_surface;
4216       params.media_block_raw = 1;
4217       params.size = (sizeof (UINT) * 8);
4218       encoder_context->media_add_surface_state (&params);
4219 
4220       //current picture VME inter prediction surface..!
4221       params = surface_set_params_init;
4222       params.binding_surface_state.bo =
4223 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4224       params.binding_surface_state.buf = binding_surface_state_buf;
4225       params.advance_state = 1;
4226       params.format = STATE_SURFACEFORMAT_R8_UNORM;
4227       params.binding_table_offset = BINDING_TABLE_OFFSET (8);
4228       params.surface_state_offset = SURFACE_STATE_OFFSET (8);
4229       obj_surface = encode_state->input_yuv_object;
4230       OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4231       params.surface_2d = &surface_2d;
4232       params.uv_direction = VDIRECTION_FULL_FRAME;
4233       params.cacheability_control =
4234 	mbenc_sutface_params->cacheability_control;
4235       encoder_context->media_add_surface_state (&params);
4236 
4237       //last ref
4238       if (encode_state->ref_last_frame != NULL
4239 	  && encode_state->ref_last_frame->bo != NULL)
4240 	{
4241 	  params = surface_set_params_init;
4242 	  params.binding_surface_state.bo =
4243 	    mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4244 	  params.binding_surface_state.buf = binding_surface_state_buf;
4245 	  params.advance_state = 1;
4246 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
4247 	  params.binding_table_offset = BINDING_TABLE_OFFSET (9);
4248 	  params.surface_state_offset = SURFACE_STATE_OFFSET (9);
4249 	  obj_surface = encode_state->ref_last_frame;
4250 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4251 	  params.surface_2d = &surface_2d;
4252 	  params.uv_direction = VDIRECTION_FULL_FRAME;
4253 	  params.cacheability_control =
4254 	    mbenc_sutface_params->cacheability_control;
4255 	  encoder_context->media_add_surface_state (&params);
4256 	}
4257 
4258       //goldeb ref
4259       if (encode_state->ref_gf_frame != NULL
4260 	  && encode_state->ref_gf_frame->bo != NULL)
4261 	{
4262 	  params = surface_set_params_init;
4263 	  params.binding_surface_state.bo =
4264 	    mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4265 	  params.binding_surface_state.buf = binding_surface_state_buf;
4266 	  params.advance_state = 1;
4267 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
4268 	  params.binding_table_offset = BINDING_TABLE_OFFSET (11);
4269 	  params.surface_state_offset = SURFACE_STATE_OFFSET (11);
4270 	  obj_surface = encode_state->ref_gf_frame;
4271 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4272 	  params.surface_2d = &surface_2d;
4273 	  params.uv_direction = VDIRECTION_FULL_FRAME;
4274 	  params.cacheability_control =
4275 	    mbenc_sutface_params->cacheability_control;
4276 	  encoder_context->media_add_surface_state (&params);
4277 	}
4278 
4279       //alternate ref
4280       if (encode_state->ref_arf_frame != NULL
4281 	  && encode_state->ref_arf_frame->bo != NULL)
4282 	{
4283 	  params = surface_set_params_init;
4284 	  params.binding_surface_state.bo =
4285 	    mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4286 	  params.binding_surface_state.buf = binding_surface_state_buf;
4287 	  params.advance_state = 1;
4288 	  params.format = STATE_SURFACEFORMAT_R8_UNORM;
4289 	  params.binding_table_offset = BINDING_TABLE_OFFSET (13);
4290 	  params.surface_state_offset = SURFACE_STATE_OFFSET (13);
4291 	  obj_surface = encode_state->ref_arf_frame;
4292 	  OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4293 	  params.surface_2d = &surface_2d;
4294 	  params.uv_direction = VDIRECTION_FULL_FRAME;
4295 	  params.cacheability_control =
4296 	    mbenc_sutface_params->cacheability_control;
4297 	  encoder_context->media_add_surface_state (&params);
4298 	}
4299       //Per-MB quant data surface
4300       params = surface_set_params_init;
4301       params.binding_surface_state.bo =
4302 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4303       params.binding_surface_state.buf = binding_surface_state_buf;
4304       params.surface_is_2d = 1;
4305       params.writable = 1;
4306       params.media_block_raw = 1;
4307       params.vert_line_stride_offset = 0;
4308       params.vert_line_stride = 0;
4309       params.format = STATE_SURFACEFORMAT_R8_UNORM;
4310       params.binding_table_offset = BINDING_TABLE_OFFSET (15);
4311       params.surface_state_offset = SURFACE_STATE_OFFSET (15);
4312       params.surface_2d = &mbenc_ctx->pred_mb_quant_data_surface;
4313       params.cacheability_control =
4314 	mbenc_sutface_params->cacheability_control;
4315       encoder_context->media_add_surface_state (&params);
4316 
4317       if (mbenc_sutface_params->seg_enabled)
4318 	{
4319 
4320 	  //need to add per segmentation map later here
4321 	}
4322 
4323       //Histogram Surface
4324       params = surface_set_params_init;
4325       params.binding_surface_state.bo =
4326 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4327       params.binding_surface_state.buf = binding_surface_state_buf;
4328       params.binding_table_offset = BINDING_TABLE_OFFSET (18);
4329       params.surface_state_offset = SURFACE_STATE_OFFSET (18);
4330       params.buf_object = mbenc_ctx->histogram_buffer;
4331       params.size = mbenc_ctx->histogram_buffer.bo_size;
4332 
4333       if (encoder_context->brc_enabled) {
4334 	params.buf_object = brc_init_reset_ctx->brc_history;
4335 	params.size = brc_init_reset_ctx->brc_history.bo_size;
4336 	assert(params.size == 544);
4337       }
4338 
4339       params.surface_is_raw = 1;
4340       params.cacheability_control =
4341 	mbenc_sutface_params->cacheability_control;
4342       encoder_context->media_add_surface_state (&params);
4343 
4344       //Pred MV Data Surface
4345       params = surface_set_params_init;
4346       params.binding_surface_state.bo =
4347 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4348       params.binding_surface_state.buf = binding_surface_state_buf;
4349       params.binding_table_offset = BINDING_TABLE_OFFSET (19);
4350       params.surface_state_offset = SURFACE_STATE_OFFSET (19);
4351       params.buf_object = mbenc_ctx->pred_mv_data_surface;
4352       params.size = mbenc_ctx->pred_mv_data_surface.bo_size;
4353       params.media_block_raw = 1;
4354       encoder_context->media_add_surface_state (&params);
4355 
4356       //ModeCost Update Surface
4357       params = surface_set_params_init;
4358       params.binding_surface_state.bo =
4359 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4360       params.binding_surface_state.buf = binding_surface_state_buf;
4361       params.binding_table_offset = BINDING_TABLE_OFFSET (20);
4362       params.surface_state_offset = SURFACE_STATE_OFFSET (20);
4363       params.buf_object = mbenc_ctx->mode_cost_update_surface;
4364       params.size = 64;		//mbenc_ctx->mode_cost_update_surface.bo_size;
4365       params.surface_is_raw = 1;
4366       encoder_context->media_add_surface_state (&params);
4367       kernel_dump_offset = 21;
4368 
4369     }
4370 
4371   if (mbenc_sutface_params->kernel_dump)
4372     {
4373       params = surface_set_params_init;
4374       params.binding_surface_state.bo =
4375 	mbenc_gpe_ctx->surface_state_binding_table.res.bo;
4376       params.binding_surface_state.buf = binding_surface_state_buf;
4377       params.binding_table_offset = BINDING_TABLE_OFFSET (kernel_dump_offset);
4378       params.surface_state_offset = SURFACE_STATE_OFFSET (kernel_dump_offset);
4379       params.buf_object = mbenc_ctx->kernel_dump_buffer;
4380       //params.surface_is_raw = 1;
4381       params.cacheability_control =
4382 	mbenc_sutface_params->cacheability_control;
4383       params.size =
4384 	WIDTH_IN_MACROBLOCKS (mbenc_sutface_params->orig_frame_width) *
4385 			      HEIGHT_IN_MACROBLOCKS (mbenc_sutface_params->
4386 						     orig_frame_height) *
4387 			      /*MB_CODE_SIZE_VP8 */ 32;
4388       params.offset = encoder_context->mv_offset;
4389       encoder_context->media_add_surface_state (&params);
4390 
4391     }
4392 
4393   media_unmap_buffer_obj (mbenc_gpe_ctx->surface_state_binding_table.res.bo);
4394 }
4395 
4396 VOID
media_surface_state_vp8_me(MEDIA_ENCODER_CTX * encoder_context,struct encode_state * encode_state,ME_SURFACE_PARAMS_VP8 * me_sutface_params)4397 media_surface_state_vp8_me (MEDIA_ENCODER_CTX * encoder_context,
4398 			    struct encode_state *encode_state,
4399 			    ME_SURFACE_PARAMS_VP8 * me_sutface_params)
4400 {
4401 
4402 #if 0
4403   ME_CONTEXT *me_ctx = &encoder_context->me_context;
4404   MEDIA_GPE_CTX *me_gpe_ctx = &me_ctx->gpe_context;
4405   MEDIA_RESOURCE *mv_data_surface;
4406   SURFACE_SET_PARAMS params;
4407   BYTE *binding_surface_state_buf = NULL;
4408   //if 16xme enabled
4409   //params.binding_surface_state.bo =
4410   //me_sutface_params->me_surface_state_binding_table->res.bo;
4411   binding_surface_state_buf =
4412     (CHAR *)
4413     media_map_buffer_obj (me_sutface_params->
4414 			  me_surface_state_binding_table->res.bo);
4415   if (me_sutface_params->me_16x_in_use)
4416     {
4417       mv_data_surface = &me_ctx->mv_data_surface_16x_me;
4418     }
4419   else
4420     {
4421       mv_data_surface = &me_ctx->mv_data_surface_4x_me;
4422     }
4423 
4424 
4425   params = surface_set_params_init;
4426   params.binding_surface_state.bo =
4427     me_gpe_ctx->surface_state_binding_table.res.bo;
4428   params.binding_surface_state.buf = binding_surface_state_buf;
4429   params.surface_is_2d = 1;
4430   params.vert_line_stride_offset = 0;
4431   params.vert_line_stride = 0;
4432   params.format = STATE_SURFACEFORMAT_R8_UNORM;
4433   params.binding_table_offset = BINDING_TABLE_OFFSET (0);
4434   params.surface_state_offset = SURFACE_STATE_OFFSET (0);
4435   params.surface_2d = mv_data_surface;
4436   encoder_context->media_add_surface_state (&params);
4437 
4438   if (me_sutface_params->me_16x_enabled)
4439     {
4440 
4441       //16xme in use
4442       params = surface_set_params_init;
4443       params.binding_surface_state.bo =
4444 	me_gpe_ctx->surface_state_binding_table.res.bo;
4445       params.binding_surface_state.buf = binding_surface_state_buf;
4446       params.surface_is_2d = 1;
4447       params.vert_line_stride_offset = 0;
4448       params.vert_line_stride = 0;
4449       params.format = STATE_SURFACEFORMAT_R8_UNORM;
4450       params.binding_table_offset = BINDING_TABLE_OFFSET (1);
4451       params.surface_state_offset = SURFACE_STATE_OFFSET (1);
4452       params.surface_2d = &me_ctx->mv_data_surface_16x_me;
4453       encoder_context->media_add_surface_state (&params);
4454     }
4455   if (!me_sutface_params->me_16x_in_use)
4456     {
4457 
4458       //me distortion
4459       params = surface_set_params_init;
4460       params.binding_surface_state.bo =
4461 	me_gpe_ctx->surface_state_binding_table.res.bo;
4462       params.binding_surface_state.buf = binding_surface_state_buf;
4463       params.surface_is_2d = 1;
4464       params.writable = 1;
4465       params.vert_line_stride_offset = 0;
4466       params.vert_line_stride = 0;
4467       params.format = STATE_SURFACEFORMAT_R8_UNORM;
4468       params.binding_table_offset = BINDING_TABLE_OFFSET (2);
4469       params.surface_state_offset = SURFACE_STATE_OFFSET (2);
4470       params.surface_2d = &me_ctx->mv_distortion_surface_4x_me;
4471       encoder_context->media_add_surface_state (&params);
4472 
4473 
4474       //me brc distortion
4475       params = surface_set_params_init;
4476       params.binding_surface_state.bo =
4477 	me_gpe_ctx->surface_state_binding_table.res.bo;
4478       params.binding_surface_state.buf = binding_surface_state_buf;
4479       params.surface_is_2d = 1;
4480       params.writable = 1;
4481       params.vert_line_stride_offset = 0;
4482       params.vert_line_stride = 0;
4483       params.format = STATE_SURFACEFORMAT_R8_UNORM;
4484       params.binding_table_offset = BINDING_TABLE_OFFSET (3);
4485       params.surface_state_offset = SURFACE_STATE_OFFSET (3);
4486       params.surface_2d = &me_ctx->mv_distortion_surface_4x_me;
4487       encoder_context->media_add_surface_state (&params);
4488     }
4489 
4490 
4491   //current picture
4492   params = surface_set_params_init;
4493   params.binding_surface_state.bo =
4494     me_gpe_ctx->surface_state_binding_table.res.bo;
4495   params.binding_surface_state.buf = binding_surface_state_buf;
4496   params.surface_is_2d = 1;
4497   params.vert_line_stride_offset = 0;
4498   params.vert_line_stride = 0;
4499   params.format = STATE_SURFACEFORMAT_R8_UNORM;
4500   params.binding_table_offset = BINDING_TABLE_OFFSET (4);
4501   params.surface_state_offset = SURFACE_STATE_OFFSET (4);
4502   params.surface_2d = &me_ctx->mv_data_surface_16x_me;
4503   encoder_context->media_add_surface_state (&params);
4504 
4505 
4506 //forward ref pic-golden/alternate/last
4507   params = surface_set_params_init;
4508   params.binding_surface_state.bo =
4509     me_gpe_ctx->surface_state_binding_table.res.bo;
4510   params.binding_surface_state.buf = binding_surface_state_buf;
4511   params.surface_is_2d = 1;
4512   params.vert_line_stride_offset = 0;
4513   params.vert_line_stride = 0;
4514   params.format = STATE_SURFACEFORMAT_R8_UNORM;
4515   params.binding_table_offset = BINDING_TABLE_OFFSET (5);
4516   params.surface_state_offset = SURFACE_STATE_OFFSET (5);
4517   params.surface_2d = &me_ctx->mv_data_surface_16x_me;
4518   encoder_context->media_add_surface_state (&params);
4519 
4520 
4521   media_unmap_buffer_obj (me_sutface_params->me_surface_state_binding_table->
4522 			  res.bo);
4523 #endif
4524 }
4525 
4526 VOID
media_surface_state_scaling(MEDIA_ENCODER_CTX * encoder_context,SCALING_SURFACE_PARAMS * scaling_sutface_params)4527 media_surface_state_scaling (MEDIA_ENCODER_CTX * encoder_context,
4528 			     SCALING_SURFACE_PARAMS * scaling_sutface_params)
4529 {
4530   SURFACE_SET_PARAMS params;
4531   SCALING_CONTEXT *scaling_ctx = &encoder_context->scaling_context;
4532   MEDIA_GPE_CTX *scaling_gpe_ctx = &scaling_ctx->gpe_context;
4533   BYTE *binding_surface_state_buf = NULL;
4534   binding_surface_state_buf =
4535     (BYTE *)
4536     media_map_buffer_obj (scaling_gpe_ctx->surface_state_binding_table.
4537 			  res.bo);
4538   //input buffer
4539   params = surface_set_params_init;
4540   params.binding_surface_state.bo =
4541     scaling_gpe_ctx->surface_state_binding_table.res.bo;
4542   params.binding_surface_state.buf = binding_surface_state_buf;
4543   params.surface_is_2d = 1;
4544   params.media_block_raw = 1;
4545   params.vert_line_stride_offset = 0;
4546   params.vert_line_stride = 0;
4547   params.format = STATE_SURFACEFORMAT_R32_UNORM;
4548   params.binding_table_offset = BINDING_TABLE_OFFSET (0);
4549   params.surface_state_offset = SURFACE_STATE_OFFSET (0);
4550   params.surface_2d = &scaling_sutface_params->scaling_input_surface;
4551   encoder_context->media_add_surface_state (&params);
4552 
4553   //destination
4554   params = surface_set_params_init;
4555   params.binding_surface_state.bo =
4556     scaling_gpe_ctx->surface_state_binding_table.res.bo;
4557   params.binding_surface_state.buf = binding_surface_state_buf;
4558   params.surface_is_2d = 1;
4559   // params.media_block_raw = 1;
4560   params.vert_line_stride_offset = 0;
4561   params.vert_line_stride = 0;
4562   params.format = STATE_SURFACEFORMAT_R8_UNORM;
4563   params.binding_table_offset = BINDING_TABLE_OFFSET (1);
4564   params.surface_state_offset = SURFACE_STATE_OFFSET (1);
4565   params.surface_2d = &scaling_sutface_params->scaling_output_surface;
4566   encoder_context->media_add_surface_state (&params);
4567 
4568   media_unmap_buffer_obj (scaling_gpe_ctx->surface_state_binding_table.res.
4569 			  bo);
4570 }
4571 
4572 VOID
media_surface_state_vp8_brc_init_reset(MEDIA_ENCODER_CTX * encoder_context,struct encode_state * encode_state,BRC_INIT_RESET_SURFACE_PARAMS_VP8 * surface_params)4573 media_surface_state_vp8_brc_init_reset (MEDIA_ENCODER_CTX * encoder_context,
4574                                         struct encode_state *encode_state,
4575                                         BRC_INIT_RESET_SURFACE_PARAMS_VP8 *surface_params)
4576 {
4577   BRC_INIT_RESET_CONTEXT *ctx = &encoder_context->brc_init_reset_context;
4578   MEDIA_GPE_CTX *gpe_ctx = &ctx->gpe_context;
4579   SURFACE_SET_PARAMS params;
4580   BYTE *binding_surface_state_buf = NULL;
4581 
4582   binding_surface_state_buf =
4583     (BYTE *) media_map_buffer_obj (gpe_ctx->surface_state_binding_table.res.bo);
4584 
4585   /* history buffer */
4586   params = surface_set_params_init;
4587   params.binding_surface_state.bo =
4588     gpe_ctx->surface_state_binding_table.res.bo;
4589   params.binding_surface_state.buf = binding_surface_state_buf;
4590   params.binding_table_offset = BINDING_TABLE_OFFSET (0);
4591   params.surface_state_offset = SURFACE_STATE_OFFSET (0);
4592   params.writable = 1;
4593   params.buf_object = ctx->brc_history;
4594   params.size = ctx->brc_history.bo_size;
4595   params.cacheability_control =
4596     surface_params->cacheability_control;
4597   assert(params.size == 544);
4598   encoder_context->media_add_surface_state (&params);
4599 
4600   /* distortion buffer */
4601   params = surface_set_params_init;
4602   params.binding_surface_state.bo =
4603     gpe_ctx->surface_state_binding_table.res.bo;
4604   params.binding_surface_state.buf = binding_surface_state_buf;
4605   params.surface_is_2d = 1;
4606   params.writable = 1;
4607   params.media_block_raw = 1;
4608   params.vert_line_stride_offset = 0;
4609   params.vert_line_stride = 0;
4610   params.format = STATE_SURFACEFORMAT_R8_UNORM;
4611   params.binding_table_offset = BINDING_TABLE_OFFSET (1);
4612   params.surface_state_offset = SURFACE_STATE_OFFSET (1);
4613   params.surface_2d = &ctx->brc_distortion;
4614   encoder_context->media_add_surface_state (&params);
4615 
4616   media_unmap_buffer_obj (gpe_ctx->surface_state_binding_table.res.bo);
4617 }
4618 
4619 VOID
media_set_curbe_vp8_brc_init_reset(struct encode_state * encode_state,MEDIA_BRC_INIT_RESET_PARAMS_VP8 * params)4620 media_set_curbe_vp8_brc_init_reset(struct encode_state *encode_state,
4621                                    MEDIA_BRC_INIT_RESET_PARAMS_VP8 * params)
4622 {
4623   DOUBLE input_bits_per_frame, bps_ratio;
4624   MEDIA_CURBE_DATA_BRC_INIT_RESET_G75 *cmd =
4625     (MEDIA_CURBE_DATA_BRC_INIT_RESET_G75 *)params->curbe_cmd_buff;
4626 
4627   media_drv_memset(cmd, sizeof(MEDIA_CURBE_DATA_BRC_INIT_RESET_G75));
4628 
4629   // profile & level max frame size
4630   cmd->dw0.profile_level_max_frame = params->frame_width * params->frame_height;
4631 
4632   // initial buffer fullness, buffer size, max and target bitrate
4633   cmd->dw1.init_buf_full_in_bits = params->init_vbv_buffer_fullness_in_bit;
4634   cmd->dw2.buf_size_in_bits = params->vbv_buffer_size_in_bit;
4635   cmd->dw3.average_bit_rate = (params->target_bit_rate + ENCODE_BRC_KBPS - 1) / ENCODE_BRC_KBPS * ENCODE_BRC_KBPS;
4636   cmd->dw4.max_bit_rate = (params->max_bit_rate + ENCODE_BRC_KBPS - 1) / ENCODE_BRC_KBPS * ENCODE_BRC_KBPS;
4637   cmd->dw5.min_bit_rate = 0;
4638 
4639   cmd->dw6.frame_rate_m = params->frame_rate;
4640   cmd->dw7.frame_rate_d = 1;
4641 
4642   // params->rate_control_mode = HB_BRC_CBR;
4643   if (params->rate_control_mode == HB_BRC_CBR) {
4644     // for cbr max bitrate is same as target
4645     cmd->dw4.max_bit_rate = cmd->dw3.average_bit_rate;
4646     cmd->dw8.brc_flag = 0x0010;
4647   } else if (params->rate_control_mode == HB_BRC_VBR) {
4648     if (cmd->dw4.max_bit_rate < cmd->dw3.average_bit_rate)
4649     {
4650       cmd->dw4.max_bit_rate = 2 * cmd->dw3.average_bit_rate;
4651     }
4652 
4653     cmd->dw8.brc_flag = 0x0020;
4654   }
4655 
4656   cmd->dw8.number_pframes_in_gop = params->gop_pic_size - 1;
4657 
4658   // set dynamic thresholds
4659   input_bits_per_frame = ((DOUBLE)(cmd->dw4.max_bit_rate) * (DOUBLE)(cmd->dw7.frame_rate_d) / (DOUBLE)(cmd->dw6.frame_rate_m));
4660   bps_ratio = input_bits_per_frame / ((DOUBLE)(cmd->dw2.buf_size_in_bits) / 30);
4661   bps_ratio = (bps_ratio < 0.1) ? 0.1 : (bps_ratio > 3.5) ? 3.5 : bps_ratio;
4662 
4663   cmd->dw9.frame_width = params->frame_width;
4664   cmd->dw9.constant_0 = 30;
4665   cmd->dw10.frame_height = params->frame_height;
4666   cmd->dw10.avbr_accuracy = 30;
4667   cmd->dw11.avbr_convergence = 150;
4668   cmd->dw11.min_qp = 1; // hardcoded to match
4669   cmd->dw12.max_qp = 106; // hardcoded to match
4670   cmd->dw12.level_qp = 60; // hardcoded to match kernel cmodel
4671 
4672   // dw13-dw14 default 100
4673   cmd->dw13.max_section_pct = 100; // hardcoded to match kernel cmodel
4674   cmd->dw13.under_shoot_cbr_pct = 100; // hardcoded to match kernel cmodel
4675   cmd->dw14.min_section_pct = 100; // hardcoded to match kernel cmodel
4676   cmd->dw14.vbr_bias_pct = 100; // hardcoded to match kernel cmodel
4677 
4678   cmd->dw15.instant_rate_threshold0_pframe = 30;
4679   cmd->dw15.instant_rate_threshold1_pframe = 50;
4680   cmd->dw15.instant_rate_threshold2_pframe = 70;
4681   cmd->dw15.instant_rate_threshold3_pframe = 120;
4682 
4683   cmd->dw16.constant_0 = 30;
4684   cmd->dw16.constant_1 = 50;
4685   cmd->dw16.constant_2 = 70;
4686   cmd->dw16.constant_3 = 120;
4687 
4688   cmd->dw17.instant_rate_threshold0_iframe = 30;
4689   cmd->dw17.instant_rate_threshold1_iframe = 50;
4690   cmd->dw17.instant_rate_threshold2_iframe = 90;
4691   cmd->dw17.instant_rate_threshold3_iframe = 115;
4692   cmd->dw18.deviation_threshold0_pframe = (UINT)(-50 * pow(0.9, bps_ratio));
4693   cmd->dw18.deviation_threshold1_pframe = (UINT)(-50 * pow(0.66, bps_ratio));
4694   cmd->dw18.deviation_threshold2_pframe = (UINT)(-50 * pow(0.46, bps_ratio));
4695   cmd->dw18.deviation_threshold3_pframe = (UINT)(-50 * pow(0.3, bps_ratio));
4696   cmd->dw19.deviation_threshold4_pframe = (UINT)(50 * pow(0.3, bps_ratio));
4697   cmd->dw19.deviation_threshold5_pframe = (UINT)(50 * pow(0.46, bps_ratio));
4698   cmd->dw19.deviation_threshold6_pframe = (UINT)(50 * pow(0.7, bps_ratio));
4699   cmd->dw19.deviation_threshold7_pframe = (UINT)(50 * pow(0.9, bps_ratio));
4700   cmd->dw20.deviation_threshold0_vbr = (UINT)(-50 * pow(0.9, bps_ratio));
4701   cmd->dw20.deviation_threshold1_vbr = (UINT)(-50 * pow(0.7, bps_ratio));
4702   cmd->dw20.deviation_threshold2_vbr = (UINT)(-50 * pow(0.5, bps_ratio));
4703   cmd->dw20.deviation_threshold3_vbr = (UINT)(-50 * pow(0.3, bps_ratio));
4704   cmd->dw21.deviation_threshold4_vbr = (UINT)(100 * pow(0.4, bps_ratio));
4705   cmd->dw21.deviation_threshold5_vbr = (UINT)(100 * pow(0.5, bps_ratio));
4706   cmd->dw21.deviation_threshold6_vbr = (UINT)(100 * pow(0.75, bps_ratio));
4707   cmd->dw21.deviation_threshold7_vbr = (UINT)(100 * pow(0.9, bps_ratio));
4708   cmd->dw22.deviation_threshold0_iframe = (UINT)(-50 * pow(0.8, bps_ratio));
4709   cmd->dw22.deviation_threshold1_iframe = (UINT)(-50 * pow(0.6, bps_ratio));
4710   cmd->dw22.deviation_threshold2_iframe = (UINT)(-50 * pow(0.34, bps_ratio));
4711   cmd->dw22.deviation_threshold3_iframe = (UINT)(-50 * pow(0.2, bps_ratio));
4712   cmd->dw23.deviation_threshold4_iframe = (UINT)(50 * pow(0.2, bps_ratio));
4713   cmd->dw23.deviation_threshold5_iframe = (UINT)(50 * pow(0.4, bps_ratio));
4714   cmd->dw23.deviation_threshold6_iframe = (UINT)(50 * pow(0.66, bps_ratio));
4715   cmd->dw23.deviation_threshold7_iframe = (UINT)(50 * pow(0.9, bps_ratio));
4716 
4717   cmd->dw24.initial_qp_iframe = 0;
4718   cmd->dw24.initial_qp_pframe = 0;
4719 
4720   if (!params->brc_initted) {
4721     *params->brc_init_current_target_buf_full_in_bits = cmd->dw1.init_buf_full_in_bits;
4722   }
4723 
4724   *params->brc_init_reset_buf_size_in_bits = cmd->dw2.buf_size_in_bits;
4725   *params->brc_init_reset_input_bits_per_frame = input_bits_per_frame;
4726 
4727   cmd->dw25.history_buffer_bti = VP8_BRC_INIT_RESET_HISTORY_G75;
4728   cmd->dw26.distortion_buffer_bti = VP8_BRC_INIT_RESET_DISTORTION_G75;
4729 }
4730 
4731 VOID
media_surface_state_vp8_brc_update(MEDIA_ENCODER_CTX * encoder_context,struct encode_state * encode_state,BRC_UPDATE_SURFACE_PARAMS_VP8 * surface_params)4732 media_surface_state_vp8_brc_update (MEDIA_ENCODER_CTX * encoder_context,
4733                                     struct encode_state *encode_state,
4734                                     BRC_UPDATE_SURFACE_PARAMS_VP8 *surface_params)
4735 {
4736   BRC_UPDATE_CONTEXT *ctx = &encoder_context->brc_update_context;
4737   MEDIA_GPE_CTX *gpe_ctx = &ctx->gpe_context;
4738   SURFACE_SET_PARAMS params;
4739   BYTE *binding_surface_state_buf = NULL;
4740   BRC_INIT_RESET_CONTEXT *brc_init_reset_ctx = &encoder_context->brc_init_reset_context;
4741   struct object_surface *obj_surface;
4742   MEDIA_RESOURCE surface_2d;
4743   MBPAK_CONTEXT *mbpak_ctx = &encoder_context->mbpak_context;
4744   MEDIA_GPE_CTX *mbpak_gpe_ctx;
4745   MBENC_CONTEXT *mbenc_ctx = &encoder_context->mbenc_context;
4746   MEDIA_GPE_CTX *mbenc_gpe_ctx = &mbenc_ctx->gpe_context;
4747 
4748   binding_surface_state_buf =
4749     (BYTE *) media_map_buffer_obj (gpe_ctx->surface_state_binding_table.res.bo);
4750 
4751   /* 0 BRC history buffer */
4752   params = surface_set_params_init;
4753   params.binding_surface_state.bo =
4754     gpe_ctx->surface_state_binding_table.res.bo;
4755   params.binding_surface_state.buf = binding_surface_state_buf;
4756   params.binding_table_offset = BINDING_TABLE_OFFSET (0); /* ??? 1 ? */
4757   params.surface_state_offset = SURFACE_STATE_OFFSET (0);
4758   params.writable = 1;
4759   params.buf_object = brc_init_reset_ctx->brc_history;
4760   params.size = brc_init_reset_ctx->brc_history.bo_size;
4761   params.cacheability_control =
4762     surface_params->cacheability_control;
4763   encoder_context->media_add_surface_state (&params);
4764 
4765   /* 1 Coded buffer (MB data) buffer */
4766   params = surface_set_params_init;
4767   params.binding_surface_state.bo =
4768     gpe_ctx->surface_state_binding_table.res.bo;
4769   params.binding_surface_state.buf = binding_surface_state_buf;
4770   params.binding_table_offset = BINDING_TABLE_OFFSET (1);
4771   params.surface_state_offset = SURFACE_STATE_OFFSET (1);
4772   obj_surface = encode_state->coded_buf_surface;
4773   OBJECT_SURFACE_TO_MEDIA_RESOURCE_STRUCT (surface_2d, obj_surface);
4774   params.buf_object = surface_2d;
4775   params.offset = 0;
4776   params.size = 8 * sizeof(UINT);
4777   params.cacheability_control = surface_params->cacheability_control;
4778   encoder_context->media_add_surface_state (&params);
4779 
4780   /* 2 MBPAK Curbe1 surface */
4781   mbpak_gpe_ctx = &mbpak_ctx->gpe_context;
4782   params = surface_set_params_init;
4783   params.binding_surface_state.bo =
4784     gpe_ctx->surface_state_binding_table.res.bo;
4785   params.binding_surface_state.buf = binding_surface_state_buf;
4786   params.binding_table_offset = BINDING_TABLE_OFFSET (2);
4787   params.surface_state_offset = SURFACE_STATE_OFFSET (2);
4788   params.buf_object = mbpak_gpe_ctx->dynamic_state.res;
4789   params.size = sizeof(MEDIA_CURBE_DATA_MBPAK_P1_G75);
4790   params.cacheability_control = surface_params->cacheability_control;
4791   encoder_context->media_add_surface_state (&params);
4792 
4793   /* 3 MBPAK Curbe2 surface */
4794   mbpak_gpe_ctx = &mbpak_ctx->gpe_context2;
4795   params = surface_set_params_init;
4796   params.binding_surface_state.bo =
4797     gpe_ctx->surface_state_binding_table.res.bo;
4798   params.binding_surface_state.buf = binding_surface_state_buf;
4799   params.binding_table_offset = BINDING_TABLE_OFFSET (3);
4800   params.surface_state_offset = SURFACE_STATE_OFFSET (3);
4801   params.buf_object = mbpak_gpe_ctx->dynamic_state.res;
4802   params.size = sizeof(MEDIA_CURBE_DATA_MBPAK_P2_G75);
4803   params.cacheability_control = surface_params->cacheability_control;
4804   encoder_context->media_add_surface_state (&params);
4805 
4806   /* 4 MBENC Curbe read surface */
4807   params = surface_set_params_init;
4808   params.binding_surface_state.bo =
4809     gpe_ctx->surface_state_binding_table.res.bo;
4810   params.binding_surface_state.buf = binding_surface_state_buf;
4811   params.binding_table_offset = BINDING_TABLE_OFFSET (4);
4812   params.surface_state_offset = SURFACE_STATE_OFFSET (4);
4813   params.buf_object = mbenc_gpe_ctx->dynamic_state.res;
4814   params.size = ALIGN(MAX(sizeof(MEDIA_CURBE_DATA_MBENC_P_G75), sizeof(MEDIA_CURBE_DATA_MBENC_I_G75)), 64);
4815   params.cacheability_control = surface_params->cacheability_control;
4816   encoder_context->media_add_surface_state (&params);
4817 
4818   /* 5 MBENC Curbe write surface */
4819   params = surface_set_params_init;
4820   params.binding_surface_state.bo =
4821     gpe_ctx->surface_state_binding_table.res.bo;
4822   params.binding_surface_state.buf = binding_surface_state_buf;
4823   params.binding_table_offset = BINDING_TABLE_OFFSET (5);
4824   params.surface_state_offset = SURFACE_STATE_OFFSET (5);
4825   params.writable = 1;
4826   params.buf_object = mbenc_gpe_ctx->dynamic_state.res;
4827   params.size = ALIGN(MAX(sizeof(MEDIA_CURBE_DATA_MBENC_P_G75), sizeof(MEDIA_CURBE_DATA_MBENC_I_G75)), 64);
4828   params.cacheability_control = surface_params->cacheability_control;
4829   encoder_context->media_add_surface_state (&params);
4830 
4831   /* 6 BRC Distortion data buffer */
4832   params = surface_set_params_init;
4833   params.binding_surface_state.bo =
4834     gpe_ctx->surface_state_binding_table.res.bo;
4835   params.binding_surface_state.buf = binding_surface_state_buf;
4836   params.surface_is_2d = 1;
4837   params.writable = 1;
4838   params.media_block_raw = 1; /* media block read/write message */
4839   params.vert_line_stride_offset = 0;
4840   params.vert_line_stride = 0;
4841   params.format = STATE_SURFACEFORMAT_R8_UNORM;
4842   params.binding_table_offset = BINDING_TABLE_OFFSET (6);
4843   params.surface_state_offset = SURFACE_STATE_OFFSET (6);
4844   params.surface_2d = &brc_init_reset_ctx->brc_distortion;
4845   encoder_context->media_add_surface_state (&params);
4846 
4847   /* 7 BRC Constant buffer */
4848   params = surface_set_params_init;
4849   params.binding_surface_state.bo =
4850     gpe_ctx->surface_state_binding_table.res.bo;
4851   params.binding_surface_state.buf = binding_surface_state_buf;
4852   params.binding_table_offset = BINDING_TABLE_OFFSET (7);
4853   params.surface_state_offset = SURFACE_STATE_OFFSET (7);
4854   params.buf_object = brc_init_reset_ctx->brc_constant_data;
4855   params.size = 2880;
4856   params.cacheability_control =
4857     surface_params->cacheability_control;
4858   encoder_context->media_add_surface_state (&params);
4859 
4860   /* 8 MBPAK table buffer */
4861   params = surface_set_params_init;
4862   params.binding_surface_state.bo =
4863     gpe_ctx->surface_state_binding_table.res.bo;
4864   params.binding_surface_state.buf = binding_surface_state_buf;
4865   params.binding_table_offset = BINDING_TABLE_OFFSET (8);
4866   params.surface_state_offset = SURFACE_STATE_OFFSET (8);
4867   params.buf_object = brc_init_reset_ctx->brc_pak_qp_input_table;
4868   params.size = 160 * 18 * sizeof(UINT16);
4869   params.cacheability_control =
4870     surface_params->cacheability_control;
4871   encoder_context->media_add_surface_state (&params);
4872 
4873   /* TODO: need to add per segmentation map later here */
4874 
4875   media_unmap_buffer_obj (gpe_ctx->surface_state_binding_table.res.bo);
4876 }
4877 
4878 VOID
media_set_curbe_vp8_brc_update(struct encode_state * encode_state,MEDIA_BRC_UPDATE_PARAMS_VP8 * params)4879 media_set_curbe_vp8_brc_update(struct encode_state *encode_state,
4880                                MEDIA_BRC_UPDATE_PARAMS_VP8 * params)
4881 {
4882   MEDIA_CURBE_DATA_BRC_UPDATE_G75 *cmd =
4883     (MEDIA_CURBE_DATA_BRC_UPDATE_G75 *)params->curbe_cmd_buff;
4884   VAEncPictureParameterBufferVP8 *pic_params =
4885     (VAEncPictureParameterBufferVP8 *) encode_state->pic_param_ext->buffer;
4886   VAQMatrixBufferVP8 *quant_params =
4887     (VAQMatrixBufferVP8 *) encode_state->q_matrix->buffer;
4888 
4889   memset (cmd, 0, sizeof (*cmd));
4890 
4891   cmd->dw1.frame_number = params->frame_number;
4892   cmd->dw2.picture_header_size = 0; // matching kernel value
4893   cmd->dw5.target_size_flag= 0;
4894 
4895   if (*params->brc_init_current_target_buf_full_in_bits > (DOUBLE)params->brc_init_reset_buf_size_in_bits) {
4896     *params->brc_init_current_target_buf_full_in_bits -= (DOUBLE)params->brc_init_reset_buf_size_in_bits;
4897     cmd->dw5.target_size_flag = 1;
4898   }
4899 
4900   cmd->dw0.target_size = (UINT)(*params->brc_init_current_target_buf_full_in_bits); // 500000 bits
4901 
4902   cmd->dw3.start_global_adjust_frame0 = 10;
4903   cmd->dw3.start_global_adjust_frame1 = 50;
4904 
4905   cmd->dw4.start_global_adjust_frame2 = 100;
4906   cmd->dw4.start_global_adjust_frame3 = 150;
4907 
4908   cmd->dw5.curr_frame_type = (params->pic_coding_type == FRAME_TYPE_I) ? 2 : 0;
4909   cmd->dw5.brc_flag = 16;
4910   cmd->dw5.max_num_paks = 4;
4911 
4912   cmd->dw8.start_global_adjust_mult0 = 1;
4913   cmd->dw8.start_global_adjust_mult1 = 1;
4914   cmd->dw8.start_global_adjust_mult2 = 3;
4915   cmd->dw8.start_global_adjust_mult3 = 2;
4916 
4917   cmd->dw9.start_global_adjust_div0 = 40;
4918   cmd->dw9.start_global_adjust_div1 = 5;
4919   cmd->dw9.start_global_adjust_div2 = 5;
4920   cmd->dw9.start_global_adjust_mult4 = 1;
4921 
4922   cmd->dw10.start_global_adjust_div3 = 3;
4923   cmd->dw10.start_global_adjust_div4 = 1;
4924   cmd->dw10.qp_threshold0 = 20; // 7;
4925   cmd->dw10.qp_threshold1 = 40; // 18;
4926 
4927   cmd->dw11.qp_threshold2 = 60; // 25;
4928   cmd->dw11.qp_threshold3 = 90; // 37;
4929   cmd->dw11.rate_ratio_threshold0 = 40;
4930   cmd->dw11.rate_ratio_threshold1 = 75;
4931 
4932   cmd->dw12.rate_ratio_threshold2 = 97;
4933   cmd->dw12.rate_ratio_threshold3 = 103;
4934   cmd->dw12.rate_ratio_threshold4 = 125;
4935   cmd->dw12.rate_ratio_threshold5 = 160;
4936 
4937   cmd->dw13.rate_ratio_threshold_qp0 = -3;
4938   cmd->dw13.rate_ratio_threshold_qp1 = -2;
4939   cmd->dw13.rate_ratio_threshold_qp2 = -1;
4940   cmd->dw13.rate_ratio_threshold_qp3 = 0;
4941 
4942   cmd->dw14.rate_ratio_threshold_qp4 = 1;
4943   cmd->dw14.rate_ratio_threshold_qp5 = 2;
4944   cmd->dw14.rate_ratio_threshold_qp6 = 3;
4945   cmd->dw14.index_of_previous_qp = 0;
4946 
4947   *params->brc_init_current_target_buf_full_in_bits += params->brc_init_reset_input_bits_per_frame;
4948 
4949   cmd->dw15.frame_width_in_mb = params->frame_width_in_mbs;
4950   cmd->dw15.frame_height_in_mb = params->frame_height_in_mbs;
4951   cmd->dw15.prev_flag = !params->frame_update->two_prev_frame_flag;
4952 
4953   if (params->frame_update->prev_frame_size != 0)
4954     cmd->dw16.frame_byte_count  = params->frame_update->prev_frame_size - 12;
4955 
4956   if (params->frame_number == 1)
4957     cmd->dw16.frame_byte_count -= 32;
4958 
4959   if (params->frame_update->two_prev_frame_flag == 1 && params->frame_number == 1)
4960     cmd->dw16.frame_byte_count = 0;
4961 
4962   cmd->dw17.key_frame_qp_seg0 = quant_params->quantization_index[0];
4963   cmd->dw17.key_frame_qp_seg1 = quant_params->quantization_index[1];
4964   cmd->dw17.key_frame_qp_seg2 = quant_params->quantization_index[2];
4965   cmd->dw17.key_frame_qp_seg3 = quant_params->quantization_index[3];
4966 
4967   cmd->dw18.qp_delta_plane0 = quant_params->quantization_index_delta[0];
4968   cmd->dw18.qp_delta_plane1 = quant_params->quantization_index_delta[4];
4969   cmd->dw18.qp_delta_plane2 = quant_params->quantization_index_delta[3];
4970   cmd->dw18.qp_delta_plane3 = quant_params->quantization_index_delta[2];
4971 
4972   cmd->dw19.qp = 0;
4973   cmd->dw19.qp_delta_plane4 = quant_params->quantization_index_delta[1];
4974   cmd->dw19.reserved = 9;
4975 
4976   cmd->dw20.segmentation_enabled = pic_params->pic_flags.bits.segmentation_enabled;
4977   cmd->dw20.brc_method = 1;
4978   cmd->dw20.mb_rc = 0;
4979 
4980   cmd->dw20.vme_intraprediction = (params->kernel_mode == PERFORMANCE_MODE) ? 1 : 0;
4981   cmd->dw21.history_buffer_index = VP8_BRC_UPDATE_HISTORY_G75;
4982   cmd->dw22.pak_surface_index = VP8_BRC_UPDATE_PAK_SURFACE_INDEX_G75;
4983   cmd->dw23.mbpak_curbe1_index = VP8_BRC_UPDATE_MBPAK1_CURBE_WRITE_G75;
4984   cmd->dw24.mbpak_curbe2_index = VP8_BRC_UPDATE_MBPAK2_CURBE_WRITE_G75;
4985   cmd->dw25.mbenc_curbe_input_index = VP8_BRC_UPDATE_MBENC_CURBE_READ_G75;
4986   cmd->dw26.mbenc_curbe_output_index = VP8_BRC_UPDATE_MBENC_CURBE_WRITE_G75;
4987   cmd->dw27.distortion_input_index = VP8_BRC_UPDATE_DISTORTION_SURFACE_G75;
4988   cmd->dw28.constant_data_input_index = VP8_BRC_UPDATE_CONSTANT_DATA_G75;
4989   cmd->dw29.pak_table_surface_index = VP8_BRC_UPDATE_MBPAK_TABLE_INDEX_G75;
4990 }
4991 
4992 VOID
media_encode_init_brc_update_constant_data_vp8_g75(BRC_UPDATE_CONSTANT_DATA_PARAMS_VP8 * params)4993 media_encode_init_brc_update_constant_data_vp8_g75(BRC_UPDATE_CONSTANT_DATA_PARAMS_VP8 *params)
4994 {
4995   BYTE *pbuffer;
4996   BOOL status;
4997 
4998   pbuffer =
4999     (BYTE *) media_map_buffer_obj (params->brc_update_constant_data->bo);
5000   MEDIA_DRV_ASSERT (pbuffer);
5001 
5002   media_drv_memset (pbuffer, 2880);
5003 
5004   status = media_drv_memcpy (pbuffer,
5005 			     sizeof (brc_qpadjustment_distthreshold_maxframethreshold_distqpadjustment_IPB_vp8_g75),
5006 			     (VOID *) brc_qpadjustment_distthreshold_maxframethreshold_distqpadjustment_IPB_vp8_g75,
5007 			     sizeof (brc_qpadjustment_distthreshold_maxframethreshold_distqpadjustment_IPB_vp8_g75));
5008 
5009   if (status != TRUE) {
5010     media_unmap_buffer_obj (params->brc_update_constant_data->bo);
5011     MEDIA_DRV_ASSERT ("media_drv_memcpy failed");
5012   }
5013 
5014   pbuffer += sizeof(brc_qpadjustment_distthreshold_maxframethreshold_distqpadjustment_IPB_vp8_g75);
5015 
5016   status = media_drv_memcpy (pbuffer,
5017 			     sizeof (brc_iframe_cost_table_vp8_g75),
5018 			     (VOID *) brc_iframe_cost_table_vp8_g75,
5019 			     sizeof (brc_iframe_cost_table_vp8_g75));
5020 
5021   if (status != TRUE) {
5022     media_unmap_buffer_obj (params->brc_update_constant_data->bo);
5023     MEDIA_DRV_ASSERT ("media_drv_memcpy failed");
5024   }
5025 
5026   pbuffer += sizeof(brc_iframe_cost_table_vp8_g75);
5027 
5028   status = media_drv_memcpy (pbuffer,
5029 			     sizeof (brc_pframe_cost_table_vp8_g75),
5030 			     (VOID *) brc_pframe_cost_table_vp8_g75,
5031 			     sizeof (brc_pframe_cost_table_vp8_g75));
5032 
5033   if (status != TRUE) {
5034     media_unmap_buffer_obj (params->brc_update_constant_data->bo);
5035     MEDIA_DRV_ASSERT ("media_drv_memcpy failed");
5036   }
5037 
5038   pbuffer += sizeof(brc_pframe_cost_table_vp8_g75);
5039 
5040   status = media_drv_memcpy (pbuffer,
5041 			     sizeof (quant_dc_vp8_g75),
5042 			     (VOID *) quant_dc_vp8_g75,
5043 			     sizeof (quant_dc_vp8_g75));
5044 
5045   if (status != TRUE) {
5046     media_unmap_buffer_obj (params->brc_update_constant_data->bo);
5047     MEDIA_DRV_ASSERT ("media_drv_memcpy failed");
5048   }
5049 
5050   pbuffer += sizeof(quant_dc_vp8_g75);
5051 
5052   status = media_drv_memcpy (pbuffer,
5053 			     sizeof (quant_ac_vp8_g75),
5054 			     (VOID *) quant_ac_vp8_g75,
5055 			     sizeof (quant_ac_vp8_g75));
5056 
5057   if (status != TRUE) {
5058     media_unmap_buffer_obj (params->brc_update_constant_data->bo);
5059     MEDIA_DRV_ASSERT ("media_drv_memcpy failed");
5060   }
5061 
5062   pbuffer += sizeof(quant_ac_vp8_g75);
5063 
5064   status = media_drv_memcpy (pbuffer,
5065 			     sizeof (brc_skip_mv_threshold_table_vp8_g75),
5066 			     (VOID *) brc_skip_mv_threshold_table_vp8_g75,
5067 			     sizeof (brc_skip_mv_threshold_table_vp8_g75));
5068 
5069   if (status != TRUE) {
5070     media_unmap_buffer_obj (params->brc_update_constant_data->bo);
5071     MEDIA_DRV_ASSERT ("media_drv_memcpy failed");
5072   }
5073 
5074   pbuffer += sizeof(brc_skip_mv_threshold_table_vp8_g75);
5075 
5076   media_unmap_buffer_obj (params->brc_update_constant_data->bo);
5077 }
5078 
5079 VOID
media_hw_context_init_g75(VADriverContextP ctx,MEDIA_HW_CONTEXT * hw_ctx)5080 media_hw_context_init_g75(VADriverContextP ctx, MEDIA_HW_CONTEXT *hw_ctx)
5081 {
5082   hw_ctx->vp8_me_mv_data_size_multiplier = 1;
5083 }
5084 
5085 VOID
media_init_brc_distortion_buffer_g75(MEDIA_ENCODER_CTX * encoder_context)5086 media_init_brc_distortion_buffer_g75 (MEDIA_ENCODER_CTX * encoder_context)
5087 {
5088   BRC_INIT_RESET_CONTEXT *brc_init_reset_context = &encoder_context->brc_init_reset_context;
5089   BYTE *brc_distortion_data = NULL;
5090 
5091   brc_distortion_data = (BYTE *) media_map_buffer_obj (brc_init_reset_context->brc_distortion.bo);
5092   media_drv_memset (brc_distortion_data,
5093 		    brc_init_reset_context->brc_distortion.pitch *
5094 		    brc_init_reset_context->brc_distortion.height);
5095   media_unmap_buffer_obj (brc_init_reset_context->brc_distortion.bo);
5096 }
5097