1 /*
2 * Copyright (c) 2011-2021, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file vphal_render_vebox_g11_base.cpp
24 //! \brief Interface and structure specific for GEN11 Vebox
25 //! \details Interface and structure specific for GEN11 Vebox
26 //!
27 #include "vphal.h"
28 #include "vphal_render_vebox_base.h"
29 #include "vphal_render_vebox_g11_base.h"
30 #include "vphal_render_sfc_g11_base.h"
31 #include "vphal_render_vebox_util_base.h"
32 #include "vpkrnheader.h"
33 #include "vphal_common_hdr.h"
34 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
35 #include "igvpkrn_isa_g11_icllp.h"
36 #endif
37
38 #define MAX_INPUT_PREC_BITS 16
39 #define DOWNSHIFT_WITH_ROUND(x, n) (((x) + (((n) > 0) ? (1 << ((n) - 1)) : 0)) >> (n))
40 #define INTERP(x0, x1, x, y0, y1) ((uint32_t) floor(y0+(x-x0)*(y1-y0)/(double)(x1-x0)))
41
42 const char g_KernelDNDI_Str_g11[KERNEL_VEBOX_BASE_MAX][MAX_PATH] =
43 {
44 DBG_TEXT("Reserved"),
45 DBG_TEXT("UpdateDNState"),
46 };
47
48 // Kernel Params ---------------------------------------------------------------
49 const RENDERHAL_KERNEL_PARAM g_Vebox_KernelParam_g11[KERNEL_VEBOX_BASE_MAX] =
50 {
51 ///* GRF_Count
52 // | BT_Count
53 // | | Sampler_Count
54 // | | | Thread_Count
55 // | | | | GRF_Start_Register
56 // | | | | | CURBE_Length
57 // | | | | | | block_width
58 // | | | | | | | block_height
59 // | | | | | | | | blocks_x
60 // | | | | | | | | | blocks_y
61 // | | | | | | | | | |*/
62 { 0, 0 , 0, VPHAL_USE_MEDIA_THREADS_MAX, 0, 0, 0, 0, 0, 0 }, // RESERVED
63 { 4, 34, 0, VPHAL_USE_MEDIA_THREADS_MAX, 0, 2, 64, 8, 1, 1 }, // UPDATEDNSTATE
64 };
65
66 const uint32_t dwDenoiseASDThreshold[NOISEFACTOR_MAX + 1] = {
67 512, 514, 516, 518, 520, 522, 524, 526, 528, 530, 532, 534, 536, 538, 540, 542,
68 544, 546, 548, 550, 552, 554, 556, 558, 560, 562, 564, 566, 568, 570, 572, 574,
69 576, 578, 580, 582, 584, 586, 588, 590, 592, 594, 596, 598, 600, 602, 604, 606,
70 608, 610, 612, 614, 616, 618, 620, 622, 624, 626, 628, 630, 632, 634, 636, 638,
71 640 };
72
73 const uint32_t dwDenoiseHistoryDelta[NOISEFACTOR_MAX + 1] = {
74 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
75 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
76 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
77 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
78 8 };
79
80 const uint32_t dwDenoiseMaximumHistory[NOISEFACTOR_MAX + 1] = {
81 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
82 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
83 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
84 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207,
85 208 };
86
87 const uint32_t dwDenoiseSTADThreshold[NOISEFACTOR_MAX + 1] = {
88 2048, 2052, 2056, 2060, 2064, 2068, 2072, 2076, 2080, 2084, 2088, 2092, 2096, 2100, 2104, 2108,
89 2112, 2116, 2120, 2124, 2128, 2132, 2136, 2140, 2144, 2148, 2152, 2156, 2160, 2164, 2168, 2172,
90 2176, 2180, 2184, 2188, 2192, 2196, 2200, 2204, 2208, 2212, 2216, 2220, 2224, 2228, 2232, 2236,
91 2240, 2244, 2248, 2252, 2256, 2260, 2264, 2268, 2272, 2276, 2280, 2284, 2288, 2292, 2296, 2300,
92 2304 };
93
94 const uint32_t dwDenoiseSCMThreshold[NOISEFACTOR_MAX + 1] = {
95 512, 514, 516, 518, 520, 522, 524, 526, 528, 530, 532, 534, 536, 538, 540, 542,
96 544, 546, 548, 550, 552, 554, 556, 558, 560, 562, 564, 566, 568, 570, 572, 574,
97 576, 578, 580, 582, 584, 586, 588, 590, 592, 594, 596, 598, 600, 602, 604, 606,
98 608, 610, 612, 614, 616, 618, 620, 622, 624, 626, 628, 630, 632, 634, 636, 638,
99 640 };
100
101 const uint32_t dwDenoiseMPThreshold[NOISEFACTOR_MAX + 1] = {
102 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
103 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
104 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
105 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
106 2 };
107
108 const uint32_t dwLTDThreshold[NOISEFACTOR_MAX + 1] = {
109 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
110 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
111 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
112 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
113 128 };
114
115 const uint32_t dwTDThreshold[NOISEFACTOR_MAX + 1] = {
116 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143,
117 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
118 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
119 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
120 192 };
121
122 const uint32_t dwGoodNeighborThreshold[NOISEFACTOR_MAX + 1] = {
123 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
124 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
125 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
126 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
127 0 };
128
129 const uint32_t dwPixRangeThreshold0[NOISEFACTOR_MAX + 1] = {
130 32, 37, 42, 47, 52, 57, 62, 67, 72, 77, 82, 87, 92, 97, 102, 107,
131 112, 117, 122, 127, 132, 137, 142, 147, 152, 157, 162, 167, 172, 177, 182, 187,
132 192, 198, 204, 210, 216, 222, 228, 234, 240, 246, 252, 258, 264, 270, 276, 282,
133 288, 294, 300, 306, 312, 318, 324, 330, 336, 342, 348, 354, 360, 366, 372, 378,
134 384 };
135
136 const uint32_t dwPixRangeThreshold1[NOISEFACTOR_MAX + 1] = {
137 64, 70, 76, 82, 88, 94, 100, 106, 112, 118, 124, 130, 136, 142, 148, 154,
138 160, 166, 172, 178, 184, 190, 196, 202, 208, 214, 220, 226, 232, 238, 244, 250,
139 256, 266, 276, 286, 296, 306, 316, 326, 336, 346, 356, 366, 376, 386, 396, 406,
140 416, 426, 436, 446, 456, 466, 476, 486, 496, 506, 516, 526, 536, 546, 556, 566,
141 576 };
142
143 const uint32_t dwPixRangeThreshold2[NOISEFACTOR_MAX + 1] = {
144 128, 140, 152, 164, 176, 188, 200, 212, 224, 236, 248, 260, 272, 284, 296, 308,
145 320, 332, 344, 356, 368, 380, 392, 404, 416, 428, 440, 452, 464, 476, 488, 500,
146 512, 524, 536, 548, 560, 572, 584, 596, 608, 620, 632, 644, 656, 668, 680, 692,
147 704, 716, 728, 740, 752, 764, 776, 788, 800, 812, 824, 836, 848, 860, 872, 884,
148 896 };
149
150 const uint32_t dwPixRangeThreshold3[NOISEFACTOR_MAX + 1] = {
151 128, 144, 160, 176, 192, 208, 224, 240, 256, 272, 288, 304, 320, 336, 352, 368,
152 384, 400, 416, 432, 448, 464, 480, 496, 512, 528, 544, 560, 576, 592, 608, 624,
153 640, 660, 680, 700, 720, 740, 760, 780, 800, 820, 840, 860, 880, 900, 920, 940,
154 960, 980, 1000, 1020, 1040, 1060, 1080, 1100, 1120, 1140, 1160, 1180, 1200, 1220, 1240, 1260,
155 1280 };
156
157 const uint32_t dwPixRangeThreshold4[NOISEFACTOR_MAX + 1] = {
158 128, 152, 176, 200, 224, 248, 272, 296, 320, 344, 368, 392, 416, 440, 464, 488,
159 512, 536, 560, 584, 608, 632, 656, 680, 704, 728, 752, 776, 800, 824, 848, 872,
160 896, 928, 960, 992, 1024, 1056, 1088, 1120, 1152, 1184, 1216, 1248, 1280, 1312, 1344, 1376,
161 1408, 1440, 1472, 1504, 1536, 1568, 1600, 1632, 1664, 1696, 1728, 1760, 1792, 1824, 1856, 1888,
162 1920 };
163
164 const uint32_t dwPixRangeThreshold5[NOISEFACTOR_MAX + 1] = {
165 128, 164, 200, 236, 272, 308, 344, 380, 416, 452, 488, 524, 560, 596, 632, 668,
166 704, 740, 776, 812, 848, 884, 920, 956, 992, 1028, 1064, 1100, 1136, 1172, 1208, 1244,
167 1280, 1320, 1360, 1400, 1440, 1480, 1520, 1560, 1600, 1640, 1680, 1720, 1760, 1800, 1840, 1880,
168 1920, 1960, 2000, 2040, 2080, 2120, 2160, 2200, 2240, 2280, 2320, 2360, 2400, 2440, 2480, 2520,
169 2560 };
170
171 const uint32_t dwPixRangeWeight0[NOISEFACTOR_MAX + 1] = {
172 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
173 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
174 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
175 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
176 16 };
177
178 const uint32_t dwPixRangeWeight1[NOISEFACTOR_MAX + 1] = {
179 9, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 11, 11, 11,
180 11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 13, 13, 13, 13, 13, 13,
181 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
182 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
183 15 };
184
185 const uint32_t dwPixRangeWeight2[NOISEFACTOR_MAX + 1] = {
186 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5,
187 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9,
188 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11,
189 11, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
190 13 };
191
192 const uint32_t dwPixRangeWeight3[NOISEFACTOR_MAX + 1] = {
193 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 2, 2, 2,
194 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4,
195 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6, 7, 7, 7,
196 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9,
197 10 };
198
199 const uint32_t dwPixRangeWeight4[NOISEFACTOR_MAX + 1] = {
200 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
201 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
202 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 4, 4, 4,
203 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6,
204 7 };
205
206 const uint32_t dwPixRangeWeight5[NOISEFACTOR_MAX + 1] = {
207 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
208 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
209 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2,
210 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
211 4 };
212
213 const uint32_t dwLTDThresholdUV[NOISEFACTOR_MAX + 1] = {
214 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
215 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
216 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
217 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
218 8 };
219
220 const uint32_t dwTDThresholdUV[NOISEFACTOR_MAX + 1] = {
221 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
222 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
223 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
224 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
225 14 };
226
227 const uint32_t dwSTADThresholdUV[NOISEFACTOR_MAX + 1] = {
228 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131,
229 132, 132, 132, 132, 133, 133, 133, 133, 134, 134, 134, 134, 135, 135, 135, 135,
230 136, 136, 136, 136, 137, 137, 137, 137, 138, 138, 138, 138, 139, 139, 139, 139,
231 140, 140, 140, 140, 141, 141, 141, 141, 142, 142, 142, 142, 143, 143, 143, 143,
232 144 };
233
234 //!
235 //! \brief IsFormatMMCSupported
236 //! \details Check if the format of vebox output surface is supported by MMC
237 //! \param [in] Format
238 //! \return bool true if suported, otherwise not supported
239 //!
IsFormatMMCSupported(MOS_FORMAT Format)240 bool VPHAL_VEBOX_STATE_G11_BASE::IsFormatMMCSupported(
241 MOS_FORMAT Format)
242 {
243 bool bRet;
244
245 bRet = false;
246
247 if ((Format != Format_NV12) &&
248 (Format != Format_YUY2) &&
249 (Format != Format_YUYV) &&
250 (Format != Format_UYVY) &&
251 (Format != Format_YVYU) &&
252 (Format != Format_VYUY) &&
253 (Format != Format_AYUV) &&
254 (Format != Format_Y416) &&
255 (Format != Format_A8B8G8R8) &&
256 (Format != Format_A16B16G16R16) &&
257 (Format != Format_P010) &&
258 (Format != Format_Y210))
259 {
260 VPHAL_RENDER_NORMALMESSAGE("Unsupported Format '0x%08x' for VEBOX MMC ouput.", Format);
261 goto finish;
262 }
263
264 bRet = true;
265
266 finish:
267 return bRet;
268 }
269
GetFFDISurfParams(VPHAL_CSPACE & ColorSpace,VPHAL_SAMPLE_TYPE & SampleType)270 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::GetFFDISurfParams(
271 VPHAL_CSPACE &ColorSpace,
272 VPHAL_SAMPLE_TYPE &SampleType)
273 {
274 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
275
276 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
277 {
278 ColorSpace = m_sfcPipeState->GetInputColorSpace();
279 }
280 else
281 {
282 ColorSpace = m_currentSurface->ColorSpace;
283 }
284
285 // When IECP is enabled and Bob or interlaced scaling is selected for interlaced input,
286 // output surface's SampleType should be same to input's. Bob is being
287 // done in Composition part
288 if (pRenderData->bIECP &&
289 ((m_currentSurface->pDeinterlaceParams &&
290 m_currentSurface->pDeinterlaceParams->DIMode == DI_MODE_BOB) ||
291 m_currentSurface->bInterlacedScaling))
292 {
293 SampleType = m_currentSurface->SampleType;
294 }
295 else
296 {
297 SampleType = SAMPLE_PROGRESSIVE;
298 }
299
300 return MOS_STATUS_SUCCESS;
301 }
302
303 //!
304 //! \brief Get Output surface params needed when allocate surfaces
305 //! \details Get Output surface params needed when allocate surfaces
306 //! \param [out] Format
307 //! Format of output surface
308 //! \param [out] TileType
309 //! Tile type of output surface
310 //! \return MOS_STATUS
311 //! Return MOS_STATUS_SUCCESS if success, otherwise failed
312 //!
GetOutputSurfParams(MOS_FORMAT & Format,MOS_TILE_TYPE & TileType)313 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::GetOutputSurfParams(
314 MOS_FORMAT &Format,
315 MOS_TILE_TYPE &TileType)
316 {
317 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
318
319 if (pRenderData->bDeinterlace)
320 {
321 //set vebox output as NV12 if render target is non_YUY2 for saving bandwidth.
322 if (pRenderData->pRenderTarget->Format == Format_YUY2)
323 {
324 Format = Format_YUY2;
325 }
326 else
327 {
328 Format = Format_NV12;
329 }
330 TileType = MOS_TILE_Y;
331 }
332 else
333 {
334 Format = IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) ?
335 m_sfcPipeState->GetInputFormat() :
336 m_currentSurface->Format;
337
338 TileType = m_currentSurface->TileType;
339 }
340
341 return MOS_STATUS_SUCCESS;
342 }
343
344 //!
345 //! \brief Check for DN only case
346 //! \details Check for DN only case
347 //! \return bool
348 //! Return true if DN only case, otherwise not
349 //!
IsDNOnly()350 bool VPHAL_VEBOX_STATE_G11_BASE::IsDNOnly()
351 {
352 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
353
354 return pRenderData->bDenoise &&
355 (!pRenderData->bDeinterlace) &&
356 (!IsQueryVarianceEnabled()) &&
357 (!IsIECPEnabled());
358 }
359
IsFFDISurfNeeded()360 bool VPHAL_VEBOX_STATE_G11_BASE::IsFFDISurfNeeded()
361 {
362 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
363
364 if (pRenderData->bDeinterlace ||
365 IsQueryVarianceEnabled() ||
366 pRenderData->bIECP ||
367 (pRenderData->bDenoise && IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))) // DN + SFC needs IECP implicitly and outputs to DI surface
368 {
369 return true;
370 }
371 else
372 {
373 return false;
374 }
375 }
376
IsFFDNSurfNeeded()377 bool VPHAL_VEBOX_STATE_G11_BASE::IsFFDNSurfNeeded()
378 {
379 return GetLastExecRenderData()->bDenoise ? true : false;
380 }
381
IsSTMMSurfNeeded()382 bool VPHAL_VEBOX_STATE_G11_BASE::IsSTMMSurfNeeded()
383 {
384
385 return (GetLastExecRenderData()->bDenoise || GetLastExecRenderData()->bDeinterlace);
386 }
387
388 //!
389 //! \brief Vebox allocate resources
390 //! \details Allocate resources that will be used in Vebox
391 //! \return MOS_STATUS
392 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
393 //!
AllocateResources()394 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::AllocateResources()
395 {
396 MOS_STATUS eStatus;
397 PMOS_INTERFACE pOsInterface;
398 PRENDERHAL_INTERFACE pRenderHal;
399 MOS_FORMAT format;
400 MOS_TILE_TYPE TileType;
401 uint32_t dwWidth;
402 uint32_t dwHeight;
403 uint32_t dwSize;
404 int32_t i;
405 bool bAllocated;
406 bool bDIEnable;
407 bool bSurfCompressible;
408 bool bFFDNSurfCompressible;
409 MOS_RESOURCE_MMC_MODE SurfCompressionMode;
410 MOS_RESOURCE_MMC_MODE FFDNSurfCompressionMode;
411 MHW_VEBOX_SURFACE_PARAMS MhwVeboxSurfaceParam;
412 PMHW_VEBOX_INTERFACE pVeboxInterface;
413 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
414 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
415
416 bAllocated = false;
417 bSurfCompressible = false;
418 bFFDNSurfCompressible = false;
419 SurfCompressionMode = MOS_MMC_DISABLED;
420 FFDNSurfCompressionMode = MOS_MMC_DISABLED;
421 pOsInterface = pVeboxState->m_pOsInterface;
422 pRenderHal = pVeboxState->m_pRenderHal;
423 pVeboxInterface = pVeboxState->m_pVeboxInterface;
424
425 GetOutputSurfParams(format, TileType);
426
427 // In DN only case, input, output and previous De-noised
428 // surfaces all should have precisely the same memory compression status.
429 // Either all these surfaces should be compressed together
430 // or none of them compressed at all.This is HW limitation.
431 if (IsDNOnly())
432 {
433 bSurfCompressible = pVeboxState->m_currentSurface->bCompressible;
434 SurfCompressionMode = pVeboxState->m_currentSurface->bIsCompressed ? MOS_MMC_HORIZONTAL : MOS_MMC_DISABLED;
435 }
436 // Only Tiled Y surfaces support MMC
437 else if (pVeboxState->bEnableMMC &&
438 (TileType == MOS_TILE_Y) &&
439 IsFormatMMCSupported(format))
440 {
441 bSurfCompressible = true;
442 SurfCompressionMode = MOS_MMC_HORIZONTAL;
443 }
444
445 // Allocate FFDI/IECP surfaces----------------------------------------------
446 if (IsFFDISurfNeeded())
447 {
448 VPHAL_CSPACE ColorSpace;
449 VPHAL_SAMPLE_TYPE SampleType;
450
451 VPHAL_RENDER_CHK_STATUS(GetFFDISurfParams(ColorSpace, SampleType));
452
453 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
454 {
455 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
456 pOsInterface,
457 pVeboxState->FFDISurfaces[i],
458 "VeboxFFDISurface_g11",
459 format,
460 MOS_GFXRES_2D,
461 TileType,
462 pVeboxState->m_currentSurface->dwWidth,
463 pVeboxState->m_currentSurface->dwHeight,
464 bSurfCompressible,
465 SurfCompressionMode,
466 &bAllocated));
467
468 pVeboxState->FFDISurfaces[i]->SampleType = SampleType;
469
470 // Copy rect sizes so that if input surface state needs to adjust,
471 // output surface can be adjustted also.
472 pVeboxState->FFDISurfaces[i]->rcSrc = pVeboxState->m_currentSurface->rcSrc;
473 pVeboxState->FFDISurfaces[i]->rcDst = pVeboxState->m_currentSurface->rcDst;
474 // Copy max src rect
475 pVeboxState->FFDISurfaces[i]->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
476
477 // Copy Rotation, it's used in setting SFC state
478 pVeboxState->FFDISurfaces[i]->Rotation = pVeboxState->m_currentSurface->Rotation;
479
480 pVeboxState->FFDISurfaces[i]->ColorSpace = ColorSpace;
481
482 // Copy ScalingMode, it's used in setting SFC state
483 pVeboxState->FFDISurfaces[i]->ScalingMode = pVeboxState->m_currentSurface->ScalingMode;
484
485 if (bAllocated)
486 {
487 // Report Compress Status
488 m_reporting->GetFeatures().ffdiCompressible = bSurfCompressible;
489 m_reporting->GetFeatures().ffdiCompressMode = (uint8_t)(SurfCompressionMode);
490 }
491 }
492 }
493 else
494 {
495 // Free FFDI surfaces
496 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
497 {
498 if (pVeboxState->FFDISurfaces[i])
499 {
500 pOsInterface->pfnFreeResource(
501 pOsInterface,
502 &pVeboxState->FFDISurfaces[i]->OsResource);
503 }
504 }
505 }
506
507 // When DI switch to DNDI, the first FFDN surface pitch doesn't match with
508 // the input surface pitch and cause the flicker issue
509 // Or for 2 clip playback in WMP, the first one is HW decoding, the second one is SW decoding,
510 // when the second clip playback starting without media pipeline recreation,
511 // the internal FFDNSurfaces are compressed, but VP input surface is uncompressed.
512 if ((pVeboxState->bDIEnabled && !pVeboxState->bDNEnabled && pRenderData->bDenoise) ||
513 ((pVeboxState->m_currentSurface->bIsCompressed == false) && ((bSurfCompressible == true) || (pVeboxState->FFDNSurfaces[0]->bIsCompressed == true))))
514 {
515 bFFDNSurfCompressible = pVeboxState->m_currentSurface->bCompressible;
516 FFDNSurfCompressionMode = pVeboxState->m_currentSurface->bIsCompressed ? MOS_MMC_HORIZONTAL : MOS_MMC_DISABLED;
517 }
518 else
519 {
520 bFFDNSurfCompressible = bSurfCompressible;
521 FFDNSurfCompressionMode = SurfCompressionMode;
522 }
523
524 // Allocate FFDN surfaces---------------------------------------------------
525 if (IsFFDNSurfNeeded())
526 {
527 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
528 {
529 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
530 pOsInterface,
531 pVeboxState->FFDNSurfaces[i],
532 "VeboxFFDNSurface_g11",
533 pVeboxState->m_currentSurface->Format,
534 MOS_GFXRES_2D,
535 pVeboxState->m_currentSurface->TileType,
536 pVeboxState->m_currentSurface->dwWidth,
537 pVeboxState->m_currentSurface->dwHeight,
538 bFFDNSurfCompressible,
539 FFDNSurfCompressionMode,
540 &bAllocated));
541
542 // if allocated, pVeboxState->PreviousSurface is not valid for DN reference.
543 if (bAllocated)
544 {
545 // If DI is enabled, try to use app's reference if provided
546 if (pRenderData->bRefValid &&
547 pRenderData->bDeinterlace &&
548 (pVeboxState->m_currentSurface->pBwdRef != nullptr) &&
549 (pVeboxState->FFDNSurfaces[i]->dwPitch == pVeboxState->m_currentSurface->pBwdRef->dwPitch))
550 {
551 CopySurfaceValue(pVeboxState->m_previousSurface, pVeboxState->m_currentSurface->pBwdRef);
552 }
553 else
554 {
555 pRenderData->bRefValid = false;
556 }
557 }
558
559 // DN's output format should be same to input
560 pVeboxState->FFDNSurfaces[i]->SampleType =
561 pVeboxState->m_currentSurface->SampleType;
562
563 // Copy rect sizes so that if input surface state needs to adjust,
564 // output surface can be adjustted also.
565 pVeboxState->FFDNSurfaces[i]->rcSrc = pVeboxState->m_currentSurface->rcSrc;
566 pVeboxState->FFDNSurfaces[i]->rcDst = pVeboxState->m_currentSurface->rcDst;
567 // Copy max src rect
568 pVeboxState->FFDNSurfaces[i]->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
569
570 // Set Colorspace of FFDN
571 pVeboxState->FFDNSurfaces[i]->ColorSpace = pVeboxState->m_currentSurface->ColorSpace;
572
573 // Copy FrameID and parameters, as DN output will be used as next blt's current
574 pVeboxState->FFDNSurfaces[i]->FrameID = pVeboxState->m_currentSurface->FrameID;
575 pVeboxState->FFDNSurfaces[i]->pDenoiseParams = pVeboxState->m_currentSurface->pDenoiseParams;
576 // Copy ScalingMode, it's used in setting SFC state
577 pVeboxState->FFDNSurfaces[i]->ScalingMode = pVeboxState->m_currentSurface->ScalingMode;
578
579 if (bAllocated)
580 {
581 // Report Compress Status
582 m_reporting->GetFeatures().ffdnCompressible = bFFDNSurfCompressible;
583 m_reporting->GetFeatures().ffdnCompressMode = (uint8_t)(FFDNSurfCompressionMode);
584 }
585 }
586 }
587 else
588 {
589 // Free FFDN surfaces
590 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
591 {
592 if (pVeboxState->FFDNSurfaces[i])
593 {
594 pOsInterface->pfnFreeResource(
595 pOsInterface,
596 &pVeboxState->FFDNSurfaces[i]->OsResource);
597 }
598 }
599 }
600
601 // Adjust the rcMaxSrc of pRenderTarget when Vebox output is enabled
602 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
603 {
604 pRenderData->pRenderTarget->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
605 }
606
607 // Allocate STMM (Spatial-Temporal Motion Measure) Surfaces------------------
608 if (IsSTMMSurfNeeded())
609 {
610 if (pVeboxState->bEnableMMC)
611 {
612 bSurfCompressible = true;
613 SurfCompressionMode = MOS_MMC_HORIZONTAL;
614 }
615 else
616 {
617 bSurfCompressible = false;
618 SurfCompressionMode = MOS_MMC_DISABLED;
619 }
620
621 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
622 {
623 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
624 pOsInterface,
625 &pVeboxState->STMMSurfaces[i],
626 "VeboxSTMMSurface_g11",
627 Format_STMM,
628 MOS_GFXRES_2D,
629 MOS_TILE_Y,
630 pVeboxState->m_currentSurface->dwWidth,
631 pVeboxState->m_currentSurface->dwHeight,
632 bSurfCompressible,
633 SurfCompressionMode,
634 &bAllocated));
635
636 if (bAllocated)
637 {
638 VPHAL_RENDER_CHK_STATUS(VeboxInitSTMMHistory(i));
639
640 // Report Compress Status
641 m_reporting->GetFeatures().stmmCompressible = bSurfCompressible;
642 m_reporting->GetFeatures().stmmCompressMode = (uint8_t)(SurfCompressionMode);
643 }
644 }
645 }
646 else
647 {
648 // Free DI history buffers (STMM = Spatial-temporal motion measure)
649 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
650 {
651 pOsInterface->pfnFreeResource(
652 pOsInterface,
653 &pVeboxState->STMMSurfaces[i].OsResource);
654 }
655 }
656
657 // Allocate BT2020 CSC temp surface----------------------------------------------
658 if (pRenderData->b2PassesCSC)
659 {
660 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
661 pOsInterface,
662 &pVeboxState->m_BT2020CSCTempSurface,
663 "VeboxBT2020CSCTempSurface_g11",
664 Format_A8B8G8R8,
665 MOS_GFXRES_2D,
666 MOS_TILE_Y,
667 pVeboxState->m_currentSurface->dwWidth,
668 pVeboxState->m_currentSurface->dwHeight,
669 false,
670 MOS_MMC_DISABLED,
671 &bAllocated));
672
673 // Copy rect sizes so that if input surface state needs to adjust,
674 // output surface can be adjustted also.
675 pVeboxState->m_BT2020CSCTempSurface.rcSrc = pVeboxState->m_currentSurface->rcSrc;
676 pVeboxState->m_BT2020CSCTempSurface.rcDst = pVeboxState->m_currentSurface->rcDst;
677 // Copy max src rect
678 pVeboxState->m_BT2020CSCTempSurface.rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
679
680 // Copy Rotation, it's used in setting SFC state
681 pVeboxState->m_BT2020CSCTempSurface.Rotation = pVeboxState->m_currentSurface->Rotation;
682 pVeboxState->m_BT2020CSCTempSurface.SampleType = pVeboxState->m_currentSurface->SampleType;
683 pVeboxState->m_BT2020CSCTempSurface.ColorSpace = CSpace_sRGB;
684 // Copy ScalingMode, it's used in setting SFC state
685 pVeboxState->m_BT2020CSCTempSurface.ScalingMode = pVeboxState->m_currentSurface->ScalingMode;
686 }
687
688 // Allocate Statistics State Surface----------------------------------------
689 // Width to be a aligned on 64 bytes and height is 1/4 the height
690 // Per frame information written twice per frame for 2 slices
691 // Surface to be a rectangle aligned with dwWidth to get proper dwSize
692 bDIEnable = pRenderData->bDeinterlace || IsQueryVarianceEnabled();
693
694 VPHAL_RENDER_CHK_STATUS(VpHal_InitVeboxSurfaceParams(
695 pVeboxState->m_currentSurface, &MhwVeboxSurfaceParam));
696 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->VeboxAdjustBoundary(
697 &MhwVeboxSurfaceParam,
698 &dwWidth,
699 &dwHeight,
700 bDIEnable));
701
702 dwWidth = MOS_ALIGN_CEIL(dwWidth, 64);
703 dwHeight = MOS_ROUNDUP_DIVIDE(dwHeight, 4) +
704 MOS_ROUNDUP_DIVIDE(VPHAL_VEBOX_STATISTICS_SIZE_G11 * sizeof(uint32_t), dwWidth);
705 dwSize = dwWidth * dwHeight;
706
707 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
708 pOsInterface,
709 &pVeboxState->VeboxStatisticsSurface,
710 "VeboxStatisticsSurface_g11",
711 Format_Buffer,
712 MOS_GFXRES_BUFFER,
713 MOS_TILE_LINEAR,
714 dwSize,
715 1,
716 false,
717 MOS_MMC_DISABLED,
718 &bAllocated));
719
720 if (bAllocated)
721 {
722 // initialize Statistics Surface
723 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnFillResource(
724 pOsInterface,
725 &(pVeboxState->VeboxStatisticsSurface.OsResource),
726 dwSize,
727 0));
728
729 pVeboxState->dwVeboxPerBlockStatisticsWidth = dwWidth;
730 pVeboxState->dwVeboxPerBlockStatisticsHeight = dwHeight -
731 MOS_ROUNDUP_DIVIDE(VPHAL_VEBOX_STATISTICS_SIZE_G11 * sizeof(uint32_t), dwWidth);
732 }
733
734 // Allocate Lace/Ace/Rgb Histogram surface----------------------------------------------
735 // Size of RGB histograms, 1 set for each slice. For single slice, other set will be 0
736 dwSize = VPHAL_VEBOX_RGB_HISTOGRAM_SIZE_G11;
737 dwSize += VPHAL_VEBOX_RGB_ACE_HISTOGRAM_SIZE_RESERVED_G11;
738 // Size of ACE histograms, 1 set for each slice. For single slice, other set will be 0
739 dwSize += VPHAL_VEBOX_ACE_HISTOGRAM_SIZE_PER_FRAME_PER_SLICE * // Ace histogram size per slice
740 VPHAL_NUM_FRAME_PREVIOUS_CURRENT * // Ace for Prev + Curr
741 VPHAL_VEBOX_MAX_SLICES_G11; // Total number of slices
742
743 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
744 pOsInterface,
745 &pVeboxState->VeboxRGBHistogram,
746 "VeboxRgbHistogram_g11",
747 Format_Buffer,
748 MOS_GFXRES_BUFFER,
749 MOS_TILE_LINEAR,
750 dwSize,
751 1,
752 false,
753 MOS_MMC_DISABLED,
754 &bAllocated));
755
756 #if VEBOX_AUTO_DENOISE_SUPPORTED
757 // Allocate Temp Surface for Vebox Update kernels----------------------------------------
758 // the surface size is one Page
759 dwSize = MHW_PAGE_SIZE;
760
761 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
762 pOsInterface,
763 &pVeboxState->VeboxTempSurface,
764 "VeboxTempSurface_g11",
765 Format_Buffer,
766 MOS_GFXRES_BUFFER,
767 MOS_TILE_LINEAR,
768 dwSize,
769 1,
770 false,
771 MOS_MMC_DISABLED,
772 &bAllocated));
773
774 if (bAllocated)
775 {
776 // initialize Statistics Surface
777 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnFillResource(
778 pOsInterface,
779 &(pVeboxState->VeboxTempSurface.OsResource),
780 dwSize,
781 0));
782 }
783
784 // Allocate Spatial Attributes Configuration Surface for DN kernel GEN11-----------
785 dwSize = MHW_PAGE_SIZE;
786
787 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
788 pOsInterface,
789 &pVeboxState->VeboxSpatialAttributesConfigurationSurface,
790 "VeboxSpatialAttributesConfigurationSurface_g11",
791 Format_RAW,
792 MOS_GFXRES_BUFFER,
793 MOS_TILE_LINEAR,
794 dwSize,
795 1,
796 false,
797 MOS_MMC_DISABLED,
798 &bAllocated));
799
800 if (bAllocated)
801 {
802 // initialize Spatial Attributes Configuration Surface
803 VPHAL_RENDER_CHK_STATUS(VeboxInitSpatialAttributesConfiguration());
804 }
805 #endif
806
807 if (pRenderData->bHdr3DLut)
808 {
809 // Allocate 3DLut Table Surface
810 const uint32_t dwSegSize = 65;
811 const uint32_t dwMulSize = 128;
812 dwSize = dwSegSize * dwSegSize * dwMulSize;
813 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
814 pOsInterface,
815 &pVeboxState->Vebox3DLookUpTables,
816 "Vebox3DLutTableSurface_g11",
817 Format_A16B16G16R16,
818 MOS_GFXRES_2D,
819 MOS_TILE_LINEAR,
820 dwSegSize,
821 dwMulSize * dwSegSize,
822 false,
823 MOS_MMC_DISABLED,
824 &bAllocated));
825
826 if (nullptr == m_hdr3DLutGenerator)
827 {
828 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
829 PRENDERHAL_INTERFACE pRenderHal = pVeboxState->m_pRenderHal;
830 m_hdr3DLutGenerator = MOS_New(Hdr3DLutGenerator, pRenderHal, IGVP3DLUT_GENERATION_G11_ICLLP, IGVP3DLUT_GENERATION_G11_ICLLP_SIZE);
831 #endif
832 }
833 }
834 else
835 {
836 // Free 3DLook Up table surface for VEBOX
837 pOsInterface->pfnFreeResource(
838 pOsInterface,
839 &pVeboxState->Vebox3DLookUpTables.OsResource);
840
841 MOS_Delete(m_hdr3DLutGenerator);
842 }
843
844 finish:
845 if (eStatus != MOS_STATUS_SUCCESS)
846 {
847 pVeboxState->FreeResources();
848 }
849
850 return eStatus;
851 }
852
853 //!
854 //! \brief Vebox free resources
855 //! \details Free resources that are used in Vebox
856 //! \return void
857 //!
FreeResources()858 void VPHAL_VEBOX_STATE_G11_BASE::FreeResources()
859 {
860 int32_t i = 0;
861 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
862 PMOS_INTERFACE pOsInterface = pVeboxState->m_pOsInterface;
863 VPHAL_RENDER_CHK_NULL_NO_STATUS(pOsInterface);
864
865 // Free FFDI surfaces
866 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
867 {
868 if (pVeboxState->FFDISurfaces[i])
869 {
870 pOsInterface->pfnFreeResource(
871 pOsInterface,
872 &pVeboxState->FFDISurfaces[i]->OsResource);
873 }
874 }
875
876 // Free FFDN surfaces
877 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
878 {
879 if (pVeboxState->FFDNSurfaces[i])
880 {
881 pOsInterface->pfnFreeResource(
882 pOsInterface,
883 &pVeboxState->FFDNSurfaces[i]->OsResource);
884 }
885 }
886
887 // Free DI history buffers (STMM = Spatial-temporal motion measure)
888 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
889 {
890 pOsInterface->pfnFreeResource(
891 pOsInterface,
892 &pVeboxState->STMMSurfaces[i].OsResource);
893 }
894
895 // Free Statistics data surface for VEBOX
896 pOsInterface->pfnFreeResource(
897 pOsInterface,
898 &pVeboxState->VeboxStatisticsSurface.OsResource);
899
900 // Free LaceAceRgb Histogram surface for VEBOX
901 pOsInterface->pfnFreeResource(
902 pOsInterface,
903 &pVeboxState->VeboxRGBHistogram.OsResource);
904
905 // Free BT2020 CSC temp surface for VEBOX used by BT2020 CSC
906 pOsInterface->pfnFreeResource(
907 pOsInterface,
908 &pVeboxState->m_BT2020CSCTempSurface.OsResource);
909
910 #if VEBOX_AUTO_DENOISE_SUPPORTED
911 // Free Spatial Attributes Configuration Surface for DN kernel
912 pOsInterface->pfnFreeResource(
913 pOsInterface,
914 &pVeboxState->VeboxSpatialAttributesConfigurationSurface.OsResource);
915
916 // Free Temp Surface for VEBOX
917 pOsInterface->pfnFreeResource(
918 pOsInterface,
919 &pVeboxState->VeboxTempSurface.OsResource);
920 #endif
921
922 // Free SFC resources
923 if (MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrSFCPipe) &&
924 m_sfcPipeState)
925 {
926 m_sfcPipeState->FreeResources();
927 }
928
929 // Free 3DLook Up table surface for VEBOX
930 pOsInterface->pfnFreeResource(
931 pOsInterface,
932 &pVeboxState->Vebox3DLookUpTables.OsResource);
933
934 MOS_Delete(m_hdr3DLutGenerator);
935
936 finish:
937 return;
938 }
939
940 //!
941 //! \brief IsMMCEnabledForCurrOutputSurf
942 //! \details Check if MMC can be enabled for current output surface.
943 //! \return bool true if suported, otherwise not supported
944 //!
IsMMCEnabledForCurrOutputSurf()945 bool VPHAL_VEBOX_STATE_G11_BASE::IsMMCEnabledForCurrOutputSurf()
946 {
947 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
948 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
949 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData->pRenderTarget);
950
951 return bEnableMMC &&
952 IsFormatMMCSupported(pRenderData->pRenderTarget->Format) &&
953 (pRenderData->Component == COMPONENT_VPreP) &&
954 (pRenderData->pRenderTarget->CompressionMode == MOS_MMC_HORIZONTAL);
955 finish:
956 return false;
957 }
958
959 //!
960 //! \brief Setup Vebox_DI_IECP Command params for VEBOX final output surface on G9
961 //! \details Setup Vebox_DI_IECP Command params for VEBOX final output surface on G9
962 //! \param [in] bDiScdEnable
963 //! Is DI/Variances report enabled
964 //! \param [in,out] pVeboxDiIecpCmdParams
965 //! Pointer to VEBOX_DI_IECP command parameters
966 //! \return MOS_STATUS
967 //! Return MOS_STATUS_SUCCESS if successful
968 //! MOS_STATUS_UNIMPLEMENTED, if condition not implemented,
969 //! otherwise failed
970 //!
SetupDiIecpStateForOutputSurf(bool bDiScdEnable,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)971 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::SetupDiIecpStateForOutputSurf(
972 bool bDiScdEnable,
973 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
974 {
975 PMOS_INTERFACE pOsInterface;
976 PRENDERHAL_INTERFACE pRenderHal;
977 PMHW_VEBOX_INTERFACE pVeboxInterface;
978 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
979 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
980 MHW_VEBOX_SURFACE_CNTL_PARAMS VeboxSurfCntlParams;
981 PVPHAL_SURFACE pSurface;
982 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
983
984 pOsInterface = pVeboxState->m_pOsInterface;
985 pRenderHal = pVeboxState->m_pRenderHal;
986 pVeboxInterface = pVeboxState->m_pVeboxInterface;
987
988 // VEBOX final output surface
989 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
990 {
991 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
992 pOsInterface,
993 &pRenderData->pRenderTarget->OsResource,
994 true,
995 true));
996
997 pVeboxDiIecpCmdParams->pOsResCurrOutput =
998 &pRenderData->pRenderTarget->OsResource;
999 pVeboxDiIecpCmdParams->dwCurrOutputSurfOffset =
1000 pRenderData->pRenderTarget->dwOffset;
1001 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
1002 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1003
1004 if (IsMMCEnabledForCurrOutputSurf())
1005 {
1006 // Update control bits for Current Output Surf
1007 pSurface = pRenderData->pRenderTarget;
1008 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1009 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1010 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1011 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1012 &VeboxSurfCntlParams,
1013 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
1014 }
1015 }
1016 else if (bDiScdEnable)
1017 {
1018 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1019 pOsInterface,
1020 &pVeboxState->FFDISurfaces[pRenderData->iFrame1]->OsResource,
1021 true,
1022 true));
1023
1024 pVeboxDiIecpCmdParams->pOsResCurrOutput =
1025 &pVeboxState->FFDISurfaces[pRenderData->iFrame1]->OsResource;
1026 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
1027 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1028
1029 // Update control bits for Current Output Surf
1030 if (bEnableMMC)
1031 {
1032 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame1];
1033 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1034 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1035 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1036 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1037 &VeboxSurfCntlParams,
1038 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
1039 }
1040
1041 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1042 pOsInterface,
1043 &pVeboxState->FFDISurfaces[pRenderData->iFrame0]->OsResource,
1044 true,
1045 true));
1046
1047 pVeboxDiIecpCmdParams->pOsResPrevOutput =
1048 &pVeboxState->FFDISurfaces[pRenderData->iFrame0]->OsResource;
1049 pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value =
1050 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1051
1052 // Update control bits for PrevOutput surface
1053 if (bEnableMMC)
1054 {
1055 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame0];
1056 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1057 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1058 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1059 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1060 &VeboxSurfCntlParams,
1061 (uint32_t *)&(pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value)));
1062 }
1063 }
1064 else if (IsIECPEnabled()) // IECP output surface without DI
1065 {
1066 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1067 pOsInterface,
1068 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource,
1069 true,
1070 true));
1071
1072 pVeboxDiIecpCmdParams->pOsResCurrOutput =
1073 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource;
1074 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
1075 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1076
1077 // Update control bits for CurrOutputSurf surface
1078 if (bEnableMMC)
1079 {
1080 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
1081 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1082 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1083 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1084 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1085 &VeboxSurfCntlParams,
1086 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
1087 }
1088 }
1089
1090 finish:
1091 return eStatus;
1092 }
1093
1094 //!
1095 //! \brief Setup Vebox_DI_IECP Command params for GEN11
1096 //! \details Setup Vebox_DI_IECP Command params for GEN11
1097 //! \param [in] bDiScdEnable
1098 //! Is DI/Variances report enabled
1099 //! \param [in,out] pVeboxDiIecpCmdParams
1100 //! Pointer to VEBOX_DI_IECP command parameters
1101 //! \return MOS_STATUS
1102 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1103 //!
SetupDiIecpState(bool bDiScdEnable,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)1104 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::SetupDiIecpState(
1105 bool bDiScdEnable,
1106 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
1107 {
1108 PMOS_INTERFACE pOsInterface;
1109 PRENDERHAL_INTERFACE pRenderHal;
1110 uint32_t dwWidth;
1111 uint32_t dwHeight;
1112 bool bDIEnable;
1113 MOS_STATUS eStatus;
1114 MHW_VEBOX_SURFACE_PARAMS MhwVeboxSurfaceParam;
1115 PMHW_VEBOX_INTERFACE pVeboxInterface;
1116 MHW_VEBOX_SURFACE_CNTL_PARAMS VeboxSurfCntlParams;
1117 PVPHAL_SURFACE pSurface;
1118 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
1119 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1120
1121 VPHAL_RENDER_CHK_NULL(pVeboxDiIecpCmdParams);
1122 VPHAL_RENDER_CHK_NULL(pVeboxState);
1123 VPHAL_RENDER_CHK_NULL(pRenderData);
1124
1125 pOsInterface = pVeboxState->m_pOsInterface;
1126 pRenderHal = pVeboxState->m_pRenderHal;
1127 pVeboxInterface = pVeboxState->m_pVeboxInterface;
1128 MOS_ZeroMemory(pVeboxDiIecpCmdParams, sizeof(*pVeboxDiIecpCmdParams));
1129
1130 VPHAL_RENDER_CHK_NULL(pOsInterface);
1131 VPHAL_RENDER_CHK_NULL(pRenderHal);
1132 VPHAL_RENDER_CHK_NULL(pVeboxInterface);
1133
1134 // Align dwEndingX with surface state
1135 bDIEnable = pRenderData->bDeinterlace || IsQueryVarianceEnabled();
1136
1137 VPHAL_RENDER_CHK_STATUS(VpHal_InitVeboxSurfaceParams(
1138 pVeboxState->m_currentSurface, &MhwVeboxSurfaceParam));
1139 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->VeboxAdjustBoundary(
1140 &MhwVeboxSurfaceParam,
1141 &dwWidth,
1142 &dwHeight,
1143 bDIEnable));
1144
1145 pVeboxDiIecpCmdParams->dwStartingX = 0;
1146 pVeboxDiIecpCmdParams->dwEndingX = dwWidth - 1;
1147
1148 // Input Surface
1149 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1150 pOsInterface,
1151 &pVeboxState->m_currentSurface->OsResource,
1152 false,
1153 true));
1154
1155 pVeboxDiIecpCmdParams->pOsResCurrInput =
1156 &pVeboxState->m_currentSurface->OsResource;
1157 pVeboxDiIecpCmdParams->dwCurrInputSurfOffset =
1158 pVeboxState->m_currentSurface->dwOffset;
1159 pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value =
1160 pVeboxState->DnDiSurfMemObjCtl.CurrentInputSurfMemObjCtl;
1161
1162 // Update control bits for current surface
1163 if (bEnableMMC)
1164 {
1165 pSurface = pVeboxState->m_currentSurface;
1166 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1167 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1168 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1169 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1170 &VeboxSurfCntlParams,
1171 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value)));
1172 }
1173
1174 // Reference surface
1175 if (pRenderData->bRefValid)
1176 {
1177 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1178 pOsInterface,
1179 &pVeboxState->m_previousSurface->OsResource,
1180 false,
1181 true));
1182
1183 pVeboxDiIecpCmdParams->pOsResPrevInput =
1184 &pVeboxState->m_previousSurface->OsResource;
1185 pVeboxDiIecpCmdParams->dwPrevInputSurfOffset =
1186 pVeboxState->m_previousSurface->dwOffset;
1187 pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value =
1188 pVeboxState->DnDiSurfMemObjCtl.PreviousInputSurfMemObjCtl;
1189
1190 // Update control bits for PreviousSurface surface
1191 if (bEnableMMC)
1192 {
1193 pSurface = pVeboxState->m_previousSurface;
1194 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1195 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1196 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1197 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1198 &VeboxSurfCntlParams,
1199 (uint32_t *)&(pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value)));
1200 }
1201 }
1202
1203 // VEBOX final output surface
1204 VPHAL_RENDER_CHK_STATUS(SetupDiIecpStateForOutputSurf(bDiScdEnable, pVeboxDiIecpCmdParams));
1205
1206 // DN intermediate output surface
1207 if (IsFFDNSurfNeeded())
1208 {
1209 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1210 pOsInterface,
1211 &pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut]->OsResource,
1212 true,
1213 true));
1214
1215 pVeboxDiIecpCmdParams->pOsResDenoisedCurrOutput =
1216 &pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut]->OsResource;
1217 pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value =
1218 pVeboxState->DnDiSurfMemObjCtl.DnOutSurfMemObjCtl;
1219
1220 // Update control bits for DenoisedCurrOutputSurf surface
1221 if (bEnableMMC)
1222 {
1223 pSurface = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1224 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1225 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1226 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1227 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1228 &VeboxSurfCntlParams,
1229 (uint32_t *)&(pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value)));
1230 }
1231
1232 // For DN + SFC scenario, allocate FFDISurfaces also
1233 // since this usage needs IECP implicitly
1234 // For DN + DI + SFC, DI have registered FFDISurfaces, So don't register again
1235 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) && !bDiScdEnable)
1236 {
1237 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1238 pOsInterface,
1239 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource,
1240 true,
1241 true));
1242
1243 pVeboxDiIecpCmdParams->pOsResCurrOutput =
1244 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource;
1245 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
1246 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1247
1248 // Update control bits for CurrOutputSurf surface
1249 if (bEnableMMC)
1250 {
1251 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
1252 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1253 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1254 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1255 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1256 &VeboxSurfCntlParams,
1257 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
1258 }
1259 }
1260 }
1261
1262 // STMM surface
1263 if (bDiScdEnable || IsSTMMSurfNeeded())
1264 {
1265 // STMM in
1266 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1267 pOsInterface,
1268 &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn].OsResource,
1269 false,
1270 true));
1271
1272 pVeboxDiIecpCmdParams->pOsResStmmInput =
1273 &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn].OsResource;
1274 pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value =
1275 pVeboxState->DnDiSurfMemObjCtl.STMMInputSurfMemObjCtl;
1276
1277 // Update control bits for stmm input surface
1278 if (bEnableMMC)
1279 {
1280 pSurface = &(pVeboxState->STMMSurfaces[pRenderData->iCurHistIn]);
1281 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1282 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1283 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1284 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1285 &VeboxSurfCntlParams,
1286 (uint32_t *)&(pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value)));
1287 }
1288
1289 // STMM out
1290 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1291 pOsInterface,
1292 &pVeboxState->STMMSurfaces[pRenderData->iCurHistOut].OsResource,
1293 true,
1294 true));
1295
1296 pVeboxDiIecpCmdParams->pOsResStmmOutput =
1297 &pVeboxState->STMMSurfaces[pRenderData->iCurHistOut].OsResource;
1298 pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value =
1299 pVeboxState->DnDiSurfMemObjCtl.STMMOutputSurfMemObjCtl;
1300
1301 // Update control bits for stmm output surface
1302 if (bEnableMMC)
1303 {
1304 pSurface = &(pVeboxState->STMMSurfaces[pRenderData->iCurHistOut]);
1305 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1306 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1307 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1308 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1309 &VeboxSurfCntlParams,
1310 (uint32_t *)&(pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value)));
1311 }
1312 }
1313
1314 // Statistics data: GNE, FMD
1315 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1316 pOsInterface,
1317 &pVeboxState->VeboxStatisticsSurface.OsResource,
1318 true,
1319 true));
1320
1321 pVeboxDiIecpCmdParams->pOsResStatisticsOutput =
1322 &pVeboxState->VeboxStatisticsSurface.OsResource;
1323 pVeboxDiIecpCmdParams->StatisticsOutputSurfCtrl.Value =
1324 pVeboxState->DnDiSurfMemObjCtl.StatisticsOutputSurfMemObjCtl;
1325
1326 // LaceAceRgb Histogram
1327 if (pRenderData->bHdr3DLut)
1328 {
1329 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1330 pOsInterface,
1331 &pVeboxState->VeboxRGBHistogram.OsResource,
1332 true,
1333 true));
1334
1335 pVeboxDiIecpCmdParams->pOsResLaceOrAceOrRgbHistogram =
1336 &pVeboxState->VeboxRGBHistogram.OsResource;
1337 }
1338
1339 finish:
1340 return eStatus;
1341 }
1342
1343 //!
1344 //! \brief Vebox query statistics surface layout
1345 //! \details Get Specific Layout Info like GNE Offset, size of per frame info inside
1346 //! Vebox Statistics Surface for CNL
1347 //!
1348 //! | Layout of Statistics surface when DI enabled and DN either On or Off on CNL\n
1349 //! | --------------------------------------------------------------\n
1350 //! | | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n
1351 //! | |-------------------------------------------------------------\n
1352 //! | | 16 bytes for x=0, Y=4 | ...\n
1353 //! | |------------------------------\n
1354 //! | | ...\n
1355 //! | |------------------------------\n
1356 //! | | 16 bytes for x=0, Y=height-4| ...\n
1357 //! | |-----------------------------------------------Pitch--------------\n
1358 //! | | 17 DW Reserved | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1359 //! | |------------------------------------------------------------------\n
1360 //! | | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1361 //! | |------------------------------------------------------------------\n
1362 //! | | 17 DW Reserved | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1363 //! | |------------------------------------------------------------------\n
1364 //! | | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1365 //! | -------------------------------------------------------------------\n
1366 //! |\n
1367 //! | Layout of Statistics surface when DN enabled and DI disabled\n
1368 //! | --------------------------------------------------------------\n
1369 //! | | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n
1370 //! | |-------------------------------------------------------------\n
1371 //! | | 16 bytes for x=0, Y=4 | ...\n
1372 //! | |------------------------------\n
1373 //! | | ...\n
1374 //! | |------------------------------\n
1375 //! | | 16 bytes for x=0, Y=height-4| ...\n
1376 //! | |-----------------------------------------------Pitch--------------\n
1377 //! | | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1378 //! | |------------------------------------------------------------------\n
1379 //! | | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1380 //! | -------------------------------------------------------------------\n
1381 //! |\n
1382 //! | Layout of Statistics surface when both DN and DI are disabled\n
1383 //! | ------------------------------------------------Pitch--------------\n
1384 //! | | 17 DW White Balence0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1385 //! | |------------------------------------------------------------------\n
1386 //! | | 17 DW White Balence1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1387 //! | -------------------------------------------------------------------\n
1388 //! \param [in] QueryType
1389 //! Query type
1390 //! \param [out] pQuery
1391 //! return layout type
1392 //! \return MOS_STATUS
1393 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1394 //!
VeboxQueryStatLayout(VEBOX_STAT_QUERY_TYPE QueryType,uint32_t * pQuery)1395 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::VeboxQueryStatLayout(
1396 VEBOX_STAT_QUERY_TYPE QueryType,
1397 uint32_t* pQuery)
1398 {
1399 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1400
1401 VPHAL_RENDER_ASSERT(pQuery);
1402
1403 switch (QueryType)
1404 {
1405 case VEBOX_STAT_QUERY_GNE_OFFEST:
1406 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_GNE_OFFSET_G11;
1407 break;
1408
1409 case VEBOX_STAT_QUERY_PER_FRAME_SIZE:
1410 *pQuery = VPHAL_VEBOX_STATISTICS_PER_FRAME_SIZE_G11;
1411 break;
1412
1413 case VEBOX_STAT_QUERY_FMD_OFFEST:
1414 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_FMD_OFFSET_G11;
1415 break;
1416
1417 case VEBOX_STAT_QUERY_STD_OFFEST:
1418 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_STD_OFFSET_G11;
1419 break;
1420
1421 default:
1422 VPHAL_RENDER_ASSERTMESSAGE("Vebox Statistics Layout Query, type ('%d') is not implemented.", QueryType);
1423 eStatus = MOS_STATUS_UNKNOWN;
1424 break;
1425 }
1426
1427 return eStatus;
1428 }
1429
1430 //!
1431 //! \brief Vebox get Luma default value
1432 //! \details Initialize luma denoise paramters w/ default values.
1433 //! \param [out] pLumaParams
1434 //! Pointer to Luma DN parameter
1435 //! \return void
1436 //!
GetLumaDefaultValue(PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams)1437 void VPHAL_VEBOX_STATE_G11_BASE::GetLumaDefaultValue(
1438 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams)
1439 {
1440 VPHAL_RENDER_ASSERT(pLumaParams);
1441
1442 pLumaParams->dwDenoiseASDThreshold = NOISE_ABSSUMTEMPORALDIFF_THRESHOLD_DEFAULT_G11;
1443 pLumaParams->dwDenoiseHistoryDelta = NOISE_HISTORY_DELTA_DEFAULT;
1444 pLumaParams->dwDenoiseMaximumHistory = NOISE_HISTORY_MAX_DEFAULT_G11;
1445 pLumaParams->dwDenoiseSTADThreshold = NOISE_SUMABSTEMPORALDIFF_THRESHOLD_DEFAULT_G11;
1446 pLumaParams->dwDenoiseSCMThreshold = NOISE_SPATIALCOMPLEXITYMATRIX_THRESHOLD_DEFAULT_G11;
1447 pLumaParams->dwDenoiseMPThreshold = NOISE_NUMMOTIONPIXELS_THRESHOLD_DEFAULT_G11;
1448 pLumaParams->dwLTDThreshold = NOISE_LOWTEMPORALPIXELDIFF_THRESHOLD_DEFAULT_G11;
1449 pLumaParams->dwTDThreshold = NOISE_TEMPORALPIXELDIFF_THRESHOLD_DEFAULT_G11;
1450 }
1451
SetDNParams(PVPHAL_SURFACE pSrcSurface,PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,PVPHAL_DNUV_PARAMS pChromaParams)1452 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::SetDNParams(
1453 PVPHAL_SURFACE pSrcSurface,
1454 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,
1455 PVPHAL_DNUV_PARAMS pChromaParams)
1456 {
1457 MOS_STATUS eStatus;
1458 PVPHAL_DENOISE_PARAMS pDNParams;
1459 uint32_t dwDenoiseFactor;
1460 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1461
1462 VPHAL_RENDER_ASSERT(pSrcSurface);
1463 VPHAL_RENDER_ASSERT(pLumaParams);
1464 VPHAL_RENDER_ASSERT(pChromaParams);
1465 VPHAL_RENDER_ASSERT(pRenderData);
1466
1467 eStatus = MOS_STATUS_SUCCESS;
1468 pDNParams = pSrcSurface->pDenoiseParams;
1469
1470 // Set Luma DN params
1471 if (pRenderData->bDenoise)
1472 {
1473 // Setup Denoise Params
1474 GetLumaDefaultValue(pLumaParams);
1475
1476 // Initialize pixel range threshold array
1477 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[0] = NOISE_BLF_RANGE_THRESHOLD_S0_DEFAULT;
1478 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[1] = NOISE_BLF_RANGE_THRESHOLD_S1_DEFAULT;
1479 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[2] = NOISE_BLF_RANGE_THRESHOLD_S2_DEFAULT;
1480 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[3] = NOISE_BLF_RANGE_THRESHOLD_S3_DEFAULT;
1481 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[4] = NOISE_BLF_RANGE_THRESHOLD_S4_DEFAULT;
1482 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[5] = NOISE_BLF_RANGE_THRESHOLD_S5_DEFAULT;
1483
1484 // Initialize pixel range weight array
1485 pRenderData->VeboxDNDIParams.dwPixRangeWeight[0] = NOISE_BLF_RANGE_WGTS0_DEFAULT;
1486 pRenderData->VeboxDNDIParams.dwPixRangeWeight[1] = NOISE_BLF_RANGE_WGTS1_DEFAULT;
1487 pRenderData->VeboxDNDIParams.dwPixRangeWeight[2] = NOISE_BLF_RANGE_WGTS2_DEFAULT;
1488 pRenderData->VeboxDNDIParams.dwPixRangeWeight[3] = NOISE_BLF_RANGE_WGTS3_DEFAULT;
1489 pRenderData->VeboxDNDIParams.dwPixRangeWeight[4] = NOISE_BLF_RANGE_WGTS4_DEFAULT;
1490 pRenderData->VeboxDNDIParams.dwPixRangeWeight[5] = NOISE_BLF_RANGE_WGTS5_DEFAULT;
1491
1492 // User specified Denoise strength case (no auto DN detect)
1493 if (!pDNParams->bAutoDetect)
1494 {
1495 dwDenoiseFactor = (uint32_t)pDNParams->fDenoiseFactor;
1496
1497 if (dwDenoiseFactor > NOISEFACTOR_MAX)
1498 {
1499 dwDenoiseFactor = NOISEFACTOR_MAX;
1500 }
1501
1502 pLumaParams->dwDenoiseHistoryDelta = dwDenoiseHistoryDelta[dwDenoiseFactor];
1503 pLumaParams->dwDenoiseMaximumHistory = dwDenoiseMaximumHistory[dwDenoiseFactor];
1504 pLumaParams->dwDenoiseASDThreshold = dwDenoiseASDThreshold[dwDenoiseFactor];
1505 pLumaParams->dwDenoiseSCMThreshold = dwDenoiseSCMThreshold[dwDenoiseFactor];
1506 pLumaParams->dwDenoiseMPThreshold = dwDenoiseMPThreshold[dwDenoiseFactor];
1507 pLumaParams->dwLTDThreshold = dwLTDThreshold[dwDenoiseFactor];
1508 pLumaParams->dwTDThreshold = dwTDThreshold[dwDenoiseFactor];
1509 pLumaParams->dwDenoiseSTADThreshold = dwDenoiseSTADThreshold[dwDenoiseFactor];
1510
1511 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[0] = dwPixRangeThreshold0[dwDenoiseFactor];
1512 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[1] = dwPixRangeThreshold1[dwDenoiseFactor];
1513 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[2] = dwPixRangeThreshold2[dwDenoiseFactor];
1514 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[3] = dwPixRangeThreshold3[dwDenoiseFactor];
1515 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[4] = dwPixRangeThreshold4[dwDenoiseFactor];
1516 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[5] = dwPixRangeThreshold5[dwDenoiseFactor];
1517
1518 pRenderData->VeboxDNDIParams.dwPixRangeWeight[0] = dwPixRangeWeight0[dwDenoiseFactor];
1519 pRenderData->VeboxDNDIParams.dwPixRangeWeight[1] = dwPixRangeWeight1[dwDenoiseFactor];
1520 pRenderData->VeboxDNDIParams.dwPixRangeWeight[2] = dwPixRangeWeight2[dwDenoiseFactor];
1521 pRenderData->VeboxDNDIParams.dwPixRangeWeight[3] = dwPixRangeWeight3[dwDenoiseFactor];
1522 pRenderData->VeboxDNDIParams.dwPixRangeWeight[4] = dwPixRangeWeight4[dwDenoiseFactor];
1523 pRenderData->VeboxDNDIParams.dwPixRangeWeight[5] = dwPixRangeWeight5[dwDenoiseFactor];
1524 }
1525 }
1526
1527 // Set Chroma DN params
1528 if (pRenderData->bChromaDenoise)
1529 {
1530 // Setup Denoise Params
1531 pChromaParams->dwHistoryDeltaUV = NOISE_HISTORY_DELTA_DEFAULT;
1532 pChromaParams->dwHistoryMaxUV = NOISE_HISTORY_MAX_DEFAULT;
1533
1534 // Denoise Slider case (no auto DN detect)
1535 if (!pDNParams->bAutoDetect)
1536 {
1537 dwDenoiseFactor = (uint32_t)pDNParams->fDenoiseFactor;
1538
1539 if (dwDenoiseFactor > NOISEFACTOR_MAX)
1540 {
1541 dwDenoiseFactor = NOISEFACTOR_MAX;
1542 }
1543
1544 pChromaParams->dwLTDThresholdU =
1545 pChromaParams->dwLTDThresholdV = dwLTDThresholdUV[dwDenoiseFactor];
1546
1547 pChromaParams->dwTDThresholdU =
1548 pChromaParams->dwTDThresholdV = dwTDThresholdUV[dwDenoiseFactor];
1549
1550 pChromaParams->dwSTADThresholdU =
1551 pChromaParams->dwSTADThresholdV = dwSTADThresholdUV[dwDenoiseFactor];
1552 }
1553 }
1554
1555 return eStatus;
1556 }
1557
SetDIParams(PVPHAL_SURFACE pSrcSurface)1558 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::SetDIParams(
1559 PVPHAL_SURFACE pSrcSurface)
1560 {
1561 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1562 VPHAL_RENDER_CHK_NULL_RETURN(pRenderData);
1563
1564 // Set DI params
1565 if (pRenderData->bDeinterlace)
1566 {
1567 pRenderData->VeboxDNDIParams.dwLumaTDMWeight = VPHAL_VEBOX_DI_LUMA_TDM_WEIGHT_NATUAL;
1568 pRenderData->VeboxDNDIParams.dwChromaTDMWeight = VPHAL_VEBOX_DI_CHROMA_TDM_WEIGHT_NATUAL;
1569 pRenderData->VeboxDNDIParams.dwSHCMDelta = VPHAL_VEBOX_DI_SHCM_DELTA_NATUAL;
1570 pRenderData->VeboxDNDIParams.dwSHCMThreshold = VPHAL_VEBOX_DI_SHCM_THRESHOLD_NATUAL;
1571 pRenderData->VeboxDNDIParams.dwSVCMDelta = VPHAL_VEBOX_DI_SVCM_DELTA_NATUAL;
1572 pRenderData->VeboxDNDIParams.dwSVCMThreshold = VPHAL_VEBOX_DI_SVCM_THRESHOLD_NATUAL;
1573 pRenderData->VeboxDNDIParams.bFasterConvergence = false;
1574 pRenderData->VeboxDNDIParams.bTDMLumaSmallerWindow = false;
1575 pRenderData->VeboxDNDIParams.bTDMChromaSmallerWindow = false;
1576 pRenderData->VeboxDNDIParams.dwLumaTDMCoringThreshold = VPHAL_VEBOX_DI_LUMA_TDM_CORING_THRESHOLD_NATUAL;
1577 pRenderData->VeboxDNDIParams.dwChromaTDMCoringThreshold = VPHAL_VEBOX_DI_CHROMA_TDM_CORING_THRESHOLD_NATUAL;
1578 pRenderData->VeboxDNDIParams.bBypassDeflickerFilter = true;
1579 pRenderData->VeboxDNDIParams.bUseSyntheticContentMedian = false;
1580 pRenderData->VeboxDNDIParams.bLocalCheck = true;
1581 pRenderData->VeboxDNDIParams.bSyntheticContentCheck = false;
1582 pRenderData->VeboxDNDIParams.dwDirectionCheckThreshold = VPHAL_VEBOX_DI_DIRECTION_CHECK_THRESHOLD_NATUAL;
1583 pRenderData->VeboxDNDIParams.dwTearingLowThreshold = VPHAL_VEBOX_DI_TEARING_LOW_THRESHOLD_NATUAL;
1584 pRenderData->VeboxDNDIParams.dwTearingHighThreshold = VPHAL_VEBOX_DI_TEARING_HIGH_THRESHOLD_NATUAL;
1585 pRenderData->VeboxDNDIParams.dwDiffCheckSlackThreshold = VPHAL_VEBOX_DI_DIFF_CHECK_SLACK_THRESHOLD_NATUAL;
1586 pRenderData->VeboxDNDIParams.dwSADWT0 = VPHAL_VEBOX_DI_SAD_WT0_NATUAL;
1587 pRenderData->VeboxDNDIParams.dwSADWT1 = VPHAL_VEBOX_DI_SAD_WT1_NATUAL;
1588 pRenderData->VeboxDNDIParams.dwSADWT2 = VPHAL_VEBOX_DI_SAD_WT2_NATUAL;
1589 pRenderData->VeboxDNDIParams.dwSADWT3 = VPHAL_VEBOX_DI_SAD_WT3_NATUAL;
1590 pRenderData->VeboxDNDIParams.dwSADWT4 = VPHAL_VEBOX_DI_SAD_WT4_NATUAL;
1591 pRenderData->VeboxDNDIParams.dwSADWT6 = VPHAL_VEBOX_DI_SAD_WT6_NATUAL;
1592
1593 VPHAL_RENDER_CHK_NULL_RETURN(pSrcSurface);
1594 if (MEDIA_IS_HDCONTENT(pSrcSurface->dwWidth, pSrcSurface->dwHeight))
1595 {
1596 pRenderData->VeboxDNDIParams.dwLPFWtLUT0 = VPHAL_VEBOX_DI_LPFWTLUT0_HD_NATUAL;
1597 pRenderData->VeboxDNDIParams.dwLPFWtLUT1 = VPHAL_VEBOX_DI_LPFWTLUT1_HD_NATUAL;
1598 pRenderData->VeboxDNDIParams.dwLPFWtLUT2 = VPHAL_VEBOX_DI_LPFWTLUT2_HD_NATUAL;
1599 pRenderData->VeboxDNDIParams.dwLPFWtLUT3 = VPHAL_VEBOX_DI_LPFWTLUT3_HD_NATUAL;
1600 pRenderData->VeboxDNDIParams.dwLPFWtLUT4 = VPHAL_VEBOX_DI_LPFWTLUT4_HD_NATUAL;
1601 pRenderData->VeboxDNDIParams.dwLPFWtLUT5 = VPHAL_VEBOX_DI_LPFWTLUT5_HD_NATUAL;
1602 pRenderData->VeboxDNDIParams.dwLPFWtLUT6 = VPHAL_VEBOX_DI_LPFWTLUT6_HD_NATUAL;
1603 pRenderData->VeboxDNDIParams.dwLPFWtLUT7 = VPHAL_VEBOX_DI_LPFWTLUT7_HD_NATUAL;
1604 }
1605 else
1606 {
1607 pRenderData->VeboxDNDIParams.dwLPFWtLUT0 = VPHAL_VEBOX_DI_LPFWTLUT0_SD_NATUAL;
1608 pRenderData->VeboxDNDIParams.dwLPFWtLUT1 = VPHAL_VEBOX_DI_LPFWTLUT1_SD_NATUAL;
1609 pRenderData->VeboxDNDIParams.dwLPFWtLUT2 = VPHAL_VEBOX_DI_LPFWTLUT2_SD_NATUAL;
1610 pRenderData->VeboxDNDIParams.dwLPFWtLUT3 = VPHAL_VEBOX_DI_LPFWTLUT3_SD_NATUAL;
1611 pRenderData->VeboxDNDIParams.dwLPFWtLUT4 = VPHAL_VEBOX_DI_LPFWTLUT4_SD_NATUAL;
1612 pRenderData->VeboxDNDIParams.dwLPFWtLUT5 = VPHAL_VEBOX_DI_LPFWTLUT5_SD_NATUAL;
1613 pRenderData->VeboxDNDIParams.dwLPFWtLUT6 = VPHAL_VEBOX_DI_LPFWTLUT6_SD_NATUAL;
1614 pRenderData->VeboxDNDIParams.dwLPFWtLUT7 = VPHAL_VEBOX_DI_LPFWTLUT7_SD_NATUAL;
1615 }
1616 }
1617
1618 return MOS_STATUS_SUCCESS;
1619 }
1620
SetDNDIParams(PVPHAL_SURFACE pSrcSurface,PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,PVPHAL_DNUV_PARAMS pChromaParams)1621 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::SetDNDIParams(
1622 PVPHAL_SURFACE pSrcSurface,
1623 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,
1624 PVPHAL_DNUV_PARAMS pChromaParams)
1625 {
1626 MOS_STATUS status;
1627
1628 VPHAL_RENDER_ASSERT(pSrcSurface);
1629 VPHAL_RENDER_ASSERT(pLumaParams);
1630 VPHAL_RENDER_ASSERT(pChromaParams);
1631
1632 status = MOS_STATUS_SUCCESS;
1633
1634 status = SetDNParams(pSrcSurface, pLumaParams, pChromaParams);
1635
1636 MOS_STATUS status2 = SetDIParams(pSrcSurface);
1637
1638 if (MOS_SUCCEEDED(status))
1639 {
1640 status = status2;
1641 }
1642
1643 return status;
1644 }
1645
1646 //!
1647 //! \brief Get output surface of Vebox
1648 //! \details Get output surface of Vebox in current operation
1649 //! \param [in] bDiVarianceEnable
1650 //! Is DI/Variances report enabled
1651 //! \return PVPHAL_SURFACE
1652 //! Corresponding output surface pointer
1653 //!
GetSurfOutput(bool bDiVarianceEnable)1654 PVPHAL_SURFACE VPHAL_VEBOX_STATE_G11_BASE::GetSurfOutput(
1655 bool bDiVarianceEnable)
1656 {
1657 PVPHAL_SURFACE pSurface = nullptr;
1658 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
1659 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1660
1661 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData)) // Vebox output pipe
1662 {
1663 pSurface = pRenderData->pRenderTarget;
1664 }
1665 else if (bDiVarianceEnable) // DNDI, DI, DI + IECP
1666 {
1667 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame0];
1668 }
1669 else if (IsIECPEnabled()) // DN + IECP or IECP only
1670 {
1671 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
1672 }
1673 else if (pRenderData->bDenoise) // DN only
1674 {
1675 pSurface = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1676 }
1677 else if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData)) // Write to SFC
1678 {
1679 // Vebox o/p should not be written to memory
1680 pSurface = nullptr;
1681 }
1682 else
1683 {
1684 VPHAL_RENDER_ASSERTMESSAGE("Unable to determine Vebox Output Surface.");
1685 }
1686
1687 return pSurface;
1688 }
1689
1690 //!
1691 //! \brief Setup surface states for Vebox
1692 //! \details Setup surface states for use in the current Vebox Operation
1693 //! \param [in] bDiVarianceEnable
1694 //! Is DI/Variances report enabled
1695 //! \param [in,out] pVeboxSurfaceStateCmdParams
1696 //! Pointer to VEBOX_SURFACE_STATE command parameters
1697 //! \return void
1698 //!
SetupSurfaceStates(bool bDiVarianceEnable,PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)1699 void VPHAL_VEBOX_STATE_G11_BASE::SetupSurfaceStates(
1700 bool bDiVarianceEnable,
1701 PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)
1702 {
1703 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
1704 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1705
1706 MOS_ZeroMemory(pVeboxSurfaceStateCmdParams,
1707 sizeof(VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS));
1708
1709 pVeboxSurfaceStateCmdParams->pSurfInput = pVeboxState->m_currentSurface;
1710
1711 pVeboxSurfaceStateCmdParams->pSurfOutput = pVeboxState->GetSurfOutput(bDiVarianceEnable);
1712
1713 pVeboxSurfaceStateCmdParams->pSurfSTMM = &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn];
1714 pVeboxSurfaceStateCmdParams->pSurfDNOutput = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1715
1716 pVeboxSurfaceStateCmdParams->bDIEnable = bDiVarianceEnable;
1717
1718 }
1719
UseKernelResource()1720 bool VPHAL_VEBOX_STATE_G11_BASE::UseKernelResource()
1721 {
1722 return false; // can always use driver resource in clear memory
1723 }
1724
1725 //!
1726 //! \brief Setup Chroma Sampling for Vebox
1727 //! \details Setup Chroma Sampling for use in the current Vebox Operation
1728 //! \param pChromaSampling
1729 //! [in] Pointer to chroma sampling params of Vebox
1730 //! \return void
1731 //!
SetupChromaSampling(PMHW_VEBOX_CHROMA_SAMPLING pChromaSampling)1732 void VPHAL_VEBOX_STATE_G11_BASE::SetupChromaSampling(
1733 PMHW_VEBOX_CHROMA_SAMPLING pChromaSampling)
1734 {
1735 VPHAL_COLORPACK srcColorPack = VPHAL_COLORPACK_420;
1736 VPHAL_COLORPACK dstColorPack = VPHAL_COLORPACK_420;
1737 PVPHAL_SURFACE pSrcSurface = nullptr;
1738 PVPHAL_SURFACE pRenderTarget = nullptr;
1739 bool bDIEnabled = false;
1740 bool bNeedUpSampling = false;
1741 bool bNeedDownSampling = false;
1742 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
1743 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1744
1745 VPHAL_RENDER_CHK_NULL_NO_STATUS(pVeboxState);
1746 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
1747 VPHAL_RENDER_CHK_NULL_NO_STATUS(pChromaSampling);
1748
1749 // Initialize VEBOX chroma sitting to bypass
1750 pChromaSampling->BypassChromaUpsampling = 1;
1751 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = 0;
1752 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = 0;
1753 pChromaSampling->BypassChromaDownsampling = 1;
1754 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = 0;
1755 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = 0;
1756
1757 // IECP need 444 input, so we use VEBOX CUS to do upsampling.
1758 bNeedUpSampling = pRenderData->bIECP;
1759 // Only VEBOX output, we use VEO to do downsampling.
1760 // Else, we use SFC/FC path to do downscaling.
1761 // if VEBOX intermediate buffer format is non_YUY2 on DI case, enable downsampling as center-left
1762 if (pRenderData->bDeinterlace && (pRenderData->pRenderTarget->Format != Format_YUY2))
1763 {
1764 bNeedDownSampling = true;
1765 }
1766 else
1767 {
1768 bNeedDownSampling = IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData);
1769 }
1770
1771 // Source
1772 pSrcSurface = pVeboxState->m_currentSurface;
1773 // Currently, if no input, we also don't set chroma sitting on render target.
1774 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrcSurface);
1775 // Source Chroma sitting default
1776 if (pSrcSurface->ChromaSiting == MHW_CHROMA_SITING_NONE)
1777 {
1778 pSrcSurface->ChromaSiting = (CHROMA_SITING_HORZ_LEFT | CHROMA_SITING_VERT_CENTER);
1779 }
1780 srcColorPack = VpHal_GetSurfaceColorPack(pSrcSurface->Format);
1781 switch (srcColorPack)
1782 {
1783 // For 422 format, vertical should be always 0.
1784 case VPHAL_COLORPACK_422:
1785 pSrcSurface->ChromaSiting = (pSrcSurface->ChromaSiting & 0x7) | CHROMA_SITING_VERT_TOP;
1786 break;
1787 // For 444 format, we always default to left & top because Luma and Chroma is co-sited.
1788 case VPHAL_COLORPACK_444:
1789 pSrcSurface->ChromaSiting = CHROMA_SITING_HORZ_LEFT | CHROMA_SITING_VERT_TOP;
1790 break;
1791 default:
1792 break;
1793 }
1794
1795 // Handle source chroma sitting
1796 if (bNeedUpSampling)
1797 {
1798 bDIEnabled = pRenderData->bDeinterlace;
1799 // Type 0
1800 if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
1801 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_CENTER))
1802 {
1803 if (srcColorPack == VPHAL_COLORPACK_420)
1804 {
1805 pChromaSampling->BypassChromaUpsampling = 0;
1806 if (bDIEnabled)
1807 {
1808 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE0_HORZ_OFFSET;
1809 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE0_VERT_OFFSET;
1810 }
1811 else
1812 {
1813 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE0_HORZ_OFFSET;
1814 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE0_VERT_OFFSET;
1815 }
1816 }
1817 }
1818 // Type 1
1819 else if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
1820 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_CENTER))
1821 {
1822 if (srcColorPack == VPHAL_COLORPACK_420)
1823 {
1824 pChromaSampling->BypassChromaUpsampling = 0;
1825 if (bDIEnabled)
1826 {
1827 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE1_HORZ_OFFSET;
1828 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE1_VERT_OFFSET;
1829 }
1830 else
1831 {
1832 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE1_HORZ_OFFSET;
1833 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE1_VERT_OFFSET;
1834 }
1835 }
1836 }
1837 // Type 2
1838 else if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
1839 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_TOP))
1840 {
1841 if (srcColorPack == VPHAL_COLORPACK_420)
1842 {
1843 pChromaSampling->BypassChromaUpsampling = 0;
1844 if (bDIEnabled)
1845 {
1846 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE2_HORZ_OFFSET;
1847 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE2_VERT_OFFSET;
1848 }
1849 else
1850 {
1851 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE2_HORZ_OFFSET;
1852 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE2_VERT_OFFSET;
1853 }
1854 }
1855 else if (srcColorPack == VPHAL_COLORPACK_422)
1856 {
1857 pChromaSampling->BypassChromaUpsampling = 0;
1858 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE2_HORZ_OFFSET;
1859 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE2_VERT_OFFSET;
1860 }
1861 }
1862 // Type 3
1863 else if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
1864 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_TOP))
1865 {
1866 if (srcColorPack == VPHAL_COLORPACK_420)
1867 {
1868 pChromaSampling->BypassChromaUpsampling = 0;
1869 if (bDIEnabled)
1870 {
1871 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE3_HORZ_OFFSET;
1872 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE3_VERT_OFFSET;
1873 }
1874 else
1875 {
1876 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE3_HORZ_OFFSET;
1877 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE3_VERT_OFFSET;
1878 }
1879 }
1880 else if (srcColorPack == VPHAL_COLORPACK_422)
1881 {
1882 pChromaSampling->BypassChromaUpsampling = 0;
1883 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE3_HORZ_OFFSET;
1884 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE3_VERT_OFFSET;
1885 }
1886 }
1887 // Type 4
1888 else if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
1889 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_BOTTOM))
1890 {
1891 if (srcColorPack == VPHAL_COLORPACK_420)
1892 {
1893 pChromaSampling->BypassChromaUpsampling = 0;
1894 if (bDIEnabled)
1895 {
1896 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE4_HORZ_OFFSET;
1897 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE4_VERT_OFFSET;
1898 }
1899 else
1900 {
1901 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE4_HORZ_OFFSET;
1902 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE4_VERT_OFFSET;
1903 }
1904 }
1905 }
1906 // Type 5
1907 else if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
1908 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_BOTTOM))
1909 {
1910 if (srcColorPack == VPHAL_COLORPACK_420)
1911 {
1912 pChromaSampling->BypassChromaUpsampling = 0;
1913 if (bDIEnabled)
1914 {
1915 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE5_HORZ_OFFSET;
1916 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE5_VERT_OFFSET;
1917 }
1918 else
1919 {
1920 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE5_HORZ_OFFSET;
1921 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE5_VERT_OFFSET;
1922 }
1923 }
1924 }
1925 }
1926
1927 // Render Target
1928 pRenderTarget = pRenderData->pRenderTarget;
1929 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderTarget);
1930 if (pRenderTarget->ChromaSiting == MHW_CHROMA_SITING_NONE)
1931 {
1932 pRenderTarget->ChromaSiting = (CHROMA_SITING_HORZ_LEFT | CHROMA_SITING_VERT_CENTER);
1933 }
1934 dstColorPack = VpHal_GetSurfaceColorPack(pRenderTarget->Format);
1935 switch (dstColorPack)
1936 {
1937 case VPHAL_COLORPACK_422:
1938 // For 422 format, vertical should be always 0.
1939 pRenderTarget->ChromaSiting = (pRenderTarget->ChromaSiting & 0x7) | CHROMA_SITING_VERT_TOP;
1940 break;
1941 case VPHAL_COLORPACK_444:
1942 // For 444 format, we always default to left & top because Luma and Chroma is co-sited.
1943 pRenderTarget->ChromaSiting = CHROMA_SITING_HORZ_LEFT | CHROMA_SITING_VERT_TOP;
1944 break;
1945 default:
1946 break;
1947 }
1948
1949 // Handle render target chroma sitting
1950 if (bNeedDownSampling)
1951 {
1952 // Type 0
1953 if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
1954 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_CENTER))
1955 {
1956 if (dstColorPack == VPHAL_COLORPACK_420)
1957 {
1958 pChromaSampling->BypassChromaDownsampling = 0;
1959 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE0_HORZ_OFFSET;
1960 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE0_VERT_OFFSET;
1961 }
1962 }
1963 // Type 1
1964 else if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
1965 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_CENTER))
1966 {
1967 if (dstColorPack == VPHAL_COLORPACK_420)
1968 {
1969 pChromaSampling->BypassChromaDownsampling = 0;
1970 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE1_HORZ_OFFSET;
1971 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE1_VERT_OFFSET;
1972 }
1973 }
1974 // Type 2
1975 else if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
1976 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_TOP))
1977 {
1978 if (dstColorPack == VPHAL_COLORPACK_420)
1979 {
1980 pChromaSampling->BypassChromaDownsampling = 0;
1981 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE2_HORZ_OFFSET;
1982 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE2_VERT_OFFSET;
1983 }
1984 else if (dstColorPack == VPHAL_COLORPACK_422)
1985 {
1986 pChromaSampling->BypassChromaDownsampling = 0;
1987 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE2_HORZ_OFFSET;
1988 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE2_VERT_OFFSET;
1989 }
1990 }
1991 // Type 3
1992 else if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
1993 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_TOP))
1994 {
1995 if (dstColorPack == VPHAL_COLORPACK_420)
1996 {
1997 pChromaSampling->BypassChromaDownsampling = 0;
1998 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE3_HORZ_OFFSET;
1999 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE3_VERT_OFFSET;
2000 }
2001 else if (dstColorPack == VPHAL_COLORPACK_422)
2002 {
2003 pChromaSampling->BypassChromaDownsampling = 0;
2004 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE3_HORZ_OFFSET;
2005 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE3_VERT_OFFSET;
2006 }
2007 }
2008 // Type 4
2009 else if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
2010 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_BOTTOM))
2011 {
2012 if (dstColorPack == VPHAL_COLORPACK_420)
2013 {
2014 pChromaSampling->BypassChromaDownsampling = 0;
2015 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE4_HORZ_OFFSET;
2016 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE4_VERT_OFFSET;
2017 }
2018 }
2019 // Type 5
2020 else if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
2021 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_BOTTOM))
2022 {
2023 if (dstColorPack == VPHAL_COLORPACK_420)
2024 {
2025 pChromaSampling->BypassChromaDownsampling = 0;
2026 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE5_HORZ_OFFSET;
2027 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE5_VERT_OFFSET;
2028 }
2029 }
2030 }
2031
2032 finish:
2033 return;
2034 }
2035
2036 //!
2037 //! \brief Setup Vebox_State Command parameter
2038 //! \param [in] bDiVarianceEnable
2039 //! Is DI/Variances report enabled
2040 //! \param [in,out] pVeboxStateCmdParams
2041 //! Pointer to VEBOX_STATE command parameters
2042 //! \return MOS_STATUS
2043 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
2044 //!
SetupVeboxState(bool bDiVarianceEnable,PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams)2045 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::SetupVeboxState(
2046 bool bDiVarianceEnable,
2047 PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams)
2048 {
2049 PMHW_VEBOX_MODE pVeboxMode = nullptr;
2050 PMOS_INTERFACE pOsInterface = nullptr;
2051 PMHW_VEBOX_3D_LUT pLUT3D = nullptr;
2052 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2053 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
2054 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2055 uint8_t* p3DLutData = nullptr;
2056 uint32_t dw3DLutDataSize = 0;
2057
2058 VPHAL_RENDER_CHK_NULL(pVeboxStateCmdParams);
2059 VPHAL_RENDER_CHK_NULL(pVeboxState);
2060 VPHAL_RENDER_CHK_NULL(pRenderData);
2061
2062 pVeboxMode = &pVeboxStateCmdParams->VeboxMode;
2063 pOsInterface = pVeboxState->m_pOsInterface;
2064
2065 VPHAL_RENDER_CHK_NULL(pVeboxMode);
2066 VPHAL_RENDER_CHK_NULL(pOsInterface);
2067
2068 pLUT3D = &pVeboxStateCmdParams->LUT3D;
2069
2070 MOS_ZeroMemory(pVeboxStateCmdParams, sizeof(*pVeboxStateCmdParams));
2071
2072 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) ||
2073 IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
2074 {
2075 // On CNL, GlobalIECP must be enabled when the output pipe is Vebox or SFC
2076 pVeboxMode->GlobalIECPEnable = true;
2077 }
2078 else
2079 {
2080 pVeboxMode->GlobalIECPEnable = IsIECPEnabled();
2081 }
2082
2083 pVeboxMode->DIEnable = bDiVarianceEnable;
2084
2085 pVeboxMode->SFCParallelWriteEnable = IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) &&
2086 (pRenderData->bDenoise || bDiVarianceEnable);
2087 pVeboxMode->DNEnable = pRenderData->bDenoise;
2088 pVeboxMode->DNDIFirstFrame = (!pRenderData->bRefValid && (pVeboxMode->DNEnable || pVeboxMode->DIEnable));
2089
2090 pVeboxMode->DIOutputFrames = SetDIOutputFrame(pRenderData, pVeboxState, pVeboxMode);
2091
2092 pVeboxMode->DisableEncoderStatistics = true;
2093
2094 if((pVeboxMode->DIEnable == false) &&
2095 (pVeboxMode->DNEnable != false) &&
2096 ((pVeboxState->bDisableTemporalDenoiseFilter) ||
2097 (IS_RGB_CSPACE(pVeboxState->m_currentSurface->ColorSpace))))
2098 {
2099 pVeboxMode->DisableTemporalDenoiseFilter = true;
2100 // GlobalIECP or Demosaic must be enabled even if IECP not used
2101 pVeboxMode->GlobalIECPEnable = true;
2102 }
2103 else
2104 {
2105 pVeboxMode->DisableTemporalDenoiseFilter = false;
2106 }
2107
2108 pVeboxStateCmdParams->bUseVeboxHeapKernelResource = UseKernelResource();
2109
2110 SetupChromaSampling(&pVeboxStateCmdParams->ChromaSampling);
2111
2112 if (MEDIA_IS_SKU(pVeboxState->m_pRenderHal->pSkuTable, FtrSingleVeboxSlice))
2113 {
2114 pVeboxMode->SingleSliceVeboxEnable = 0;
2115 }
2116 else
2117 {
2118 // Permanent program limitation that should go in all the configurations of SKLGT which have 2 VEBOXes (i.e. GT3 & GT4)
2119 // VEBOX1 should be disabled whenever there is an VE-SFC workload.
2120 // This is because we have only one SFC all the GT configurations and that SFC is tied to VEBOX0. Hence the programming restriction.
2121 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
2122 {
2123 pVeboxMode->SingleSliceVeboxEnable = 1;
2124 }
2125 else
2126 {
2127 pVeboxMode->SingleSliceVeboxEnable = 0;
2128 }
2129 }
2130
2131 if (pRenderData->bHdr3DLut && pLUT3D)
2132 {
2133 pVeboxMode->ColorGamutExpansionEnable = true;
2134
2135 // Set Vebox 3D Look Up Table Surfaces
2136 pVeboxStateCmdParams->pVebox3DLookUpTables = &pVeboxState->Vebox3DLookUpTables.OsResource;
2137 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
2138 pOsInterface,
2139 &pVeboxState->Vebox3DLookUpTables.OsResource,
2140 false,
2141 true));
2142 pVeboxStateCmdParams->Vebox3DLookUpTablesSurfCtrl.Value =
2143 pVeboxState->DnDiSurfMemObjCtl.Vebox3DLookUpTablesSurfMemObjCtl;
2144
2145 if (m_hdr3DLutGenerator)
2146 {
2147 m_hdr3DLutGenerator->Render(pRenderData->uiMaxDisplayLum, pRenderData->uiMaxContentLevelLum, pRenderData->hdrMode, &pVeboxState->Vebox3DLookUpTables);
2148 }
2149
2150 pLUT3D->ArbitrationPriorityControl = 0;
2151 pLUT3D->Lut3dEnable = true;
2152 // 65^3 is the default.
2153 pLUT3D->Lut3dSize = 2;
2154 }
2155
2156 finish:
2157 return eStatus;
2158 }
2159
2160 //!
2161 //! \brief Get the output pipe on CNL
2162 //! \details There are 3 output pipes on CNL. Check which output pipe can be applied
2163 //! \param [in] pcRenderParams
2164 //! Pointer to VpHal render parameters
2165 //! \param [in] pSrcSurface
2166 //! Pointer to input surface of Vebox
2167 //! \param [out] pbCompNeeded
2168 //! return whether composition is needed after Vebox/SFC
2169 //! \return VPHAL_OUTPUT_PIPE_MODE
2170 //! return the output pipe mode
2171 //!
GetOutputPipe(PCVPHAL_RENDER_PARAMS pcRenderParams,PVPHAL_SURFACE pSrcSurface,bool * pbCompNeeded)2172 VPHAL_OUTPUT_PIPE_MODE VPHAL_VEBOX_STATE_G11_BASE::GetOutputPipe(
2173 PCVPHAL_RENDER_PARAMS pcRenderParams,
2174 PVPHAL_SURFACE pSrcSurface,
2175 bool* pbCompNeeded)
2176 {
2177 VPHAL_OUTPUT_PIPE_MODE OutputPipe;
2178 bool bCompBypassFeasible = false;
2179 bool bOutputPipeVeboxFeasible = false;
2180 PVPHAL_SURFACE pTarget = nullptr;
2181 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
2182 bool bHDRToneMappingNeed = false;
2183
2184 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2185 pTarget = pcRenderParams->pTarget[0];
2186
2187 bCompBypassFeasible = IS_COMP_BYPASS_FEASIBLE(*pbCompNeeded, pcRenderParams, pSrcSurface);
2188
2189 if (!bCompBypassFeasible)
2190 {
2191 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2192 goto finish;
2193 }
2194
2195 //Let Kernel to cover the DI cases VEBOX cannot handle.
2196 if (pSrcSurface->pDeinterlaceParams &&
2197 pSrcSurface->pDeinterlaceParams->DIMode == DI_MODE_BOB &&
2198 ((IS_VEBOX_SURFACE_HEIGHT_UNALIGNED(pSrcSurface, 4) &&
2199 (pSrcSurface->Format == Format_P010 ||
2200 pSrcSurface->Format == Format_P016 ||
2201 pSrcSurface->Format == Format_NV12)) ||
2202 !this->IsDiFormatSupported(pSrcSurface) ||
2203 MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrDisableVEBoxFeatures)))
2204 {
2205 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2206 goto finish;
2207 }
2208
2209 bOutputPipeVeboxFeasible = IS_OUTPUT_PIPE_VEBOX_FEASIBLE(pVeboxState, pcRenderParams, pSrcSurface);
2210
2211 // If No VEBOX, filter procamp case and csc case here.
2212 if (MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrDisableVEBoxFeatures))
2213 {
2214 if (pSrcSurface->pProcampParams)
2215 {
2216 bOutputPipeVeboxFeasible = false;
2217 }
2218 else if (pSrcSurface->Format != pTarget->Format ||
2219 pSrcSurface->ColorSpace != pTarget->ColorSpace ||
2220 pSrcSurface->TileType != pTarget->TileType)
2221 {
2222 bOutputPipeVeboxFeasible = false;
2223 }
2224 }
2225
2226 if (bOutputPipeVeboxFeasible)
2227 {
2228 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_VEBOX;
2229 goto finish;
2230 }
2231
2232 if (VeboxIs2PassesCSCNeeded(pSrcSurface, pcRenderParams->pTarget[0]))
2233 {
2234 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2235 goto finish;
2236 }
2237
2238 bHDRToneMappingNeed = (pSrcSurface->pHDRParams || pTarget->pHDRParams);
2239 // Check if SFC can be the output pipe
2240 if (m_sfcPipeState && !bHDRToneMappingNeed)
2241 {
2242 OutputPipe = m_sfcPipeState->GetOutputPipe(
2243 pSrcSurface,
2244 pTarget,
2245 pcRenderParams);
2246 }
2247 else
2248 {
2249 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2250 }
2251
2252 // Explore the potential to still output by VEBOX and perform quick color fill in composition
2253 if (bCompBypassFeasible &&
2254 OutputPipe == VPHAL_OUTPUT_PIPE_MODE_COMP &&
2255 pcRenderParams->pColorFillParams &&
2256 pSrcSurface->rcDst.left == pTarget->rcDst.left &&
2257 pSrcSurface->rcDst.top == pTarget->rcDst.top &&
2258 pSrcSurface->rcDst.right == pTarget->rcDst.right &&
2259 pSrcSurface->rcDst.bottom < pTarget->rcDst.bottom)
2260 {
2261 int32_t lTargetBottom;
2262 lTargetBottom = pTarget->rcDst.bottom;
2263 pTarget->rcDst.bottom = pSrcSurface->rcDst.bottom;
2264
2265 // Check if Vebox can be the output pipe again
2266 bOutputPipeVeboxFeasible = IS_OUTPUT_PIPE_VEBOX_FEASIBLE(pVeboxState, pcRenderParams, pSrcSurface) && !MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrDisableVEBoxFeatures);
2267 if (bOutputPipeVeboxFeasible)
2268 {
2269 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_VEBOX;
2270 pTarget->bFastColorFill = true;
2271 }
2272 pTarget->rcDst.bottom = lTargetBottom;
2273 }
2274
2275 finish:
2276 *pbCompNeeded = (OutputPipe == VPHAL_OUTPUT_PIPE_MODE_COMP) ? true : false;
2277 return OutputPipe;
2278 }
2279
2280 //!
2281 //! \brief Vebox is needed on CNL
2282 //! \details Check if Vebox Render operation can be applied
2283 //! \param [in] pcRenderParams
2284 //! Pointer to VpHal render parameters
2285 //! \param [in,out] pRenderPassData
2286 //! Pointer to Render data
2287 //! \return bool
2288 //! return true if Vebox is needed, otherwise false
2289 //!
IsNeeded(PCVPHAL_RENDER_PARAMS pcRenderParams,RenderpassData * pRenderPassData)2290 bool VPHAL_VEBOX_STATE_G11_BASE::IsNeeded(
2291 PCVPHAL_RENDER_PARAMS pcRenderParams,
2292 RenderpassData *pRenderPassData)
2293 {
2294 PVPHAL_VEBOX_RENDER_DATA pRenderData;
2295 PRENDERHAL_INTERFACE pRenderHal;
2296 PVPHAL_SURFACE pRenderTarget;
2297 bool bVeboxNeeded;
2298 PMOS_INTERFACE pOsInterface;
2299 MOS_STATUS eStatus;
2300 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
2301 PVPHAL_SURFACE pSrcSurface;
2302
2303 bVeboxNeeded = false;
2304 VPHAL_RENDER_CHK_NULL(pVeboxState->m_pRenderHal);
2305 VPHAL_RENDER_CHK_NULL(pVeboxState->m_pOsInterface);
2306
2307 pRenderHal = pVeboxState->m_pRenderHal;
2308 pOsInterface = pVeboxState->m_pOsInterface;
2309
2310 pRenderTarget = pcRenderParams->pTarget[0];
2311 pRenderData = GetLastExecRenderData();
2312 pSrcSurface = pRenderPassData->pSrcSurface;
2313
2314 VPHAL_RENDER_CHK_NULL(pSrcSurface);
2315
2316 // Check whether VEBOX is available
2317 // VTd doesn't support VEBOX
2318 if (!MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrVERing))
2319 {
2320 pRenderPassData->bCompNeeded = true;
2321 goto finish;
2322 }
2323
2324 // Check if the Surface size is greater than 64x16 which is the minimum Width and Height VEBOX can handle
2325 if (pSrcSurface->dwWidth < MHW_VEBOX_MIN_WIDTH || pSrcSurface->dwHeight < MHW_VEBOX_MIN_HEIGHT)
2326 {
2327 pRenderPassData->bCompNeeded = true;
2328 goto finish;
2329 }
2330
2331 pRenderData->Init();
2332 if (MEDIA_IS_SKU(m_pSkuTable, FtrSFCPipe) && m_sfcPipeState)
2333 {
2334 m_sfcPipeState->InitRenderData();
2335 }
2336
2337 // Determine the output pipe before setting the rendering flags for Vebox and SFC
2338 SET_VPHAL_OUTPUT_PIPE(
2339 pRenderData,
2340 GetOutputPipe(
2341 pcRenderParams,
2342 pSrcSurface,
2343 &pRenderPassData->bCompNeeded));
2344
2345 //If using Vebox to Crop, setting the bVEBOXCroppingUsed = true. We use the rcSrc to set Vebox width/height instead of using rcMaxsrc in VeboxAdjustBoundary().
2346 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData) &&
2347 ((uint32_t)pSrcSurface->rcSrc.bottom < pSrcSurface->dwHeight ||
2348 (uint32_t)pSrcSurface->rcSrc.right < pSrcSurface->dwWidth))
2349 {
2350 pSrcSurface->bVEBOXCroppingUsed = true;
2351 pRenderTarget->bVEBOXCroppingUsed = true;
2352 VPHAL_RENDER_NORMALMESSAGE("bVEBOXCroppingUsed = true, pSrcSurface->rcSrc.bottom: %d, pSrcSurface->rcSrc.right: %d; pSrcSurface->dwHeight: %d, pSrcSurface->dwHeight: %d;",
2353 (uint32_t)pSrcSurface->rcSrc.bottom,
2354 (uint32_t)pSrcSurface->rcSrc.right,
2355 pSrcSurface->dwHeight,
2356 pSrcSurface->dwWidth);
2357 }
2358 else
2359 {
2360 pSrcSurface->bVEBOXCroppingUsed = false;
2361 pRenderTarget->bVEBOXCroppingUsed = false;
2362 }
2363
2364 // Set MMC State
2365 SET_VPHAL_MMC_STATE(pRenderData, pVeboxState->bEnableMMC);
2366
2367 // Update execution state based on current and past events such as the
2368 // # of future and past frames available.
2369 pVeboxState->UpdateVeboxExecutionState(
2370 pSrcSurface,
2371 pRenderData->OutputPipe);
2372
2373 // Set Component
2374 SET_VPHAL_COMPONENT(pRenderData, pcRenderParams->Component);
2375
2376 // Check if Vebox can be used to process the surface
2377 if (pVeboxState->IsFormatSupported(pSrcSurface))
2378 {
2379 // Save Alpha passed by App to be used in Vebox
2380 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
2381 {
2382 pRenderData->pAlphaParams = pcRenderParams->pCompAlpha;
2383 }
2384
2385 // Setup Rendering Flags for Vebox
2386 VeboxSetRenderingFlags(
2387 pSrcSurface,
2388 pRenderTarget);
2389
2390 if (pRenderData->b2PassesCSC)
2391 {
2392 pRenderData->bVeboxBypass = false;
2393 }
2394
2395 // Vebox is needed if Vebox isn't bypassed
2396 bVeboxNeeded = !pRenderData->bVeboxBypass;
2397 }
2398
2399 // if ScalingPreference == VPHAL_SCALING_PREFER_SFC_FOR_VEBOX, use SFC only when VEBOX is required
2400 if ((pSrcSurface->ScalingPreference == VPHAL_SCALING_PREFER_SFC_FOR_VEBOX) &&
2401 (bVeboxNeeded == false))
2402 {
2403 VPHAL_RENDER_NORMALMESSAGE("DDI choose to use SFC only for VEBOX, and since VEBOX is not required, change to Composition.");
2404 pRenderData->OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2405 pRenderPassData->bCompNeeded = true;
2406 }
2407
2408 // Check if we want to enable SFC processing
2409 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
2410 {
2411 // Setup Rendering Flags for SFC pipe
2412 m_sfcPipeState->SetRenderingFlags(
2413 pcRenderParams->pColorFillParams,
2414 pcRenderParams->pCompAlpha,
2415 pSrcSurface,
2416 pRenderTarget,
2417 pRenderData);
2418
2419 // Update Vebox Rendering Flags when the output pipe is SFC.
2420 // If input surface format is AYUV, and just have one layer as primary, Procamp can also enable.
2421 // Those flags cannot be updated inside Vebox's SetRenderingFlags due to ScalingPreference option will
2422 // turn back to composition when Vebox is not needed in above code.
2423 pRenderData->bProcamp = (IS_YUV_FORMAT(pSrcSurface->Format) ||
2424 (pSrcSurface->Format == Format_AYUV &&
2425 pcRenderParams->uSrcCount == 1)) &&
2426 pSrcSurface->pProcampParams &&
2427 pSrcSurface->pProcampParams->bEnabled;
2428 pRenderData->bBeCsc = IS_RGB_CSPACE(pSrcSurface->ColorSpace);
2429 pRenderData->bIECP = pRenderData->bIECP ||
2430 pRenderData->bProcamp ||
2431 pRenderData->bBeCsc;
2432
2433 bVeboxNeeded = true;
2434 }
2435
2436 finish:
2437 return bVeboxNeeded;
2438 }
2439
2440 //!
2441 //! \brief Vebox get the back-end colorspace conversion matrix
2442 //! \details When the i/o is A8R8G8B8 or X8R8G8B8, the transfer matrix
2443 //! needs to be updated accordingly
2444 //! \param [in] pSrcSurface
2445 //! Pointer to input surface of Vebox
2446 //! \param [in] pOutSurface
2447 //! Pointer to output surface of Vebox
2448 //! \return void
2449 //!
VeboxGetBeCSCMatrix(PVPHAL_SURFACE pSrcSurface,PVPHAL_SURFACE pOutSurface)2450 void VPHAL_VEBOX_STATE_G11_BASE::VeboxGetBeCSCMatrix(
2451 PVPHAL_SURFACE pSrcSurface,
2452 PVPHAL_SURFACE pOutSurface)
2453 {
2454 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
2455 float fTemp[3];
2456
2457 // Get the matrix to use for conversion
2458 VpHal_GetCscMatrix(
2459 pSrcSurface->ColorSpace,
2460 pOutSurface->ColorSpace,
2461 pVeboxState->fCscCoeff,
2462 pVeboxState->fCscInOffset,
2463 pVeboxState->fCscOutOffset);
2464
2465 // Vebox CSC converts RGB input to YUV for SFC
2466 // Vebox only supports A8B8G8R8 input, swap the 1st and 3rd
2467 // columns of the transfer matrix for A8R8G8B8 and X8R8G8B8
2468 // This only happens when SFC output is used
2469 if ((pSrcSurface->Format == Format_A8R8G8B8) ||
2470 (pSrcSurface->Format == Format_X8R8G8B8))
2471 {
2472 fTemp[0] = pVeboxState->fCscCoeff[0];
2473 fTemp[1] = pVeboxState->fCscCoeff[3];
2474 fTemp[2] = pVeboxState->fCscCoeff[6];
2475
2476 pVeboxState->fCscCoeff[0] = pVeboxState->fCscCoeff[2];
2477 pVeboxState->fCscCoeff[3] = pVeboxState->fCscCoeff[5];
2478 pVeboxState->fCscCoeff[6] = pVeboxState->fCscCoeff[8];
2479
2480 pVeboxState->fCscCoeff[2] = fTemp[0];
2481 pVeboxState->fCscCoeff[5] = fTemp[1];
2482 pVeboxState->fCscCoeff[8] = fTemp[2];
2483 }
2484 }
2485
2486 #if VEBOX_AUTO_DENOISE_SUPPORTED
LoadUpdateDenoiseKernelStaticData(int32_t * iCurbeOffsetOutDN)2487 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::LoadUpdateDenoiseKernelStaticData(
2488 int32_t* iCurbeOffsetOutDN)
2489 {
2490 PRENDERHAL_INTERFACE pRenderHal;
2491 VEBOX_STATE_UPDATE_STATIC_DATA_G11 DNStaticData; // DN Update kernelStatic parameters
2492 PMHW_VEBOX_INTERFACE pVeboxInterface;
2493 PVPHAL_DENOISE_PARAMS pDenoiseParams; // Denoise
2494 int32_t iOffset0, iOffset1, iOffset2, iOffset3;
2495 int32_t iPitch;
2496 MOS_STATUS eStatus;
2497 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2498
2499 VPHAL_RENDER_CHK_NULL(iCurbeOffsetOutDN);
2500
2501 pRenderHal = m_pRenderHal;
2502 pVeboxInterface = m_pVeboxInterface;
2503 eStatus = MOS_STATUS_SUCCESS;
2504
2505 // init the static data
2506 MOS_ZeroMemory(&DNStaticData, sizeof(DNStaticData));
2507
2508 pDenoiseParams = m_currentSurface->pDenoiseParams;
2509 VPHAL_RENDER_ASSERT(pDenoiseParams);
2510
2511 // Get offset for slice0 and slice1
2512 VPHAL_RENDER_CHK_STATUS(VeboxGetStatisticsSurfaceOffsets(
2513 &iOffset0,
2514 &iOffset1));
2515
2516 iPitch = iOffset1 - iOffset0;
2517 iOffset2 = iOffset1 + iPitch;
2518 iOffset3 = iOffset2 + iPitch;
2519
2520 // Load DN update kernel CURBE data
2521 if (pRenderData->bAutoDenoise)
2522 {
2523 // set the curbe data for DN update kernel
2524 DNStaticData.DW00.OffsetToSlice0 = iOffset0;
2525 DNStaticData.DW01.OffsetToSlice1 = iOffset1;
2526 DNStaticData.DW02.OffsetToSlice2 = iOffset2;
2527 DNStaticData.DW03.OffsetToSlice3 = iOffset3;
2528 DNStaticData.DW04.FirstFrameFlag = bFirstFrame;
2529 DNStaticData.DW04.NoiseLevel = pDenoiseParams->NoiseLevel;
2530 DNStaticData.DW05.RangeThrAdp2NLvl = 1;
2531 DNStaticData.DW06.VeboxStatisticsSurface = BI_DN_STATISTICS_SURFACE;
2532 DNStaticData.DW07.VeboxDndiStateSurface = BI_DN_VEBOX_STATE_SURFACE;
2533 DNStaticData.DW08.VeboxTempSurface = BI_DN_TEMP_SURFACE;
2534 DNStaticData.DW09.VeboxSpatialAttributesConfigurationSurface = BI_DN_SPATIAL_ATTRIBUTES_CONFIGURATION_SURFACE;
2535
2536 *iCurbeOffsetOutDN = pRenderHal->pfnLoadCurbeData(
2537 pRenderHal,
2538 pRenderData->pMediaState,
2539 &DNStaticData,
2540 sizeof(DNStaticData));
2541
2542 if (*iCurbeOffsetOutDN < 0)
2543 {
2544 eStatus = MOS_STATUS_UNKNOWN;
2545 goto finish;
2546 }
2547
2548 pRenderData->iCurbeLength += sizeof(DNStaticData);
2549 }
2550
2551 finish:
2552 return eStatus;
2553 }
2554 //!
2555 //! \brief Setup surface states for Denoise
2556 //! \details Setup Surface State for Vebox States Auto DN kernel
2557 //! \return MOS_STATUS
2558 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
2559 //!
SetupSurfaceStatesForDenoise()2560 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::SetupSurfaceStatesForDenoise()
2561 {
2562 PRENDERHAL_INTERFACE pRenderHal;
2563 PMOS_INTERFACE pOsInterface;
2564 RENDERHAL_SURFACE_STATE_PARAMS SurfaceParams;
2565 MOS_STATUS eStatus;
2566 MOS_FORMAT tmpFormat;
2567 bool bUseKernelResource;
2568 const MHW_VEBOX_HEAP *pVeboxHeap = nullptr;
2569 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
2570 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2571
2572 eStatus = MOS_STATUS_SUCCESS;
2573 pRenderHal = pVeboxState->m_pRenderHal;
2574 pOsInterface = pVeboxState->m_pOsInterface;
2575 VPHAL_RENDER_CHK_STATUS(pVeboxState->m_pVeboxInterface->GetVeboxHeapInfo(
2576 &pVeboxHeap));
2577 VPHAL_RENDER_CHK_NULL(pVeboxHeap);
2578
2579 bUseKernelResource = UseKernelResource();
2580
2581 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2582 MOS_ZeroMemory(&pVeboxState->VeboxHeapResource, sizeof(VPHAL_SURFACE));
2583 MOS_ZeroMemory(&pVeboxState->tmpResource, sizeof(VPHAL_SURFACE));
2584
2585 // Treat the 1D buffer as 2D surface
2586 // VEBox State Surface
2587 pVeboxState->VeboxHeapResource.Format = Format_L8;
2588 pVeboxState->VeboxHeapResource.dwWidth = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2589 pVeboxState->VeboxHeapResource.dwPitch = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2590 pVeboxState->VeboxHeapResource.dwHeight =
2591 MOS_ROUNDUP_DIVIDE(pVeboxHeap->uiInstanceSize, SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH);
2592 pVeboxState->VeboxHeapResource.dwOffset =
2593 pVeboxHeap->uiInstanceSize *
2594 pVeboxHeap->uiCurState;
2595 pVeboxState->VeboxHeapResource.TileType = MOS_TILE_LINEAR;
2596 pVeboxState->VeboxHeapResource.OsResource = bUseKernelResource ?
2597 pVeboxHeap->KernelResource :
2598 pVeboxHeap->DriverResource;
2599
2600 // Temp Surface: for Noise Level History
2601 pVeboxState->tmpResource.Format = Format_L8;
2602 pVeboxState->tmpResource.dwWidth = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2603 pVeboxState->tmpResource.dwPitch = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2604 pVeboxState->tmpResource.dwHeight =
2605 MOS_ROUNDUP_DIVIDE(MHW_PAGE_SIZE, SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH);
2606 pVeboxState->tmpResource.dwOffset = 0;
2607 pVeboxState->tmpResource.TileType = MOS_TILE_LINEAR;
2608 pVeboxState->tmpResource.OsResource = pVeboxState->VeboxTempSurface.OsResource;
2609
2610 // Statistics Surface-----------------------------------------------------------
2611 tmpFormat = pVeboxState->VeboxStatisticsSurface.Format;
2612 pVeboxState->VeboxStatisticsSurface.Format = Format_RAW;
2613
2614 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetBufferSurfaceForHwAccess(
2615 pRenderHal,
2616 &pVeboxState->VeboxStatisticsSurface,
2617 &pVeboxState->RenderHalVeboxStatisticsSurface,
2618 nullptr,
2619 pRenderData->iBindingTable,
2620 BI_DN_STATISTICS_SURFACE,
2621 false));
2622
2623 pVeboxState->VeboxStatisticsSurface.Format = tmpFormat;
2624
2625 // VEBox State Surface-----------------------------------------------------------
2626 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2627
2628 SurfaceParams.Type = pRenderHal->SurfaceTypeDefault;
2629 SurfaceParams.bRenderTarget = true;
2630 SurfaceParams.bWidthInDword_Y = true;
2631 SurfaceParams.bWidthInDword_UV = true;
2632 SurfaceParams.Boundary = RENDERHAL_SS_BOUNDARY_ORIGINAL;
2633 SurfaceParams.bWidth16Align = false;
2634
2635 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetSurfaceForHwAccess(
2636 pRenderHal,
2637 &pVeboxState->VeboxHeapResource,
2638 &pVeboxState->RenderHalVeboxHeapResource,
2639 &SurfaceParams,
2640 pRenderData->iBindingTable,
2641 BI_DN_VEBOX_STATE_SURFACE,
2642 true));
2643
2644 // VEBox Temp Surface-----------------------------------------------------------
2645 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2646
2647 SurfaceParams.Type = pRenderHal->SurfaceTypeDefault;
2648 SurfaceParams.bRenderTarget = true;
2649 SurfaceParams.bWidthInDword_Y = true;
2650 SurfaceParams.bWidthInDword_UV = true;
2651 SurfaceParams.Boundary = RENDERHAL_SS_BOUNDARY_ORIGINAL;
2652 SurfaceParams.bWidth16Align = false;
2653
2654 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetSurfaceForHwAccess(
2655 pRenderHal,
2656 &pVeboxState->tmpResource,
2657 &pVeboxState->RenderHalTmpResource,
2658 &SurfaceParams,
2659 pRenderData->iBindingTable,
2660 BI_DN_TEMP_SURFACE,
2661 true));
2662
2663 // Spatial Attributes Configuration Surface------------------------------------
2664 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2665
2666 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetBufferSurfaceForHwAccess(
2667 pRenderHal,
2668 &pVeboxState->VeboxSpatialAttributesConfigurationSurface,
2669 &pVeboxState->RenderHalVeboxSpatialAttributesConfigurationSurface,
2670 &SurfaceParams,
2671 pRenderData->iBindingTable,
2672 BI_DN_SPATIAL_ATTRIBUTES_CONFIGURATION_SURFACE,
2673 false));
2674
2675 finish:
2676 return eStatus;
2677 }
2678 #endif
2679
2680 //!
2681 //! \brief Setup kernels for Vebox auto mode features
2682 //! \details Setup kernels that co-operate with Vebox auto mode features
2683 //! \param [in] iKDTIndex
2684 //! Index to Kernel Parameter Array (defined platform specific)
2685 //! \return MOS_STATUS
2686 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
2687 //!
SetupVeboxKernel(int32_t iKDTIndex)2688 MOS_STATUS VPHAL_VEBOX_STATE_G11_BASE::SetupVeboxKernel(
2689 int32_t iKDTIndex)
2690 {
2691 Kdll_CacheEntry *pCacheEntryTable; // Kernel Cache Entry table
2692 Kdll_FilterEntry *pFilter; // Kernel Filter (points to base of filter array)
2693 int32_t iKUID; // Kernel Unique ID (DNDI uses combined kernels)
2694 int32_t iInlineLength; // Inline data length
2695 MOS_STATUS eStatus; // Return code
2696 PVPHAL_VEBOX_STATE_G11_BASE pVeboxState = this;
2697 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2698
2699 // Initialize Variables
2700 eStatus = MOS_STATUS_SUCCESS;
2701 pFilter = &pVeboxState->SearchFilter[0];
2702 pCacheEntryTable = pVeboxState->m_pKernelDllState->ComponentKernelCache.pCacheEntries;
2703
2704 // Initialize States
2705 MOS_ZeroMemory(pFilter, sizeof(pVeboxState->SearchFilter));
2706 MOS_ZeroMemory(&pRenderData->KernelEntry[iKDTIndex], sizeof(Kdll_CacheEntry));
2707
2708 #if VEBOX_AUTO_DENOISE_SUPPORTED
2709 if (iKDTIndex == KERNEL_UPDATEDNSTATE)
2710 {
2711 iKUID = IDR_VP_UpdateDNState;
2712 iInlineLength = 0; // No inline data
2713 pRenderData->PerfTag = VPHAL_VEBOX_UPDATE_DN_STATE;
2714 }
2715 else // Incorrect index to kernel parameters array
2716 #endif
2717 {
2718 VPHAL_RENDER_ASSERTMESSAGE(
2719 "Incorrect index to kernel parameters array.");
2720 eStatus = MOS_STATUS_UNKNOWN;
2721 goto finish;
2722 }
2723
2724 // Store pointer to Kernel Parameter
2725 pRenderData->pKernelParam[iKDTIndex] =
2726 &pVeboxState->pKernelParamTable[iKDTIndex];
2727
2728 // Set Parameters for Kernel Entry
2729 pRenderData->KernelEntry[iKDTIndex].iKUID = iKUID;
2730 pRenderData->KernelEntry[iKDTIndex].iKCID = -1;
2731 pRenderData->KernelEntry[iKDTIndex].iFilterSize = 2;
2732 pRenderData->KernelEntry[iKDTIndex].pFilter = pFilter;
2733 pRenderData->KernelEntry[iKDTIndex].iSize = pCacheEntryTable[iKUID].iSize;
2734 pRenderData->KernelEntry[iKDTIndex].pBinary = pCacheEntryTable[iKUID].pBinary;
2735
2736 // set the Inline Data length
2737 pRenderData->iInlineLength = iInlineLength;
2738
2739 VPHAL_RENDER_NORMALMESSAGE(
2740 "Vebox Kernels: %s", g_KernelDNDI_Str_g11[iKDTIndex]);
2741
2742 finish:
2743 return eStatus;
2744 }
2745
2746 //!
2747 //! \brief Vebox format support check
2748 //! \details Checks to see if Vebox operation is supported with source surface format
2749 //! \param [in] pSrcSurface
2750 //! Pointer to input surface of Vebox
2751 //! \return bool
2752 //! return true if input surface format is supported, otherwise false
2753 //!
IsFormatSupported(PVPHAL_SURFACE pSrcSurface)2754 bool VPHAL_VEBOX_STATE_G11_BASE::IsFormatSupported(
2755 PVPHAL_SURFACE pSrcSurface)
2756 {
2757 bool bRet = false;
2758 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrcSurface);
2759
2760 // Check if Sample Format is supported
2761 // Vebox only support P016 format, P010 format can be supported by faking it as P016
2762 if (pSrcSurface->Format != Format_NV12 &&
2763 pSrcSurface->Format != Format_AYUV &&
2764 pSrcSurface->Format != Format_P010 &&
2765 pSrcSurface->Format != Format_P016 &&
2766 pSrcSurface->Format != Format_P210 &&
2767 pSrcSurface->Format != Format_P216 &&
2768 pSrcSurface->Format != Format_Y8 &&
2769 pSrcSurface->Format != Format_Y16U &&
2770 pSrcSurface->Format != Format_Y16S &&
2771 !IS_PA_FORMAT(pSrcSurface->Format))
2772 {
2773 VPHAL_RENDER_NORMALMESSAGE("Unsupported Source Format '0x%08x' for VEBOX.", pSrcSurface->Format);
2774 goto finish;
2775 }
2776
2777 bRet = true;
2778
2779 finish:
2780 return bRet;
2781 }
2782
2783 //!
2784 //! \brief Vebox format support check
2785 //! \details Checks to see if RT format is supported when Vebox output pipe is selected
2786 //! \param [in] pSrcSurface
2787 //! Pointer to Render source surface of VPP BLT
2788 //! \param [in] pRTSurface
2789 //! Pointer to Render target surface of VPP BLT
2790 //! \return bool
2791 //! return true if render target surface format is supported, otherwise false
2792 //!
IsRTFormatSupported(PVPHAL_SURFACE pSrcSurface,PVPHAL_SURFACE pRTSurface)2793 bool VPHAL_VEBOX_STATE_G11_BASE::IsRTFormatSupported(
2794 PVPHAL_SURFACE pSrcSurface,
2795 PVPHAL_SURFACE pRTSurface)
2796 {
2797 bool bRet = false;
2798
2799 if ((nullptr == pSrcSurface) || (nullptr == pRTSurface))
2800 {
2801 VPHAL_RENDER_ASSERTMESSAGE(" invalid surface");
2802 return false;
2803 }
2804
2805 // Check if RT Format is supported by Vebox
2806 if (IS_PA_FORMAT(pRTSurface->Format) ||
2807 pRTSurface->Format == Format_NV12 ||
2808 pRTSurface->Format == Format_AYUV ||
2809 pRTSurface->Format == Format_P010 ||
2810 pRTSurface->Format == Format_P016 ||
2811 pRTSurface->Format == Format_P210 ||
2812 pRTSurface->Format == Format_P216 ||
2813 pRTSurface->Format == Format_Y8 ||
2814 pRTSurface->Format == Format_Y16U ||
2815 pRTSurface->Format == Format_Y16S)
2816 {
2817 // Supported Vebox Render Target format. Vebox Pipe Output can be selected.
2818 bRet = true;
2819 }
2820
2821 if ((pSrcSurface->ColorSpace == CSpace_BT2020) &&
2822 ((pSrcSurface->Format == Format_P010) ||
2823 (pSrcSurface->Format == Format_P016)) &&
2824 // YuvChannelSwap is no longer supported from GEN10+, so we only accept 32-bits no swapped format.
2825 (IS_RGB32_FORMAT(pRTSurface->Format) && IS_RGB_NO_SWAP(pRTSurface->Format)))
2826 {
2827 bRet = true;
2828 }
2829
2830 return bRet;
2831 }
2832
2833 //!
2834 //! \brief Vebox format support check for DN
2835 //! \details Check if the input surface format is supported for DN
2836 //! \param [in] pSrcSurface
2837 //! Pointer to input surface of Vebox
2838 //! \return bool
2839 //! return true if input surface format is supported, otherwise false
2840 //!
IsDnFormatSupported(PVPHAL_SURFACE pSrcSurface)2841 bool VPHAL_VEBOX_STATE_G11_BASE::IsDnFormatSupported(
2842 PVPHAL_SURFACE pSrcSurface)
2843 {
2844 if (nullptr == pSrcSurface)
2845 {
2846 VPHAL_RENDER_ASSERTMESSAGE(" invalid surface");
2847 return false;
2848 }
2849 if ((pSrcSurface->Format != Format_YUYV) &&
2850 (pSrcSurface->Format != Format_VYUY) &&
2851 (pSrcSurface->Format != Format_YVYU) &&
2852 (pSrcSurface->Format != Format_UYVY) &&
2853 (pSrcSurface->Format != Format_YUY2) &&
2854 (pSrcSurface->Format != Format_Y8) &&
2855 (pSrcSurface->Format != Format_NV12) &&
2856 (pSrcSurface->Format != Format_Y216) &&
2857 (pSrcSurface->Format != Format_Y210) &&
2858 (pSrcSurface->Format != Format_Y416) &&
2859 (pSrcSurface->Format != Format_Y410) &&
2860 (pSrcSurface->Format != Format_P216) &&
2861 (pSrcSurface->Format != Format_P010) &&
2862 (pSrcSurface->Format != Format_P016) &&
2863 (pSrcSurface->Format != Format_A8B8G8R8) &&
2864 (pSrcSurface->Format != Format_A16B16G16R16))
2865 {
2866 VPHAL_RENDER_NORMALMESSAGE("Unsupported Format '0x%08x' for VEBOX DN.", pSrcSurface->Format);
2867 return false;
2868 }
2869
2870 return true;
2871 }
2872
2873 //!
2874 //! \brief Check if surface format is supported by DI
2875 //! \details Check if surface format is supported by DI
2876 //! \param [in] pSrc
2877 //! Pointer to input surface of Vebox
2878 //! \return bool
2879 //! Return true if surface format is supported, otherwise return false
2880 //!
IsDiFormatSupported(PVPHAL_SURFACE pSrc)2881 bool VPHAL_VEBOX_STATE_G11_BASE::IsDiFormatSupported(
2882 PVPHAL_SURFACE pSrc)
2883 {
2884 bool bRet = false;
2885
2886 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrc);
2887
2888 if (pSrc->Format != Format_AYUV &&
2889 pSrc->Format != Format_Y416 &&
2890 pSrc->Format != Format_Y410 &&
2891 pSrc->Format != Format_A8B8G8R8 &&
2892 pSrc->Format != Format_A8R8G8B8 &&
2893 pSrc->Format != Format_B10G10R10A2 &&
2894 pSrc->Format != Format_R10G10B10A2 &&
2895 pSrc->Format != Format_A16B16G16R16 &&
2896 pSrc->Format != Format_A16R16G16B16)
2897 {
2898 bRet = true;
2899 }
2900 else
2901 {
2902 bRet = false;
2903 }
2904
2905 finish:
2906 return bRet;
2907 }
2908
2909 //!
2910 //! \brief Vebox set rendering flag
2911 //! \details Setup Rendering Flags due to different usage case - main entrance
2912 //! \param [in] pSrc
2913 //! Pointer to input surface of Vebox
2914 //! \param [in] pRenderTarget
2915 //! Pointer to Render target surface of VPP BLT
2916 //! \return void
2917 //!
VeboxSetRenderingFlags(PVPHAL_SURFACE pSrc,PVPHAL_SURFACE pRenderTarget)2918 void VPHAL_VEBOX_STATE_G11_BASE::VeboxSetRenderingFlags(
2919 PVPHAL_SURFACE pSrc,
2920 PVPHAL_SURFACE pRenderTarget)
2921 {
2922 bool bToneMapping = false;
2923 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2924
2925 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrc);
2926 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderTarget);
2927 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
2928
2929 if ((pSrc->pHDRParams && (pSrc->pHDRParams->EOTF != VPHAL_HDR_EOTF_TRADITIONAL_GAMMA_SDR)) ||
2930 (pRenderTarget->pHDRParams && (pRenderTarget->pHDRParams->EOTF != VPHAL_HDR_EOTF_TRADITIONAL_GAMMA_SDR)))
2931 {
2932 bToneMapping = true;
2933 }
2934 pRenderData->bHdr3DLut = bToneMapping;
2935 VPHAL_RENDER_NORMALMESSAGE("Enable 3DLut for HDR ToneMapping %d.", pRenderData->bHdr3DLut);
2936
2937 VPHAL_VEBOX_STATE::VeboxSetRenderingFlags(pSrc, pRenderTarget);
2938
2939 finish:
2940 return;
2941 }
2942
CreateSfcState()2943 VphalSfcState* VPHAL_VEBOX_STATE_G11_BASE::CreateSfcState()
2944 {
2945 #if __VPHAL_SFC_SUPPORTED
2946 VphalSfcState *sfcState = MOS_New(VphalSfcStateG11, m_pOsInterface, m_pRenderHal, m_pSfcInterface);
2947 #else
2948 VphalSfcState *sfcState = nullptr;
2949 #endif
2950
2951 return sfcState;
2952 }
2953
VPHAL_VEBOX_STATE_G11_BASE(PMOS_INTERFACE pOsInterface,PMHW_VEBOX_INTERFACE pVeboxInterface,PMHW_SFC_INTERFACE pSfcInterface,PRENDERHAL_INTERFACE pRenderHal,PVPHAL_VEBOX_EXEC_STATE pVeboxExecState,PVPHAL_RNDR_PERF_DATA pPerfData,const VPHAL_DNDI_CACHE_CNTL & dndiCacheCntl,MOS_STATUS * peStatus)2954 VPHAL_VEBOX_STATE_G11_BASE::VPHAL_VEBOX_STATE_G11_BASE(
2955 PMOS_INTERFACE pOsInterface,
2956 PMHW_VEBOX_INTERFACE pVeboxInterface,
2957 PMHW_SFC_INTERFACE pSfcInterface,
2958 PRENDERHAL_INTERFACE pRenderHal,
2959 PVPHAL_VEBOX_EXEC_STATE pVeboxExecState,
2960 PVPHAL_RNDR_PERF_DATA pPerfData,
2961 const VPHAL_DNDI_CACHE_CNTL &dndiCacheCntl,
2962 MOS_STATUS *peStatus) :
2963 VPHAL_VEBOX_STATE(pOsInterface, pVeboxInterface, pSfcInterface, pRenderHal, pVeboxExecState, pPerfData, dndiCacheCntl, peStatus)
2964 {
2965 // States
2966 pKernelParamTable = (PRENDERHAL_KERNEL_PARAM)g_Vebox_KernelParam_g11;
2967 iNumFFDISurfaces = 2; // PE on: 4 used. PE off: 2 used
2968
2969 }
2970
2971