1 /* 2 * Copyright (c) 2017-2019, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file cm_hal_g12.h 24 //! \brief Common HAL CM Gen12LP (TGLLP) function declarations. 25 //! 26 27 #ifndef _CM_HAL_G12_H_ 28 #define _CM_HAL_G12_H_ 29 30 #include "cm_hal.h" 31 32 #define CM_NUM_HW_POLYPHASE_TABLES_G12 17 33 #define CM_NUM_HW_POLYPHASE_EXTRA_TABLES_G12 15 34 35 #define TGL_L3_CONFIG_NUM 7 36 #define CM_THREADSPACE_MAX_COLOR_COUNT_GEN12 256 37 38 #define CM_NS_PER_TICK_RENDER_G12_DEFAULT (83.333) 39 40 struct CM_TASK_CONFIG_EX; 41 42 43 // TGLLP L3 Allocation Control Register 44 static const L3ConfigRegisterValues TGL_L3_PLANE[TGL_L3_CONFIG_NUM] = { 45 // URB Rest DC RO Z Color UTC CB Sum (in KB) 46 { 0xD0000020, 0x0, 0, 0 }, // 64 416 0 0 0 0 0 0 480 47 { 0x78000040, 0x306044, 0, 0 }, // 128 240 0 0 48 48 0 16 480 48 { 0x21E020, 0x408044, 0, 0 }, // 64 0 32 240 64 64 0 16 480 49 { 0x48000020, 0x810044, 0, 0 }, // 64 144 0 0 128 128 0 16 480 50 { 0x18000020, 0xB0000044, 0, 0 }, // 64 48 0 0 0 0 352 16 480 51 { 0x88000020, 0x40000044, 0, 0 }, // 64 272 0 0 0 0 128 16 480 52 { 0xC8000020, 0x44, 0, 0 }, // 64 400 0 0 0 0 0 16 480 53 }; 54 55 struct CM_HAL_G12_X:public CM_HAL_GENERIC 56 { 57 58 public: 59 CM_HAL_G12_X(CM_HAL_STATE *cmState); 60 ~CM_HAL_G12_XCM_HAL_G12_X61 ~CM_HAL_G12_X() {} 62 63 MOS_STATUS GetCopyKernelIsa(void *&isa, uint32_t &isaSize); 64 65 MOS_STATUS GetInitKernelIsa(void *&isa, uint32_t &isaSize); 66 67 MOS_STATUS SetMediaWalkerParams( 68 CM_WALKING_PARAMETERS engineeringParams, 69 PCM_HAL_WALKER_PARAMS walkerParams); 70 71 MOS_STATUS HwSetSurfaceMemoryObjectControl( 72 uint16_t memObjCtl, 73 PRENDERHAL_SURFACE_STATE_PARAMS surfStateParams); 74 75 MOS_STATUS RegisterSampler8x8AVSTable( 76 PCM_HAL_SAMPLER_8X8_TABLE sampler8x8AvsTable, 77 PCM_AVS_TABLE_STATE_PARAMS avsTable); 78 79 MOS_STATUS RegisterSampler8x8( 80 PCM_HAL_SAMPLER_8X8_PARAM param); 81 82 MOS_STATUS SubmitCommands( 83 PMHW_BATCH_BUFFER batchBuffer, 84 int32_t taskId, 85 PCM_HAL_KERNEL_PARAM *kernelParam, 86 void **cmdBuffer); 87 88 #if (_RELEASE_INTERNAL || _DEBUG) 89 #if defined (CM_DIRECT_GUC_SUPPORT) 90 MOS_STATUS SubmitDummyCommands( 91 PMHW_BATCH_BUFFER batchBuffer, 92 int32_t taskId, 93 PCM_HAL_KERNEL_PARAM *kernelParam, 94 void **cmdBuffer); 95 #endif 96 #endif 97 98 uint32_t GetMediaWalkerMaxThreadWidth(); 99 uint32_t GetMediaWalkerMaxThreadHeight(); 100 101 MOS_STATUS GetHwSurfaceBTIInfo( 102 PCM_SURFACE_BTI_INFO btiInfo); 103 104 MOS_STATUS SetSuggestedL3Conf( 105 L3_SUGGEST_CONFIG l3Config); 106 107 MOS_STATUS AllocateSIPCSRResource(); 108 109 MOS_STATUS GetGenStepInfo(char*& stepinfostr); 110 IsScoreboardParamNeededCM_HAL_G12_X111 bool IsScoreboardParamNeeded() { return false; }; 112 IsSupportedVMESurfaceFormatCM_HAL_G12_X113 bool IsSupportedVMESurfaceFormat(MOS_FORMAT format) { 114 bool isColorFormatSupported = false; 115 switch (format) 116 { 117 case Format_NV12: 118 case Format_YUY2: 119 case Format_YUYV: 120 case Format_A8R8G8B8: 121 case Format_P010: 122 case Format_AYUV: 123 case Format_Y210: 124 case Format_Y410: 125 case Format_Y216: 126 case Format_Y416: 127 case Format_P016: 128 case Format_P208: 129 isColorFormatSupported = true; 130 break; 131 default: 132 CM_ASSERTMESSAGE("Error: color format = %d not supported by VME on Gen12!", format); 133 break; 134 } 135 return isColorFormatSupported; 136 } 137 138 int32_t ColorCountSanityCheck(uint32_t colorCount); 139 140 bool MemoryObjectCtrlPolicyCheck(uint32_t memCtrl); 141 142 int32_t GetConvSamplerIndex( 143 PMHW_SAMPLER_STATE_PARAM samplerParam, 144 char *samplerIndexTable, 145 int32_t nSamp8X8Num, 146 int32_t nSampConvNum); 147 148 MOS_STATUS SetL3CacheConfig( 149 const L3ConfigRegisterValues *values, 150 PCmHalL3Settings cmHalL3Setting ); 151 152 MOS_STATUS GetSamplerParamInfoForSamplerType( 153 PMHW_SAMPLER_STATE_PARAM mhwSamplerParam, 154 SamplerParam &samplerParam); 155 156 MOS_STATUS GetExpectedGtSystemConfig( 157 PCM_EXPECTED_GT_SYSTEM_INFO expectedConfig); 158 GetTimeStampResourceSizeCM_HAL_G12_X159 int32_t GetTimeStampResourceSize() 160 { 161 return sizeof(uint64_t)*CM_SYNC_QWORD_PER_TASK 162 + sizeof(uint64_t)*CM_TRACKER_ID_QWORD_PER_TASK; 163 } 164 ConverTicksToNanoSecondsDefaultCM_HAL_G12_X165 uint64_t ConverTicksToNanoSecondsDefault(uint64_t ticks) 166 { 167 return static_cast<uint64_t>( 168 ticks * CM_NS_PER_TICK_RENDER_G12_DEFAULT); 169 } 170 CheckMediaModeAvailabilityCM_HAL_G12_X171 bool CheckMediaModeAvailability() { return true; } 172 IsFastPathByDefaultCM_HAL_G12_X173 bool IsFastPathByDefault() { return true; } 174 GetSmallestMaxThreadNumCM_HAL_G12_X175 uint32_t GetSmallestMaxThreadNum() { return 64; } 176 177 private: 178 MOS_STATUS UpdatePlatformInfoFromPower( 179 PCM_PLATFORM_INFO platformInfo, 180 bool euSaturated); 181 182 MOS_STATUS SetupHwDebugControl( 183 PRENDERHAL_INTERFACE renderHal, 184 PMOS_COMMAND_BUFFER cmdBuffer); 185 }; 186 187 #endif // #ifndef _CM_HAL_G12_H_ 188