1 /*****************************************************************************
2 Copyright (c) 2011, Lab of Parallel Software and Computational Science,ICSAS
3 All rights reserved.
4
5 Redistribution and use in source and binary forms, with or without
6 modification, are permitted provided that the following conditions are
7 met:
8
9 1. Redistributions of source code must retain the above copyright
10 notice, this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in
14 the documentation and/or other materials provided with the
15 distribution.
16 3. Neither the name of the ISCAS nor the names of its contributors may
17 be used to endorse or promote products derived from this software
18 without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
29 USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30
31 **********************************************************************************/
32
33 /*********************************************************************/
34 /* Copyright 2009, 2010 The University of Texas at Austin. */
35 /* All rights reserved. */
36 /* */
37 /* Redistribution and use in source and binary forms, with or */
38 /* without modification, are permitted provided that the following */
39 /* conditions are met: */
40 /* */
41 /* 1. Redistributions of source code must retain the above */
42 /* copyright notice, this list of conditions and the following */
43 /* disclaimer. */
44 /* */
45 /* 2. Redistributions in binary form must reproduce the above */
46 /* copyright notice, this list of conditions and the following */
47 /* disclaimer in the documentation and/or other materials */
48 /* provided with the distribution. */
49 /* */
50 /* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
51 /* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
52 /* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
53 /* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
54 /* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
55 /* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
56 /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
57 /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
58 /* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
59 /* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
60 /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
61 /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
62 /* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
63 /* POSSIBILITY OF SUCH DAMAGE. */
64 /* */
65 /* The views and conclusions contained in the software and */
66 /* documentation are those of the authors and should not be */
67 /* interpreted as representing official policies, either expressed */
68 /* or implied, of The University of Texas at Austin. */
69 /*********************************************************************/
70
71 #ifndef COMMON_MIPS64
72 #define COMMON_MIPS64
73
74 #define MB
75 #define WMB
76
77 #define INLINE inline
78
79 #ifndef ASSEMBLER
80
blas_lock(volatile unsigned long * address)81 static void INLINE blas_lock(volatile unsigned long *address){
82
83 long int ret, val = 1;
84
85 do {
86 while (*address) {YIELDING;};
87
88 __asm__ __volatile__(
89 "1: ll %0, %3\n"
90 " ori %2, %0, 1\n"
91 " sc %2, %1\n"
92 " beqz %2, 1b\n"
93 " andi %2, %0, 1\n"
94 " sync\n"
95 : "=&r" (val), "=m" (address), "=&r" (ret)
96 : "m" (address)
97 : "memory");
98
99 } while (ret);
100 }
101
rpcc(void)102 static inline unsigned int rpcc(void){
103 unsigned long ret;
104 #if defined(LOONGSON3A) || defined(LOONGSON3B)
105 // unsigned long long tmp;
106 //__asm__ __volatile__("dmfc0 %0, $25, 1": "=r"(tmp):: "memory");
107 //ret=tmp;
108 __asm__ __volatile__(".set push \n"
109 ".set mips32r2\n"
110 "rdhwr %0, $2\n"
111 ".set pop": "=r"(ret):: "memory");
112
113 #else
114 __asm__ __volatile__(".set push \n"
115 ".set mips32r2\n"
116 "rdhwr %0, $30 \n"
117 ".set pop" : "=r"(ret) : : "memory");
118 #endif
119 return ret;
120 }
121
122 #if defined(LOONGSON3A) || defined(LOONGSON3B)
123 #ifndef NO_AFFINITY
124 #define WHEREAMI
WhereAmI(void)125 static inline int WhereAmI(void){
126 int ret=0;
127 __asm__ __volatile__(".set push \n"
128 ".set mips32r2\n"
129 "rdhwr %0, $0\n"
130 ".set pop": "=r"(ret):: "memory");
131 return ret;
132
133 }
134 #endif
135 #endif
136
blas_quickdivide(blasint x,blasint y)137 static inline int blas_quickdivide(blasint x, blasint y){
138 return x / y;
139 }
140
141 #ifdef DOUBLE
142 #define GET_IMAGE(res) __asm__ __volatile__("mov.d %0, $f2" : "=f"(res) : : "memory")
143 #else
144 #define GET_IMAGE(res) __asm__ __volatile__("mov.s %0, $f2" : "=f"(res) : : "memory")
145 #endif
146
147 #define GET_IMAGE_CANCEL
148
149 #endif
150
151
152 #ifdef ASSEMBLER
153
154 #define HALT teq $0, $0
155 #define NOP move $0, $0
156
157 #ifdef DOUBLE
158 #define LD ldc1
159 #define ST sdc1
160 #define MADD madd.d
161 #define NMADD nmadd.d
162 #define MSUB msub.d
163 #define NMSUB nmsub.d
164 #define ADD add.d
165 #define SUB sub.d
166 #define MUL mul.d
167 #define MOV mov.d
168 #define CMOVF movf.d
169 #define CMOVT movt.d
170 #define MTC dmtc1
171 #define FABS abs.d
172 #define CMPEQ c.eq.d
173 #define CMPLE c.le.d
174 #define CMPLT c.lt.d
175 #define NEG neg.d
176 #else
177 #define LD lwc1
178 #define ST swc1
179 #define MADD madd.s
180 #define NMADD nmadd.s
181 #define MSUB msub.s
182 #define NMSUB nmsub.s
183 #define ADD add.s
184 #define SUB sub.s
185 #define MUL mul.s
186 #define MOV mov.s
187 #define CMOVF movf.s
188 #define CMOVT movt.s
189 #define MTC mtc1
190 #define FABS abs.s
191 #define CMPEQ c.eq.s
192 #define CMPLE c.le.s
193 #define CMPLT c.lt.s
194 #define PLU plu.ps
195 #define PLL pll.ps
196 #define PUU puu.ps
197 #define PUL pul.ps
198 #define MADPS madd.ps
199 #define CVTU cvt.s.pu
200 #define CVTL cvt.s.pl
201 #define NEG neg.s
202 #endif
203
204 #if defined(__64BIT__) && defined(USE64BITINT)
205 #define LDINT ld
206 #define LDARG ld
207 #define SDARG sd
208 #elif defined(__64BIT__) && !defined(USE64BITINT)
209 #define LDINT lw
210 #define LDARG ld
211 #define SDARG sd
212 #else
213 #define LDINT lw
214 #define LDARG lw
215 #define SDARG sw
216 #endif
217
218
219 #ifndef F_INTERFACE
220 #define REALNAME ASMNAME
221 #else
222 #define REALNAME ASMFNAME
223 #endif
224
225 #if defined(ASSEMBLER) && !defined(NEEDPARAM)
226
227 #define PROLOGUE \
228 .text ;\
229 .set mips64 ;\
230 .align 5 ;\
231 .globl REALNAME ;\
232 .ent REALNAME ;\
233 .type REALNAME, @function ;\
234 REALNAME: ;\
235 .set noreorder ;\
236 .set nomacro
237
238 #define EPILOGUE \
239 .set macro ;\
240 .set reorder ;\
241 .end REALNAME
242
243 #define PROFCODE
244 #endif
245
246 #endif
247
248 #define SEEK_ADDRESS
249
250 #define BUFFER_SIZE ( 32 << 20)
251
252 #if defined(LOONGSON3A)
253 #define PAGESIZE (16UL << 10)
254 #define FIXED_PAGESIZE (16UL << 10)
255 #endif
256
257 #if defined(LOONGSON3B)
258 #define PAGESIZE (32UL << 10)
259 #define FIXED_PAGESIZE (32UL << 10)
260 #endif
261
262 #ifndef PAGESIZE
263 #define PAGESIZE (64UL << 10)
264 #endif
265 #define HUGE_PAGESIZE ( 2 << 20)
266
267 #define BASE_ADDRESS (START_ADDRESS - BUFFER_SIZE * MAX_CPU_NUMBER)
268
269 #ifndef MAP_ANONYMOUS
270 #define MAP_ANONYMOUS MAP_ANON
271 #endif
272
273 #if defined(LOONGSON3A) || defined(LOONGSON3B)
274 #define PREFETCHD_(x) ld $0, x
275 #define PREFETCHD(x) PREFETCHD_(x)
276 #else
277 #define PREFETCHD(x)
278 #endif
279
280 #endif
281