1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Marvell 88E6xxx PHY access
4  *
5  * Copyright (c) 2008 Marvell Semiconductor
6  *
7  * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
8  */
9 
10 #ifndef _MV88E6XXX_PHY_H
11 #define _MV88E6XXX_PHY_H
12 
13 #define MV88E6XXX_PHY_PAGE		0x16
14 #define MV88E6XXX_PHY_PAGE_COPPER	0x00
15 
16 /* PHY Registers accesses implementations */
17 int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
18 		       int addr, int reg, u16 *val);
19 int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
20 			int addr, int reg, u16 val);
21 int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
22 			   int addr, int reg, u16 *val);
23 int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
24 			    int addr, int reg, u16 val);
25 
26 /* Generic PHY operations */
27 int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
28 		       int reg, u16 *val);
29 int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,
30 			int reg, u16 val);
31 int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
32 			    u8 page, int reg, u16 *val);
33 int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
34 			     u8 page, int reg, u16 val);
35 void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip);
36 void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip);
37 int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip);
38 
39 #endif /*_MV88E6XXX_PHY_H */
40