1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Code to handle x86 style IRQs plus some generic interrupt stuff.
4 *
5 * Copyright (C) 1992 Linus Torvalds
6 * Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle
7 * Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
8 * Copyright (C) 1999-2000 Grant Grundler
9 * Copyright (c) 2005 Matthew Wilcox
10 */
11 #include <linux/bitops.h>
12 #include <linux/errno.h>
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/seq_file.h>
17 #include <linux/types.h>
18 #include <asm/io.h>
19
20 #include <asm/softirq_stack.h>
21 #include <asm/smp.h>
22 #include <asm/ldcw.h>
23
24 #undef PARISC_IRQ_CR16_COUNTS
25
26 extern irqreturn_t timer_interrupt(int, void *);
27 extern irqreturn_t ipi_interrupt(int, void *);
28
29 #define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq))
30
31 /* Bits in EIEM correlate with cpu_irq_action[].
32 ** Numbered *Big Endian*! (ie bit 0 is MSB)
33 */
34 static volatile unsigned long cpu_eiem = 0;
35
36 /*
37 ** local ACK bitmap ... habitually set to 1, but reset to zero
38 ** between ->ack() and ->end() of the interrupt to prevent
39 ** re-interruption of a processing interrupt.
40 */
41 static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL;
42
cpu_mask_irq(struct irq_data * d)43 static void cpu_mask_irq(struct irq_data *d)
44 {
45 unsigned long eirr_bit = EIEM_MASK(d->irq);
46
47 cpu_eiem &= ~eirr_bit;
48 /* Do nothing on the other CPUs. If they get this interrupt,
49 * The & cpu_eiem in the do_cpu_irq_mask() ensures they won't
50 * handle it, and the set_eiem() at the bottom will ensure it
51 * then gets disabled */
52 }
53
__cpu_unmask_irq(unsigned int irq)54 static void __cpu_unmask_irq(unsigned int irq)
55 {
56 unsigned long eirr_bit = EIEM_MASK(irq);
57
58 cpu_eiem |= eirr_bit;
59
60 /* This is just a simple NOP IPI. But what it does is cause
61 * all the other CPUs to do a set_eiem(cpu_eiem) at the end
62 * of the interrupt handler */
63 smp_send_all_nop();
64 }
65
cpu_unmask_irq(struct irq_data * d)66 static void cpu_unmask_irq(struct irq_data *d)
67 {
68 __cpu_unmask_irq(d->irq);
69 }
70
cpu_ack_irq(struct irq_data * d)71 void cpu_ack_irq(struct irq_data *d)
72 {
73 unsigned long mask = EIEM_MASK(d->irq);
74 int cpu = smp_processor_id();
75
76 /* Clear in EIEM so we can no longer process */
77 per_cpu(local_ack_eiem, cpu) &= ~mask;
78
79 /* disable the interrupt */
80 set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
81
82 /* and now ack it */
83 mtctl(mask, 23);
84 }
85
cpu_eoi_irq(struct irq_data * d)86 void cpu_eoi_irq(struct irq_data *d)
87 {
88 unsigned long mask = EIEM_MASK(d->irq);
89 int cpu = smp_processor_id();
90
91 /* set it in the eiems---it's no longer in process */
92 per_cpu(local_ack_eiem, cpu) |= mask;
93
94 /* enable the interrupt */
95 set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
96 }
97
98 #ifdef CONFIG_SMP
cpu_check_affinity(struct irq_data * d,const struct cpumask * dest)99 int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest)
100 {
101 int cpu_dest;
102
103 /* timer and ipi have to always be received on all CPUs */
104 if (irqd_is_per_cpu(d))
105 return -EINVAL;
106
107 /* whatever mask they set, we just allow one CPU */
108 cpu_dest = cpumask_next_and(d->irq & (num_online_cpus()-1),
109 dest, cpu_online_mask);
110 if (cpu_dest >= nr_cpu_ids)
111 cpu_dest = cpumask_first_and(dest, cpu_online_mask);
112
113 return cpu_dest;
114 }
115
cpu_set_affinity_irq(struct irq_data * d,const struct cpumask * dest,bool force)116 static int cpu_set_affinity_irq(struct irq_data *d, const struct cpumask *dest,
117 bool force)
118 {
119 int cpu_dest;
120
121 cpu_dest = cpu_check_affinity(d, dest);
122 if (cpu_dest < 0)
123 return -1;
124
125 cpumask_copy(irq_data_get_affinity_mask(d), dest);
126
127 return 0;
128 }
129 #endif
130
131 static struct irq_chip cpu_interrupt_type = {
132 .name = "CPU",
133 .irq_mask = cpu_mask_irq,
134 .irq_unmask = cpu_unmask_irq,
135 .irq_ack = cpu_ack_irq,
136 .irq_eoi = cpu_eoi_irq,
137 #ifdef CONFIG_SMP
138 .irq_set_affinity = cpu_set_affinity_irq,
139 #endif
140 /* XXX: Needs to be written. We managed without it so far, but
141 * we really ought to write it.
142 */
143 .irq_retrigger = NULL,
144 };
145
146 DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
147 #define irq_stats(x) (&per_cpu(irq_stat, x))
148
149 /*
150 * /proc/interrupts printing for arch specific interrupts
151 */
arch_show_interrupts(struct seq_file * p,int prec)152 int arch_show_interrupts(struct seq_file *p, int prec)
153 {
154 int j;
155
156 #ifdef CONFIG_DEBUG_STACKOVERFLOW
157 seq_printf(p, "%*s: ", prec, "STK");
158 for_each_online_cpu(j)
159 seq_printf(p, "%10u ", irq_stats(j)->kernel_stack_usage);
160 seq_puts(p, " Kernel stack usage\n");
161 # ifdef CONFIG_IRQSTACKS
162 seq_printf(p, "%*s: ", prec, "IST");
163 for_each_online_cpu(j)
164 seq_printf(p, "%10u ", irq_stats(j)->irq_stack_usage);
165 seq_puts(p, " Interrupt stack usage\n");
166 # endif
167 #endif
168 #ifdef CONFIG_SMP
169 if (num_online_cpus() > 1) {
170 seq_printf(p, "%*s: ", prec, "RES");
171 for_each_online_cpu(j)
172 seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
173 seq_puts(p, " Rescheduling interrupts\n");
174 seq_printf(p, "%*s: ", prec, "CAL");
175 for_each_online_cpu(j)
176 seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
177 seq_puts(p, " Function call interrupts\n");
178 }
179 #endif
180 seq_printf(p, "%*s: ", prec, "UAH");
181 for_each_online_cpu(j)
182 seq_printf(p, "%10u ", irq_stats(j)->irq_unaligned_count);
183 seq_puts(p, " Unaligned access handler traps\n");
184 seq_printf(p, "%*s: ", prec, "FPA");
185 for_each_online_cpu(j)
186 seq_printf(p, "%10u ", irq_stats(j)->irq_fpassist_count);
187 seq_puts(p, " Floating point assist traps\n");
188 seq_printf(p, "%*s: ", prec, "TLB");
189 for_each_online_cpu(j)
190 seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
191 seq_puts(p, " TLB shootdowns\n");
192 return 0;
193 }
194
show_interrupts(struct seq_file * p,void * v)195 int show_interrupts(struct seq_file *p, void *v)
196 {
197 int i = *(loff_t *) v, j;
198 unsigned long flags;
199
200 if (i == 0) {
201 seq_puts(p, " ");
202 for_each_online_cpu(j)
203 seq_printf(p, " CPU%d", j);
204
205 #ifdef PARISC_IRQ_CR16_COUNTS
206 seq_printf(p, " [min/avg/max] (CPU cycle counts)");
207 #endif
208 seq_putc(p, '\n');
209 }
210
211 if (i < NR_IRQS) {
212 struct irq_desc *desc = irq_to_desc(i);
213 struct irqaction *action;
214
215 raw_spin_lock_irqsave(&desc->lock, flags);
216 action = desc->action;
217 if (!action)
218 goto skip;
219 seq_printf(p, "%3d: ", i);
220
221 for_each_online_cpu(j)
222 seq_printf(p, "%10u ", irq_desc_kstat_cpu(desc, j));
223
224 seq_printf(p, " %14s", irq_desc_get_chip(desc)->name);
225 #ifndef PARISC_IRQ_CR16_COUNTS
226 seq_printf(p, " %s", action->name);
227
228 while ((action = action->next))
229 seq_printf(p, ", %s", action->name);
230 #else
231 for ( ;action; action = action->next) {
232 unsigned int k, avg, min, max;
233
234 min = max = action->cr16_hist[0];
235
236 for (avg = k = 0; k < PARISC_CR16_HIST_SIZE; k++) {
237 int hist = action->cr16_hist[k];
238
239 if (hist) {
240 avg += hist;
241 } else
242 break;
243
244 if (hist > max) max = hist;
245 if (hist < min) min = hist;
246 }
247
248 avg /= k;
249 seq_printf(p, " %s[%d/%d/%d]", action->name,
250 min,avg,max);
251 }
252 #endif
253
254 seq_putc(p, '\n');
255 skip:
256 raw_spin_unlock_irqrestore(&desc->lock, flags);
257 }
258
259 if (i == NR_IRQS)
260 arch_show_interrupts(p, 3);
261
262 return 0;
263 }
264
265
266
267 /*
268 ** The following form a "set": Virtual IRQ, Transaction Address, Trans Data.
269 ** Respectively, these map to IRQ region+EIRR, Processor HPA, EIRR bit.
270 **
271 ** To use txn_XXX() interfaces, get a Virtual IRQ first.
272 ** Then use that to get the Transaction address and data.
273 */
274
cpu_claim_irq(unsigned int irq,struct irq_chip * type,void * data)275 int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data)
276 {
277 if (irq_has_action(irq))
278 return -EBUSY;
279 if (irq_get_chip(irq) != &cpu_interrupt_type)
280 return -EBUSY;
281
282 /* for iosapic interrupts */
283 if (type) {
284 irq_set_chip_and_handler(irq, type, handle_percpu_irq);
285 irq_set_chip_data(irq, data);
286 __cpu_unmask_irq(irq);
287 }
288 return 0;
289 }
290
txn_claim_irq(int irq)291 int txn_claim_irq(int irq)
292 {
293 return cpu_claim_irq(irq, NULL, NULL) ? -1 : irq;
294 }
295
296 /*
297 * The bits_wide parameter accommodates the limitations of the HW/SW which
298 * use these bits:
299 * Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register)
300 * V-class (EPIC): 6 bits
301 * N/L/A-class (iosapic): 8 bits
302 * PCI 2.2 MSI: 16 bits
303 * Some PCI devices: 32 bits (Symbios SCSI/ATM/HyperFabric)
304 *
305 * On the service provider side:
306 * o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register)
307 * o PA 2.0 wide mode 6-bits (per processor)
308 * o IA64 8-bits (0-256 total)
309 *
310 * So a Legacy PA I/O device on a PA 2.0 box can't use all the bits supported
311 * by the processor...and the N/L-class I/O subsystem supports more bits than
312 * PA2.0 has. The first case is the problem.
313 */
txn_alloc_irq(unsigned int bits_wide)314 int txn_alloc_irq(unsigned int bits_wide)
315 {
316 int irq;
317
318 /* never return irq 0 cause that's the interval timer */
319 for (irq = CPU_IRQ_BASE + 1; irq <= CPU_IRQ_MAX; irq++) {
320 if (cpu_claim_irq(irq, NULL, NULL) < 0)
321 continue;
322 if ((irq - CPU_IRQ_BASE) >= (1 << bits_wide))
323 continue;
324 return irq;
325 }
326
327 /* unlikely, but be prepared */
328 return -1;
329 }
330
331
txn_affinity_addr(unsigned int irq,int cpu)332 unsigned long txn_affinity_addr(unsigned int irq, int cpu)
333 {
334 #ifdef CONFIG_SMP
335 struct irq_data *d = irq_get_irq_data(irq);
336 cpumask_copy(irq_data_get_affinity_mask(d), cpumask_of(cpu));
337 #endif
338
339 return per_cpu(cpu_data, cpu).txn_addr;
340 }
341
342
txn_alloc_addr(unsigned int virt_irq)343 unsigned long txn_alloc_addr(unsigned int virt_irq)
344 {
345 static int next_cpu = -1;
346
347 next_cpu++; /* assign to "next" CPU we want this bugger on */
348
349 /* validate entry */
350 while ((next_cpu < nr_cpu_ids) &&
351 (!per_cpu(cpu_data, next_cpu).txn_addr ||
352 !cpu_online(next_cpu)))
353 next_cpu++;
354
355 if (next_cpu >= nr_cpu_ids)
356 next_cpu = 0; /* nothing else, assign monarch */
357
358 return txn_affinity_addr(virt_irq, next_cpu);
359 }
360
361
txn_alloc_data(unsigned int virt_irq)362 unsigned int txn_alloc_data(unsigned int virt_irq)
363 {
364 return virt_irq - CPU_IRQ_BASE;
365 }
366
eirr_to_irq(unsigned long eirr)367 static inline int eirr_to_irq(unsigned long eirr)
368 {
369 int bit = fls_long(eirr);
370 return (BITS_PER_LONG - bit) + TIMER_IRQ;
371 }
372
373 #ifdef CONFIG_IRQSTACKS
374 /*
375 * IRQ STACK - used for irq handler
376 */
377 #ifdef CONFIG_64BIT
378 #define IRQ_STACK_SIZE (4096 << 4) /* 64k irq stack size */
379 #else
380 #define IRQ_STACK_SIZE (4096 << 3) /* 32k irq stack size */
381 #endif
382
383 union irq_stack_union {
384 unsigned long stack[IRQ_STACK_SIZE/sizeof(unsigned long)];
385 volatile unsigned int slock[4];
386 volatile unsigned int lock[1];
387 };
388
389 DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
390 .slock = { 1,1,1,1 },
391 };
392 #endif
393
394
395 int sysctl_panic_on_stackoverflow = 1;
396
stack_overflow_check(struct pt_regs * regs)397 static inline void stack_overflow_check(struct pt_regs *regs)
398 {
399 #ifdef CONFIG_DEBUG_STACKOVERFLOW
400 #define STACK_MARGIN (256*6)
401
402 /* Our stack starts directly behind the thread_info struct. */
403 unsigned long stack_start = (unsigned long) current_thread_info();
404 unsigned long sp = regs->gr[30];
405 unsigned long stack_usage;
406 unsigned int *last_usage;
407 int cpu = smp_processor_id();
408
409 /* if sr7 != 0, we interrupted a userspace process which we do not want
410 * to check for stack overflow. We will only check the kernel stack. */
411 if (regs->sr[7])
412 return;
413
414 /* exit if already in panic */
415 if (sysctl_panic_on_stackoverflow < 0)
416 return;
417
418 /* calculate kernel stack usage */
419 stack_usage = sp - stack_start;
420 #ifdef CONFIG_IRQSTACKS
421 if (likely(stack_usage <= THREAD_SIZE))
422 goto check_kernel_stack; /* found kernel stack */
423
424 /* check irq stack usage */
425 stack_start = (unsigned long) &per_cpu(irq_stack_union, cpu).stack;
426 stack_usage = sp - stack_start;
427
428 last_usage = &per_cpu(irq_stat.irq_stack_usage, cpu);
429 if (unlikely(stack_usage > *last_usage))
430 *last_usage = stack_usage;
431
432 if (likely(stack_usage < (IRQ_STACK_SIZE - STACK_MARGIN)))
433 return;
434
435 pr_emerg("stackcheck: %s will most likely overflow irq stack "
436 "(sp:%lx, stk bottom-top:%lx-%lx)\n",
437 current->comm, sp, stack_start, stack_start + IRQ_STACK_SIZE);
438 goto panic_check;
439
440 check_kernel_stack:
441 #endif
442
443 /* check kernel stack usage */
444 last_usage = &per_cpu(irq_stat.kernel_stack_usage, cpu);
445
446 if (unlikely(stack_usage > *last_usage))
447 *last_usage = stack_usage;
448
449 if (likely(stack_usage < (THREAD_SIZE - STACK_MARGIN)))
450 return;
451
452 pr_emerg("stackcheck: %s will most likely overflow kernel stack "
453 "(sp:%lx, stk bottom-top:%lx-%lx)\n",
454 current->comm, sp, stack_start, stack_start + THREAD_SIZE);
455
456 #ifdef CONFIG_IRQSTACKS
457 panic_check:
458 #endif
459 if (sysctl_panic_on_stackoverflow) {
460 sysctl_panic_on_stackoverflow = -1; /* disable further checks */
461 panic("low stack detected by irq handler - check messages\n");
462 }
463 #endif
464 }
465
466 #ifdef CONFIG_IRQSTACKS
467 /* in entry.S: */
468 void call_on_stack(unsigned long p1, void *func, unsigned long new_stack);
469
execute_on_irq_stack(void * func,unsigned long param1)470 static void execute_on_irq_stack(void *func, unsigned long param1)
471 {
472 union irq_stack_union *union_ptr;
473 unsigned long irq_stack;
474 volatile unsigned int *irq_stack_in_use;
475
476 union_ptr = &per_cpu(irq_stack_union, smp_processor_id());
477 irq_stack = (unsigned long) &union_ptr->stack;
478 irq_stack = ALIGN(irq_stack + sizeof(irq_stack_union.slock),
479 64); /* align for stack frame usage */
480
481 /* We may be called recursive. If we are already using the irq stack,
482 * just continue to use it. Use spinlocks to serialize
483 * the irq stack usage.
484 */
485 irq_stack_in_use = (volatile unsigned int *)__ldcw_align(union_ptr);
486 if (!__ldcw(irq_stack_in_use)) {
487 void (*direct_call)(unsigned long p1) = func;
488
489 /* We are using the IRQ stack already.
490 * Do direct call on current stack. */
491 direct_call(param1);
492 return;
493 }
494
495 /* This is where we switch to the IRQ stack. */
496 call_on_stack(param1, func, irq_stack);
497
498 /* free up irq stack usage. */
499 *irq_stack_in_use = 1;
500 }
501
do_softirq_own_stack(void)502 void do_softirq_own_stack(void)
503 {
504 execute_on_irq_stack(__do_softirq, 0);
505 }
506 #endif /* CONFIG_IRQSTACKS */
507
508 /* ONLY called from entry.S:intr_extint() */
do_cpu_irq_mask(struct pt_regs * regs)509 void do_cpu_irq_mask(struct pt_regs *regs)
510 {
511 struct pt_regs *old_regs;
512 unsigned long eirr_val;
513 int irq, cpu = smp_processor_id();
514 struct irq_data *irq_data;
515 #ifdef CONFIG_SMP
516 cpumask_t dest;
517 #endif
518
519 old_regs = set_irq_regs(regs);
520 local_irq_disable();
521 irq_enter();
522
523 eirr_val = mfctl(23) & cpu_eiem & per_cpu(local_ack_eiem, cpu);
524 if (!eirr_val)
525 goto set_out;
526 irq = eirr_to_irq(eirr_val);
527
528 irq_data = irq_get_irq_data(irq);
529
530 /* Filter out spurious interrupts, mostly from serial port at bootup */
531 if (unlikely(!irq_desc_has_action(irq_data_to_desc(irq_data))))
532 goto set_out;
533
534 #ifdef CONFIG_SMP
535 cpumask_copy(&dest, irq_data_get_affinity_mask(irq_data));
536 if (irqd_is_per_cpu(irq_data) &&
537 !cpumask_test_cpu(smp_processor_id(), &dest)) {
538 int cpu = cpumask_first(&dest);
539
540 printk(KERN_DEBUG "redirecting irq %d from CPU %d to %d\n",
541 irq, smp_processor_id(), cpu);
542 gsc_writel(irq + CPU_IRQ_BASE,
543 per_cpu(cpu_data, cpu).hpa);
544 goto set_out;
545 }
546 #endif
547 stack_overflow_check(regs);
548
549 #ifdef CONFIG_IRQSTACKS
550 execute_on_irq_stack(&generic_handle_irq, irq);
551 #else
552 generic_handle_irq(irq);
553 #endif /* CONFIG_IRQSTACKS */
554
555 out:
556 irq_exit();
557 set_irq_regs(old_regs);
558 return;
559
560 set_out:
561 set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
562 goto out;
563 }
564
claim_cpu_irqs(void)565 static void claim_cpu_irqs(void)
566 {
567 unsigned long flags = IRQF_TIMER | IRQF_PERCPU | IRQF_IRQPOLL;
568 int i;
569
570 for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
571 irq_set_chip_and_handler(i, &cpu_interrupt_type,
572 handle_percpu_irq);
573 }
574
575 irq_set_handler(TIMER_IRQ, handle_percpu_irq);
576 if (request_irq(TIMER_IRQ, timer_interrupt, flags, "timer", NULL))
577 pr_err("Failed to register timer interrupt\n");
578 #ifdef CONFIG_SMP
579 irq_set_handler(IPI_IRQ, handle_percpu_irq);
580 if (request_irq(IPI_IRQ, ipi_interrupt, IRQF_PERCPU, "IPI", NULL))
581 pr_err("Failed to register IPI interrupt\n");
582 #endif
583 }
584
init_IRQ(void)585 void __init init_IRQ(void)
586 {
587 local_irq_disable(); /* PARANOID - should already be disabled */
588 mtctl(~0UL, 23); /* EIRR : clear all pending external intr */
589 #ifdef CONFIG_SMP
590 if (!cpu_eiem) {
591 claim_cpu_irqs();
592 cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ);
593 }
594 #else
595 claim_cpu_irqs();
596 cpu_eiem = EIEM_MASK(TIMER_IRQ);
597 #endif
598 set_eiem(cpu_eiem); /* EIEM : enable all external intr */
599 }
600