1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /******************************************************************************
3 ** Device driver for the PCI-SCSI NCR538XX controller family.
4 **
5 ** Copyright (C) 1994 Wolfgang Stanglmeier
6 **
7 **
8 **-----------------------------------------------------------------------------
9 **
10 ** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver
11 ** and is currently maintained by
12 **
13 ** Gerard Roudier <groudier@free.fr>
14 **
15 ** Being given that this driver originates from the FreeBSD version, and
16 ** in order to keep synergy on both, any suggested enhancements and corrections
17 ** received on Linux are automatically a potential candidate for the FreeBSD
18 ** version.
19 **
20 ** The original driver has been written for 386bsd and FreeBSD by
21 ** Wolfgang Stanglmeier <wolf@cologne.de>
22 ** Stefan Esser <se@mi.Uni-Koeln.de>
23 **
24 ** And has been ported to NetBSD by
25 ** Charles M. Hannum <mycroft@gnu.ai.mit.edu>
26 **
27 **-----------------------------------------------------------------------------
28 **
29 ** Brief history
30 **
31 ** December 10 1995 by Gerard Roudier:
32 ** Initial port to Linux.
33 **
34 ** June 23 1996 by Gerard Roudier:
35 ** Support for 64 bits architectures (Alpha).
36 **
37 ** November 30 1996 by Gerard Roudier:
38 ** Support for Fast-20 scsi.
39 ** Support for large DMA fifo and 128 dwords bursting.
40 **
41 ** February 27 1997 by Gerard Roudier:
42 ** Support for Fast-40 scsi.
43 ** Support for on-Board RAM.
44 **
45 ** May 3 1997 by Gerard Roudier:
46 ** Full support for scsi scripts instructions pre-fetching.
47 **
48 ** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>:
49 ** Support for NvRAM detection and reading.
50 **
51 ** August 18 1997 by Cort <cort@cs.nmt.edu>:
52 ** Support for Power/PC (Big Endian).
53 **
54 ** June 20 1998 by Gerard Roudier
55 ** Support for up to 64 tags per lun.
56 ** O(1) everywhere (C and SCRIPTS) for normal cases.
57 ** Low PCI traffic for command handling when on-chip RAM is present.
58 ** Aggressive SCSI SCRIPTS optimizations.
59 **
60 ** 2005 by Matthew Wilcox and James Bottomley
61 ** PCI-ectomy. This driver now supports only the 720 chip (see the
62 ** NCR_Q720 and zalon drivers for the bus probe logic).
63 **
64 *******************************************************************************
65 */
66
67 /*
68 ** Supported SCSI-II features:
69 ** Synchronous negotiation
70 ** Wide negotiation (depends on the NCR Chip)
71 ** Enable disconnection
72 ** Tagged command queuing
73 ** Parity checking
74 ** Etc...
75 **
76 ** Supported NCR/SYMBIOS chips:
77 ** 53C720 (Wide, Fast SCSI-2, intfly problems)
78 */
79
80 /* Name and version of the driver */
81 #define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3g"
82
83 #define SCSI_NCR_DEBUG_FLAGS (0)
84
85 #include <linux/blkdev.h>
86 #include <linux/delay.h>
87 #include <linux/dma-mapping.h>
88 #include <linux/errno.h>
89 #include <linux/gfp.h>
90 #include <linux/init.h>
91 #include <linux/interrupt.h>
92 #include <linux/ioport.h>
93 #include <linux/mm.h>
94 #include <linux/module.h>
95 #include <linux/sched.h>
96 #include <linux/signal.h>
97 #include <linux/spinlock.h>
98 #include <linux/stat.h>
99 #include <linux/string.h>
100 #include <linux/time.h>
101 #include <linux/timer.h>
102 #include <linux/types.h>
103
104 #include <asm/dma.h>
105 #include <asm/io.h>
106
107 #include <scsi/scsi.h>
108 #include <scsi/scsi_cmnd.h>
109 #include <scsi/scsi_dbg.h>
110 #include <scsi/scsi_device.h>
111 #include <scsi/scsi_tcq.h>
112 #include <scsi/scsi_transport.h>
113 #include <scsi/scsi_transport_spi.h>
114
115 #include "ncr53c8xx.h"
116
117 #define NAME53C8XX "ncr53c8xx"
118
119 /*==========================================================
120 **
121 ** Debugging tags
122 **
123 **==========================================================
124 */
125
126 #define DEBUG_ALLOC (0x0001)
127 #define DEBUG_PHASE (0x0002)
128 #define DEBUG_QUEUE (0x0008)
129 #define DEBUG_RESULT (0x0010)
130 #define DEBUG_POINTER (0x0020)
131 #define DEBUG_SCRIPT (0x0040)
132 #define DEBUG_TINY (0x0080)
133 #define DEBUG_TIMING (0x0100)
134 #define DEBUG_NEGO (0x0200)
135 #define DEBUG_TAGS (0x0400)
136 #define DEBUG_SCATTER (0x0800)
137 #define DEBUG_IC (0x1000)
138
139 /*
140 ** Enable/Disable debug messages.
141 ** Can be changed at runtime too.
142 */
143
144 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
145 static int ncr_debug = SCSI_NCR_DEBUG_FLAGS;
146 #define DEBUG_FLAGS ncr_debug
147 #else
148 #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS
149 #endif
150
151 /*
152 * Locally used status flag
153 */
154 #define SAM_STAT_ILLEGAL 0xff
155
ncr_list_pop(struct list_head * head)156 static inline struct list_head *ncr_list_pop(struct list_head *head)
157 {
158 if (!list_empty(head)) {
159 struct list_head *elem = head->next;
160
161 list_del(elem);
162 return elem;
163 }
164
165 return NULL;
166 }
167
168 /*==========================================================
169 **
170 ** Simple power of two buddy-like allocator.
171 **
172 ** This simple code is not intended to be fast, but to
173 ** provide power of 2 aligned memory allocations.
174 ** Since the SCRIPTS processor only supplies 8 bit
175 ** arithmetic, this allocator allows simple and fast
176 ** address calculations from the SCRIPTS code.
177 ** In addition, cache line alignment is guaranteed for
178 ** power of 2 cache line size.
179 ** Enhanced in linux-2.3.44 to provide a memory pool
180 ** per pcidev to support dynamic dma mapping. (I would
181 ** have preferred a real bus abstraction, btw).
182 **
183 **==========================================================
184 */
185
186 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
187 #if PAGE_SIZE >= 8192
188 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
189 #else
190 #define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */
191 #endif
192 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
193 #define MEMO_WARN 1
194 #define MEMO_GFP_FLAGS GFP_ATOMIC
195 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
196 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
197 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
198
199 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
200 typedef struct device *m_bush_t; /* Something that addresses DMAable */
201
202 typedef struct m_link { /* Link between free memory chunks */
203 struct m_link *next;
204 } m_link_s;
205
206 typedef struct m_vtob { /* Virtual to Bus address translation */
207 struct m_vtob *next;
208 m_addr_t vaddr;
209 m_addr_t baddr;
210 } m_vtob_s;
211 #define VTOB_HASH_SHIFT 5
212 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
213 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
214 #define VTOB_HASH_CODE(m) \
215 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
216
217 typedef struct m_pool { /* Memory pool of a given kind */
218 m_bush_t bush;
219 m_addr_t (*getp)(struct m_pool *);
220 void (*freep)(struct m_pool *, m_addr_t);
221 int nump;
222 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
223 struct m_pool *next;
224 struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
225 } m_pool_s;
226
___m_alloc(m_pool_s * mp,int size)227 static void *___m_alloc(m_pool_s *mp, int size)
228 {
229 int i = 0;
230 int s = (1 << MEMO_SHIFT);
231 int j;
232 m_addr_t a;
233 m_link_s *h = mp->h;
234
235 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
236 return NULL;
237
238 while (size > s) {
239 s <<= 1;
240 ++i;
241 }
242
243 j = i;
244 while (!h[j].next) {
245 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
246 h[j].next = (m_link_s *)mp->getp(mp);
247 if (h[j].next)
248 h[j].next->next = NULL;
249 break;
250 }
251 ++j;
252 s <<= 1;
253 }
254 a = (m_addr_t) h[j].next;
255 if (a) {
256 h[j].next = h[j].next->next;
257 while (j > i) {
258 j -= 1;
259 s >>= 1;
260 h[j].next = (m_link_s *) (a+s);
261 h[j].next->next = NULL;
262 }
263 }
264 #ifdef DEBUG
265 printk("___m_alloc(%d) = %p\n", size, (void *) a);
266 #endif
267 return (void *) a;
268 }
269
___m_free(m_pool_s * mp,void * ptr,int size)270 static void ___m_free(m_pool_s *mp, void *ptr, int size)
271 {
272 int i = 0;
273 int s = (1 << MEMO_SHIFT);
274 m_link_s *q;
275 m_addr_t a, b;
276 m_link_s *h = mp->h;
277
278 #ifdef DEBUG
279 printk("___m_free(%p, %d)\n", ptr, size);
280 #endif
281
282 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
283 return;
284
285 while (size > s) {
286 s <<= 1;
287 ++i;
288 }
289
290 a = (m_addr_t) ptr;
291
292 while (1) {
293 #ifdef MEMO_FREE_UNUSED
294 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
295 mp->freep(mp, a);
296 break;
297 }
298 #endif
299 b = a ^ s;
300 q = &h[i];
301 while (q->next && q->next != (m_link_s *) b) {
302 q = q->next;
303 }
304 if (!q->next) {
305 ((m_link_s *) a)->next = h[i].next;
306 h[i].next = (m_link_s *) a;
307 break;
308 }
309 q->next = q->next->next;
310 a = a & b;
311 s <<= 1;
312 ++i;
313 }
314 }
315
316 static DEFINE_SPINLOCK(ncr53c8xx_lock);
317
__m_calloc2(m_pool_s * mp,int size,char * name,int uflags)318 static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags)
319 {
320 void *p;
321
322 p = ___m_alloc(mp, size);
323
324 if (DEBUG_FLAGS & DEBUG_ALLOC)
325 printk ("new %-10s[%4d] @%p.\n", name, size, p);
326
327 if (p)
328 memset(p, 0, size);
329 else if (uflags & MEMO_WARN)
330 printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size);
331
332 return p;
333 }
334
335 #define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN)
336
__m_free(m_pool_s * mp,void * ptr,int size,char * name)337 static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
338 {
339 if (DEBUG_FLAGS & DEBUG_ALLOC)
340 printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
341
342 ___m_free(mp, ptr, size);
343
344 }
345
346 /*
347 * With pci bus iommu support, we use a default pool of unmapped memory
348 * for memory we donnot need to DMA from/to and one pool per pcidev for
349 * memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
350 */
351
___mp0_getp(m_pool_s * mp)352 static m_addr_t ___mp0_getp(m_pool_s *mp)
353 {
354 m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER);
355 if (m)
356 ++mp->nump;
357 return m;
358 }
359
___mp0_freep(m_pool_s * mp,m_addr_t m)360 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
361 {
362 free_pages(m, MEMO_PAGE_ORDER);
363 --mp->nump;
364 }
365
366 static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep};
367
368 /*
369 * DMAable pools.
370 */
371
372 /*
373 * With pci bus iommu support, we maintain one pool per pcidev and a
374 * hashed reverse table for virtual to bus physical address translations.
375 */
___dma_getp(m_pool_s * mp)376 static m_addr_t ___dma_getp(m_pool_s *mp)
377 {
378 m_addr_t vp;
379 m_vtob_s *vbp;
380
381 vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB");
382 if (vbp) {
383 dma_addr_t daddr;
384 vp = (m_addr_t) dma_alloc_coherent(mp->bush,
385 PAGE_SIZE<<MEMO_PAGE_ORDER,
386 &daddr, GFP_ATOMIC);
387 if (vp) {
388 int hc = VTOB_HASH_CODE(vp);
389 vbp->vaddr = vp;
390 vbp->baddr = daddr;
391 vbp->next = mp->vtob[hc];
392 mp->vtob[hc] = vbp;
393 ++mp->nump;
394 return vp;
395 }
396 }
397 if (vbp)
398 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
399 return 0;
400 }
401
___dma_freep(m_pool_s * mp,m_addr_t m)402 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
403 {
404 m_vtob_s **vbpp, *vbp;
405 int hc = VTOB_HASH_CODE(m);
406
407 vbpp = &mp->vtob[hc];
408 while (*vbpp && (*vbpp)->vaddr != m)
409 vbpp = &(*vbpp)->next;
410 if (*vbpp) {
411 vbp = *vbpp;
412 *vbpp = (*vbpp)->next;
413 dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER,
414 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
415 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
416 --mp->nump;
417 }
418 }
419
___get_dma_pool(m_bush_t bush)420 static inline m_pool_s *___get_dma_pool(m_bush_t bush)
421 {
422 m_pool_s *mp;
423 for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next);
424 return mp;
425 }
426
___cre_dma_pool(m_bush_t bush)427 static m_pool_s *___cre_dma_pool(m_bush_t bush)
428 {
429 m_pool_s *mp;
430 mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL");
431 if (mp) {
432 memset(mp, 0, sizeof(*mp));
433 mp->bush = bush;
434 mp->getp = ___dma_getp;
435 mp->freep = ___dma_freep;
436 mp->next = mp0.next;
437 mp0.next = mp;
438 }
439 return mp;
440 }
441
___del_dma_pool(m_pool_s * p)442 static void ___del_dma_pool(m_pool_s *p)
443 {
444 struct m_pool **pp = &mp0.next;
445
446 while (*pp && *pp != p)
447 pp = &(*pp)->next;
448 if (*pp) {
449 *pp = (*pp)->next;
450 __m_free(&mp0, p, sizeof(*p), "MPOOL");
451 }
452 }
453
__m_calloc_dma(m_bush_t bush,int size,char * name)454 static void *__m_calloc_dma(m_bush_t bush, int size, char *name)
455 {
456 u_long flags;
457 struct m_pool *mp;
458 void *m = NULL;
459
460 spin_lock_irqsave(&ncr53c8xx_lock, flags);
461 mp = ___get_dma_pool(bush);
462 if (!mp)
463 mp = ___cre_dma_pool(bush);
464 if (mp)
465 m = __m_calloc(mp, size, name);
466 if (mp && !mp->nump)
467 ___del_dma_pool(mp);
468 spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
469
470 return m;
471 }
472
__m_free_dma(m_bush_t bush,void * m,int size,char * name)473 static void __m_free_dma(m_bush_t bush, void *m, int size, char *name)
474 {
475 u_long flags;
476 struct m_pool *mp;
477
478 spin_lock_irqsave(&ncr53c8xx_lock, flags);
479 mp = ___get_dma_pool(bush);
480 if (mp)
481 __m_free(mp, m, size, name);
482 if (mp && !mp->nump)
483 ___del_dma_pool(mp);
484 spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
485 }
486
__vtobus(m_bush_t bush,void * m)487 static m_addr_t __vtobus(m_bush_t bush, void *m)
488 {
489 u_long flags;
490 m_pool_s *mp;
491 int hc = VTOB_HASH_CODE(m);
492 m_vtob_s *vp = NULL;
493 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
494
495 spin_lock_irqsave(&ncr53c8xx_lock, flags);
496 mp = ___get_dma_pool(bush);
497 if (mp) {
498 vp = mp->vtob[hc];
499 while (vp && (m_addr_t) vp->vaddr != a)
500 vp = vp->next;
501 }
502 spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
503 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
504 }
505
506 #define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n)
507 #define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n)
508 #define m_calloc_dma(s, n) _m_calloc_dma(np, s, n)
509 #define m_free_dma(p, s, n) _m_free_dma(np, p, s, n)
510 #define _vtobus(np, p) __vtobus(np->dev, p)
511 #define vtobus(p) _vtobus(np, p)
512
513 /*
514 * Deal with DMA mapping/unmapping.
515 */
516
517 /* To keep track of the dma mapping (sg/single) that has been set */
518 #define __data_mapped SCp.phase
519 #define __data_mapping SCp.have_data_in
520
__unmap_scsi_data(struct device * dev,struct scsi_cmnd * cmd)521 static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd)
522 {
523 switch(cmd->__data_mapped) {
524 case 2:
525 scsi_dma_unmap(cmd);
526 break;
527 }
528 cmd->__data_mapped = 0;
529 }
530
__map_scsi_sg_data(struct device * dev,struct scsi_cmnd * cmd)531 static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd)
532 {
533 int use_sg;
534
535 use_sg = scsi_dma_map(cmd);
536 if (!use_sg)
537 return 0;
538
539 cmd->__data_mapped = 2;
540 cmd->__data_mapping = use_sg;
541
542 return use_sg;
543 }
544
545 #define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd)
546 #define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd)
547
548 /*==========================================================
549 **
550 ** Driver setup.
551 **
552 ** This structure is initialized from linux config
553 ** options. It can be overridden at boot-up by the boot
554 ** command line.
555 **
556 **==========================================================
557 */
558 static struct ncr_driver_setup
559 driver_setup = SCSI_NCR_DRIVER_SETUP;
560
561 #ifndef MODULE
562 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
563 static struct ncr_driver_setup
564 driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP;
565 #endif
566 #endif /* !MODULE */
567
568 #define initverbose (driver_setup.verbose)
569 #define bootverbose (np->verbose)
570
571
572 /*===================================================================
573 **
574 ** Driver setup from the boot command line
575 **
576 **===================================================================
577 */
578
579 #ifdef MODULE
580 #define ARG_SEP ' '
581 #else
582 #define ARG_SEP ','
583 #endif
584
585 #define OPT_TAGS 1
586 #define OPT_MASTER_PARITY 2
587 #define OPT_SCSI_PARITY 3
588 #define OPT_DISCONNECTION 4
589 #define OPT_SPECIAL_FEATURES 5
590 #define OPT_UNUSED_1 6
591 #define OPT_FORCE_SYNC_NEGO 7
592 #define OPT_REVERSE_PROBE 8
593 #define OPT_DEFAULT_SYNC 9
594 #define OPT_VERBOSE 10
595 #define OPT_DEBUG 11
596 #define OPT_BURST_MAX 12
597 #define OPT_LED_PIN 13
598 #define OPT_MAX_WIDE 14
599 #define OPT_SETTLE_DELAY 15
600 #define OPT_DIFF_SUPPORT 16
601 #define OPT_IRQM 17
602 #define OPT_PCI_FIX_UP 18
603 #define OPT_BUS_CHECK 19
604 #define OPT_OPTIMIZE 20
605 #define OPT_RECOVERY 21
606 #define OPT_SAFE_SETUP 22
607 #define OPT_USE_NVRAM 23
608 #define OPT_EXCLUDE 24
609 #define OPT_HOST_ID 25
610
611 #ifdef SCSI_NCR_IARB_SUPPORT
612 #define OPT_IARB 26
613 #endif
614
615 #ifdef MODULE
616 #define ARG_SEP ' '
617 #else
618 #define ARG_SEP ','
619 #endif
620
621 #ifndef MODULE
622 static char setup_token[] __initdata =
623 "tags:" "mpar:"
624 "spar:" "disc:"
625 "specf:" "ultra:"
626 "fsn:" "revprob:"
627 "sync:" "verb:"
628 "debug:" "burst:"
629 "led:" "wide:"
630 "settle:" "diff:"
631 "irqm:" "pcifix:"
632 "buschk:" "optim:"
633 "recovery:"
634 "safe:" "nvram:"
635 "excl:" "hostid:"
636 #ifdef SCSI_NCR_IARB_SUPPORT
637 "iarb:"
638 #endif
639 ; /* DONNOT REMOVE THIS ';' */
640
get_setup_token(char * p)641 static int __init get_setup_token(char *p)
642 {
643 char *cur = setup_token;
644 char *pc;
645 int i = 0;
646
647 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
648 ++pc;
649 ++i;
650 if (!strncmp(p, cur, pc - cur))
651 return i;
652 cur = pc;
653 }
654 return 0;
655 }
656
sym53c8xx__setup(char * str)657 static int __init sym53c8xx__setup(char *str)
658 {
659 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
660 char *cur = str;
661 char *pc, *pv;
662 int i, val, c;
663 int xi = 0;
664
665 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
666 char *pe;
667
668 val = 0;
669 pv = pc;
670 c = *++pv;
671
672 if (c == 'n')
673 val = 0;
674 else if (c == 'y')
675 val = 1;
676 else
677 val = (int) simple_strtoul(pv, &pe, 0);
678
679 switch (get_setup_token(cur)) {
680 case OPT_TAGS:
681 driver_setup.default_tags = val;
682 if (pe && *pe == '/') {
683 i = 0;
684 while (*pe && *pe != ARG_SEP &&
685 i < sizeof(driver_setup.tag_ctrl)-1) {
686 driver_setup.tag_ctrl[i++] = *pe++;
687 }
688 driver_setup.tag_ctrl[i] = '\0';
689 }
690 break;
691 case OPT_MASTER_PARITY:
692 driver_setup.master_parity = val;
693 break;
694 case OPT_SCSI_PARITY:
695 driver_setup.scsi_parity = val;
696 break;
697 case OPT_DISCONNECTION:
698 driver_setup.disconnection = val;
699 break;
700 case OPT_SPECIAL_FEATURES:
701 driver_setup.special_features = val;
702 break;
703 case OPT_FORCE_SYNC_NEGO:
704 driver_setup.force_sync_nego = val;
705 break;
706 case OPT_REVERSE_PROBE:
707 driver_setup.reverse_probe = val;
708 break;
709 case OPT_DEFAULT_SYNC:
710 driver_setup.default_sync = val;
711 break;
712 case OPT_VERBOSE:
713 driver_setup.verbose = val;
714 break;
715 case OPT_DEBUG:
716 driver_setup.debug = val;
717 break;
718 case OPT_BURST_MAX:
719 driver_setup.burst_max = val;
720 break;
721 case OPT_LED_PIN:
722 driver_setup.led_pin = val;
723 break;
724 case OPT_MAX_WIDE:
725 driver_setup.max_wide = val? 1:0;
726 break;
727 case OPT_SETTLE_DELAY:
728 driver_setup.settle_delay = val;
729 break;
730 case OPT_DIFF_SUPPORT:
731 driver_setup.diff_support = val;
732 break;
733 case OPT_IRQM:
734 driver_setup.irqm = val;
735 break;
736 case OPT_PCI_FIX_UP:
737 driver_setup.pci_fix_up = val;
738 break;
739 case OPT_BUS_CHECK:
740 driver_setup.bus_check = val;
741 break;
742 case OPT_OPTIMIZE:
743 driver_setup.optimize = val;
744 break;
745 case OPT_RECOVERY:
746 driver_setup.recovery = val;
747 break;
748 case OPT_USE_NVRAM:
749 driver_setup.use_nvram = val;
750 break;
751 case OPT_SAFE_SETUP:
752 memcpy(&driver_setup, &driver_safe_setup,
753 sizeof(driver_setup));
754 break;
755 case OPT_EXCLUDE:
756 if (xi < SCSI_NCR_MAX_EXCLUDES)
757 driver_setup.excludes[xi++] = val;
758 break;
759 case OPT_HOST_ID:
760 driver_setup.host_id = val;
761 break;
762 #ifdef SCSI_NCR_IARB_SUPPORT
763 case OPT_IARB:
764 driver_setup.iarb = val;
765 break;
766 #endif
767 default:
768 printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur);
769 break;
770 }
771
772 if ((cur = strchr(cur, ARG_SEP)) != NULL)
773 ++cur;
774 }
775 #endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
776 return 1;
777 }
778 #endif /* !MODULE */
779
780 /*===================================================================
781 **
782 ** Get device queue depth from boot command line.
783 **
784 **===================================================================
785 */
786 #define DEF_DEPTH (driver_setup.default_tags)
787 #define ALL_TARGETS -2
788 #define NO_TARGET -1
789 #define ALL_LUNS -2
790 #define NO_LUN -1
791
device_queue_depth(int unit,int target,int lun)792 static int device_queue_depth(int unit, int target, int lun)
793 {
794 int c, h, t, u, v;
795 char *p = driver_setup.tag_ctrl;
796 char *ep;
797
798 h = -1;
799 t = NO_TARGET;
800 u = NO_LUN;
801 while ((c = *p++) != 0) {
802 v = simple_strtoul(p, &ep, 0);
803 switch(c) {
804 case '/':
805 ++h;
806 t = ALL_TARGETS;
807 u = ALL_LUNS;
808 break;
809 case 't':
810 if (t != target)
811 t = (target == v) ? v : NO_TARGET;
812 u = ALL_LUNS;
813 break;
814 case 'u':
815 if (u != lun)
816 u = (lun == v) ? v : NO_LUN;
817 break;
818 case 'q':
819 if (h == unit &&
820 (t == ALL_TARGETS || t == target) &&
821 (u == ALL_LUNS || u == lun))
822 return v;
823 break;
824 case '-':
825 t = ALL_TARGETS;
826 u = ALL_LUNS;
827 break;
828 default:
829 break;
830 }
831 p = ep;
832 }
833 return DEF_DEPTH;
834 }
835
836
837 /*==========================================================
838 **
839 ** The CCB done queue uses an array of CCB virtual
840 ** addresses. Empty entries are flagged using the bogus
841 ** virtual address 0xffffffff.
842 **
843 ** Since PCI ensures that only aligned DWORDs are accessed
844 ** atomically, 64 bit little-endian architecture requires
845 ** to test the high order DWORD of the entry to determine
846 ** if it is empty or valid.
847 **
848 ** BTW, I will make things differently as soon as I will
849 ** have a better idea, but this is simple and should work.
850 **
851 **==========================================================
852 */
853
854 #define SCSI_NCR_CCB_DONE_SUPPORT
855 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
856
857 #define MAX_DONE 24
858 #define CCB_DONE_EMPTY 0xffffffffUL
859
860 /* All 32 bit architectures */
861 #if BITS_PER_LONG == 32
862 #define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY)
863
864 /* All > 32 bit (64 bit) architectures regardless endian-ness */
865 #else
866 #define CCB_DONE_VALID(cp) \
867 ((((u_long) cp) & 0xffffffff00000000ul) && \
868 (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY)
869 #endif
870
871 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
872
873 /*==========================================================
874 **
875 ** Configuration and Debugging
876 **
877 **==========================================================
878 */
879
880 /*
881 ** SCSI address of this device.
882 ** The boot routines should have set it.
883 ** If not, use this.
884 */
885
886 #ifndef SCSI_NCR_MYADDR
887 #define SCSI_NCR_MYADDR (7)
888 #endif
889
890 /*
891 ** The maximum number of tags per logic unit.
892 ** Used only for disk devices that support tags.
893 */
894
895 #ifndef SCSI_NCR_MAX_TAGS
896 #define SCSI_NCR_MAX_TAGS (8)
897 #endif
898
899 /*
900 ** TAGS are actually limited to 64 tags/lun.
901 ** We need to deal with power of 2, for alignment constraints.
902 */
903 #if SCSI_NCR_MAX_TAGS > 64
904 #define MAX_TAGS (64)
905 #else
906 #define MAX_TAGS SCSI_NCR_MAX_TAGS
907 #endif
908
909 #define NO_TAG (255)
910
911 /*
912 ** Choose appropriate type for tag bitmap.
913 */
914 #if MAX_TAGS > 32
915 typedef u64 tagmap_t;
916 #else
917 typedef u32 tagmap_t;
918 #endif
919
920 /*
921 ** Number of targets supported by the driver.
922 ** n permits target numbers 0..n-1.
923 ** Default is 16, meaning targets #0..#15.
924 ** #7 .. is myself.
925 */
926
927 #ifdef SCSI_NCR_MAX_TARGET
928 #define MAX_TARGET (SCSI_NCR_MAX_TARGET)
929 #else
930 #define MAX_TARGET (16)
931 #endif
932
933 /*
934 ** Number of logic units supported by the driver.
935 ** n enables logic unit numbers 0..n-1.
936 ** The common SCSI devices require only
937 ** one lun, so take 1 as the default.
938 */
939
940 #ifdef SCSI_NCR_MAX_LUN
941 #define MAX_LUN SCSI_NCR_MAX_LUN
942 #else
943 #define MAX_LUN (1)
944 #endif
945
946 /*
947 ** Asynchronous pre-scaler (ns). Shall be 40
948 */
949
950 #ifndef SCSI_NCR_MIN_ASYNC
951 #define SCSI_NCR_MIN_ASYNC (40)
952 #endif
953
954 /*
955 ** The maximum number of jobs scheduled for starting.
956 ** There should be one slot per target, and one slot
957 ** for each tag of each target in use.
958 ** The calculation below is actually quite silly ...
959 */
960
961 #ifdef SCSI_NCR_CAN_QUEUE
962 #define MAX_START (SCSI_NCR_CAN_QUEUE + 4)
963 #else
964 #define MAX_START (MAX_TARGET + 7 * MAX_TAGS)
965 #endif
966
967 /*
968 ** We limit the max number of pending IO to 250.
969 ** since we donnot want to allocate more than 1
970 ** PAGE for 'scripth'.
971 */
972 #if MAX_START > 250
973 #undef MAX_START
974 #define MAX_START 250
975 #endif
976
977 /*
978 ** The maximum number of segments a transfer is split into.
979 ** We support up to 127 segments for both read and write.
980 ** The data scripts are broken into 2 sub-scripts.
981 ** 80 (MAX_SCATTERL) segments are moved from a sub-script
982 ** in on-chip RAM. This makes data transfers shorter than
983 ** 80k (assuming 1k fs) as fast as possible.
984 */
985
986 #define MAX_SCATTER (SCSI_NCR_MAX_SCATTER)
987
988 #if (MAX_SCATTER > 80)
989 #define MAX_SCATTERL 80
990 #define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL)
991 #else
992 #define MAX_SCATTERL (MAX_SCATTER-1)
993 #define MAX_SCATTERH 1
994 #endif
995
996 /*
997 ** other
998 */
999
1000 #define NCR_SNOOP_TIMEOUT (1000000)
1001
1002 /*
1003 ** Other definitions
1004 */
1005
1006 #define initverbose (driver_setup.verbose)
1007 #define bootverbose (np->verbose)
1008
1009 /*==========================================================
1010 **
1011 ** Command control block states.
1012 **
1013 **==========================================================
1014 */
1015
1016 #define HS_IDLE (0)
1017 #define HS_BUSY (1)
1018 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
1019 #define HS_DISCONNECT (3) /* Disconnected by target */
1020
1021 #define HS_DONEMASK (0x80)
1022 #define HS_COMPLETE (4|HS_DONEMASK)
1023 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
1024 #define HS_RESET (6|HS_DONEMASK) /* SCSI reset */
1025 #define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */
1026 #define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */
1027 #define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */
1028 #define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */
1029
1030 /*
1031 ** Invalid host status values used by the SCRIPTS processor
1032 ** when the nexus is not fully identified.
1033 ** Shall never appear in a CCB.
1034 */
1035
1036 #define HS_INVALMASK (0x40)
1037 #define HS_SELECTING (0|HS_INVALMASK)
1038 #define HS_IN_RESELECT (1|HS_INVALMASK)
1039 #define HS_STARTING (2|HS_INVALMASK)
1040
1041 /*
1042 ** Flags set by the SCRIPT processor for commands
1043 ** that have been skipped.
1044 */
1045 #define HS_SKIPMASK (0x20)
1046
1047 /*==========================================================
1048 **
1049 ** Software Interrupt Codes
1050 **
1051 **==========================================================
1052 */
1053
1054 #define SIR_BAD_STATUS (1)
1055 #define SIR_XXXXXXXXXX (2)
1056 #define SIR_NEGO_SYNC (3)
1057 #define SIR_NEGO_WIDE (4)
1058 #define SIR_NEGO_FAILED (5)
1059 #define SIR_NEGO_PROTO (6)
1060 #define SIR_REJECT_RECEIVED (7)
1061 #define SIR_REJECT_SENT (8)
1062 #define SIR_IGN_RESIDUE (9)
1063 #define SIR_MISSING_SAVE (10)
1064 #define SIR_RESEL_NO_MSG_IN (11)
1065 #define SIR_RESEL_NO_IDENTIFY (12)
1066 #define SIR_RESEL_BAD_LUN (13)
1067 #define SIR_RESEL_BAD_TARGET (14)
1068 #define SIR_RESEL_BAD_I_T_L (15)
1069 #define SIR_RESEL_BAD_I_T_L_Q (16)
1070 #define SIR_DONE_OVERFLOW (17)
1071 #define SIR_INTFLY (18)
1072 #define SIR_MAX (18)
1073
1074 /*==========================================================
1075 **
1076 ** Extended error codes.
1077 ** xerr_status field of struct ccb.
1078 **
1079 **==========================================================
1080 */
1081
1082 #define XE_OK (0)
1083 #define XE_EXTRA_DATA (1) /* unexpected data phase */
1084 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
1085
1086 /*==========================================================
1087 **
1088 ** Negotiation status.
1089 ** nego_status field of struct ccb.
1090 **
1091 **==========================================================
1092 */
1093
1094 #define NS_NOCHANGE (0)
1095 #define NS_SYNC (1)
1096 #define NS_WIDE (2)
1097 #define NS_PPR (4)
1098
1099 /*==========================================================
1100 **
1101 ** Misc.
1102 **
1103 **==========================================================
1104 */
1105
1106 #define CCB_MAGIC (0xf2691ad2)
1107
1108 /*==========================================================
1109 **
1110 ** Declaration of structs.
1111 **
1112 **==========================================================
1113 */
1114
1115 static struct scsi_transport_template *ncr53c8xx_transport_template = NULL;
1116
1117 struct tcb;
1118 struct lcb;
1119 struct ccb;
1120 struct ncb;
1121 struct script;
1122
1123 struct link {
1124 ncrcmd l_cmd;
1125 ncrcmd l_paddr;
1126 };
1127
1128 struct usrcmd {
1129 u_long target;
1130 u_long lun;
1131 u_long data;
1132 u_long cmd;
1133 };
1134
1135 #define UC_SETSYNC 10
1136 #define UC_SETTAGS 11
1137 #define UC_SETDEBUG 12
1138 #define UC_SETORDER 13
1139 #define UC_SETWIDE 14
1140 #define UC_SETFLAG 15
1141 #define UC_SETVERBOSE 17
1142
1143 #define UF_TRACE (0x01)
1144 #define UF_NODISC (0x02)
1145 #define UF_NOSCAN (0x04)
1146
1147 /*========================================================================
1148 **
1149 ** Declaration of structs: target control block
1150 **
1151 **========================================================================
1152 */
1153 struct tcb {
1154 /*----------------------------------------------------------------
1155 ** During reselection the ncr jumps to this point with SFBR
1156 ** set to the encoded target number with bit 7 set.
1157 ** if it's not this target, jump to the next.
1158 **
1159 ** JUMP IF (SFBR != #target#), @(next tcb)
1160 **----------------------------------------------------------------
1161 */
1162 struct link jump_tcb;
1163
1164 /*----------------------------------------------------------------
1165 ** Load the actual values for the sxfer and the scntl3
1166 ** register (sync/wide mode).
1167 **
1168 ** SCR_COPY (1), @(sval field of this tcb), @(sxfer register)
1169 ** SCR_COPY (1), @(wval field of this tcb), @(scntl3 register)
1170 **----------------------------------------------------------------
1171 */
1172 ncrcmd getscr[6];
1173
1174 /*----------------------------------------------------------------
1175 ** Get the IDENTIFY message and load the LUN to SFBR.
1176 **
1177 ** CALL, <RESEL_LUN>
1178 **----------------------------------------------------------------
1179 */
1180 struct link call_lun;
1181
1182 /*----------------------------------------------------------------
1183 ** Now look for the right lun.
1184 **
1185 ** For i = 0 to 3
1186 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i)
1187 **
1188 ** Recent chips will prefetch the 4 JUMPS using only 1 burst.
1189 ** It is kind of hashcoding.
1190 **----------------------------------------------------------------
1191 */
1192 struct link jump_lcb[4]; /* JUMPs for reselection */
1193 struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */
1194
1195 /*----------------------------------------------------------------
1196 ** Pointer to the ccb used for negotiation.
1197 ** Prevent from starting a negotiation for all queued commands
1198 ** when tagged command queuing is enabled.
1199 **----------------------------------------------------------------
1200 */
1201 struct ccb * nego_cp;
1202
1203 /*----------------------------------------------------------------
1204 ** statistical data
1205 **----------------------------------------------------------------
1206 */
1207 u_long transfers;
1208 u_long bytes;
1209
1210 /*----------------------------------------------------------------
1211 ** negotiation of wide and synch transfer and device quirks.
1212 **----------------------------------------------------------------
1213 */
1214 #ifdef SCSI_NCR_BIG_ENDIAN
1215 /*0*/ u16 period;
1216 /*2*/ u_char sval;
1217 /*3*/ u_char minsync;
1218 /*0*/ u_char wval;
1219 /*1*/ u_char widedone;
1220 /*2*/ u_char quirks;
1221 /*3*/ u_char maxoffs;
1222 #else
1223 /*0*/ u_char minsync;
1224 /*1*/ u_char sval;
1225 /*2*/ u16 period;
1226 /*0*/ u_char maxoffs;
1227 /*1*/ u_char quirks;
1228 /*2*/ u_char widedone;
1229 /*3*/ u_char wval;
1230 #endif
1231
1232 /* User settable limits and options. */
1233 u_char usrsync;
1234 u_char usrwide;
1235 u_char usrtags;
1236 u_char usrflag;
1237 struct scsi_target *starget;
1238 };
1239
1240 /*========================================================================
1241 **
1242 ** Declaration of structs: lun control block
1243 **
1244 **========================================================================
1245 */
1246 struct lcb {
1247 /*----------------------------------------------------------------
1248 ** During reselection the ncr jumps to this point
1249 ** with SFBR set to the "Identify" message.
1250 ** if it's not this lun, jump to the next.
1251 **
1252 ** JUMP IF (SFBR != #lun#), @(next lcb of this target)
1253 **
1254 ** It is this lun. Load TEMP with the nexus jumps table
1255 ** address and jump to RESEL_TAG (or RESEL_NOTAG).
1256 **
1257 ** SCR_COPY (4), p_jump_ccb, TEMP,
1258 ** SCR_JUMP, <RESEL_TAG>
1259 **----------------------------------------------------------------
1260 */
1261 struct link jump_lcb;
1262 ncrcmd load_jump_ccb[3];
1263 struct link jump_tag;
1264 ncrcmd p_jump_ccb; /* Jump table bus address */
1265
1266 /*----------------------------------------------------------------
1267 ** Jump table used by the script processor to directly jump
1268 ** to the CCB corresponding to the reselected nexus.
1269 ** Address is allocated on 256 bytes boundary in order to
1270 ** allow 8 bit calculation of the tag jump entry for up to
1271 ** 64 possible tags.
1272 **----------------------------------------------------------------
1273 */
1274 u32 jump_ccb_0; /* Default table if no tags */
1275 u32 *jump_ccb; /* Virtual address */
1276
1277 /*----------------------------------------------------------------
1278 ** CCB queue management.
1279 **----------------------------------------------------------------
1280 */
1281 struct list_head free_ccbq; /* Queue of available CCBs */
1282 struct list_head busy_ccbq; /* Queue of busy CCBs */
1283 struct list_head wait_ccbq; /* Queue of waiting for IO CCBs */
1284 struct list_head skip_ccbq; /* Queue of skipped CCBs */
1285 u_char actccbs; /* Number of allocated CCBs */
1286 u_char busyccbs; /* CCBs busy for this lun */
1287 u_char queuedccbs; /* CCBs queued to the controller*/
1288 u_char queuedepth; /* Queue depth for this lun */
1289 u_char scdev_depth; /* SCSI device queue depth */
1290 u_char maxnxs; /* Max possible nexuses */
1291
1292 /*----------------------------------------------------------------
1293 ** Control of tagged command queuing.
1294 ** Tags allocation is performed using a circular buffer.
1295 ** This avoids using a loop for tag allocation.
1296 **----------------------------------------------------------------
1297 */
1298 u_char ia_tag; /* Allocation index */
1299 u_char if_tag; /* Freeing index */
1300 u_char cb_tags[MAX_TAGS]; /* Circular tags buffer */
1301 u_char usetags; /* Command queuing is active */
1302 u_char maxtags; /* Max nr of tags asked by user */
1303 u_char numtags; /* Current number of tags */
1304
1305 /*----------------------------------------------------------------
1306 ** QUEUE FULL control and ORDERED tag control.
1307 **----------------------------------------------------------------
1308 */
1309 /*----------------------------------------------------------------
1310 ** QUEUE FULL and ORDERED tag control.
1311 **----------------------------------------------------------------
1312 */
1313 u16 num_good; /* Nr of GOOD since QUEUE FULL */
1314 tagmap_t tags_umap; /* Used tags bitmap */
1315 tagmap_t tags_smap; /* Tags in use at 'tag_stime' */
1316 u_long tags_stime; /* Last time we set smap=umap */
1317 struct ccb * held_ccb; /* CCB held for QUEUE FULL */
1318 };
1319
1320 /*========================================================================
1321 **
1322 ** Declaration of structs: the launch script.
1323 **
1324 **========================================================================
1325 **
1326 ** It is part of the CCB and is called by the scripts processor to
1327 ** start or restart the data structure (nexus).
1328 ** This 6 DWORDs mini script makes use of prefetching.
1329 **
1330 **------------------------------------------------------------------------
1331 */
1332 struct launch {
1333 /*----------------------------------------------------------------
1334 ** SCR_COPY(4), @(p_phys), @(dsa register)
1335 ** SCR_JUMP, @(scheduler_point)
1336 **----------------------------------------------------------------
1337 */
1338 ncrcmd setup_dsa[3]; /* Copy 'phys' address to dsa */
1339 struct link schedule; /* Jump to scheduler point */
1340 ncrcmd p_phys; /* 'phys' header bus address */
1341 };
1342
1343 /*========================================================================
1344 **
1345 ** Declaration of structs: global HEADER.
1346 **
1347 **========================================================================
1348 **
1349 ** This substructure is copied from the ccb to a global address after
1350 ** selection (or reselection) and copied back before disconnect.
1351 **
1352 ** These fields are accessible to the script processor.
1353 **
1354 **------------------------------------------------------------------------
1355 */
1356
1357 struct head {
1358 /*----------------------------------------------------------------
1359 ** Saved data pointer.
1360 ** Points to the position in the script responsible for the
1361 ** actual transfer transfer of data.
1362 ** It's written after reception of a SAVE_DATA_POINTER message.
1363 ** The goalpointer points after the last transfer command.
1364 **----------------------------------------------------------------
1365 */
1366 u32 savep;
1367 u32 lastp;
1368 u32 goalp;
1369
1370 /*----------------------------------------------------------------
1371 ** Alternate data pointer.
1372 ** They are copied back to savep/lastp/goalp by the SCRIPTS
1373 ** when the direction is unknown and the device claims data out.
1374 **----------------------------------------------------------------
1375 */
1376 u32 wlastp;
1377 u32 wgoalp;
1378
1379 /*----------------------------------------------------------------
1380 ** The virtual address of the ccb containing this header.
1381 **----------------------------------------------------------------
1382 */
1383 struct ccb * cp;
1384
1385 /*----------------------------------------------------------------
1386 ** Status fields.
1387 **----------------------------------------------------------------
1388 */
1389 u_char scr_st[4]; /* script status */
1390 u_char status[4]; /* host status. must be the */
1391 /* last DWORD of the header. */
1392 };
1393
1394 /*
1395 ** The status bytes are used by the host and the script processor.
1396 **
1397 ** The byte corresponding to the host_status must be stored in the
1398 ** last DWORD of the CCB header since it is used for command
1399 ** completion (ncr_wakeup()). Doing so, we are sure that the header
1400 ** has been entirely copied back to the CCB when the host_status is
1401 ** seen complete by the CPU.
1402 **
1403 ** The last four bytes (status[4]) are copied to the scratchb register
1404 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
1405 ** and copied back just after disconnecting.
1406 ** Inside the script the XX_REG are used.
1407 **
1408 ** The first four bytes (scr_st[4]) are used inside the script by
1409 ** "COPY" commands.
1410 ** Because source and destination must have the same alignment
1411 ** in a DWORD, the fields HAVE to be at the chosen offsets.
1412 ** xerr_st 0 (0x34) scratcha
1413 ** sync_st 1 (0x05) sxfer
1414 ** wide_st 3 (0x03) scntl3
1415 */
1416
1417 /*
1418 ** Last four bytes (script)
1419 */
1420 #define QU_REG scr0
1421 #define HS_REG scr1
1422 #define HS_PRT nc_scr1
1423 #define SS_REG scr2
1424 #define SS_PRT nc_scr2
1425 #define PS_REG scr3
1426
1427 /*
1428 ** Last four bytes (host)
1429 */
1430 #ifdef SCSI_NCR_BIG_ENDIAN
1431 #define actualquirks phys.header.status[3]
1432 #define host_status phys.header.status[2]
1433 #define scsi_status phys.header.status[1]
1434 #define parity_status phys.header.status[0]
1435 #else
1436 #define actualquirks phys.header.status[0]
1437 #define host_status phys.header.status[1]
1438 #define scsi_status phys.header.status[2]
1439 #define parity_status phys.header.status[3]
1440 #endif
1441
1442 /*
1443 ** First four bytes (script)
1444 */
1445 #define xerr_st header.scr_st[0]
1446 #define sync_st header.scr_st[1]
1447 #define nego_st header.scr_st[2]
1448 #define wide_st header.scr_st[3]
1449
1450 /*
1451 ** First four bytes (host)
1452 */
1453 #define xerr_status phys.xerr_st
1454 #define nego_status phys.nego_st
1455
1456 #if 0
1457 #define sync_status phys.sync_st
1458 #define wide_status phys.wide_st
1459 #endif
1460
1461 /*==========================================================
1462 **
1463 ** Declaration of structs: Data structure block
1464 **
1465 **==========================================================
1466 **
1467 ** During execution of a ccb by the script processor,
1468 ** the DSA (data structure address) register points
1469 ** to this substructure of the ccb.
1470 ** This substructure contains the header with
1471 ** the script-processor-changeable data and
1472 ** data blocks for the indirect move commands.
1473 **
1474 **----------------------------------------------------------
1475 */
1476
1477 struct dsb {
1478
1479 /*
1480 ** Header.
1481 */
1482
1483 struct head header;
1484
1485 /*
1486 ** Table data for Script
1487 */
1488
1489 struct scr_tblsel select;
1490 struct scr_tblmove smsg ;
1491 struct scr_tblmove cmd ;
1492 struct scr_tblmove sense ;
1493 struct scr_tblmove data[MAX_SCATTER];
1494 };
1495
1496
1497 /*========================================================================
1498 **
1499 ** Declaration of structs: Command control block.
1500 **
1501 **========================================================================
1502 */
1503 struct ccb {
1504 /*----------------------------------------------------------------
1505 ** This is the data structure which is pointed by the DSA
1506 ** register when it is executed by the script processor.
1507 ** It must be the first entry because it contains the header
1508 ** as first entry that must be cache line aligned.
1509 **----------------------------------------------------------------
1510 */
1511 struct dsb phys;
1512
1513 /*----------------------------------------------------------------
1514 ** Mini-script used at CCB execution start-up.
1515 ** Load the DSA with the data structure address (phys) and
1516 ** jump to SELECT. Jump to CANCEL if CCB is to be canceled.
1517 **----------------------------------------------------------------
1518 */
1519 struct launch start;
1520
1521 /*----------------------------------------------------------------
1522 ** Mini-script used at CCB relection to restart the nexus.
1523 ** Load the DSA with the data structure address (phys) and
1524 ** jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted.
1525 **----------------------------------------------------------------
1526 */
1527 struct launch restart;
1528
1529 /*----------------------------------------------------------------
1530 ** If a data transfer phase is terminated too early
1531 ** (after reception of a message (i.e. DISCONNECT)),
1532 ** we have to prepare a mini script to transfer
1533 ** the rest of the data.
1534 **----------------------------------------------------------------
1535 */
1536 ncrcmd patch[8];
1537
1538 /*----------------------------------------------------------------
1539 ** The general SCSI driver provides a
1540 ** pointer to a control block.
1541 **----------------------------------------------------------------
1542 */
1543 struct scsi_cmnd *cmd; /* SCSI command */
1544 u_char cdb_buf[16]; /* Copy of CDB */
1545 u_char sense_buf[64];
1546 int data_len; /* Total data length */
1547
1548 /*----------------------------------------------------------------
1549 ** Message areas.
1550 ** We prepare a message to be sent after selection.
1551 ** We may use a second one if the command is rescheduled
1552 ** due to GETCC or QFULL.
1553 ** Contents are IDENTIFY and SIMPLE_TAG.
1554 ** While negotiating sync or wide transfer,
1555 ** a SDTR or WDTR message is appended.
1556 **----------------------------------------------------------------
1557 */
1558 u_char scsi_smsg [8];
1559 u_char scsi_smsg2[8];
1560
1561 /*----------------------------------------------------------------
1562 ** Other fields.
1563 **----------------------------------------------------------------
1564 */
1565 u_long p_ccb; /* BUS address of this CCB */
1566 u_char sensecmd[6]; /* Sense command */
1567 u_char tag; /* Tag for this transfer */
1568 /* 255 means no tag */
1569 u_char target;
1570 u_char lun;
1571 u_char queued;
1572 u_char auto_sense;
1573 struct ccb * link_ccb; /* Host adapter CCB chain */
1574 struct list_head link_ccbq; /* Link to unit CCB queue */
1575 u32 startp; /* Initial data pointer */
1576 u_long magic; /* Free / busy CCB flag */
1577 };
1578
1579 #define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl))
1580
1581
1582 /*========================================================================
1583 **
1584 ** Declaration of structs: NCR device descriptor
1585 **
1586 **========================================================================
1587 */
1588 struct ncb {
1589 /*----------------------------------------------------------------
1590 ** The global header.
1591 ** It is accessible to both the host and the script processor.
1592 ** Must be cache line size aligned (32 for x86) in order to
1593 ** allow cache line bursting when it is copied to/from CCB.
1594 **----------------------------------------------------------------
1595 */
1596 struct head header;
1597
1598 /*----------------------------------------------------------------
1599 ** CCBs management queues.
1600 **----------------------------------------------------------------
1601 */
1602 struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */
1603 /* when lcb is not allocated. */
1604 struct scsi_cmnd *done_list; /* Commands waiting for done() */
1605 /* callback to be invoked. */
1606 spinlock_t smp_lock; /* Lock for SMP threading */
1607
1608 /*----------------------------------------------------------------
1609 ** Chip and controller identification.
1610 **----------------------------------------------------------------
1611 */
1612 int unit; /* Unit number */
1613 char inst_name[16]; /* ncb instance name */
1614
1615 /*----------------------------------------------------------------
1616 ** Initial value of some IO register bits.
1617 ** These values are assumed to have been set by BIOS, and may
1618 ** be used for probing adapter implementation differences.
1619 **----------------------------------------------------------------
1620 */
1621 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3,
1622 sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4;
1623
1624 /*----------------------------------------------------------------
1625 ** Actual initial value of IO register bits used by the
1626 ** driver. They are loaded at initialisation according to
1627 ** features that are to be enabled.
1628 **----------------------------------------------------------------
1629 */
1630 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3,
1631 rv_ctest4, rv_ctest5, rv_stest2;
1632
1633 /*----------------------------------------------------------------
1634 ** Targets management.
1635 ** During reselection the ncr jumps to jump_tcb.
1636 ** The SFBR register is loaded with the encoded target id.
1637 ** For i = 0 to 3
1638 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i)
1639 **
1640 ** Recent chips will prefetch the 4 JUMPS using only 1 burst.
1641 ** It is kind of hashcoding.
1642 **----------------------------------------------------------------
1643 */
1644 struct link jump_tcb[4]; /* JUMPs for reselection */
1645 struct tcb target[MAX_TARGET]; /* Target data */
1646
1647 /*----------------------------------------------------------------
1648 ** Virtual and physical bus addresses of the chip.
1649 **----------------------------------------------------------------
1650 */
1651 void __iomem *vaddr; /* Virtual and bus address of */
1652 unsigned long paddr; /* chip's IO registers. */
1653 unsigned long paddr2; /* On-chip RAM bus address. */
1654 volatile /* Pointer to volatile for */
1655 struct ncr_reg __iomem *reg; /* memory mapped IO. */
1656
1657 /*----------------------------------------------------------------
1658 ** SCRIPTS virtual and physical bus addresses.
1659 ** 'script' is loaded in the on-chip RAM if present.
1660 ** 'scripth' stays in main memory.
1661 **----------------------------------------------------------------
1662 */
1663 struct script *script0; /* Copies of script and scripth */
1664 struct scripth *scripth0; /* relocated for this ncb. */
1665 struct scripth *scripth; /* Actual scripth virt. address */
1666 u_long p_script; /* Actual script and scripth */
1667 u_long p_scripth; /* bus addresses. */
1668
1669 /*----------------------------------------------------------------
1670 ** General controller parameters and configuration.
1671 **----------------------------------------------------------------
1672 */
1673 struct device *dev;
1674 u_char revision_id; /* PCI device revision id */
1675 u32 irq; /* IRQ level */
1676 u32 features; /* Chip features map */
1677 u_char myaddr; /* SCSI id of the adapter */
1678 u_char maxburst; /* log base 2 of dwords burst */
1679 u_char maxwide; /* Maximum transfer width */
1680 u_char minsync; /* Minimum sync period factor */
1681 u_char maxsync; /* Maximum sync period factor */
1682 u_char maxoffs; /* Max scsi offset */
1683 u_char multiplier; /* Clock multiplier (1,2,4) */
1684 u_char clock_divn; /* Number of clock divisors */
1685 u_long clock_khz; /* SCSI clock frequency in KHz */
1686
1687 /*----------------------------------------------------------------
1688 ** Start queue management.
1689 ** It is filled up by the host processor and accessed by the
1690 ** SCRIPTS processor in order to start SCSI commands.
1691 **----------------------------------------------------------------
1692 */
1693 u16 squeueput; /* Next free slot of the queue */
1694 u16 actccbs; /* Number of allocated CCBs */
1695 u16 queuedccbs; /* Number of CCBs in start queue*/
1696 u16 queuedepth; /* Start queue depth */
1697
1698 /*----------------------------------------------------------------
1699 ** Timeout handler.
1700 **----------------------------------------------------------------
1701 */
1702 struct timer_list timer; /* Timer handler link header */
1703 u_long lasttime;
1704 u_long settle_time; /* Resetting the SCSI BUS */
1705
1706 /*----------------------------------------------------------------
1707 ** Debugging and profiling.
1708 **----------------------------------------------------------------
1709 */
1710 struct ncr_reg regdump; /* Register dump */
1711 u_long regtime; /* Time it has been done */
1712
1713 /*----------------------------------------------------------------
1714 ** Miscellaneous buffers accessed by the scripts-processor.
1715 ** They shall be DWORD aligned, because they may be read or
1716 ** written with a SCR_COPY script command.
1717 **----------------------------------------------------------------
1718 */
1719 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1720 u_char msgin [8]; /* Buffer for MESSAGE IN */
1721 u32 lastmsg; /* Last SCSI message sent */
1722 u_char scratch; /* Scratch for SCSI receive */
1723
1724 /*----------------------------------------------------------------
1725 ** Miscellaneous configuration and status parameters.
1726 **----------------------------------------------------------------
1727 */
1728 u_char disc; /* Disconnection allowed */
1729 u_char scsi_mode; /* Current SCSI BUS mode */
1730 u_char order; /* Tag order to use */
1731 u_char verbose; /* Verbosity for this controller*/
1732 int ncr_cache; /* Used for cache test at init. */
1733 u_long p_ncb; /* BUS address of this NCB */
1734
1735 /*----------------------------------------------------------------
1736 ** Command completion handling.
1737 **----------------------------------------------------------------
1738 */
1739 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
1740 struct ccb *(ccb_done[MAX_DONE]);
1741 int ccb_done_ic;
1742 #endif
1743 /*----------------------------------------------------------------
1744 ** Fields that should be removed or changed.
1745 **----------------------------------------------------------------
1746 */
1747 struct ccb *ccb; /* Global CCB */
1748 struct usrcmd user; /* Command from user */
1749 volatile u_char release_stage; /* Synchronisation stage on release */
1750 };
1751
1752 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1753 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1754
1755 /*==========================================================
1756 **
1757 **
1758 ** Script for NCR-Processor.
1759 **
1760 ** Use ncr_script_fill() to create the variable parts.
1761 ** Use ncr_script_copy_and_bind() to make a copy and
1762 ** bind to physical addresses.
1763 **
1764 **
1765 **==========================================================
1766 **
1767 ** We have to know the offsets of all labels before
1768 ** we reach them (for forward jumps).
1769 ** Therefore we declare a struct here.
1770 ** If you make changes inside the script,
1771 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
1772 **
1773 **----------------------------------------------------------
1774 */
1775
1776 /*
1777 ** For HP Zalon/53c720 systems, the Zalon interface
1778 ** between CPU and 53c720 does prefetches, which causes
1779 ** problems with self modifying scripts. The problem
1780 ** is overcome by calling a dummy subroutine after each
1781 ** modification, to force a refetch of the script on
1782 ** return from the subroutine.
1783 */
1784
1785 #ifdef CONFIG_NCR53C8XX_PREFETCH
1786 #define PREFETCH_FLUSH_CNT 2
1787 #define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma),
1788 #else
1789 #define PREFETCH_FLUSH_CNT 0
1790 #define PREFETCH_FLUSH
1791 #endif
1792
1793 /*
1794 ** Script fragments which are loaded into the on-chip RAM
1795 ** of 825A, 875 and 895 chips.
1796 */
1797 struct script {
1798 ncrcmd start [ 5];
1799 ncrcmd startpos [ 1];
1800 ncrcmd select [ 6];
1801 ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT];
1802 ncrcmd loadpos [ 4];
1803 ncrcmd send_ident [ 9];
1804 ncrcmd prepare [ 6];
1805 ncrcmd prepare2 [ 7];
1806 ncrcmd command [ 6];
1807 ncrcmd dispatch [ 32];
1808 ncrcmd clrack [ 4];
1809 ncrcmd no_data [ 17];
1810 ncrcmd status [ 8];
1811 ncrcmd msg_in [ 2];
1812 ncrcmd msg_in2 [ 16];
1813 ncrcmd msg_bad [ 4];
1814 ncrcmd setmsg [ 7];
1815 ncrcmd cleanup [ 6];
1816 ncrcmd complete [ 9];
1817 ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT];
1818 ncrcmd cleanup0 [ 1];
1819 #ifndef SCSI_NCR_CCB_DONE_SUPPORT
1820 ncrcmd signal [ 12];
1821 #else
1822 ncrcmd signal [ 9];
1823 ncrcmd done_pos [ 1];
1824 ncrcmd done_plug [ 2];
1825 ncrcmd done_end [ 7];
1826 #endif
1827 ncrcmd save_dp [ 7];
1828 ncrcmd restore_dp [ 5];
1829 ncrcmd disconnect [ 10];
1830 ncrcmd msg_out [ 9];
1831 ncrcmd msg_out_done [ 7];
1832 ncrcmd idle [ 2];
1833 ncrcmd reselect [ 8];
1834 ncrcmd reselected [ 8];
1835 ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT];
1836 ncrcmd loadpos1 [ 4];
1837 ncrcmd resel_lun [ 6];
1838 ncrcmd resel_tag [ 6];
1839 ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT];
1840 ncrcmd nexus_indirect [ 4];
1841 ncrcmd resel_notag [ 4];
1842 ncrcmd data_in [MAX_SCATTERL * 4];
1843 ncrcmd data_in2 [ 4];
1844 ncrcmd data_out [MAX_SCATTERL * 4];
1845 ncrcmd data_out2 [ 4];
1846 };
1847
1848 /*
1849 ** Script fragments which stay in main memory for all chips.
1850 */
1851 struct scripth {
1852 ncrcmd tryloop [MAX_START*2];
1853 ncrcmd tryloop2 [ 2];
1854 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
1855 ncrcmd done_queue [MAX_DONE*5];
1856 ncrcmd done_queue2 [ 2];
1857 #endif
1858 ncrcmd select_no_atn [ 8];
1859 ncrcmd cancel [ 4];
1860 ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT];
1861 ncrcmd skip2 [ 19];
1862 ncrcmd par_err_data_in [ 6];
1863 ncrcmd par_err_other [ 4];
1864 ncrcmd msg_reject [ 8];
1865 ncrcmd msg_ign_residue [ 24];
1866 ncrcmd msg_extended [ 10];
1867 ncrcmd msg_ext_2 [ 10];
1868 ncrcmd msg_wdtr [ 14];
1869 ncrcmd send_wdtr [ 7];
1870 ncrcmd msg_ext_3 [ 10];
1871 ncrcmd msg_sdtr [ 14];
1872 ncrcmd send_sdtr [ 7];
1873 ncrcmd nego_bad_phase [ 4];
1874 ncrcmd msg_out_abort [ 10];
1875 ncrcmd hdata_in [MAX_SCATTERH * 4];
1876 ncrcmd hdata_in2 [ 2];
1877 ncrcmd hdata_out [MAX_SCATTERH * 4];
1878 ncrcmd hdata_out2 [ 2];
1879 ncrcmd reset [ 4];
1880 ncrcmd aborttag [ 4];
1881 ncrcmd abort [ 2];
1882 ncrcmd abort_resel [ 20];
1883 ncrcmd resend_ident [ 4];
1884 ncrcmd clratn_go_on [ 3];
1885 ncrcmd nxtdsp_go_on [ 1];
1886 ncrcmd sdata_in [ 8];
1887 ncrcmd data_io [ 18];
1888 ncrcmd bad_identify [ 12];
1889 ncrcmd bad_i_t_l [ 4];
1890 ncrcmd bad_i_t_l_q [ 4];
1891 ncrcmd bad_target [ 8];
1892 ncrcmd bad_status [ 8];
1893 ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT];
1894 ncrcmd start_ram0 [ 4];
1895 ncrcmd sto_restart [ 5];
1896 ncrcmd wait_dma [ 2];
1897 ncrcmd snooptest [ 9];
1898 ncrcmd snoopend [ 2];
1899 };
1900
1901 /*==========================================================
1902 **
1903 **
1904 ** Function headers.
1905 **
1906 **
1907 **==========================================================
1908 */
1909
1910 static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln);
1911 static void ncr_complete (struct ncb *np, struct ccb *cp);
1912 static void ncr_exception (struct ncb *np);
1913 static void ncr_free_ccb (struct ncb *np, struct ccb *cp);
1914 static void ncr_init_ccb (struct ncb *np, struct ccb *cp);
1915 static void ncr_init_tcb (struct ncb *np, u_char tn);
1916 static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln);
1917 static struct lcb * ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev);
1918 static void ncr_getclock (struct ncb *np, int mult);
1919 static void ncr_selectclock (struct ncb *np, u_char scntl3);
1920 static struct ccb *ncr_get_ccb (struct ncb *np, struct scsi_cmnd *cmd);
1921 static void ncr_chip_reset (struct ncb *np, int delay);
1922 static void ncr_init (struct ncb *np, int reset, char * msg, u_long code);
1923 static int ncr_int_sbmc (struct ncb *np);
1924 static int ncr_int_par (struct ncb *np);
1925 static void ncr_int_ma (struct ncb *np);
1926 static void ncr_int_sir (struct ncb *np);
1927 static void ncr_int_sto (struct ncb *np);
1928 static void ncr_negotiate (struct ncb* np, struct tcb* tp);
1929 static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr);
1930
1931 static void ncr_script_copy_and_bind
1932 (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len);
1933 static void ncr_script_fill (struct script * scr, struct scripth * scripth);
1934 static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd);
1935 static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p);
1936 static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer);
1937 static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev);
1938 static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack);
1939 static int ncr_snooptest (struct ncb *np);
1940 static void ncr_timeout (struct ncb *np);
1941 static void ncr_wakeup (struct ncb *np, u_long code);
1942 static void ncr_wakeup_done (struct ncb *np);
1943 static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn);
1944 static void ncr_put_start_queue(struct ncb *np, struct ccb *cp);
1945
1946 static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd);
1947 static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd);
1948 static void process_waiting_list(struct ncb *np, int sts);
1949
1950 #define remove_from_waiting_list(np, cmd) \
1951 retrieve_from_waiting_list(1, (np), (cmd))
1952 #define requeue_waiting_list(np) process_waiting_list((np), DID_OK)
1953 #define reset_waiting_list(np) process_waiting_list((np), DID_RESET)
1954
ncr_name(struct ncb * np)1955 static inline char *ncr_name (struct ncb *np)
1956 {
1957 return np->inst_name;
1958 }
1959
1960
1961 /*==========================================================
1962 **
1963 **
1964 ** Scripts for NCR-Processor.
1965 **
1966 ** Use ncr_script_bind for binding to physical addresses.
1967 **
1968 **
1969 **==========================================================
1970 **
1971 ** NADDR generates a reference to a field of the controller data.
1972 ** PADDR generates a reference to another part of the script.
1973 ** RADDR generates a reference to a script processor register.
1974 ** FADDR generates a reference to a script processor register
1975 ** with offset.
1976 **
1977 **----------------------------------------------------------
1978 */
1979
1980 #define RELOC_SOFTC 0x40000000
1981 #define RELOC_LABEL 0x50000000
1982 #define RELOC_REGISTER 0x60000000
1983 #if 0
1984 #define RELOC_KVAR 0x70000000
1985 #endif
1986 #define RELOC_LABELH 0x80000000
1987 #define RELOC_MASK 0xf0000000
1988
1989 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1990 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1991 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1992 #define RADDR(label) (RELOC_REGISTER | REG(label))
1993 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1994 #if 0
1995 #define KVAR(which) (RELOC_KVAR | (which))
1996 #endif
1997
1998 #if 0
1999 #define SCRIPT_KVAR_JIFFIES (0)
2000 #define SCRIPT_KVAR_FIRST SCRIPT_KVAR_JIFFIES
2001 #define SCRIPT_KVAR_LAST SCRIPT_KVAR_JIFFIES
2002 /*
2003 * Kernel variables referenced in the scripts.
2004 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
2005 */
2006 static void *script_kvars[] __initdata =
2007 { (void *)&jiffies };
2008 #endif
2009
2010 static struct script script0 __initdata = {
2011 /*--------------------------< START >-----------------------*/ {
2012 /*
2013 ** This NOP will be patched with LED ON
2014 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2015 */
2016 SCR_NO_OP,
2017 0,
2018 /*
2019 ** Clear SIGP.
2020 */
2021 SCR_FROM_REG (ctest2),
2022 0,
2023 /*
2024 ** Then jump to a certain point in tryloop.
2025 ** Due to the lack of indirect addressing the code
2026 ** is self modifying here.
2027 */
2028 SCR_JUMP,
2029 }/*-------------------------< STARTPOS >--------------------*/,{
2030 PADDRH(tryloop),
2031
2032 }/*-------------------------< SELECT >----------------------*/,{
2033 /*
2034 ** DSA contains the address of a scheduled
2035 ** data structure.
2036 **
2037 ** SCRATCHA contains the address of the script,
2038 ** which starts the next entry.
2039 **
2040 ** Set Initiator mode.
2041 **
2042 ** (Target mode is left as an exercise for the reader)
2043 */
2044
2045 SCR_CLR (SCR_TRG),
2046 0,
2047 SCR_LOAD_REG (HS_REG, HS_SELECTING),
2048 0,
2049
2050 /*
2051 ** And try to select this target.
2052 */
2053 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2054 PADDR (reselect),
2055
2056 }/*-------------------------< SELECT2 >----------------------*/,{
2057 /*
2058 ** Now there are 4 possibilities:
2059 **
2060 ** (1) The ncr loses arbitration.
2061 ** This is ok, because it will try again,
2062 ** when the bus becomes idle.
2063 ** (But beware of the timeout function!)
2064 **
2065 ** (2) The ncr is reselected.
2066 ** Then the script processor takes the jump
2067 ** to the RESELECT label.
2068 **
2069 ** (3) The ncr wins arbitration.
2070 ** Then it will execute SCRIPTS instruction until
2071 ** the next instruction that checks SCSI phase.
2072 ** Then will stop and wait for selection to be
2073 ** complete or selection time-out to occur.
2074 ** As a result the SCRIPTS instructions until
2075 ** LOADPOS + 2 should be executed in parallel with
2076 ** the SCSI core performing selection.
2077 */
2078
2079 /*
2080 ** The MESSAGE_REJECT problem seems to be due to a selection
2081 ** timing problem.
2082 ** Wait immediately for the selection to complete.
2083 ** (2.5x behaves so)
2084 */
2085 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2086 0,
2087
2088 /*
2089 ** Next time use the next slot.
2090 */
2091 SCR_COPY (4),
2092 RADDR (temp),
2093 PADDR (startpos),
2094 /*
2095 ** The ncr doesn't have an indirect load
2096 ** or store command. So we have to
2097 ** copy part of the control block to a
2098 ** fixed place, where we can access it.
2099 **
2100 ** We patch the address part of a
2101 ** COPY command with the DSA-register.
2102 */
2103 SCR_COPY_F (4),
2104 RADDR (dsa),
2105 PADDR (loadpos),
2106 /*
2107 ** Flush script prefetch if required
2108 */
2109 PREFETCH_FLUSH
2110 /*
2111 ** then we do the actual copy.
2112 */
2113 SCR_COPY (sizeof (struct head)),
2114 /*
2115 ** continued after the next label ...
2116 */
2117 }/*-------------------------< LOADPOS >---------------------*/,{
2118 0,
2119 NADDR (header),
2120 /*
2121 ** Wait for the next phase or the selection
2122 ** to complete or time-out.
2123 */
2124 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2125 PADDR (prepare),
2126
2127 }/*-------------------------< SEND_IDENT >----------------------*/,{
2128 /*
2129 ** Selection complete.
2130 ** Send the IDENTIFY and SIMPLE_TAG messages
2131 ** (and the EXTENDED_SDTR message)
2132 */
2133 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2134 offsetof (struct dsb, smsg),
2135 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2136 PADDRH (resend_ident),
2137 SCR_LOAD_REG (scratcha, 0x80),
2138 0,
2139 SCR_COPY (1),
2140 RADDR (scratcha),
2141 NADDR (lastmsg),
2142 }/*-------------------------< PREPARE >----------------------*/,{
2143 /*
2144 ** load the savep (saved pointer) into
2145 ** the TEMP register (actual pointer)
2146 */
2147 SCR_COPY (4),
2148 NADDR (header.savep),
2149 RADDR (temp),
2150 /*
2151 ** Initialize the status registers
2152 */
2153 SCR_COPY (4),
2154 NADDR (header.status),
2155 RADDR (scr0),
2156 }/*-------------------------< PREPARE2 >---------------------*/,{
2157 /*
2158 ** Initialize the msgout buffer with a NOOP message.
2159 */
2160 SCR_LOAD_REG (scratcha, NOP),
2161 0,
2162 SCR_COPY (1),
2163 RADDR (scratcha),
2164 NADDR (msgout),
2165 #if 0
2166 SCR_COPY (1),
2167 RADDR (scratcha),
2168 NADDR (msgin),
2169 #endif
2170 /*
2171 ** Anticipate the COMMAND phase.
2172 ** This is the normal case for initial selection.
2173 */
2174 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
2175 PADDR (dispatch),
2176
2177 }/*-------------------------< COMMAND >--------------------*/,{
2178 /*
2179 ** ... and send the command
2180 */
2181 SCR_MOVE_TBL ^ SCR_COMMAND,
2182 offsetof (struct dsb, cmd),
2183 /*
2184 ** If status is still HS_NEGOTIATE, negotiation failed.
2185 ** We check this here, since we want to do that
2186 ** only once.
2187 */
2188 SCR_FROM_REG (HS_REG),
2189 0,
2190 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2191 SIR_NEGO_FAILED,
2192
2193 }/*-----------------------< DISPATCH >----------------------*/,{
2194 /*
2195 ** MSG_IN is the only phase that shall be
2196 ** entered at least once for each (re)selection.
2197 ** So we test it first.
2198 */
2199 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
2200 PADDR (msg_in),
2201
2202 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)),
2203 0,
2204 /*
2205 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 4.
2206 ** Possible data corruption during Memory Write and Invalidate.
2207 ** This work-around resets the addressing logic prior to the
2208 ** start of the first MOVE of a DATA IN phase.
2209 ** (See Documentation/scsi/ncr53c8xx.rst for more information)
2210 */
2211 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
2212 20,
2213 SCR_COPY (4),
2214 RADDR (scratcha),
2215 RADDR (scratcha),
2216 SCR_RETURN,
2217 0,
2218 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
2219 PADDR (status),
2220 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
2221 PADDR (command),
2222 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
2223 PADDR (msg_out),
2224 /*
2225 ** Discard one illegal phase byte, if required.
2226 */
2227 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
2228 0,
2229 SCR_COPY (1),
2230 RADDR (scratcha),
2231 NADDR (xerr_st),
2232 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
2233 8,
2234 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
2235 NADDR (scratch),
2236 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
2237 8,
2238 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
2239 NADDR (scratch),
2240 SCR_JUMP,
2241 PADDR (dispatch),
2242
2243 }/*-------------------------< CLRACK >----------------------*/,{
2244 /*
2245 ** Terminate possible pending message phase.
2246 */
2247 SCR_CLR (SCR_ACK),
2248 0,
2249 SCR_JUMP,
2250 PADDR (dispatch),
2251
2252 }/*-------------------------< NO_DATA >--------------------*/,{
2253 /*
2254 ** The target wants to tranfer too much data
2255 ** or in the wrong direction.
2256 ** Remember that in extended error.
2257 */
2258 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
2259 0,
2260 SCR_COPY (1),
2261 RADDR (scratcha),
2262 NADDR (xerr_st),
2263 /*
2264 ** Discard one data byte, if required.
2265 */
2266 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2267 8,
2268 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
2269 NADDR (scratch),
2270 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
2271 8,
2272 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
2273 NADDR (scratch),
2274 /*
2275 ** .. and repeat as required.
2276 */
2277 SCR_CALL,
2278 PADDR (dispatch),
2279 SCR_JUMP,
2280 PADDR (no_data),
2281
2282 }/*-------------------------< STATUS >--------------------*/,{
2283 /*
2284 ** get the status
2285 */
2286 SCR_MOVE_ABS (1) ^ SCR_STATUS,
2287 NADDR (scratch),
2288 /*
2289 ** save status to scsi_status.
2290 ** mark as complete.
2291 */
2292 SCR_TO_REG (SS_REG),
2293 0,
2294 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
2295 0,
2296 SCR_JUMP,
2297 PADDR (dispatch),
2298 }/*-------------------------< MSG_IN >--------------------*/,{
2299 /*
2300 ** Get the first byte of the message
2301 ** and save it to SCRATCHA.
2302 **
2303 ** The script processor doesn't negate the
2304 ** ACK signal after this transfer.
2305 */
2306 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2307 NADDR (msgin[0]),
2308 }/*-------------------------< MSG_IN2 >--------------------*/,{
2309 /*
2310 ** Handle this message.
2311 */
2312 SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)),
2313 PADDR (complete),
2314 SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)),
2315 PADDR (disconnect),
2316 SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)),
2317 PADDR (save_dp),
2318 SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)),
2319 PADDR (restore_dp),
2320 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)),
2321 PADDRH (msg_extended),
2322 SCR_JUMP ^ IFTRUE (DATA (NOP)),
2323 PADDR (clrack),
2324 SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)),
2325 PADDRH (msg_reject),
2326 SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)),
2327 PADDRH (msg_ign_residue),
2328 /*
2329 ** Rest of the messages left as
2330 ** an exercise ...
2331 **
2332 ** Unimplemented messages:
2333 ** fall through to MSG_BAD.
2334 */
2335 }/*-------------------------< MSG_BAD >------------------*/,{
2336 /*
2337 ** unimplemented message - reject it.
2338 */
2339 SCR_INT,
2340 SIR_REJECT_SENT,
2341 SCR_LOAD_REG (scratcha, MESSAGE_REJECT),
2342 0,
2343 }/*-------------------------< SETMSG >----------------------*/,{
2344 SCR_COPY (1),
2345 RADDR (scratcha),
2346 NADDR (msgout),
2347 SCR_SET (SCR_ATN),
2348 0,
2349 SCR_JUMP,
2350 PADDR (clrack),
2351 }/*-------------------------< CLEANUP >-------------------*/,{
2352 /*
2353 ** dsa: Pointer to ccb
2354 ** or xxxxxxFF (no ccb)
2355 **
2356 ** HS_REG: Host-Status (<>0!)
2357 */
2358 SCR_FROM_REG (dsa),
2359 0,
2360 SCR_JUMP ^ IFTRUE (DATA (0xff)),
2361 PADDR (start),
2362 /*
2363 ** dsa is valid.
2364 ** complete the cleanup.
2365 */
2366 SCR_JUMP,
2367 PADDR (cleanup_ok),
2368
2369 }/*-------------------------< COMPLETE >-----------------*/,{
2370 /*
2371 ** Complete message.
2372 **
2373 ** Copy TEMP register to LASTP in header.
2374 */
2375 SCR_COPY (4),
2376 RADDR (temp),
2377 NADDR (header.lastp),
2378 /*
2379 ** When we terminate the cycle by clearing ACK,
2380 ** the target may disconnect immediately.
2381 **
2382 ** We don't want to be told of an
2383 ** "unexpected disconnect",
2384 ** so we disable this feature.
2385 */
2386 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2387 0,
2388 /*
2389 ** Terminate cycle ...
2390 */
2391 SCR_CLR (SCR_ACK|SCR_ATN),
2392 0,
2393 /*
2394 ** ... and wait for the disconnect.
2395 */
2396 SCR_WAIT_DISC,
2397 0,
2398 }/*-------------------------< CLEANUP_OK >----------------*/,{
2399 /*
2400 ** Save host status to header.
2401 */
2402 SCR_COPY (4),
2403 RADDR (scr0),
2404 NADDR (header.status),
2405 /*
2406 ** and copy back the header to the ccb.
2407 */
2408 SCR_COPY_F (4),
2409 RADDR (dsa),
2410 PADDR (cleanup0),
2411 /*
2412 ** Flush script prefetch if required
2413 */
2414 PREFETCH_FLUSH
2415 SCR_COPY (sizeof (struct head)),
2416 NADDR (header),
2417 }/*-------------------------< CLEANUP0 >--------------------*/,{
2418 0,
2419 }/*-------------------------< SIGNAL >----------------------*/,{
2420 /*
2421 ** if job not completed ...
2422 */
2423 SCR_FROM_REG (HS_REG),
2424 0,
2425 /*
2426 ** ... start the next command.
2427 */
2428 SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))),
2429 PADDR(start),
2430 /*
2431 ** If command resulted in not GOOD status,
2432 ** call the C code if needed.
2433 */
2434 SCR_FROM_REG (SS_REG),
2435 0,
2436 SCR_CALL ^ IFFALSE (DATA (SAM_STAT_GOOD)),
2437 PADDRH (bad_status),
2438
2439 #ifndef SCSI_NCR_CCB_DONE_SUPPORT
2440
2441 /*
2442 ** ... signal completion to the host
2443 */
2444 SCR_INT,
2445 SIR_INTFLY,
2446 /*
2447 ** Auf zu neuen Schandtaten!
2448 */
2449 SCR_JUMP,
2450 PADDR(start),
2451
2452 #else /* defined SCSI_NCR_CCB_DONE_SUPPORT */
2453
2454 /*
2455 ** ... signal completion to the host
2456 */
2457 SCR_JUMP,
2458 }/*------------------------< DONE_POS >---------------------*/,{
2459 PADDRH (done_queue),
2460 }/*------------------------< DONE_PLUG >--------------------*/,{
2461 SCR_INT,
2462 SIR_DONE_OVERFLOW,
2463 }/*------------------------< DONE_END >---------------------*/,{
2464 SCR_INT,
2465 SIR_INTFLY,
2466 SCR_COPY (4),
2467 RADDR (temp),
2468 PADDR (done_pos),
2469 SCR_JUMP,
2470 PADDR (start),
2471
2472 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
2473
2474 }/*-------------------------< SAVE_DP >------------------*/,{
2475 /*
2476 ** SAVE_DP message:
2477 ** Copy TEMP register to SAVEP in header.
2478 */
2479 SCR_COPY (4),
2480 RADDR (temp),
2481 NADDR (header.savep),
2482 SCR_CLR (SCR_ACK),
2483 0,
2484 SCR_JUMP,
2485 PADDR (dispatch),
2486 }/*-------------------------< RESTORE_DP >---------------*/,{
2487 /*
2488 ** RESTORE_DP message:
2489 ** Copy SAVEP in header to TEMP register.
2490 */
2491 SCR_COPY (4),
2492 NADDR (header.savep),
2493 RADDR (temp),
2494 SCR_JUMP,
2495 PADDR (clrack),
2496
2497 }/*-------------------------< DISCONNECT >---------------*/,{
2498 /*
2499 ** DISCONNECTing ...
2500 **
2501 ** disable the "unexpected disconnect" feature,
2502 ** and remove the ACK signal.
2503 */
2504 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2505 0,
2506 SCR_CLR (SCR_ACK|SCR_ATN),
2507 0,
2508 /*
2509 ** Wait for the disconnect.
2510 */
2511 SCR_WAIT_DISC,
2512 0,
2513 /*
2514 ** Status is: DISCONNECTED.
2515 */
2516 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2517 0,
2518 SCR_JUMP,
2519 PADDR (cleanup_ok),
2520
2521 }/*-------------------------< MSG_OUT >-------------------*/,{
2522 /*
2523 ** The target requests a message.
2524 */
2525 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2526 NADDR (msgout),
2527 SCR_COPY (1),
2528 NADDR (msgout),
2529 NADDR (lastmsg),
2530 /*
2531 ** If it was no ABORT message ...
2532 */
2533 SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)),
2534 PADDRH (msg_out_abort),
2535 /*
2536 ** ... wait for the next phase
2537 ** if it's a message out, send it again, ...
2538 */
2539 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2540 PADDR (msg_out),
2541 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2542 /*
2543 ** ... else clear the message ...
2544 */
2545 SCR_LOAD_REG (scratcha, NOP),
2546 0,
2547 SCR_COPY (4),
2548 RADDR (scratcha),
2549 NADDR (msgout),
2550 /*
2551 ** ... and process the next phase
2552 */
2553 SCR_JUMP,
2554 PADDR (dispatch),
2555 }/*-------------------------< IDLE >------------------------*/,{
2556 /*
2557 ** Nothing to do?
2558 ** Wait for reselect.
2559 ** This NOP will be patched with LED OFF
2560 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2561 */
2562 SCR_NO_OP,
2563 0,
2564 }/*-------------------------< RESELECT >--------------------*/,{
2565 /*
2566 ** make the DSA invalid.
2567 */
2568 SCR_LOAD_REG (dsa, 0xff),
2569 0,
2570 SCR_CLR (SCR_TRG),
2571 0,
2572 SCR_LOAD_REG (HS_REG, HS_IN_RESELECT),
2573 0,
2574 /*
2575 ** Sleep waiting for a reselection.
2576 ** If SIGP is set, special treatment.
2577 **
2578 ** Zu allem bereit ..
2579 */
2580 SCR_WAIT_RESEL,
2581 PADDR(start),
2582 }/*-------------------------< RESELECTED >------------------*/,{
2583 /*
2584 ** This NOP will be patched with LED ON
2585 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2586 */
2587 SCR_NO_OP,
2588 0,
2589 /*
2590 ** ... zu nichts zu gebrauchen ?
2591 **
2592 ** load the target id into the SFBR
2593 ** and jump to the control block.
2594 **
2595 ** Look at the declarations of
2596 ** - struct ncb
2597 ** - struct tcb
2598 ** - struct lcb
2599 ** - struct ccb
2600 ** to understand what's going on.
2601 */
2602 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2603 0,
2604 SCR_TO_REG (sdid),
2605 0,
2606 SCR_JUMP,
2607 NADDR (jump_tcb),
2608
2609 }/*-------------------------< RESEL_DSA >-------------------*/,{
2610 /*
2611 ** Ack the IDENTIFY or TAG previously received.
2612 */
2613 SCR_CLR (SCR_ACK),
2614 0,
2615 /*
2616 ** The ncr doesn't have an indirect load
2617 ** or store command. So we have to
2618 ** copy part of the control block to a
2619 ** fixed place, where we can access it.
2620 **
2621 ** We patch the address part of a
2622 ** COPY command with the DSA-register.
2623 */
2624 SCR_COPY_F (4),
2625 RADDR (dsa),
2626 PADDR (loadpos1),
2627 /*
2628 ** Flush script prefetch if required
2629 */
2630 PREFETCH_FLUSH
2631 /*
2632 ** then we do the actual copy.
2633 */
2634 SCR_COPY (sizeof (struct head)),
2635 /*
2636 ** continued after the next label ...
2637 */
2638
2639 }/*-------------------------< LOADPOS1 >-------------------*/,{
2640 0,
2641 NADDR (header),
2642 /*
2643 ** The DSA contains the data structure address.
2644 */
2645 SCR_JUMP,
2646 PADDR (prepare),
2647
2648 }/*-------------------------< RESEL_LUN >-------------------*/,{
2649 /*
2650 ** come back to this point
2651 ** to get an IDENTIFY message
2652 ** Wait for a msg_in phase.
2653 */
2654 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
2655 SIR_RESEL_NO_MSG_IN,
2656 /*
2657 ** message phase.
2658 ** Read the data directly from the BUS DATA lines.
2659 ** This helps to support very old SCSI devices that
2660 ** may reselect without sending an IDENTIFY.
2661 */
2662 SCR_FROM_REG (sbdl),
2663 0,
2664 /*
2665 ** It should be an Identify message.
2666 */
2667 SCR_RETURN,
2668 0,
2669 }/*-------------------------< RESEL_TAG >-------------------*/,{
2670 /*
2671 ** Read IDENTIFY + SIMPLE + TAG using a single MOVE.
2672 ** Aggressive optimization, is'nt it?
2673 ** No need to test the SIMPLE TAG message, since the
2674 ** driver only supports conformant devices for tags. ;-)
2675 */
2676 SCR_MOVE_ABS (3) ^ SCR_MSG_IN,
2677 NADDR (msgin),
2678 /*
2679 ** Read the TAG from the SIDL.
2680 ** Still an aggressive optimization. ;-)
2681 ** Compute the CCB indirect jump address which
2682 ** is (#TAG*2 & 0xfc) due to tag numbering using
2683 ** 1,3,5..MAXTAGS*2+1 actual values.
2684 */
2685 SCR_REG_SFBR (sidl, SCR_SHL, 0),
2686 0,
2687 SCR_SFBR_REG (temp, SCR_AND, 0xfc),
2688 0,
2689 }/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{
2690 SCR_COPY_F (4),
2691 RADDR (temp),
2692 PADDR (nexus_indirect),
2693 /*
2694 ** Flush script prefetch if required
2695 */
2696 PREFETCH_FLUSH
2697 SCR_COPY (4),
2698 }/*-------------------------< NEXUS_INDIRECT >-------------------*/,{
2699 0,
2700 RADDR (temp),
2701 SCR_RETURN,
2702 0,
2703 }/*-------------------------< RESEL_NOTAG >-------------------*/,{
2704 /*
2705 ** No tag expected.
2706 ** Read an throw away the IDENTIFY.
2707 */
2708 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2709 NADDR (msgin),
2710 SCR_JUMP,
2711 PADDR (jump_to_nexus),
2712 }/*-------------------------< DATA_IN >--------------------*/,{
2713 /*
2714 ** Because the size depends on the
2715 ** #define MAX_SCATTERL parameter,
2716 ** it is filled in at runtime.
2717 **
2718 ** ##===========< i=0; i<MAX_SCATTERL >=========
2719 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2720 ** || PADDR (dispatch),
2721 ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2722 ** || offsetof (struct dsb, data[ i]),
2723 ** ##==========================================
2724 **
2725 **---------------------------------------------------------
2726 */
2727 0
2728 }/*-------------------------< DATA_IN2 >-------------------*/,{
2729 SCR_CALL,
2730 PADDR (dispatch),
2731 SCR_JUMP,
2732 PADDR (no_data),
2733 }/*-------------------------< DATA_OUT >--------------------*/,{
2734 /*
2735 ** Because the size depends on the
2736 ** #define MAX_SCATTERL parameter,
2737 ** it is filled in at runtime.
2738 **
2739 ** ##===========< i=0; i<MAX_SCATTERL >=========
2740 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2741 ** || PADDR (dispatch),
2742 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2743 ** || offsetof (struct dsb, data[ i]),
2744 ** ##==========================================
2745 **
2746 **---------------------------------------------------------
2747 */
2748 0
2749 }/*-------------------------< DATA_OUT2 >-------------------*/,{
2750 SCR_CALL,
2751 PADDR (dispatch),
2752 SCR_JUMP,
2753 PADDR (no_data),
2754 }/*--------------------------------------------------------*/
2755 };
2756
2757 static struct scripth scripth0 __initdata = {
2758 /*-------------------------< TRYLOOP >---------------------*/{
2759 /*
2760 ** Start the next entry.
2761 ** Called addresses point to the launch script in the CCB.
2762 ** They are patched by the main processor.
2763 **
2764 ** Because the size depends on the
2765 ** #define MAX_START parameter, it is filled
2766 ** in at runtime.
2767 **
2768 **-----------------------------------------------------------
2769 **
2770 ** ##===========< I=0; i<MAX_START >===========
2771 ** || SCR_CALL,
2772 ** || PADDR (idle),
2773 ** ##==========================================
2774 **
2775 **-----------------------------------------------------------
2776 */
2777 0
2778 }/*------------------------< TRYLOOP2 >---------------------*/,{
2779 SCR_JUMP,
2780 PADDRH(tryloop),
2781
2782 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
2783
2784 }/*------------------------< DONE_QUEUE >-------------------*/,{
2785 /*
2786 ** Copy the CCB address to the next done entry.
2787 ** Because the size depends on the
2788 ** #define MAX_DONE parameter, it is filled
2789 ** in at runtime.
2790 **
2791 **-----------------------------------------------------------
2792 **
2793 ** ##===========< I=0; i<MAX_DONE >===========
2794 ** || SCR_COPY (sizeof(struct ccb *),
2795 ** || NADDR (header.cp),
2796 ** || NADDR (ccb_done[i]),
2797 ** || SCR_CALL,
2798 ** || PADDR (done_end),
2799 ** ##==========================================
2800 **
2801 **-----------------------------------------------------------
2802 */
2803 0
2804 }/*------------------------< DONE_QUEUE2 >------------------*/,{
2805 SCR_JUMP,
2806 PADDRH (done_queue),
2807
2808 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
2809 }/*------------------------< SELECT_NO_ATN >-----------------*/,{
2810 /*
2811 ** Set Initiator mode.
2812 ** And try to select this target without ATN.
2813 */
2814
2815 SCR_CLR (SCR_TRG),
2816 0,
2817 SCR_LOAD_REG (HS_REG, HS_SELECTING),
2818 0,
2819 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2820 PADDR (reselect),
2821 SCR_JUMP,
2822 PADDR (select2),
2823
2824 }/*-------------------------< CANCEL >------------------------*/,{
2825
2826 SCR_LOAD_REG (scratcha, HS_ABORTED),
2827 0,
2828 SCR_JUMPR,
2829 8,
2830 }/*-------------------------< SKIP >------------------------*/,{
2831 SCR_LOAD_REG (scratcha, 0),
2832 0,
2833 /*
2834 ** This entry has been canceled.
2835 ** Next time use the next slot.
2836 */
2837 SCR_COPY (4),
2838 RADDR (temp),
2839 PADDR (startpos),
2840 /*
2841 ** The ncr doesn't have an indirect load
2842 ** or store command. So we have to
2843 ** copy part of the control block to a
2844 ** fixed place, where we can access it.
2845 **
2846 ** We patch the address part of a
2847 ** COPY command with the DSA-register.
2848 */
2849 SCR_COPY_F (4),
2850 RADDR (dsa),
2851 PADDRH (skip2),
2852 /*
2853 ** Flush script prefetch if required
2854 */
2855 PREFETCH_FLUSH
2856 /*
2857 ** then we do the actual copy.
2858 */
2859 SCR_COPY (sizeof (struct head)),
2860 /*
2861 ** continued after the next label ...
2862 */
2863 }/*-------------------------< SKIP2 >---------------------*/,{
2864 0,
2865 NADDR (header),
2866 /*
2867 ** Initialize the status registers
2868 */
2869 SCR_COPY (4),
2870 NADDR (header.status),
2871 RADDR (scr0),
2872 /*
2873 ** Force host status.
2874 */
2875 SCR_FROM_REG (scratcha),
2876 0,
2877 SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
2878 16,
2879 SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK),
2880 0,
2881 SCR_JUMPR,
2882 8,
2883 SCR_TO_REG (HS_REG),
2884 0,
2885 SCR_LOAD_REG (SS_REG, SAM_STAT_GOOD),
2886 0,
2887 SCR_JUMP,
2888 PADDR (cleanup_ok),
2889
2890 },/*-------------------------< PAR_ERR_DATA_IN >---------------*/{
2891 /*
2892 ** Ignore all data in byte, until next phase
2893 */
2894 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2895 PADDRH (par_err_other),
2896 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
2897 NADDR (scratch),
2898 SCR_JUMPR,
2899 -24,
2900 },/*-------------------------< PAR_ERR_OTHER >------------------*/{
2901 /*
2902 ** count it.
2903 */
2904 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2905 0,
2906 /*
2907 ** jump to dispatcher.
2908 */
2909 SCR_JUMP,
2910 PADDR (dispatch),
2911 }/*-------------------------< MSG_REJECT >---------------*/,{
2912 /*
2913 ** If a negotiation was in progress,
2914 ** negotiation failed.
2915 ** Otherwise, let the C code print
2916 ** some message.
2917 */
2918 SCR_FROM_REG (HS_REG),
2919 0,
2920 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2921 SIR_REJECT_RECEIVED,
2922 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2923 SIR_NEGO_FAILED,
2924 SCR_JUMP,
2925 PADDR (clrack),
2926
2927 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2928 /*
2929 ** Terminate cycle
2930 */
2931 SCR_CLR (SCR_ACK),
2932 0,
2933 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2934 PADDR (dispatch),
2935 /*
2936 ** get residue size.
2937 */
2938 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2939 NADDR (msgin[1]),
2940 /*
2941 ** Size is 0 .. ignore message.
2942 */
2943 SCR_JUMP ^ IFTRUE (DATA (0)),
2944 PADDR (clrack),
2945 /*
2946 ** Size is not 1 .. have to interrupt.
2947 */
2948 SCR_JUMPR ^ IFFALSE (DATA (1)),
2949 40,
2950 /*
2951 ** Check for residue byte in swide register
2952 */
2953 SCR_FROM_REG (scntl2),
2954 0,
2955 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2956 16,
2957 /*
2958 ** There IS data in the swide register.
2959 ** Discard it.
2960 */
2961 SCR_REG_REG (scntl2, SCR_OR, WSR),
2962 0,
2963 SCR_JUMP,
2964 PADDR (clrack),
2965 /*
2966 ** Load again the size to the sfbr register.
2967 */
2968 SCR_FROM_REG (scratcha),
2969 0,
2970 SCR_INT,
2971 SIR_IGN_RESIDUE,
2972 SCR_JUMP,
2973 PADDR (clrack),
2974
2975 }/*-------------------------< MSG_EXTENDED >-------------*/,{
2976 /*
2977 ** Terminate cycle
2978 */
2979 SCR_CLR (SCR_ACK),
2980 0,
2981 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2982 PADDR (dispatch),
2983 /*
2984 ** get length.
2985 */
2986 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2987 NADDR (msgin[1]),
2988 /*
2989 */
2990 SCR_JUMP ^ IFTRUE (DATA (3)),
2991 PADDRH (msg_ext_3),
2992 SCR_JUMP ^ IFFALSE (DATA (2)),
2993 PADDR (msg_bad),
2994 }/*-------------------------< MSG_EXT_2 >----------------*/,{
2995 SCR_CLR (SCR_ACK),
2996 0,
2997 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2998 PADDR (dispatch),
2999 /*
3000 ** get extended message code.
3001 */
3002 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3003 NADDR (msgin[2]),
3004 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)),
3005 PADDRH (msg_wdtr),
3006 /*
3007 ** unknown extended message
3008 */
3009 SCR_JUMP,
3010 PADDR (msg_bad)
3011 }/*-------------------------< MSG_WDTR >-----------------*/,{
3012 SCR_CLR (SCR_ACK),
3013 0,
3014 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3015 PADDR (dispatch),
3016 /*
3017 ** get data bus width
3018 */
3019 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3020 NADDR (msgin[3]),
3021 /*
3022 ** let the host do the real work.
3023 */
3024 SCR_INT,
3025 SIR_NEGO_WIDE,
3026 /*
3027 ** let the target fetch our answer.
3028 */
3029 SCR_SET (SCR_ATN),
3030 0,
3031 SCR_CLR (SCR_ACK),
3032 0,
3033 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3034 PADDRH (nego_bad_phase),
3035
3036 }/*-------------------------< SEND_WDTR >----------------*/,{
3037 /*
3038 ** Send the EXTENDED_WDTR
3039 */
3040 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
3041 NADDR (msgout),
3042 SCR_COPY (1),
3043 NADDR (msgout),
3044 NADDR (lastmsg),
3045 SCR_JUMP,
3046 PADDR (msg_out_done),
3047
3048 }/*-------------------------< MSG_EXT_3 >----------------*/,{
3049 SCR_CLR (SCR_ACK),
3050 0,
3051 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3052 PADDR (dispatch),
3053 /*
3054 ** get extended message code.
3055 */
3056 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3057 NADDR (msgin[2]),
3058 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)),
3059 PADDRH (msg_sdtr),
3060 /*
3061 ** unknown extended message
3062 */
3063 SCR_JUMP,
3064 PADDR (msg_bad)
3065
3066 }/*-------------------------< MSG_SDTR >-----------------*/,{
3067 SCR_CLR (SCR_ACK),
3068 0,
3069 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3070 PADDR (dispatch),
3071 /*
3072 ** get period and offset
3073 */
3074 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
3075 NADDR (msgin[3]),
3076 /*
3077 ** let the host do the real work.
3078 */
3079 SCR_INT,
3080 SIR_NEGO_SYNC,
3081 /*
3082 ** let the target fetch our answer.
3083 */
3084 SCR_SET (SCR_ATN),
3085 0,
3086 SCR_CLR (SCR_ACK),
3087 0,
3088 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3089 PADDRH (nego_bad_phase),
3090
3091 }/*-------------------------< SEND_SDTR >-------------*/,{
3092 /*
3093 ** Send the EXTENDED_SDTR
3094 */
3095 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
3096 NADDR (msgout),
3097 SCR_COPY (1),
3098 NADDR (msgout),
3099 NADDR (lastmsg),
3100 SCR_JUMP,
3101 PADDR (msg_out_done),
3102
3103 }/*-------------------------< NEGO_BAD_PHASE >------------*/,{
3104 SCR_INT,
3105 SIR_NEGO_PROTO,
3106 SCR_JUMP,
3107 PADDR (dispatch),
3108
3109 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
3110 /*
3111 ** After ABORT message,
3112 **
3113 ** expect an immediate disconnect, ...
3114 */
3115 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3116 0,
3117 SCR_CLR (SCR_ACK|SCR_ATN),
3118 0,
3119 SCR_WAIT_DISC,
3120 0,
3121 /*
3122 ** ... and set the status to "ABORTED"
3123 */
3124 SCR_LOAD_REG (HS_REG, HS_ABORTED),
3125 0,
3126 SCR_JUMP,
3127 PADDR (cleanup),
3128
3129 }/*-------------------------< HDATA_IN >-------------------*/,{
3130 /*
3131 ** Because the size depends on the
3132 ** #define MAX_SCATTERH parameter,
3133 ** it is filled in at runtime.
3134 **
3135 ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >==
3136 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
3137 ** || PADDR (dispatch),
3138 ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
3139 ** || offsetof (struct dsb, data[ i]),
3140 ** ##===================================================
3141 **
3142 **---------------------------------------------------------
3143 */
3144 0
3145 }/*-------------------------< HDATA_IN2 >------------------*/,{
3146 SCR_JUMP,
3147 PADDR (data_in),
3148
3149 }/*-------------------------< HDATA_OUT >-------------------*/,{
3150 /*
3151 ** Because the size depends on the
3152 ** #define MAX_SCATTERH parameter,
3153 ** it is filled in at runtime.
3154 **
3155 ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >==
3156 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
3157 ** || PADDR (dispatch),
3158 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
3159 ** || offsetof (struct dsb, data[ i]),
3160 ** ##===================================================
3161 **
3162 **---------------------------------------------------------
3163 */
3164 0
3165 }/*-------------------------< HDATA_OUT2 >------------------*/,{
3166 SCR_JUMP,
3167 PADDR (data_out),
3168
3169 }/*-------------------------< RESET >----------------------*/,{
3170 /*
3171 ** Send a TARGET_RESET message if bad IDENTIFY
3172 ** received on reselection.
3173 */
3174 SCR_LOAD_REG (scratcha, ABORT_TASK),
3175 0,
3176 SCR_JUMP,
3177 PADDRH (abort_resel),
3178 }/*-------------------------< ABORTTAG >-------------------*/,{
3179 /*
3180 ** Abort a wrong tag received on reselection.
3181 */
3182 SCR_LOAD_REG (scratcha, ABORT_TASK),
3183 0,
3184 SCR_JUMP,
3185 PADDRH (abort_resel),
3186 }/*-------------------------< ABORT >----------------------*/,{
3187 /*
3188 ** Abort a reselection when no active CCB.
3189 */
3190 SCR_LOAD_REG (scratcha, ABORT_TASK_SET),
3191 0,
3192 }/*-------------------------< ABORT_RESEL >----------------*/,{
3193 SCR_COPY (1),
3194 RADDR (scratcha),
3195 NADDR (msgout),
3196 SCR_SET (SCR_ATN),
3197 0,
3198 SCR_CLR (SCR_ACK),
3199 0,
3200 /*
3201 ** and send it.
3202 ** we expect an immediate disconnect
3203 */
3204 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3205 0,
3206 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
3207 NADDR (msgout),
3208 SCR_COPY (1),
3209 NADDR (msgout),
3210 NADDR (lastmsg),
3211 SCR_CLR (SCR_ACK|SCR_ATN),
3212 0,
3213 SCR_WAIT_DISC,
3214 0,
3215 SCR_JUMP,
3216 PADDR (start),
3217 }/*-------------------------< RESEND_IDENT >-------------------*/,{
3218 /*
3219 ** The target stays in MSG OUT phase after having acked
3220 ** Identify [+ Tag [+ Extended message ]]. Targets shall
3221 ** behave this way on parity error.
3222 ** We must send it again all the messages.
3223 */
3224 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
3225 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */
3226 SCR_JUMP,
3227 PADDR (send_ident),
3228 }/*-------------------------< CLRATN_GO_ON >-------------------*/,{
3229 SCR_CLR (SCR_ATN),
3230 0,
3231 SCR_JUMP,
3232 }/*-------------------------< NXTDSP_GO_ON >-------------------*/,{
3233 0,
3234 }/*-------------------------< SDATA_IN >-------------------*/,{
3235 SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
3236 PADDR (dispatch),
3237 SCR_MOVE_TBL ^ SCR_DATA_IN,
3238 offsetof (struct dsb, sense),
3239 SCR_CALL,
3240 PADDR (dispatch),
3241 SCR_JUMP,
3242 PADDR (no_data),
3243 }/*-------------------------< DATA_IO >--------------------*/,{
3244 /*
3245 ** We jump here if the data direction was unknown at the
3246 ** time we had to queue the command to the scripts processor.
3247 ** Pointers had been set as follow in this situation:
3248 ** savep --> DATA_IO
3249 ** lastp --> start pointer when DATA_IN
3250 ** goalp --> goal pointer when DATA_IN
3251 ** wlastp --> start pointer when DATA_OUT
3252 ** wgoalp --> goal pointer when DATA_OUT
3253 ** This script sets savep/lastp/goalp according to the
3254 ** direction chosen by the target.
3255 */
3256 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)),
3257 32,
3258 /*
3259 ** Direction is DATA IN.
3260 ** Warning: we jump here, even when phase is DATA OUT.
3261 */
3262 SCR_COPY (4),
3263 NADDR (header.lastp),
3264 NADDR (header.savep),
3265
3266 /*
3267 ** Jump to the SCRIPTS according to actual direction.
3268 */
3269 SCR_COPY (4),
3270 NADDR (header.savep),
3271 RADDR (temp),
3272 SCR_RETURN,
3273 0,
3274 /*
3275 ** Direction is DATA OUT.
3276 */
3277 SCR_COPY (4),
3278 NADDR (header.wlastp),
3279 NADDR (header.lastp),
3280 SCR_COPY (4),
3281 NADDR (header.wgoalp),
3282 NADDR (header.goalp),
3283 SCR_JUMPR,
3284 -64,
3285 }/*-------------------------< BAD_IDENTIFY >---------------*/,{
3286 /*
3287 ** If message phase but not an IDENTIFY,
3288 ** get some help from the C code.
3289 ** Old SCSI device may behave so.
3290 */
3291 SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)),
3292 16,
3293 SCR_INT,
3294 SIR_RESEL_NO_IDENTIFY,
3295 SCR_JUMP,
3296 PADDRH (reset),
3297 /*
3298 ** Message is an IDENTIFY, but lun is unknown.
3299 ** Read the message, since we got it directly
3300 ** from the SCSI BUS data lines.
3301 ** Signal problem to C code for logging the event.
3302 ** Send an ABORT_TASK_SET to clear all pending tasks.
3303 */
3304 SCR_INT,
3305 SIR_RESEL_BAD_LUN,
3306 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3307 NADDR (msgin),
3308 SCR_JUMP,
3309 PADDRH (abort),
3310 }/*-------------------------< BAD_I_T_L >------------------*/,{
3311 /*
3312 ** We donnot have a task for that I_T_L.
3313 ** Signal problem to C code for logging the event.
3314 ** Send an ABORT_TASK_SET message.
3315 */
3316 SCR_INT,
3317 SIR_RESEL_BAD_I_T_L,
3318 SCR_JUMP,
3319 PADDRH (abort),
3320 }/*-------------------------< BAD_I_T_L_Q >----------------*/,{
3321 /*
3322 ** We donnot have a task that matches the tag.
3323 ** Signal problem to C code for logging the event.
3324 ** Send an ABORT_TASK message.
3325 */
3326 SCR_INT,
3327 SIR_RESEL_BAD_I_T_L_Q,
3328 SCR_JUMP,
3329 PADDRH (aborttag),
3330 }/*-------------------------< BAD_TARGET >-----------------*/,{
3331 /*
3332 ** We donnot know the target that reselected us.
3333 ** Grab the first message if any (IDENTIFY).
3334 ** Signal problem to C code for logging the event.
3335 ** TARGET_RESET message.
3336 */
3337 SCR_INT,
3338 SIR_RESEL_BAD_TARGET,
3339 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
3340 8,
3341 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3342 NADDR (msgin),
3343 SCR_JUMP,
3344 PADDRH (reset),
3345 }/*-------------------------< BAD_STATUS >-----------------*/,{
3346 /*
3347 ** If command resulted in either TASK_SET FULL,
3348 ** CHECK CONDITION or COMMAND TERMINATED,
3349 ** call the C code.
3350 */
3351 SCR_INT ^ IFTRUE (DATA (SAM_STAT_TASK_SET_FULL)),
3352 SIR_BAD_STATUS,
3353 SCR_INT ^ IFTRUE (DATA (SAM_STAT_CHECK_CONDITION)),
3354 SIR_BAD_STATUS,
3355 SCR_INT ^ IFTRUE (DATA (SAM_STAT_COMMAND_TERMINATED)),
3356 SIR_BAD_STATUS,
3357 SCR_RETURN,
3358 0,
3359 }/*-------------------------< START_RAM >-------------------*/,{
3360 /*
3361 ** Load the script into on-chip RAM,
3362 ** and jump to start point.
3363 */
3364 SCR_COPY_F (4),
3365 RADDR (scratcha),
3366 PADDRH (start_ram0),
3367 /*
3368 ** Flush script prefetch if required
3369 */
3370 PREFETCH_FLUSH
3371 SCR_COPY (sizeof (struct script)),
3372 }/*-------------------------< START_RAM0 >--------------------*/,{
3373 0,
3374 PADDR (start),
3375 SCR_JUMP,
3376 PADDR (start),
3377 }/*-------------------------< STO_RESTART >-------------------*/,{
3378 /*
3379 **
3380 ** Repair start queue (e.g. next time use the next slot)
3381 ** and jump to start point.
3382 */
3383 SCR_COPY (4),
3384 RADDR (temp),
3385 PADDR (startpos),
3386 SCR_JUMP,
3387 PADDR (start),
3388 }/*-------------------------< WAIT_DMA >-------------------*/,{
3389 /*
3390 ** For HP Zalon/53c720 systems, the Zalon interface
3391 ** between CPU and 53c720 does prefetches, which causes
3392 ** problems with self modifying scripts. The problem
3393 ** is overcome by calling a dummy subroutine after each
3394 ** modification, to force a refetch of the script on
3395 ** return from the subroutine.
3396 */
3397 SCR_RETURN,
3398 0,
3399 }/*-------------------------< SNOOPTEST >-------------------*/,{
3400 /*
3401 ** Read the variable.
3402 */
3403 SCR_COPY (4),
3404 NADDR(ncr_cache),
3405 RADDR (scratcha),
3406 /*
3407 ** Write the variable.
3408 */
3409 SCR_COPY (4),
3410 RADDR (temp),
3411 NADDR(ncr_cache),
3412 /*
3413 ** Read back the variable.
3414 */
3415 SCR_COPY (4),
3416 NADDR(ncr_cache),
3417 RADDR (temp),
3418 }/*-------------------------< SNOOPEND >-------------------*/,{
3419 /*
3420 ** And stop.
3421 */
3422 SCR_INT,
3423 99,
3424 }/*--------------------------------------------------------*/
3425 };
3426
3427 /*==========================================================
3428 **
3429 **
3430 ** Fill in #define dependent parts of the script
3431 **
3432 **
3433 **==========================================================
3434 */
3435
ncr_script_fill(struct script * scr,struct scripth * scrh)3436 void __init ncr_script_fill (struct script * scr, struct scripth * scrh)
3437 {
3438 int i;
3439 ncrcmd *p;
3440
3441 p = scrh->tryloop;
3442 for (i=0; i<MAX_START; i++) {
3443 *p++ =SCR_CALL;
3444 *p++ =PADDR (idle);
3445 }
3446
3447 BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop));
3448
3449 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
3450
3451 p = scrh->done_queue;
3452 for (i = 0; i<MAX_DONE; i++) {
3453 *p++ =SCR_COPY (sizeof(struct ccb *));
3454 *p++ =NADDR (header.cp);
3455 *p++ =NADDR (ccb_done[i]);
3456 *p++ =SCR_CALL;
3457 *p++ =PADDR (done_end);
3458 }
3459
3460 BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue));
3461
3462 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
3463
3464 p = scrh->hdata_in;
3465 for (i=0; i<MAX_SCATTERH; i++) {
3466 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
3467 *p++ =PADDR (dispatch);
3468 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
3469 *p++ =offsetof (struct dsb, data[i]);
3470 }
3471
3472 BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in));
3473
3474 p = scr->data_in;
3475 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) {
3476 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
3477 *p++ =PADDR (dispatch);
3478 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
3479 *p++ =offsetof (struct dsb, data[i]);
3480 }
3481
3482 BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in));
3483
3484 p = scrh->hdata_out;
3485 for (i=0; i<MAX_SCATTERH; i++) {
3486 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
3487 *p++ =PADDR (dispatch);
3488 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
3489 *p++ =offsetof (struct dsb, data[i]);
3490 }
3491
3492 BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out));
3493
3494 p = scr->data_out;
3495 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) {
3496 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
3497 *p++ =PADDR (dispatch);
3498 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
3499 *p++ =offsetof (struct dsb, data[i]);
3500 }
3501
3502 BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out));
3503 }
3504
3505 /*==========================================================
3506 **
3507 **
3508 ** Copy and rebind a script.
3509 **
3510 **
3511 **==========================================================
3512 */
3513
3514 static void __init
ncr_script_copy_and_bind(struct ncb * np,ncrcmd * src,ncrcmd * dst,int len)3515 ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len)
3516 {
3517 ncrcmd opcode, new, old, tmp1, tmp2;
3518 ncrcmd *start, *end;
3519 int relocs;
3520 int opchanged = 0;
3521
3522 start = src;
3523 end = src + len/4;
3524
3525 while (src < end) {
3526
3527 opcode = *src++;
3528 *dst++ = cpu_to_scr(opcode);
3529
3530 /*
3531 ** If we forget to change the length
3532 ** in struct script, a field will be
3533 ** padded with 0. This is an illegal
3534 ** command.
3535 */
3536
3537 if (opcode == 0) {
3538 printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n",
3539 ncr_name(np), (int) (src-start-1));
3540 mdelay(1000);
3541 }
3542
3543 if (DEBUG_FLAGS & DEBUG_SCRIPT)
3544 printk (KERN_DEBUG "%p: <%x>\n",
3545 (src-1), (unsigned)opcode);
3546
3547 /*
3548 ** We don't have to decode ALL commands
3549 */
3550 switch (opcode >> 28) {
3551
3552 case 0xc:
3553 /*
3554 ** COPY has TWO arguments.
3555 */
3556 relocs = 2;
3557 tmp1 = src[0];
3558 #ifdef RELOC_KVAR
3559 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3560 tmp1 = 0;
3561 #endif
3562 tmp2 = src[1];
3563 #ifdef RELOC_KVAR
3564 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3565 tmp2 = 0;
3566 #endif
3567 if ((tmp1 ^ tmp2) & 3) {
3568 printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n",
3569 ncr_name(np), (int) (src-start-1));
3570 mdelay(1000);
3571 }
3572 /*
3573 ** If PREFETCH feature not enabled, remove
3574 ** the NO FLUSH bit if present.
3575 */
3576 if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) {
3577 dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH);
3578 ++opchanged;
3579 }
3580 break;
3581
3582 case 0x0:
3583 /*
3584 ** MOVE (absolute address)
3585 */
3586 relocs = 1;
3587 break;
3588
3589 case 0x8:
3590 /*
3591 ** JUMP / CALL
3592 ** don't relocate if relative :-)
3593 */
3594 if (opcode & 0x00800000)
3595 relocs = 0;
3596 else
3597 relocs = 1;
3598 break;
3599
3600 case 0x4:
3601 case 0x5:
3602 case 0x6:
3603 case 0x7:
3604 relocs = 1;
3605 break;
3606
3607 default:
3608 relocs = 0;
3609 break;
3610 }
3611
3612 if (relocs) {
3613 while (relocs--) {
3614 old = *src++;
3615
3616 switch (old & RELOC_MASK) {
3617 case RELOC_REGISTER:
3618 new = (old & ~RELOC_MASK) + np->paddr;
3619 break;
3620 case RELOC_LABEL:
3621 new = (old & ~RELOC_MASK) + np->p_script;
3622 break;
3623 case RELOC_LABELH:
3624 new = (old & ~RELOC_MASK) + np->p_scripth;
3625 break;
3626 case RELOC_SOFTC:
3627 new = (old & ~RELOC_MASK) + np->p_ncb;
3628 break;
3629 #ifdef RELOC_KVAR
3630 case RELOC_KVAR:
3631 if (((old & ~RELOC_MASK) <
3632 SCRIPT_KVAR_FIRST) ||
3633 ((old & ~RELOC_MASK) >
3634 SCRIPT_KVAR_LAST))
3635 panic("ncr KVAR out of range");
3636 new = vtophys(script_kvars[old &
3637 ~RELOC_MASK]);
3638 break;
3639 #endif
3640 case 0:
3641 /* Don't relocate a 0 address. */
3642 if (old == 0) {
3643 new = old;
3644 break;
3645 }
3646 fallthrough;
3647 default:
3648 panic("ncr_script_copy_and_bind: weird relocation %x\n", old);
3649 break;
3650 }
3651
3652 *dst++ = cpu_to_scr(new);
3653 }
3654 } else
3655 *dst++ = cpu_to_scr(*src++);
3656
3657 }
3658 }
3659
3660 /*
3661 ** Linux host data structure
3662 */
3663
3664 struct host_data {
3665 struct ncb *ncb;
3666 };
3667
3668 #define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg)
3669
ncr_print_msg(struct ccb * cp,char * label,u_char * msg)3670 static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg)
3671 {
3672 PRINT_ADDR(cp->cmd, "%s: ", label);
3673
3674 spi_print_msg(msg);
3675 printk("\n");
3676 }
3677
3678 /*==========================================================
3679 **
3680 ** NCR chip clock divisor table.
3681 ** Divisors are multiplied by 10,000,000 in order to make
3682 ** calculations more simple.
3683 **
3684 **==========================================================
3685 */
3686
3687 #define _5M 5000000
3688 static u_long div_10M[] =
3689 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3690
3691
3692 /*===============================================================
3693 **
3694 ** Prepare io register values used by ncr_init() according
3695 ** to selected and supported features.
3696 **
3697 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3698 ** transfers. 32,64,128 are only supported by 875 and 895 chips.
3699 ** We use log base 2 (burst length) as internal code, with
3700 ** value 0 meaning "burst disabled".
3701 **
3702 **===============================================================
3703 */
3704
3705 /*
3706 * Burst length from burst code.
3707 */
3708 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3709
3710 /*
3711 * Burst code from io register bits. Burst enable is ctest0 for c720
3712 */
3713 #define burst_code(dmode, ctest0) \
3714 (ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1
3715
3716 /*
3717 * Set initial io register bits from burst code.
3718 */
ncr_init_burst(struct ncb * np,u_char bc)3719 static inline void ncr_init_burst(struct ncb *np, u_char bc)
3720 {
3721 u_char *be = &np->rv_ctest0;
3722 *be &= ~0x80;
3723 np->rv_dmode &= ~(0x3 << 6);
3724 np->rv_ctest5 &= ~0x4;
3725
3726 if (!bc) {
3727 *be |= 0x80;
3728 } else {
3729 --bc;
3730 np->rv_dmode |= ((bc & 0x3) << 6);
3731 np->rv_ctest5 |= (bc & 0x4);
3732 }
3733 }
3734
ncr_prepare_setting(struct ncb * np)3735 static void __init ncr_prepare_setting(struct ncb *np)
3736 {
3737 u_char burst_max;
3738 u_long period;
3739 int i;
3740
3741 /*
3742 ** Save assumed BIOS setting
3743 */
3744
3745 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
3746 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
3747 np->sv_dmode = INB(nc_dmode) & 0xce;
3748 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
3749 np->sv_ctest0 = INB(nc_ctest0) & 0x84;
3750 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
3751 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
3752 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
3753 np->sv_gpcntl = INB(nc_gpcntl);
3754 np->sv_stest2 = INB(nc_stest2) & 0x20;
3755 np->sv_stest4 = INB(nc_stest4);
3756
3757 /*
3758 ** Wide ?
3759 */
3760
3761 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
3762
3763 /*
3764 * Guess the frequency of the chip's clock.
3765 */
3766 if (np->features & FE_ULTRA)
3767 np->clock_khz = 80000;
3768 else
3769 np->clock_khz = 40000;
3770
3771 /*
3772 * Get the clock multiplier factor.
3773 */
3774 if (np->features & FE_QUAD)
3775 np->multiplier = 4;
3776 else if (np->features & FE_DBLR)
3777 np->multiplier = 2;
3778 else
3779 np->multiplier = 1;
3780
3781 /*
3782 * Measure SCSI clock frequency for chips
3783 * it may vary from assumed one.
3784 */
3785 if (np->features & FE_VARCLK)
3786 ncr_getclock(np, np->multiplier);
3787
3788 /*
3789 * Divisor to be used for async (timer pre-scaler).
3790 */
3791 i = np->clock_divn - 1;
3792 while (--i >= 0) {
3793 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3794 ++i;
3795 break;
3796 }
3797 }
3798 np->rv_scntl3 = i+1;
3799
3800 /*
3801 * Minimum synchronous period factor supported by the chip.
3802 * Btw, 'period' is in tenths of nanoseconds.
3803 */
3804
3805 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3806 if (period <= 250) np->minsync = 10;
3807 else if (period <= 303) np->minsync = 11;
3808 else if (period <= 500) np->minsync = 12;
3809 else np->minsync = (period + 40 - 1) / 40;
3810
3811 /*
3812 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3813 */
3814
3815 if (np->minsync < 25 && !(np->features & FE_ULTRA))
3816 np->minsync = 25;
3817
3818 /*
3819 * Maximum synchronous period factor supported by the chip.
3820 */
3821
3822 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3823 np->maxsync = period > 2540 ? 254 : period / 10;
3824
3825 /*
3826 ** Prepare initial value of other IO registers
3827 */
3828 #if defined SCSI_NCR_TRUST_BIOS_SETTING
3829 np->rv_scntl0 = np->sv_scntl0;
3830 np->rv_dmode = np->sv_dmode;
3831 np->rv_dcntl = np->sv_dcntl;
3832 np->rv_ctest0 = np->sv_ctest0;
3833 np->rv_ctest3 = np->sv_ctest3;
3834 np->rv_ctest4 = np->sv_ctest4;
3835 np->rv_ctest5 = np->sv_ctest5;
3836 burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
3837 #else
3838
3839 /*
3840 ** Select burst length (dwords)
3841 */
3842 burst_max = driver_setup.burst_max;
3843 if (burst_max == 255)
3844 burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
3845 if (burst_max > 7)
3846 burst_max = 7;
3847 if (burst_max > np->maxburst)
3848 burst_max = np->maxburst;
3849
3850 /*
3851 ** Select all supported special features
3852 */
3853 if (np->features & FE_ERL)
3854 np->rv_dmode |= ERL; /* Enable Read Line */
3855 if (np->features & FE_BOF)
3856 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3857 if (np->features & FE_ERMP)
3858 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3859 if (np->features & FE_PFEN)
3860 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3861 if (np->features & FE_CLSE)
3862 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3863 if (np->features & FE_WRIE)
3864 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3865 if (np->features & FE_DFS)
3866 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3867 if (np->features & FE_MUX)
3868 np->rv_ctest4 |= MUX; /* Host bus multiplex mode */
3869 if (np->features & FE_EA)
3870 np->rv_dcntl |= EA; /* Enable ACK */
3871 if (np->features & FE_EHP)
3872 np->rv_ctest0 |= EHP; /* Even host parity */
3873
3874 /*
3875 ** Select some other
3876 */
3877 if (driver_setup.master_parity)
3878 np->rv_ctest4 |= MPEE; /* Master parity checking */
3879 if (driver_setup.scsi_parity)
3880 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
3881
3882 /*
3883 ** Get SCSI addr of host adapter (set by bios?).
3884 */
3885 if (np->myaddr == 255) {
3886 np->myaddr = INB(nc_scid) & 0x07;
3887 if (!np->myaddr)
3888 np->myaddr = SCSI_NCR_MYADDR;
3889 }
3890
3891 #endif /* SCSI_NCR_TRUST_BIOS_SETTING */
3892
3893 /*
3894 * Prepare initial io register bits for burst length
3895 */
3896 ncr_init_burst(np, burst_max);
3897
3898 /*
3899 ** Set SCSI BUS mode.
3900 **
3901 ** - ULTRA2 chips (895/895A/896) report the current
3902 ** BUS mode through the STEST4 IO register.
3903 ** - For previous generation chips (825/825A/875),
3904 ** user has to tell us how to check against HVD,
3905 ** since a 100% safe algorithm is not possible.
3906 */
3907 np->scsi_mode = SMODE_SE;
3908 if (np->features & FE_DIFF) {
3909 switch(driver_setup.diff_support) {
3910 case 4: /* Trust previous settings if present, then GPIO3 */
3911 if (np->sv_scntl3) {
3912 if (np->sv_stest2 & 0x20)
3913 np->scsi_mode = SMODE_HVD;
3914 break;
3915 }
3916 fallthrough;
3917 case 3: /* SYMBIOS controllers report HVD through GPIO3 */
3918 if (INB(nc_gpreg) & 0x08)
3919 break;
3920 fallthrough;
3921 case 2: /* Set HVD unconditionally */
3922 np->scsi_mode = SMODE_HVD;
3923 fallthrough;
3924 case 1: /* Trust previous settings for HVD */
3925 if (np->sv_stest2 & 0x20)
3926 np->scsi_mode = SMODE_HVD;
3927 break;
3928 default:/* Don't care about HVD */
3929 break;
3930 }
3931 }
3932 if (np->scsi_mode == SMODE_HVD)
3933 np->rv_stest2 |= 0x20;
3934
3935 /*
3936 ** Set LED support from SCRIPTS.
3937 ** Ignore this feature for boards known to use a
3938 ** specific GPIO wiring and for the 895A or 896
3939 ** that drive the LED directly.
3940 ** Also probe initial setting of GPIO0 as output.
3941 */
3942 if ((driver_setup.led_pin) &&
3943 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
3944 np->features |= FE_LED0;
3945
3946 /*
3947 ** Set irq mode.
3948 */
3949 switch(driver_setup.irqm & 3) {
3950 case 2:
3951 np->rv_dcntl |= IRQM;
3952 break;
3953 case 1:
3954 np->rv_dcntl |= (np->sv_dcntl & IRQM);
3955 break;
3956 default:
3957 break;
3958 }
3959
3960 /*
3961 ** Configure targets according to driver setup.
3962 ** Allow to override sync, wide and NOSCAN from
3963 ** boot command line.
3964 */
3965 for (i = 0 ; i < MAX_TARGET ; i++) {
3966 struct tcb *tp = &np->target[i];
3967
3968 tp->usrsync = driver_setup.default_sync;
3969 tp->usrwide = driver_setup.max_wide;
3970 tp->usrtags = MAX_TAGS;
3971 tp->period = 0xffff;
3972 if (!driver_setup.disconnection)
3973 np->target[i].usrflag = UF_NODISC;
3974 }
3975
3976 /*
3977 ** Announce all that stuff to user.
3978 */
3979
3980 printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np),
3981 np->myaddr,
3982 np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10),
3983 (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity",
3984 (np->rv_stest2 & 0x20) ? ", Differential" : "");
3985
3986 if (bootverbose > 1) {
3987 printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3988 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3989 ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
3990 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
3991
3992 printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3993 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3994 ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
3995 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3996 }
3997
3998 if (bootverbose && np->paddr2)
3999 printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n",
4000 ncr_name(np), np->paddr2);
4001 }
4002
4003 /*==========================================================
4004 **
4005 **
4006 ** Done SCSI commands list management.
4007 **
4008 ** We donnot enter the scsi_done() callback immediately
4009 ** after a command has been seen as completed but we
4010 ** insert it into a list which is flushed outside any kind
4011 ** of driver critical section.
4012 ** This allows to do minimal stuff under interrupt and
4013 ** inside critical sections and to also avoid locking up
4014 ** on recursive calls to driver entry points under SMP.
4015 ** In fact, the only kernel point which is entered by the
4016 ** driver with a driver lock set is kmalloc(GFP_ATOMIC)
4017 ** that shall not reenter the driver under any circumstances,
4018 ** AFAIK.
4019 **
4020 **==========================================================
4021 */
ncr_queue_done_cmd(struct ncb * np,struct scsi_cmnd * cmd)4022 static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd)
4023 {
4024 unmap_scsi_data(np, cmd);
4025 cmd->host_scribble = (char *) np->done_list;
4026 np->done_list = cmd;
4027 }
4028
ncr_flush_done_cmds(struct scsi_cmnd * lcmd)4029 static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd)
4030 {
4031 struct scsi_cmnd *cmd;
4032
4033 while (lcmd) {
4034 cmd = lcmd;
4035 lcmd = (struct scsi_cmnd *) cmd->host_scribble;
4036 cmd->scsi_done(cmd);
4037 }
4038 }
4039
4040 /*==========================================================
4041 **
4042 **
4043 ** Prepare the next negotiation message if needed.
4044 **
4045 ** Fill in the part of message buffer that contains the
4046 ** negotiation and the nego_status field of the CCB.
4047 ** Returns the size of the message in bytes.
4048 **
4049 **
4050 **==========================================================
4051 */
4052
4053
ncr_prepare_nego(struct ncb * np,struct ccb * cp,u_char * msgptr)4054 static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr)
4055 {
4056 struct tcb *tp = &np->target[cp->target];
4057 int msglen = 0;
4058 int nego = 0;
4059 struct scsi_target *starget = tp->starget;
4060
4061 /* negotiate wide transfers ? */
4062 if (!tp->widedone) {
4063 if (spi_support_wide(starget)) {
4064 nego = NS_WIDE;
4065 } else
4066 tp->widedone=1;
4067 }
4068
4069 /* negotiate synchronous transfers? */
4070 if (!nego && !tp->period) {
4071 if (spi_support_sync(starget)) {
4072 nego = NS_SYNC;
4073 } else {
4074 tp->period =0xffff;
4075 dev_info(&starget->dev, "target did not report SYNC.\n");
4076 }
4077 }
4078
4079 switch (nego) {
4080 case NS_SYNC:
4081 msglen += spi_populate_sync_msg(msgptr + msglen,
4082 tp->maxoffs ? tp->minsync : 0, tp->maxoffs);
4083 break;
4084 case NS_WIDE:
4085 msglen += spi_populate_width_msg(msgptr + msglen, tp->usrwide);
4086 break;
4087 }
4088
4089 cp->nego_status = nego;
4090
4091 if (nego) {
4092 tp->nego_cp = cp;
4093 if (DEBUG_FLAGS & DEBUG_NEGO) {
4094 ncr_print_msg(cp, nego == NS_WIDE ?
4095 "wide msgout":"sync_msgout", msgptr);
4096 }
4097 }
4098
4099 return msglen;
4100 }
4101
4102
4103
4104 /*==========================================================
4105 **
4106 **
4107 ** Start execution of a SCSI command.
4108 ** This is called from the generic SCSI driver.
4109 **
4110 **
4111 **==========================================================
4112 */
ncr_queue_command(struct ncb * np,struct scsi_cmnd * cmd)4113 static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd)
4114 {
4115 struct scsi_device *sdev = cmd->device;
4116 struct tcb *tp = &np->target[sdev->id];
4117 struct lcb *lp = tp->lp[sdev->lun];
4118 struct ccb *cp;
4119
4120 int segments;
4121 u_char idmsg, *msgptr;
4122 u32 msglen;
4123 int direction;
4124 u32 lastp, goalp;
4125
4126 /*---------------------------------------------
4127 **
4128 ** Some shortcuts ...
4129 **
4130 **---------------------------------------------
4131 */
4132 if ((sdev->id == np->myaddr ) ||
4133 (sdev->id >= MAX_TARGET) ||
4134 (sdev->lun >= MAX_LUN )) {
4135 return(DID_BAD_TARGET);
4136 }
4137
4138 /*---------------------------------------------
4139 **
4140 ** Complete the 1st TEST UNIT READY command
4141 ** with error condition if the device is
4142 ** flagged NOSCAN, in order to speed up
4143 ** the boot.
4144 **
4145 **---------------------------------------------
4146 */
4147 if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) &&
4148 (tp->usrflag & UF_NOSCAN)) {
4149 tp->usrflag &= ~UF_NOSCAN;
4150 return DID_BAD_TARGET;
4151 }
4152
4153 if (DEBUG_FLAGS & DEBUG_TINY) {
4154 PRINT_ADDR(cmd, "CMD=%x ", cmd->cmnd[0]);
4155 }
4156
4157 /*---------------------------------------------------
4158 **
4159 ** Assign a ccb / bind cmd.
4160 ** If resetting, shorten settle_time if necessary
4161 ** in order to avoid spurious timeouts.
4162 ** If resetting or no free ccb,
4163 ** insert cmd into the waiting list.
4164 **
4165 **----------------------------------------------------
4166 */
4167 if (np->settle_time && cmd->request->timeout >= HZ) {
4168 u_long tlimit = jiffies + cmd->request->timeout - HZ;
4169 if (time_after(np->settle_time, tlimit))
4170 np->settle_time = tlimit;
4171 }
4172
4173 if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) {
4174 insert_into_waiting_list(np, cmd);
4175 return(DID_OK);
4176 }
4177 cp->cmd = cmd;
4178
4179 /*----------------------------------------------------
4180 **
4181 ** Build the identify / tag / sdtr message
4182 **
4183 **----------------------------------------------------
4184 */
4185
4186 idmsg = IDENTIFY(0, sdev->lun);
4187
4188 if (cp ->tag != NO_TAG ||
4189 (cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC)))
4190 idmsg |= 0x40;
4191
4192 msgptr = cp->scsi_smsg;
4193 msglen = 0;
4194 msgptr[msglen++] = idmsg;
4195
4196 if (cp->tag != NO_TAG) {
4197 char order = np->order;
4198
4199 /*
4200 ** Force ordered tag if necessary to avoid timeouts
4201 ** and to preserve interactivity.
4202 */
4203 if (lp && time_after(jiffies, lp->tags_stime)) {
4204 if (lp->tags_smap) {
4205 order = ORDERED_QUEUE_TAG;
4206 if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){
4207 PRINT_ADDR(cmd,
4208 "ordered tag forced.\n");
4209 }
4210 }
4211 lp->tags_stime = jiffies + 3*HZ;
4212 lp->tags_smap = lp->tags_umap;
4213 }
4214
4215 if (order == 0) {
4216 /*
4217 ** Ordered write ops, unordered read ops.
4218 */
4219 switch (cmd->cmnd[0]) {
4220 case 0x08: /* READ_SMALL (6) */
4221 case 0x28: /* READ_BIG (10) */
4222 case 0xa8: /* READ_HUGE (12) */
4223 order = SIMPLE_QUEUE_TAG;
4224 break;
4225 default:
4226 order = ORDERED_QUEUE_TAG;
4227 }
4228 }
4229 msgptr[msglen++] = order;
4230 /*
4231 ** Actual tags are numbered 1,3,5,..2*MAXTAGS+1,
4232 ** since we may have to deal with devices that have
4233 ** problems with #TAG 0 or too great #TAG numbers.
4234 */
4235 msgptr[msglen++] = (cp->tag << 1) + 1;
4236 }
4237
4238 /*----------------------------------------------------
4239 **
4240 ** Build the data descriptors
4241 **
4242 **----------------------------------------------------
4243 */
4244
4245 direction = cmd->sc_data_direction;
4246 if (direction != DMA_NONE) {
4247 segments = ncr_scatter(np, cp, cp->cmd);
4248 if (segments < 0) {
4249 ncr_free_ccb(np, cp);
4250 return(DID_ERROR);
4251 }
4252 }
4253 else {
4254 cp->data_len = 0;
4255 segments = 0;
4256 }
4257
4258 /*---------------------------------------------------
4259 **
4260 ** negotiation required?
4261 **
4262 ** (nego_status is filled by ncr_prepare_nego())
4263 **
4264 **---------------------------------------------------
4265 */
4266
4267 cp->nego_status = 0;
4268
4269 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
4270 msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
4271 }
4272
4273 /*----------------------------------------------------
4274 **
4275 ** Determine xfer direction.
4276 **
4277 **----------------------------------------------------
4278 */
4279 if (!cp->data_len)
4280 direction = DMA_NONE;
4281
4282 /*
4283 ** If data direction is BIDIRECTIONAL, speculate FROM_DEVICE
4284 ** but prepare alternate pointers for TO_DEVICE in case
4285 ** of our speculation will be just wrong.
4286 ** SCRIPTS will swap values if needed.
4287 */
4288 switch(direction) {
4289 case DMA_BIDIRECTIONAL:
4290 case DMA_TO_DEVICE:
4291 goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8;
4292 if (segments <= MAX_SCATTERL)
4293 lastp = goalp - 8 - (segments * 16);
4294 else {
4295 lastp = NCB_SCRIPTH_PHYS (np, hdata_out2);
4296 lastp -= (segments - MAX_SCATTERL) * 16;
4297 }
4298 if (direction != DMA_BIDIRECTIONAL)
4299 break;
4300 cp->phys.header.wgoalp = cpu_to_scr(goalp);
4301 cp->phys.header.wlastp = cpu_to_scr(lastp);
4302 fallthrough;
4303 case DMA_FROM_DEVICE:
4304 goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8;
4305 if (segments <= MAX_SCATTERL)
4306 lastp = goalp - 8 - (segments * 16);
4307 else {
4308 lastp = NCB_SCRIPTH_PHYS (np, hdata_in2);
4309 lastp -= (segments - MAX_SCATTERL) * 16;
4310 }
4311 break;
4312 default:
4313 case DMA_NONE:
4314 lastp = goalp = NCB_SCRIPT_PHYS (np, no_data);
4315 break;
4316 }
4317
4318 /*
4319 ** Set all pointers values needed by SCRIPTS.
4320 ** If direction is unknown, start at data_io.
4321 */
4322 cp->phys.header.lastp = cpu_to_scr(lastp);
4323 cp->phys.header.goalp = cpu_to_scr(goalp);
4324
4325 if (direction == DMA_BIDIRECTIONAL)
4326 cp->phys.header.savep =
4327 cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io));
4328 else
4329 cp->phys.header.savep= cpu_to_scr(lastp);
4330
4331 /*
4332 ** Save the initial data pointer in order to be able
4333 ** to redo the command.
4334 */
4335 cp->startp = cp->phys.header.savep;
4336
4337 /*----------------------------------------------------
4338 **
4339 ** fill in ccb
4340 **
4341 **----------------------------------------------------
4342 **
4343 **
4344 ** physical -> virtual backlink
4345 ** Generic SCSI command
4346 */
4347
4348 /*
4349 ** Startqueue
4350 */
4351 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
4352 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa));
4353 /*
4354 ** select
4355 */
4356 cp->phys.select.sel_id = sdev_id(sdev);
4357 cp->phys.select.sel_scntl3 = tp->wval;
4358 cp->phys.select.sel_sxfer = tp->sval;
4359 /*
4360 ** message
4361 */
4362 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg));
4363 cp->phys.smsg.size = cpu_to_scr(msglen);
4364
4365 /*
4366 ** command
4367 */
4368 memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf)));
4369 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0]));
4370 cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len);
4371
4372 /*
4373 ** status
4374 */
4375 cp->actualquirks = 0;
4376 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4377 cp->scsi_status = SAM_STAT_ILLEGAL;
4378 cp->parity_status = 0;
4379
4380 cp->xerr_status = XE_OK;
4381 #if 0
4382 cp->sync_status = tp->sval;
4383 cp->wide_status = tp->wval;
4384 #endif
4385
4386 /*----------------------------------------------------
4387 **
4388 ** Critical region: start this job.
4389 **
4390 **----------------------------------------------------
4391 */
4392
4393 /* activate this job. */
4394 cp->magic = CCB_MAGIC;
4395
4396 /*
4397 ** insert next CCBs into start queue.
4398 ** 2 max at a time is enough to flush the CCB wait queue.
4399 */
4400 cp->auto_sense = 0;
4401 if (lp)
4402 ncr_start_next_ccb(np, lp, 2);
4403 else
4404 ncr_put_start_queue(np, cp);
4405
4406 /* Command is successfully queued. */
4407
4408 return DID_OK;
4409 }
4410
4411
4412 /*==========================================================
4413 **
4414 **
4415 ** Insert a CCB into the start queue and wake up the
4416 ** SCRIPTS processor.
4417 **
4418 **
4419 **==========================================================
4420 */
4421
ncr_start_next_ccb(struct ncb * np,struct lcb * lp,int maxn)4422 static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn)
4423 {
4424 struct list_head *qp;
4425 struct ccb *cp;
4426
4427 if (lp->held_ccb)
4428 return;
4429
4430 while (maxn-- && lp->queuedccbs < lp->queuedepth) {
4431 qp = ncr_list_pop(&lp->wait_ccbq);
4432 if (!qp)
4433 break;
4434 ++lp->queuedccbs;
4435 cp = list_entry(qp, struct ccb, link_ccbq);
4436 list_add_tail(qp, &lp->busy_ccbq);
4437 lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] =
4438 cpu_to_scr(CCB_PHYS (cp, restart));
4439 ncr_put_start_queue(np, cp);
4440 }
4441 }
4442
ncr_put_start_queue(struct ncb * np,struct ccb * cp)4443 static void ncr_put_start_queue(struct ncb *np, struct ccb *cp)
4444 {
4445 u16 qidx;
4446
4447 /*
4448 ** insert into start queue.
4449 */
4450 if (!np->squeueput) np->squeueput = 1;
4451 qidx = np->squeueput + 2;
4452 if (qidx >= MAX_START + MAX_START) qidx = 1;
4453
4454 np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
4455 MEMORY_BARRIER();
4456 np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start));
4457
4458 np->squeueput = qidx;
4459 ++np->queuedccbs;
4460 cp->queued = 1;
4461
4462 if (DEBUG_FLAGS & DEBUG_QUEUE)
4463 printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput);
4464
4465 /*
4466 ** Script processor may be waiting for reselect.
4467 ** Wake it up.
4468 */
4469 MEMORY_BARRIER();
4470 OUTB (nc_istat, SIGP);
4471 }
4472
4473
ncr_reset_scsi_bus(struct ncb * np,int enab_int,int settle_delay)4474 static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay)
4475 {
4476 u32 term;
4477 int retv = 0;
4478
4479 np->settle_time = jiffies + settle_delay * HZ;
4480
4481 if (bootverbose > 1)
4482 printk("%s: resetting, "
4483 "command processing suspended for %d seconds\n",
4484 ncr_name(np), settle_delay);
4485
4486 ncr_chip_reset(np, 100);
4487 udelay(2000); /* The 895 needs time for the bus mode to settle */
4488 if (enab_int)
4489 OUTW (nc_sien, RST);
4490 /*
4491 ** Enable Tolerant, reset IRQD if present and
4492 ** properly set IRQ mode, prior to resetting the bus.
4493 */
4494 OUTB (nc_stest3, TE);
4495 OUTB (nc_scntl1, CRST);
4496 udelay(200);
4497
4498 if (!driver_setup.bus_check)
4499 goto out;
4500 /*
4501 ** Check for no terminators or SCSI bus shorts to ground.
4502 ** Read SCSI data bus, data parity bits and control signals.
4503 ** We are expecting RESET to be TRUE and other signals to be
4504 ** FALSE.
4505 */
4506
4507 term = INB(nc_sstat0);
4508 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
4509 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
4510 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
4511 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
4512 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
4513
4514 if (!(np->features & FE_WIDE))
4515 term &= 0x3ffff;
4516
4517 if (term != (2<<7)) {
4518 printk("%s: suspicious SCSI data while resetting the BUS.\n",
4519 ncr_name(np));
4520 printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
4521 "0x%lx, expecting 0x%lx\n",
4522 ncr_name(np),
4523 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
4524 (u_long)term, (u_long)(2<<7));
4525 if (driver_setup.bus_check == 1)
4526 retv = 1;
4527 }
4528 out:
4529 OUTB (nc_scntl1, 0);
4530 return retv;
4531 }
4532
4533 /*
4534 * Start reset process.
4535 * If reset in progress do nothing.
4536 * The interrupt handler will reinitialize the chip.
4537 * The timeout handler will wait for settle_time before
4538 * clearing it and so resuming command processing.
4539 */
ncr_start_reset(struct ncb * np)4540 static void ncr_start_reset(struct ncb *np)
4541 {
4542 if (!np->settle_time) {
4543 ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
4544 }
4545 }
4546
4547 /*==========================================================
4548 **
4549 **
4550 ** Reset the SCSI BUS.
4551 ** This is called from the generic SCSI driver.
4552 **
4553 **
4554 **==========================================================
4555 */
ncr_reset_bus(struct ncb * np,struct scsi_cmnd * cmd,int sync_reset)4556 static int ncr_reset_bus (struct ncb *np, struct scsi_cmnd *cmd, int sync_reset)
4557 {
4558 /* struct scsi_device *device = cmd->device; */
4559 struct ccb *cp;
4560 int found;
4561
4562 /*
4563 * Return immediately if reset is in progress.
4564 */
4565 if (np->settle_time) {
4566 return FAILED;
4567 }
4568 /*
4569 * Start the reset process.
4570 * The script processor is then assumed to be stopped.
4571 * Commands will now be queued in the waiting list until a settle
4572 * delay of 2 seconds will be completed.
4573 */
4574 ncr_start_reset(np);
4575 /*
4576 * First, look in the wakeup list
4577 */
4578 for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) {
4579 /*
4580 ** look for the ccb of this command.
4581 */
4582 if (cp->host_status == HS_IDLE) continue;
4583 if (cp->cmd == cmd) {
4584 found = 1;
4585 break;
4586 }
4587 }
4588 /*
4589 * Then, look in the waiting list
4590 */
4591 if (!found && retrieve_from_waiting_list(0, np, cmd))
4592 found = 1;
4593 /*
4594 * Wake-up all awaiting commands with DID_RESET.
4595 */
4596 reset_waiting_list(np);
4597 /*
4598 * Wake-up all pending commands with HS_RESET -> DID_RESET.
4599 */
4600 ncr_wakeup(np, HS_RESET);
4601 /*
4602 * If the involved command was not in a driver queue, and the
4603 * scsi driver told us reset is synchronous, and the command is not
4604 * currently in the waiting list, complete it with DID_RESET status,
4605 * in order to keep it alive.
4606 */
4607 if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) {
4608 set_host_byte(cmd, DID_RESET);
4609 ncr_queue_done_cmd(np, cmd);
4610 }
4611
4612 return SUCCESS;
4613 }
4614
4615 #if 0 /* unused and broken.. */
4616 /*==========================================================
4617 **
4618 **
4619 ** Abort an SCSI command.
4620 ** This is called from the generic SCSI driver.
4621 **
4622 **
4623 **==========================================================
4624 */
4625 static int ncr_abort_command (struct ncb *np, struct scsi_cmnd *cmd)
4626 {
4627 /* struct scsi_device *device = cmd->device; */
4628 struct ccb *cp;
4629 int found;
4630 int retv;
4631
4632 /*
4633 * First, look for the scsi command in the waiting list
4634 */
4635 if (remove_from_waiting_list(np, cmd)) {
4636 set_host_byte(cmd, DID_ABORT);
4637 ncr_queue_done_cmd(np, cmd);
4638 return SCSI_ABORT_SUCCESS;
4639 }
4640
4641 /*
4642 * Then, look in the wakeup list
4643 */
4644 for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) {
4645 /*
4646 ** look for the ccb of this command.
4647 */
4648 if (cp->host_status == HS_IDLE) continue;
4649 if (cp->cmd == cmd) {
4650 found = 1;
4651 break;
4652 }
4653 }
4654
4655 if (!found) {
4656 return SCSI_ABORT_NOT_RUNNING;
4657 }
4658
4659 if (np->settle_time) {
4660 return SCSI_ABORT_SNOOZE;
4661 }
4662
4663 /*
4664 ** If the CCB is active, patch schedule jumps for the
4665 ** script to abort the command.
4666 */
4667
4668 switch(cp->host_status) {
4669 case HS_BUSY:
4670 case HS_NEGOTIATE:
4671 printk ("%s: abort ccb=%p (cancel)\n", ncr_name (np), cp);
4672 cp->start.schedule.l_paddr =
4673 cpu_to_scr(NCB_SCRIPTH_PHYS (np, cancel));
4674 retv = SCSI_ABORT_PENDING;
4675 break;
4676 case HS_DISCONNECT:
4677 cp->restart.schedule.l_paddr =
4678 cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort));
4679 retv = SCSI_ABORT_PENDING;
4680 break;
4681 default:
4682 retv = SCSI_ABORT_NOT_RUNNING;
4683 break;
4684
4685 }
4686
4687 /*
4688 ** If there are no requests, the script
4689 ** processor will sleep on SEL_WAIT_RESEL.
4690 ** Let's wake it up, since it may have to work.
4691 */
4692 OUTB (nc_istat, SIGP);
4693
4694 return retv;
4695 }
4696 #endif
4697
ncr_detach(struct ncb * np)4698 static void ncr_detach(struct ncb *np)
4699 {
4700 struct ccb *cp;
4701 struct tcb *tp;
4702 struct lcb *lp;
4703 int target, lun;
4704 int i;
4705 char inst_name[16];
4706
4707 /* Local copy so we don't access np after freeing it! */
4708 strlcpy(inst_name, ncr_name(np), sizeof(inst_name));
4709
4710 printk("%s: releasing host resources\n", ncr_name(np));
4711
4712 /*
4713 ** Stop the ncr_timeout process
4714 ** Set release_stage to 1 and wait that ncr_timeout() set it to 2.
4715 */
4716
4717 #ifdef DEBUG_NCR53C8XX
4718 printk("%s: stopping the timer\n", ncr_name(np));
4719 #endif
4720 np->release_stage = 1;
4721 for (i = 50 ; i && np->release_stage != 2 ; i--)
4722 mdelay(100);
4723 if (np->release_stage != 2)
4724 printk("%s: the timer seems to be already stopped\n", ncr_name(np));
4725 else np->release_stage = 2;
4726
4727 /*
4728 ** Disable chip interrupts
4729 */
4730
4731 #ifdef DEBUG_NCR53C8XX
4732 printk("%s: disabling chip interrupts\n", ncr_name(np));
4733 #endif
4734 OUTW (nc_sien , 0);
4735 OUTB (nc_dien , 0);
4736
4737 /*
4738 ** Reset NCR chip
4739 ** Restore bios setting for automatic clock detection.
4740 */
4741
4742 printk("%s: resetting chip\n", ncr_name(np));
4743 ncr_chip_reset(np, 100);
4744
4745 OUTB(nc_dmode, np->sv_dmode);
4746 OUTB(nc_dcntl, np->sv_dcntl);
4747 OUTB(nc_ctest0, np->sv_ctest0);
4748 OUTB(nc_ctest3, np->sv_ctest3);
4749 OUTB(nc_ctest4, np->sv_ctest4);
4750 OUTB(nc_ctest5, np->sv_ctest5);
4751 OUTB(nc_gpcntl, np->sv_gpcntl);
4752 OUTB(nc_stest2, np->sv_stest2);
4753
4754 ncr_selectclock(np, np->sv_scntl3);
4755
4756 /*
4757 ** Free allocated ccb(s)
4758 */
4759
4760 while ((cp=np->ccb->link_ccb) != NULL) {
4761 np->ccb->link_ccb = cp->link_ccb;
4762 if (cp->host_status) {
4763 printk("%s: shall free an active ccb (host_status=%d)\n",
4764 ncr_name(np), cp->host_status);
4765 }
4766 #ifdef DEBUG_NCR53C8XX
4767 printk("%s: freeing ccb (%lx)\n", ncr_name(np), (u_long) cp);
4768 #endif
4769 m_free_dma(cp, sizeof(*cp), "CCB");
4770 }
4771
4772 /* Free allocated tp(s) */
4773
4774 for (target = 0; target < MAX_TARGET ; target++) {
4775 tp=&np->target[target];
4776 for (lun = 0 ; lun < MAX_LUN ; lun++) {
4777 lp = tp->lp[lun];
4778 if (lp) {
4779 #ifdef DEBUG_NCR53C8XX
4780 printk("%s: freeing lp (%lx)\n", ncr_name(np), (u_long) lp);
4781 #endif
4782 if (lp->jump_ccb != &lp->jump_ccb_0)
4783 m_free_dma(lp->jump_ccb,256,"JUMP_CCB");
4784 m_free_dma(lp, sizeof(*lp), "LCB");
4785 }
4786 }
4787 }
4788
4789 if (np->scripth0)
4790 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
4791 if (np->script0)
4792 m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
4793 if (np->ccb)
4794 m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
4795 m_free_dma(np, sizeof(struct ncb), "NCB");
4796
4797 printk("%s: host resources successfully released\n", inst_name);
4798 }
4799
4800 /*==========================================================
4801 **
4802 **
4803 ** Complete execution of a SCSI command.
4804 ** Signal completion to the generic SCSI driver.
4805 **
4806 **
4807 **==========================================================
4808 */
4809
ncr_complete(struct ncb * np,struct ccb * cp)4810 void ncr_complete (struct ncb *np, struct ccb *cp)
4811 {
4812 struct scsi_cmnd *cmd;
4813 struct tcb *tp;
4814 struct lcb *lp;
4815
4816 /*
4817 ** Sanity check
4818 */
4819
4820 if (!cp || cp->magic != CCB_MAGIC || !cp->cmd)
4821 return;
4822
4823 /*
4824 ** Print minimal debug information.
4825 */
4826
4827 if (DEBUG_FLAGS & DEBUG_TINY)
4828 printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp,
4829 cp->host_status,cp->scsi_status);
4830
4831 /*
4832 ** Get command, target and lun pointers.
4833 */
4834
4835 cmd = cp->cmd;
4836 cp->cmd = NULL;
4837 tp = &np->target[cmd->device->id];
4838 lp = tp->lp[cmd->device->lun];
4839
4840 /*
4841 ** We donnot queue more than 1 ccb per target
4842 ** with negotiation at any time. If this ccb was
4843 ** used for negotiation, clear this info in the tcb.
4844 */
4845
4846 if (cp == tp->nego_cp)
4847 tp->nego_cp = NULL;
4848
4849 /*
4850 ** If auto-sense performed, change scsi status.
4851 */
4852 if (cp->auto_sense) {
4853 cp->scsi_status = cp->auto_sense;
4854 }
4855
4856 /*
4857 ** If we were recovering from queue full or performing
4858 ** auto-sense, requeue skipped CCBs to the wait queue.
4859 */
4860
4861 if (lp && lp->held_ccb) {
4862 if (cp == lp->held_ccb) {
4863 list_splice_init(&lp->skip_ccbq, &lp->wait_ccbq);
4864 lp->held_ccb = NULL;
4865 }
4866 }
4867
4868 /*
4869 ** Check for parity errors.
4870 */
4871
4872 if (cp->parity_status > 1) {
4873 PRINT_ADDR(cmd, "%d parity error(s).\n",cp->parity_status);
4874 }
4875
4876 /*
4877 ** Check for extended errors.
4878 */
4879
4880 if (cp->xerr_status != XE_OK) {
4881 switch (cp->xerr_status) {
4882 case XE_EXTRA_DATA:
4883 PRINT_ADDR(cmd, "extraneous data discarded.\n");
4884 break;
4885 case XE_BAD_PHASE:
4886 PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n");
4887 break;
4888 default:
4889 PRINT_ADDR(cmd, "extended error %d.\n",
4890 cp->xerr_status);
4891 break;
4892 }
4893 if (cp->host_status==HS_COMPLETE)
4894 cp->host_status = HS_FAIL;
4895 }
4896
4897 /*
4898 ** Print out any error for debugging purpose.
4899 */
4900 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
4901 if (cp->host_status != HS_COMPLETE ||
4902 cp->scsi_status != SAM_STAT_GOOD) {
4903 PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x "
4904 "scsi_status=%x\n", cmd->cmnd[0],
4905 cp->host_status, cp->scsi_status);
4906 }
4907 }
4908
4909 /*
4910 ** Check the status.
4911 */
4912 cmd->result = 0;
4913 if ( (cp->host_status == HS_COMPLETE)
4914 && (cp->scsi_status == SAM_STAT_GOOD ||
4915 cp->scsi_status == SAM_STAT_CONDITION_MET)) {
4916 /*
4917 * All went well (GOOD status).
4918 * CONDITION MET status is returned on
4919 * `Pre-Fetch' or `Search data' success.
4920 */
4921 set_status_byte(cmd, cp->scsi_status);
4922
4923 /*
4924 ** @RESID@
4925 ** Could dig out the correct value for resid,
4926 ** but it would be quite complicated.
4927 */
4928 /* if (cp->phys.header.lastp != cp->phys.header.goalp) */
4929
4930 /*
4931 ** Allocate the lcb if not yet.
4932 */
4933 if (!lp)
4934 ncr_alloc_lcb (np, cmd->device->id, cmd->device->lun);
4935
4936 tp->bytes += cp->data_len;
4937 tp->transfers ++;
4938
4939 /*
4940 ** If tags was reduced due to queue full,
4941 ** increase tags if 1000 good status received.
4942 */
4943 if (lp && lp->usetags && lp->numtags < lp->maxtags) {
4944 ++lp->num_good;
4945 if (lp->num_good >= 1000) {
4946 lp->num_good = 0;
4947 ++lp->numtags;
4948 ncr_setup_tags (np, cmd->device);
4949 }
4950 }
4951 } else if ((cp->host_status == HS_COMPLETE)
4952 && (cp->scsi_status == SAM_STAT_CHECK_CONDITION)) {
4953 /*
4954 ** Check condition code
4955 */
4956 set_status_byte(cmd, SAM_STAT_CHECK_CONDITION);
4957
4958 /*
4959 ** Copy back sense data to caller's buffer.
4960 */
4961 memcpy(cmd->sense_buffer, cp->sense_buf,
4962 min_t(size_t, SCSI_SENSE_BUFFERSIZE,
4963 sizeof(cp->sense_buf)));
4964
4965 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
4966 u_char *p = cmd->sense_buffer;
4967 int i;
4968 PRINT_ADDR(cmd, "sense data:");
4969 for (i=0; i<14; i++) printk (" %x", *p++);
4970 printk (".\n");
4971 }
4972 } else if ((cp->host_status == HS_COMPLETE)
4973 && (cp->scsi_status == SAM_STAT_RESERVATION_CONFLICT)) {
4974 /*
4975 ** Reservation Conflict condition code
4976 */
4977 set_status_byte(cmd, SAM_STAT_RESERVATION_CONFLICT);
4978
4979 } else if ((cp->host_status == HS_COMPLETE)
4980 && (cp->scsi_status == SAM_STAT_BUSY ||
4981 cp->scsi_status == SAM_STAT_TASK_SET_FULL)) {
4982
4983 /*
4984 ** Target is busy.
4985 */
4986 set_status_byte(cmd, cp->scsi_status);
4987
4988 } else if ((cp->host_status == HS_SEL_TIMEOUT)
4989 || (cp->host_status == HS_TIMEOUT)) {
4990
4991 /*
4992 ** No response
4993 */
4994 set_status_byte(cmd, cp->scsi_status);
4995 set_host_byte(cmd, DID_TIME_OUT);
4996
4997 } else if (cp->host_status == HS_RESET) {
4998
4999 /*
5000 ** SCSI bus reset
5001 */
5002 set_status_byte(cmd, cp->scsi_status);
5003 set_host_byte(cmd, DID_RESET);
5004
5005 } else if (cp->host_status == HS_ABORTED) {
5006
5007 /*
5008 ** Transfer aborted
5009 */
5010 set_status_byte(cmd, cp->scsi_status);
5011 set_host_byte(cmd, DID_ABORT);
5012
5013 } else {
5014
5015 /*
5016 ** Other protocol messes
5017 */
5018 PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n",
5019 cp->host_status, cp->scsi_status, cp);
5020
5021 set_status_byte(cmd, cp->scsi_status);
5022 set_host_byte(cmd, DID_ERROR);
5023 }
5024
5025 /*
5026 ** trace output
5027 */
5028
5029 if (tp->usrflag & UF_TRACE) {
5030 u_char * p;
5031 int i;
5032 PRINT_ADDR(cmd, " CMD:");
5033 p = (u_char*) &cmd->cmnd[0];
5034 for (i=0; i<cmd->cmd_len; i++) printk (" %x", *p++);
5035
5036 if (cp->host_status==HS_COMPLETE) {
5037 switch (cp->scsi_status) {
5038 case SAM_STAT_GOOD:
5039 printk (" GOOD");
5040 break;
5041 case SAM_STAT_CHECK_CONDITION:
5042 printk (" SENSE:");
5043 p = (u_char*) &cmd->sense_buffer;
5044 for (i=0; i<14; i++)
5045 printk (" %x", *p++);
5046 break;
5047 default:
5048 printk (" STAT: %x\n", cp->scsi_status);
5049 break;
5050 }
5051 } else printk (" HOSTERROR: %x", cp->host_status);
5052 printk ("\n");
5053 }
5054
5055 /*
5056 ** Free this ccb
5057 */
5058 ncr_free_ccb (np, cp);
5059
5060 /*
5061 ** requeue awaiting scsi commands for this lun.
5062 */
5063 if (lp && lp->queuedccbs < lp->queuedepth &&
5064 !list_empty(&lp->wait_ccbq))
5065 ncr_start_next_ccb(np, lp, 2);
5066
5067 /*
5068 ** requeue awaiting scsi commands for this controller.
5069 */
5070 if (np->waiting_list)
5071 requeue_waiting_list(np);
5072
5073 /*
5074 ** signal completion to generic driver.
5075 */
5076 ncr_queue_done_cmd(np, cmd);
5077 }
5078
5079 /*==========================================================
5080 **
5081 **
5082 ** Signal all (or one) control block done.
5083 **
5084 **
5085 **==========================================================
5086 */
5087
5088 /*
5089 ** This CCB has been skipped by the NCR.
5090 ** Queue it in the corresponding unit queue.
5091 */
ncr_ccb_skipped(struct ncb * np,struct ccb * cp)5092 static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp)
5093 {
5094 struct tcb *tp = &np->target[cp->target];
5095 struct lcb *lp = tp->lp[cp->lun];
5096
5097 if (lp && cp != np->ccb) {
5098 cp->host_status &= ~HS_SKIPMASK;
5099 cp->start.schedule.l_paddr =
5100 cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
5101 list_move_tail(&cp->link_ccbq, &lp->skip_ccbq);
5102 if (cp->queued) {
5103 --lp->queuedccbs;
5104 }
5105 }
5106 if (cp->queued) {
5107 --np->queuedccbs;
5108 cp->queued = 0;
5109 }
5110 }
5111
5112 /*
5113 ** The NCR has completed CCBs.
5114 ** Look at the DONE QUEUE if enabled, otherwise scan all CCBs
5115 */
ncr_wakeup_done(struct ncb * np)5116 void ncr_wakeup_done (struct ncb *np)
5117 {
5118 struct ccb *cp;
5119 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
5120 int i, j;
5121
5122 i = np->ccb_done_ic;
5123 while (1) {
5124 j = i+1;
5125 if (j >= MAX_DONE)
5126 j = 0;
5127
5128 cp = np->ccb_done[j];
5129 if (!CCB_DONE_VALID(cp))
5130 break;
5131
5132 np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY;
5133 np->scripth->done_queue[5*j + 4] =
5134 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
5135 MEMORY_BARRIER();
5136 np->scripth->done_queue[5*i + 4] =
5137 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
5138
5139 if (cp->host_status & HS_DONEMASK)
5140 ncr_complete (np, cp);
5141 else if (cp->host_status & HS_SKIPMASK)
5142 ncr_ccb_skipped (np, cp);
5143
5144 i = j;
5145 }
5146 np->ccb_done_ic = i;
5147 #else
5148 cp = np->ccb;
5149 while (cp) {
5150 if (cp->host_status & HS_DONEMASK)
5151 ncr_complete (np, cp);
5152 else if (cp->host_status & HS_SKIPMASK)
5153 ncr_ccb_skipped (np, cp);
5154 cp = cp->link_ccb;
5155 }
5156 #endif
5157 }
5158
5159 /*
5160 ** Complete all active CCBs.
5161 */
ncr_wakeup(struct ncb * np,u_long code)5162 void ncr_wakeup (struct ncb *np, u_long code)
5163 {
5164 struct ccb *cp = np->ccb;
5165
5166 while (cp) {
5167 if (cp->host_status != HS_IDLE) {
5168 cp->host_status = code;
5169 ncr_complete (np, cp);
5170 }
5171 cp = cp->link_ccb;
5172 }
5173 }
5174
5175 /*
5176 ** Reset ncr chip.
5177 */
5178
5179 /* Some initialisation must be done immediately following reset, for 53c720,
5180 * at least. EA (dcntl bit 5) isn't set here as it is set once only in
5181 * the _detect function.
5182 */
ncr_chip_reset(struct ncb * np,int delay)5183 static void ncr_chip_reset(struct ncb *np, int delay)
5184 {
5185 OUTB (nc_istat, SRST);
5186 udelay(delay);
5187 OUTB (nc_istat, 0 );
5188
5189 if (np->features & FE_EHP)
5190 OUTB (nc_ctest0, EHP);
5191 if (np->features & FE_MUX)
5192 OUTB (nc_ctest4, MUX);
5193 }
5194
5195
5196 /*==========================================================
5197 **
5198 **
5199 ** Start NCR chip.
5200 **
5201 **
5202 **==========================================================
5203 */
5204
ncr_init(struct ncb * np,int reset,char * msg,u_long code)5205 void ncr_init (struct ncb *np, int reset, char * msg, u_long code)
5206 {
5207 int i;
5208
5209 /*
5210 ** Reset chip if asked, otherwise just clear fifos.
5211 */
5212
5213 if (reset) {
5214 OUTB (nc_istat, SRST);
5215 udelay(100);
5216 }
5217 else {
5218 OUTB (nc_stest3, TE|CSF);
5219 OUTONB (nc_ctest3, CLF);
5220 }
5221
5222 /*
5223 ** Message.
5224 */
5225
5226 if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg);
5227
5228 /*
5229 ** Clear Start Queue
5230 */
5231 np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */
5232 for (i = 1; i < MAX_START + MAX_START; i += 2)
5233 np->scripth0->tryloop[i] =
5234 cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5235
5236 /*
5237 ** Start at first entry.
5238 */
5239 np->squeueput = 0;
5240 np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop));
5241
5242 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
5243 /*
5244 ** Clear Done Queue
5245 */
5246 for (i = 0; i < MAX_DONE; i++) {
5247 np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY;
5248 np->scripth0->done_queue[5*i + 4] =
5249 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
5250 }
5251 #endif
5252
5253 /*
5254 ** Start at first entry.
5255 */
5256 np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue));
5257 np->ccb_done_ic = MAX_DONE-1;
5258 np->scripth0->done_queue[5*(MAX_DONE-1) + 4] =
5259 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
5260
5261 /*
5262 ** Wakeup all pending jobs.
5263 */
5264 ncr_wakeup (np, code);
5265
5266 /*
5267 ** Init chip.
5268 */
5269
5270 /*
5271 ** Remove reset; big delay because the 895 needs time for the
5272 ** bus mode to settle
5273 */
5274 ncr_chip_reset(np, 2000);
5275
5276 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
5277 /* full arb., ena parity, par->ATN */
5278 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
5279
5280 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
5281
5282 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
5283 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
5284 OUTB (nc_istat , SIGP ); /* Signal Process */
5285 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
5286 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
5287
5288 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
5289 OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */
5290 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
5291 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
5292
5293 OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */
5294 OUTB (nc_stest3, TE); /* TolerANT enable */
5295 OUTB (nc_stime0, 0x0c ); /* HTH disabled STO 0.25 sec */
5296
5297 /*
5298 ** Disable disconnects.
5299 */
5300
5301 np->disc = 0;
5302
5303 /*
5304 ** Enable GPIO0 pin for writing if LED support.
5305 */
5306
5307 if (np->features & FE_LED0) {
5308 OUTOFFB (nc_gpcntl, 0x01);
5309 }
5310
5311 /*
5312 ** enable ints
5313 */
5314
5315 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
5316 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
5317
5318 /*
5319 ** Fill in target structure.
5320 ** Reinitialize usrsync.
5321 ** Reinitialize usrwide.
5322 ** Prepare sync negotiation according to actual SCSI bus mode.
5323 */
5324
5325 for (i=0;i<MAX_TARGET;i++) {
5326 struct tcb *tp = &np->target[i];
5327
5328 tp->sval = 0;
5329 tp->wval = np->rv_scntl3;
5330
5331 if (tp->usrsync != 255) {
5332 if (tp->usrsync <= np->maxsync) {
5333 if (tp->usrsync < np->minsync) {
5334 tp->usrsync = np->minsync;
5335 }
5336 }
5337 else
5338 tp->usrsync = 255;
5339 }
5340
5341 if (tp->usrwide > np->maxwide)
5342 tp->usrwide = np->maxwide;
5343
5344 }
5345
5346 /*
5347 ** Start script processor.
5348 */
5349 if (np->paddr2) {
5350 if (bootverbose)
5351 printk ("%s: Downloading SCSI SCRIPTS.\n",
5352 ncr_name(np));
5353 OUTL (nc_scratcha, vtobus(np->script0));
5354 OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram));
5355 }
5356 else
5357 OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
5358 }
5359
5360 /*==========================================================
5361 **
5362 ** Prepare the negotiation values for wide and
5363 ** synchronous transfers.
5364 **
5365 **==========================================================
5366 */
5367
ncr_negotiate(struct ncb * np,struct tcb * tp)5368 static void ncr_negotiate (struct ncb* np, struct tcb* tp)
5369 {
5370 /*
5371 ** minsync unit is 4ns !
5372 */
5373
5374 u_long minsync = tp->usrsync;
5375
5376 /*
5377 ** SCSI bus mode limit
5378 */
5379
5380 if (np->scsi_mode && np->scsi_mode == SMODE_SE) {
5381 if (minsync < 12) minsync = 12;
5382 }
5383
5384 /*
5385 ** our limit ..
5386 */
5387
5388 if (minsync < np->minsync)
5389 minsync = np->minsync;
5390
5391 /*
5392 ** divider limit
5393 */
5394
5395 if (minsync > np->maxsync)
5396 minsync = 255;
5397
5398 if (tp->maxoffs > np->maxoffs)
5399 tp->maxoffs = np->maxoffs;
5400
5401 tp->minsync = minsync;
5402 tp->maxoffs = (minsync<255 ? tp->maxoffs : 0);
5403
5404 /*
5405 ** period=0: has to negotiate sync transfer
5406 */
5407
5408 tp->period=0;
5409
5410 /*
5411 ** widedone=0: has to negotiate wide transfer
5412 */
5413 tp->widedone=0;
5414 }
5415
5416 /*==========================================================
5417 **
5418 ** Get clock factor and sync divisor for a given
5419 ** synchronous factor period.
5420 ** Returns the clock factor (in sxfer) and scntl3
5421 ** synchronous divisor field.
5422 **
5423 **==========================================================
5424 */
5425
ncr_getsync(struct ncb * np,u_char sfac,u_char * fakp,u_char * scntl3p)5426 static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p)
5427 {
5428 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
5429 int div = np->clock_divn; /* Number of divisors supported */
5430 u_long fak; /* Sync factor in sxfer */
5431 u_long per; /* Period in tenths of ns */
5432 u_long kpc; /* (per * clk) */
5433
5434 /*
5435 ** Compute the synchronous period in tenths of nano-seconds
5436 */
5437 if (sfac <= 10) per = 250;
5438 else if (sfac == 11) per = 303;
5439 else if (sfac == 12) per = 500;
5440 else per = 40 * sfac;
5441
5442 /*
5443 ** Look for the greatest clock divisor that allows an
5444 ** input speed faster than the period.
5445 */
5446 kpc = per * clk;
5447 while (--div > 0)
5448 if (kpc >= (div_10M[div] << 2)) break;
5449
5450 /*
5451 ** Calculate the lowest clock factor that allows an output
5452 ** speed not faster than the period.
5453 */
5454 fak = (kpc - 1) / div_10M[div] + 1;
5455
5456 #if 0 /* This optimization does not seem very useful */
5457
5458 per = (fak * div_10M[div]) / clk;
5459
5460 /*
5461 ** Why not to try the immediate lower divisor and to choose
5462 ** the one that allows the fastest output speed ?
5463 ** We don't want input speed too much greater than output speed.
5464 */
5465 if (div >= 1 && fak < 8) {
5466 u_long fak2, per2;
5467 fak2 = (kpc - 1) / div_10M[div-1] + 1;
5468 per2 = (fak2 * div_10M[div-1]) / clk;
5469 if (per2 < per && fak2 <= 8) {
5470 fak = fak2;
5471 per = per2;
5472 --div;
5473 }
5474 }
5475 #endif
5476
5477 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
5478
5479 /*
5480 ** Compute and return sync parameters for the ncr
5481 */
5482 *fakp = fak - 4;
5483 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
5484 }
5485
5486
5487 /*==========================================================
5488 **
5489 ** Set actual values, sync status and patch all ccbs of
5490 ** a target according to new sync/wide agreement.
5491 **
5492 **==========================================================
5493 */
5494
ncr_set_sync_wide_status(struct ncb * np,u_char target)5495 static void ncr_set_sync_wide_status (struct ncb *np, u_char target)
5496 {
5497 struct ccb *cp;
5498 struct tcb *tp = &np->target[target];
5499
5500 /*
5501 ** set actual value and sync_status
5502 */
5503 OUTB (nc_sxfer, tp->sval);
5504 np->sync_st = tp->sval;
5505 OUTB (nc_scntl3, tp->wval);
5506 np->wide_st = tp->wval;
5507
5508 /*
5509 ** patch ALL ccbs of this target.
5510 */
5511 for (cp = np->ccb; cp; cp = cp->link_ccb) {
5512 if (!cp->cmd) continue;
5513 if (scmd_id(cp->cmd) != target) continue;
5514 #if 0
5515 cp->sync_status = tp->sval;
5516 cp->wide_status = tp->wval;
5517 #endif
5518 cp->phys.select.sel_scntl3 = tp->wval;
5519 cp->phys.select.sel_sxfer = tp->sval;
5520 }
5521 }
5522
5523 /*==========================================================
5524 **
5525 ** Switch sync mode for current job and it's target
5526 **
5527 **==========================================================
5528 */
5529
ncr_setsync(struct ncb * np,struct ccb * cp,u_char scntl3,u_char sxfer)5530 static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer)
5531 {
5532 struct scsi_cmnd *cmd = cp->cmd;
5533 struct tcb *tp;
5534 u_char target = INB (nc_sdid) & 0x0f;
5535 u_char idiv;
5536
5537 BUG_ON(target != (scmd_id(cmd) & 0xf));
5538
5539 tp = &np->target[target];
5540
5541 if (!scntl3 || !(sxfer & 0x1f))
5542 scntl3 = np->rv_scntl3;
5543 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07);
5544
5545 /*
5546 ** Deduce the value of controller sync period from scntl3.
5547 ** period is in tenths of nano-seconds.
5548 */
5549
5550 idiv = ((scntl3 >> 4) & 0x7);
5551 if ((sxfer & 0x1f) && idiv)
5552 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
5553 else
5554 tp->period = 0xffff;
5555
5556 /* Stop there if sync parameters are unchanged */
5557 if (tp->sval == sxfer && tp->wval == scntl3)
5558 return;
5559 tp->sval = sxfer;
5560 tp->wval = scntl3;
5561
5562 if (sxfer & 0x01f) {
5563 /* Disable extended Sreq/Sack filtering */
5564 if (tp->period <= 2000)
5565 OUTOFFB(nc_stest2, EXT);
5566 }
5567
5568 spi_display_xfer_agreement(tp->starget);
5569
5570 /*
5571 ** set actual value and sync_status
5572 ** patch ALL ccbs of this target.
5573 */
5574 ncr_set_sync_wide_status(np, target);
5575 }
5576
5577 /*==========================================================
5578 **
5579 ** Switch wide mode for current job and it's target
5580 ** SCSI specs say: a SCSI device that accepts a WDTR
5581 ** message shall reset the synchronous agreement to
5582 ** asynchronous mode.
5583 **
5584 **==========================================================
5585 */
5586
ncr_setwide(struct ncb * np,struct ccb * cp,u_char wide,u_char ack)5587 static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack)
5588 {
5589 struct scsi_cmnd *cmd = cp->cmd;
5590 u16 target = INB (nc_sdid) & 0x0f;
5591 struct tcb *tp;
5592 u_char scntl3;
5593 u_char sxfer;
5594
5595 BUG_ON(target != (scmd_id(cmd) & 0xf));
5596
5597 tp = &np->target[target];
5598 tp->widedone = wide+1;
5599 scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0);
5600
5601 sxfer = ack ? 0 : tp->sval;
5602
5603 /*
5604 ** Stop there if sync/wide parameters are unchanged
5605 */
5606 if (tp->sval == sxfer && tp->wval == scntl3) return;
5607 tp->sval = sxfer;
5608 tp->wval = scntl3;
5609
5610 /*
5611 ** Bells and whistles ;-)
5612 */
5613 if (bootverbose >= 2) {
5614 dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n",
5615 (scntl3 & EWS) ? "en" : "dis");
5616 }
5617
5618 /*
5619 ** set actual value and sync_status
5620 ** patch ALL ccbs of this target.
5621 */
5622 ncr_set_sync_wide_status(np, target);
5623 }
5624
5625 /*==========================================================
5626 **
5627 ** Switch tagged mode for a target.
5628 **
5629 **==========================================================
5630 */
5631
ncr_setup_tags(struct ncb * np,struct scsi_device * sdev)5632 static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev)
5633 {
5634 unsigned char tn = sdev->id, ln = sdev->lun;
5635 struct tcb *tp = &np->target[tn];
5636 struct lcb *lp = tp->lp[ln];
5637 u_char reqtags, maxdepth;
5638
5639 /*
5640 ** Just in case ...
5641 */
5642 if ((!tp) || (!lp) || !sdev)
5643 return;
5644
5645 /*
5646 ** If SCSI device queue depth is not yet set, leave here.
5647 */
5648 if (!lp->scdev_depth)
5649 return;
5650
5651 /*
5652 ** Donnot allow more tags than the SCSI driver can queue
5653 ** for this device.
5654 ** Donnot allow more tags than we can handle.
5655 */
5656 maxdepth = lp->scdev_depth;
5657 if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs;
5658 if (lp->maxtags > maxdepth) lp->maxtags = maxdepth;
5659 if (lp->numtags > maxdepth) lp->numtags = maxdepth;
5660
5661 /*
5662 ** only devices conformant to ANSI Version >= 2
5663 ** only devices capable of tagged commands
5664 ** only if enabled by user ..
5665 */
5666 if (sdev->tagged_supported && lp->numtags > 1) {
5667 reqtags = lp->numtags;
5668 } else {
5669 reqtags = 1;
5670 }
5671
5672 /*
5673 ** Update max number of tags
5674 */
5675 lp->numtags = reqtags;
5676 if (lp->numtags > lp->maxtags)
5677 lp->maxtags = lp->numtags;
5678
5679 /*
5680 ** If we want to switch tag mode, we must wait
5681 ** for no CCB to be active.
5682 */
5683 if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */
5684 if (lp->queuedepth == reqtags) /* Already announced */
5685 return;
5686 lp->queuedepth = reqtags;
5687 }
5688 else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */
5689 lp->queuedepth = reqtags;
5690 return;
5691 }
5692 else { /* Want to switch tag mode */
5693 if (lp->busyccbs) /* If not yet safe, return */
5694 return;
5695 lp->queuedepth = reqtags;
5696 lp->usetags = reqtags > 1 ? 1 : 0;
5697 }
5698
5699 /*
5700 ** Patch the lun mini-script, according to tag mode.
5701 */
5702 lp->jump_tag.l_paddr = lp->usetags?
5703 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) :
5704 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
5705
5706 /*
5707 ** Announce change to user.
5708 */
5709 if (bootverbose) {
5710 if (lp->usetags) {
5711 dev_info(&sdev->sdev_gendev,
5712 "tagged command queue depth set to %d\n",
5713 reqtags);
5714 } else {
5715 dev_info(&sdev->sdev_gendev,
5716 "tagged command queueing disabled\n");
5717 }
5718 }
5719 }
5720
5721 /*==========================================================
5722 **
5723 **
5724 ** ncr timeout handler.
5725 **
5726 **
5727 **==========================================================
5728 **
5729 ** Misused to keep the driver running when
5730 ** interrupts are not configured correctly.
5731 **
5732 **----------------------------------------------------------
5733 */
5734
ncr_timeout(struct ncb * np)5735 static void ncr_timeout (struct ncb *np)
5736 {
5737 u_long thistime = jiffies;
5738
5739 /*
5740 ** If release process in progress, let's go
5741 ** Set the release stage from 1 to 2 to synchronize
5742 ** with the release process.
5743 */
5744
5745 if (np->release_stage) {
5746 if (np->release_stage == 1) np->release_stage = 2;
5747 return;
5748 }
5749
5750 np->timer.expires = jiffies + SCSI_NCR_TIMER_INTERVAL;
5751 add_timer(&np->timer);
5752
5753 /*
5754 ** If we are resetting the ncr, wait for settle_time before
5755 ** clearing it. Then command processing will be resumed.
5756 */
5757 if (np->settle_time) {
5758 if (np->settle_time <= thistime) {
5759 if (bootverbose > 1)
5760 printk("%s: command processing resumed\n", ncr_name(np));
5761 np->settle_time = 0;
5762 np->disc = 1;
5763 requeue_waiting_list(np);
5764 }
5765 return;
5766 }
5767
5768 /*
5769 ** Since the generic scsi driver only allows us 0.5 second
5770 ** to perform abort of a command, we must look at ccbs about
5771 ** every 0.25 second.
5772 */
5773 if (np->lasttime + 4*HZ < thistime) {
5774 /*
5775 ** block ncr interrupts
5776 */
5777 np->lasttime = thistime;
5778 }
5779
5780 #ifdef SCSI_NCR_BROKEN_INTR
5781 if (INB(nc_istat) & (INTF|SIP|DIP)) {
5782
5783 /*
5784 ** Process pending interrupts.
5785 */
5786 if (DEBUG_FLAGS & DEBUG_TINY) printk ("{");
5787 ncr_exception (np);
5788 if (DEBUG_FLAGS & DEBUG_TINY) printk ("}");
5789 }
5790 #endif /* SCSI_NCR_BROKEN_INTR */
5791 }
5792
5793 /*==========================================================
5794 **
5795 ** log message for real hard errors
5796 **
5797 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5798 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5799 **
5800 ** exception register:
5801 ** ds: dstat
5802 ** si: sist
5803 **
5804 ** SCSI bus lines:
5805 ** so: control lines as driver by NCR.
5806 ** si: control lines as seen by NCR.
5807 ** sd: scsi data lines as seen by NCR.
5808 **
5809 ** wide/fastmode:
5810 ** sxfer: (see the manual)
5811 ** scntl3: (see the manual)
5812 **
5813 ** current script command:
5814 ** dsp: script address (relative to start of script).
5815 ** dbc: first word of script command.
5816 **
5817 ** First 16 register of the chip:
5818 ** r0..rf
5819 **
5820 **==========================================================
5821 */
5822
ncr_log_hard_error(struct ncb * np,u16 sist,u_char dstat)5823 static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat)
5824 {
5825 u32 dsp;
5826 int script_ofs;
5827 int script_size;
5828 char *script_name;
5829 u_char *script_base;
5830 int i;
5831
5832 dsp = INL (nc_dsp);
5833
5834 if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) {
5835 script_ofs = dsp - np->p_script;
5836 script_size = sizeof(struct script);
5837 script_base = (u_char *) np->script0;
5838 script_name = "script";
5839 }
5840 else if (np->p_scripth < dsp &&
5841 dsp <= np->p_scripth + sizeof(struct scripth)) {
5842 script_ofs = dsp - np->p_scripth;
5843 script_size = sizeof(struct scripth);
5844 script_base = (u_char *) np->scripth0;
5845 script_name = "scripth";
5846 } else {
5847 script_ofs = dsp;
5848 script_size = 0;
5849 script_base = NULL;
5850 script_name = "mem";
5851 }
5852
5853 printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5854 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5855 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5856 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5857 (unsigned)INL (nc_dbc));
5858
5859 if (((script_ofs & 3) == 0) &&
5860 (unsigned)script_ofs < script_size) {
5861 printk ("%s: script cmd = %08x\n", ncr_name(np),
5862 scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs)));
5863 }
5864
5865 printk ("%s: regdump:", ncr_name(np));
5866 for (i=0; i<16;i++)
5867 printk (" %02x", (unsigned)INB_OFF(i));
5868 printk (".\n");
5869 }
5870
5871 /*============================================================
5872 **
5873 ** ncr chip exception handler.
5874 **
5875 **============================================================
5876 **
5877 ** In normal cases, interrupt conditions occur one at a
5878 ** time. The ncr is able to stack in some extra registers
5879 ** other interrupts that will occur after the first one.
5880 ** But, several interrupts may occur at the same time.
5881 **
5882 ** We probably should only try to deal with the normal
5883 ** case, but it seems that multiple interrupts occur in
5884 ** some cases that are not abnormal at all.
5885 **
5886 ** The most frequent interrupt condition is Phase Mismatch.
5887 ** We should want to service this interrupt quickly.
5888 ** A SCSI parity error may be delivered at the same time.
5889 ** The SIR interrupt is not very frequent in this driver,
5890 ** since the INTFLY is likely used for command completion
5891 ** signaling.
5892 ** The Selection Timeout interrupt may be triggered with
5893 ** IID and/or UDC.
5894 ** The SBMC interrupt (SCSI Bus Mode Change) may probably
5895 ** occur at any time.
5896 **
5897 ** This handler try to deal as cleverly as possible with all
5898 ** the above.
5899 **
5900 **============================================================
5901 */
5902
ncr_exception(struct ncb * np)5903 void ncr_exception (struct ncb *np)
5904 {
5905 u_char istat, dstat;
5906 u16 sist;
5907 int i;
5908
5909 /*
5910 ** interrupt on the fly ?
5911 ** Since the global header may be copied back to a CCB
5912 ** using a posted PCI memory write, the last operation on
5913 ** the istat register is a READ in order to flush posted
5914 ** PCI write commands.
5915 */
5916 istat = INB (nc_istat);
5917 if (istat & INTF) {
5918 OUTB (nc_istat, (istat & SIGP) | INTF);
5919 istat = INB (nc_istat);
5920 if (DEBUG_FLAGS & DEBUG_TINY) printk ("F ");
5921 ncr_wakeup_done (np);
5922 }
5923
5924 if (!(istat & (SIP|DIP)))
5925 return;
5926
5927 if (istat & CABRT)
5928 OUTB (nc_istat, CABRT);
5929
5930 /*
5931 ** Steinbach's Guideline for Systems Programming:
5932 ** Never test for an error condition you don't know how to handle.
5933 */
5934
5935 sist = (istat & SIP) ? INW (nc_sist) : 0;
5936 dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5937
5938 if (DEBUG_FLAGS & DEBUG_TINY)
5939 printk ("<%d|%x:%x|%x:%x>",
5940 (int)INB(nc_scr0),
5941 dstat,sist,
5942 (unsigned)INL(nc_dsp),
5943 (unsigned)INL(nc_dbc));
5944
5945 /*========================================================
5946 ** First, interrupts we want to service cleanly.
5947 **
5948 ** Phase mismatch is the most frequent interrupt, and
5949 ** so we have to service it as quickly and as cleanly
5950 ** as possible.
5951 ** Programmed interrupts are rarely used in this driver,
5952 ** but we must handle them cleanly anyway.
5953 ** We try to deal with PAR and SBMC combined with
5954 ** some other interrupt(s).
5955 **=========================================================
5956 */
5957
5958 if (!(sist & (STO|GEN|HTH|SGE|UDC|RST)) &&
5959 !(dstat & (MDPE|BF|ABRT|IID))) {
5960 if ((sist & SBMC) && ncr_int_sbmc (np))
5961 return;
5962 if ((sist & PAR) && ncr_int_par (np))
5963 return;
5964 if (sist & MA) {
5965 ncr_int_ma (np);
5966 return;
5967 }
5968 if (dstat & SIR) {
5969 ncr_int_sir (np);
5970 return;
5971 }
5972 /*
5973 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2.
5974 */
5975 if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) {
5976 printk( "%s: unknown interrupt(s) ignored, "
5977 "ISTAT=%x DSTAT=%x SIST=%x\n",
5978 ncr_name(np), istat, dstat, sist);
5979 return;
5980 }
5981 OUTONB_STD ();
5982 return;
5983 }
5984
5985 /*========================================================
5986 ** Now, interrupts that need some fixing up.
5987 ** Order and multiple interrupts is so less important.
5988 **
5989 ** If SRST has been asserted, we just reset the chip.
5990 **
5991 ** Selection is intirely handled by the chip. If the
5992 ** chip says STO, we trust it. Seems some other
5993 ** interrupts may occur at the same time (UDC, IID), so
5994 ** we ignore them. In any case we do enough fix-up
5995 ** in the service routine.
5996 ** We just exclude some fatal dma errors.
5997 **=========================================================
5998 */
5999
6000 if (sist & RST) {
6001 ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET);
6002 return;
6003 }
6004
6005 if ((sist & STO) &&
6006 !(dstat & (MDPE|BF|ABRT))) {
6007 /*
6008 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1.
6009 */
6010 OUTONB (nc_ctest3, CLF);
6011
6012 ncr_int_sto (np);
6013 return;
6014 }
6015
6016 /*=========================================================
6017 ** Now, interrupts we are not able to recover cleanly.
6018 ** (At least for the moment).
6019 **
6020 ** Do the register dump.
6021 ** Log message for real hard errors.
6022 ** Clear all fifos.
6023 ** For MDPE, BF, ABORT, IID, SGE and HTH we reset the
6024 ** BUS and the chip.
6025 ** We are more soft for UDC.
6026 **=========================================================
6027 */
6028
6029 if (time_after(jiffies, np->regtime)) {
6030 np->regtime = jiffies + 10*HZ;
6031 for (i = 0; i<sizeof(np->regdump); i++)
6032 ((char*)&np->regdump)[i] = INB_OFF(i);
6033 np->regdump.nc_dstat = dstat;
6034 np->regdump.nc_sist = sist;
6035 }
6036
6037 ncr_log_hard_error(np, sist, dstat);
6038
6039 printk ("%s: have to clear fifos.\n", ncr_name (np));
6040 OUTB (nc_stest3, TE|CSF);
6041 OUTONB (nc_ctest3, CLF);
6042
6043 if ((sist & (SGE)) ||
6044 (dstat & (MDPE|BF|ABRT|IID))) {
6045 ncr_start_reset(np);
6046 return;
6047 }
6048
6049 if (sist & HTH) {
6050 printk ("%s: handshake timeout\n", ncr_name(np));
6051 ncr_start_reset(np);
6052 return;
6053 }
6054
6055 if (sist & UDC) {
6056 printk ("%s: unexpected disconnect\n", ncr_name(np));
6057 OUTB (HS_PRT, HS_UNEXPECTED);
6058 OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup));
6059 return;
6060 }
6061
6062 /*=========================================================
6063 ** We just miss the cause of the interrupt. :(
6064 ** Print a message. The timeout will do the real work.
6065 **=========================================================
6066 */
6067 printk ("%s: unknown interrupt\n", ncr_name(np));
6068 }
6069
6070 /*==========================================================
6071 **
6072 ** ncr chip exception handler for selection timeout
6073 **
6074 **==========================================================
6075 **
6076 ** There seems to be a bug in the 53c810.
6077 ** Although a STO-Interrupt is pending,
6078 ** it continues executing script commands.
6079 ** But it will fail and interrupt (IID) on
6080 ** the next instruction where it's looking
6081 ** for a valid phase.
6082 **
6083 **----------------------------------------------------------
6084 */
6085
ncr_int_sto(struct ncb * np)6086 void ncr_int_sto (struct ncb *np)
6087 {
6088 u_long dsa;
6089 struct ccb *cp;
6090 if (DEBUG_FLAGS & DEBUG_TINY) printk ("T");
6091
6092 /*
6093 ** look for ccb and set the status.
6094 */
6095
6096 dsa = INL (nc_dsa);
6097 cp = np->ccb;
6098 while (cp && (CCB_PHYS (cp, phys) != dsa))
6099 cp = cp->link_ccb;
6100
6101 if (cp) {
6102 cp-> host_status = HS_SEL_TIMEOUT;
6103 ncr_complete (np, cp);
6104 }
6105
6106 /*
6107 ** repair start queue and jump to start point.
6108 */
6109
6110 OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart));
6111 return;
6112 }
6113
6114 /*==========================================================
6115 **
6116 ** ncr chip exception handler for SCSI bus mode change
6117 **
6118 **==========================================================
6119 **
6120 ** spi2-r12 11.2.3 says a transceiver mode change must
6121 ** generate a reset event and a device that detects a reset
6122 ** event shall initiate a hard reset. It says also that a
6123 ** device that detects a mode change shall set data transfer
6124 ** mode to eight bit asynchronous, etc...
6125 ** So, just resetting should be enough.
6126 **
6127 **
6128 **----------------------------------------------------------
6129 */
6130
ncr_int_sbmc(struct ncb * np)6131 static int ncr_int_sbmc (struct ncb *np)
6132 {
6133 u_char scsi_mode = INB (nc_stest4) & SMODE;
6134
6135 if (scsi_mode != np->scsi_mode) {
6136 printk("%s: SCSI bus mode change from %x to %x.\n",
6137 ncr_name(np), np->scsi_mode, scsi_mode);
6138
6139 np->scsi_mode = scsi_mode;
6140
6141
6142 /*
6143 ** Suspend command processing for 1 second and
6144 ** reinitialize all except the chip.
6145 */
6146 np->settle_time = jiffies + HZ;
6147 ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET);
6148 return 1;
6149 }
6150 return 0;
6151 }
6152
6153 /*==========================================================
6154 **
6155 ** ncr chip exception handler for SCSI parity error.
6156 **
6157 **==========================================================
6158 **
6159 **
6160 **----------------------------------------------------------
6161 */
6162
ncr_int_par(struct ncb * np)6163 static int ncr_int_par (struct ncb *np)
6164 {
6165 u_char hsts = INB (HS_PRT);
6166 u32 dbc = INL (nc_dbc);
6167 u_char sstat1 = INB (nc_sstat1);
6168 int phase = -1;
6169 int msg = -1;
6170 u32 jmp;
6171
6172 printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n",
6173 ncr_name(np), hsts, dbc, sstat1);
6174
6175 /*
6176 * Ignore the interrupt if the NCR is not connected
6177 * to the SCSI bus, since the right work should have
6178 * been done on unexpected disconnection handling.
6179 */
6180 if (!(INB (nc_scntl1) & ISCON))
6181 return 0;
6182
6183 /*
6184 * If the nexus is not clearly identified, reset the bus.
6185 * We will try to do better later.
6186 */
6187 if (hsts & HS_INVALMASK)
6188 goto reset_all;
6189
6190 /*
6191 * If the SCSI parity error occurs in MSG IN phase, prepare a
6192 * MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED
6193 * ERROR message and let the device decide to retry the command
6194 * or to terminate with check condition. If we were in MSG IN
6195 * phase waiting for the response of a negotiation, we will
6196 * get SIR_NEGO_FAILED at dispatch.
6197 */
6198 if (!(dbc & 0xc0000000))
6199 phase = (dbc >> 24) & 7;
6200 if (phase == 7)
6201 msg = MSG_PARITY_ERROR;
6202 else
6203 msg = INITIATOR_ERROR;
6204
6205
6206 /*
6207 * If the NCR stopped on a MOVE ^ DATA_IN, we jump to a
6208 * script that will ignore all data in bytes until phase
6209 * change, since we are not sure the chip will wait the phase
6210 * change prior to delivering the interrupt.
6211 */
6212 if (phase == 1)
6213 jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in);
6214 else
6215 jmp = NCB_SCRIPTH_PHYS (np, par_err_other);
6216
6217 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */
6218 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
6219
6220 np->msgout[0] = msg;
6221 OUTL_DSP (jmp);
6222 return 1;
6223
6224 reset_all:
6225 ncr_start_reset(np);
6226 return 1;
6227 }
6228
6229 /*==========================================================
6230 **
6231 **
6232 ** ncr chip exception handler for phase errors.
6233 **
6234 **
6235 **==========================================================
6236 **
6237 ** We have to construct a new transfer descriptor,
6238 ** to transfer the rest of the current block.
6239 **
6240 **----------------------------------------------------------
6241 */
6242
ncr_int_ma(struct ncb * np)6243 static void ncr_int_ma (struct ncb *np)
6244 {
6245 u32 dbc;
6246 u32 rest;
6247 u32 dsp;
6248 u32 dsa;
6249 u32 nxtdsp;
6250 u32 newtmp;
6251 u32 *vdsp;
6252 u32 oadr, olen;
6253 u32 *tblp;
6254 ncrcmd *newcmd;
6255 u_char cmd, sbcl;
6256 struct ccb *cp;
6257
6258 dsp = INL (nc_dsp);
6259 dbc = INL (nc_dbc);
6260 sbcl = INB (nc_sbcl);
6261
6262 cmd = dbc >> 24;
6263 rest = dbc & 0xffffff;
6264
6265 /*
6266 ** Take into account dma fifo and various buffers and latches,
6267 ** only if the interrupted phase is an OUTPUT phase.
6268 */
6269
6270 if ((cmd & 1) == 0) {
6271 u_char ctest5, ss0, ss2;
6272 u16 delta;
6273
6274 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
6275 if (ctest5 & DFS)
6276 delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
6277 else
6278 delta=(INB (nc_dfifo) - rest) & 0x7f;
6279
6280 /*
6281 ** The data in the dma fifo has not been transferred to
6282 ** the target -> add the amount to the rest
6283 ** and clear the data.
6284 ** Check the sstat2 register in case of wide transfer.
6285 */
6286
6287 rest += delta;
6288 ss0 = INB (nc_sstat0);
6289 if (ss0 & OLF) rest++;
6290 if (ss0 & ORF) rest++;
6291 if (INB(nc_scntl3) & EWS) {
6292 ss2 = INB (nc_sstat2);
6293 if (ss2 & OLF1) rest++;
6294 if (ss2 & ORF1) rest++;
6295 }
6296
6297 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
6298 printk ("P%x%x RL=%d D=%d SS0=%x ", cmd&7, sbcl&7,
6299 (unsigned) rest, (unsigned) delta, ss0);
6300
6301 } else {
6302 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
6303 printk ("P%x%x RL=%d ", cmd&7, sbcl&7, rest);
6304 }
6305
6306 /*
6307 ** Clear fifos.
6308 */
6309 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */
6310 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
6311
6312 /*
6313 ** locate matching cp.
6314 ** if the interrupted phase is DATA IN or DATA OUT,
6315 ** trust the global header.
6316 */
6317 dsa = INL (nc_dsa);
6318 if (!(cmd & 6)) {
6319 cp = np->header.cp;
6320 if (CCB_PHYS(cp, phys) != dsa)
6321 cp = NULL;
6322 } else {
6323 cp = np->ccb;
6324 while (cp && (CCB_PHYS (cp, phys) != dsa))
6325 cp = cp->link_ccb;
6326 }
6327
6328 /*
6329 ** try to find the interrupted script command,
6330 ** and the address at which to continue.
6331 */
6332 vdsp = NULL;
6333 nxtdsp = 0;
6334 if (dsp > np->p_script &&
6335 dsp <= np->p_script + sizeof(struct script)) {
6336 vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8));
6337 nxtdsp = dsp;
6338 }
6339 else if (dsp > np->p_scripth &&
6340 dsp <= np->p_scripth + sizeof(struct scripth)) {
6341 vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
6342 nxtdsp = dsp;
6343 }
6344 else if (cp) {
6345 if (dsp == CCB_PHYS (cp, patch[2])) {
6346 vdsp = &cp->patch[0];
6347 nxtdsp = scr_to_cpu(vdsp[3]);
6348 }
6349 else if (dsp == CCB_PHYS (cp, patch[6])) {
6350 vdsp = &cp->patch[4];
6351 nxtdsp = scr_to_cpu(vdsp[3]);
6352 }
6353 }
6354
6355 /*
6356 ** log the information
6357 */
6358
6359 if (DEBUG_FLAGS & DEBUG_PHASE) {
6360 printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
6361 cp, np->header.cp,
6362 (unsigned)dsp,
6363 (unsigned)nxtdsp, vdsp, cmd);
6364 }
6365
6366 /*
6367 ** cp=0 means that the DSA does not point to a valid control
6368 ** block. This should not happen since we donnot use multi-byte
6369 ** move while we are being reselected ot after command complete.
6370 ** We are not able to recover from such a phase error.
6371 */
6372 if (!cp) {
6373 printk ("%s: SCSI phase error fixup: "
6374 "CCB already dequeued (0x%08lx)\n",
6375 ncr_name (np), (u_long) np->header.cp);
6376 goto reset_all;
6377 }
6378
6379 /*
6380 ** get old startaddress and old length.
6381 */
6382
6383 oadr = scr_to_cpu(vdsp[1]);
6384
6385 if (cmd & 0x10) { /* Table indirect */
6386 tblp = (u32 *) ((char*) &cp->phys + oadr);
6387 olen = scr_to_cpu(tblp[0]);
6388 oadr = scr_to_cpu(tblp[1]);
6389 } else {
6390 tblp = (u32 *) 0;
6391 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
6392 }
6393
6394 if (DEBUG_FLAGS & DEBUG_PHASE) {
6395 printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
6396 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
6397 tblp,
6398 (unsigned) olen,
6399 (unsigned) oadr);
6400 }
6401
6402 /*
6403 ** check cmd against assumed interrupted script command.
6404 */
6405
6406 if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) {
6407 PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] "
6408 ">> 24)\n", cmd, scr_to_cpu(vdsp[0]) >> 24);
6409
6410 goto reset_all;
6411 }
6412
6413 /*
6414 ** cp != np->header.cp means that the header of the CCB
6415 ** currently being processed has not yet been copied to
6416 ** the global header area. That may happen if the device did
6417 ** not accept all our messages after having been selected.
6418 */
6419 if (cp != np->header.cp) {
6420 printk ("%s: SCSI phase error fixup: "
6421 "CCB address mismatch (0x%08lx != 0x%08lx)\n",
6422 ncr_name (np), (u_long) cp, (u_long) np->header.cp);
6423 }
6424
6425 /*
6426 ** if old phase not dataphase, leave here.
6427 */
6428
6429 if (cmd & 0x06) {
6430 PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n",
6431 cmd&7, sbcl&7, (unsigned)olen,
6432 (unsigned)oadr, (unsigned)rest);
6433 goto unexpected_phase;
6434 }
6435
6436 /*
6437 ** choose the correct patch area.
6438 ** if savep points to one, choose the other.
6439 */
6440
6441 newcmd = cp->patch;
6442 newtmp = CCB_PHYS (cp, patch);
6443 if (newtmp == scr_to_cpu(cp->phys.header.savep)) {
6444 newcmd = &cp->patch[4];
6445 newtmp = CCB_PHYS (cp, patch[4]);
6446 }
6447
6448 /*
6449 ** fillin the commands
6450 */
6451
6452 newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest);
6453 newcmd[1] = cpu_to_scr(oadr + olen - rest);
6454 newcmd[2] = cpu_to_scr(SCR_JUMP);
6455 newcmd[3] = cpu_to_scr(nxtdsp);
6456
6457 if (DEBUG_FLAGS & DEBUG_PHASE) {
6458 PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n",
6459 (int) (newcmd - cp->patch),
6460 (unsigned)scr_to_cpu(newcmd[0]),
6461 (unsigned)scr_to_cpu(newcmd[1]),
6462 (unsigned)scr_to_cpu(newcmd[2]),
6463 (unsigned)scr_to_cpu(newcmd[3]));
6464 }
6465 /*
6466 ** fake the return address (to the patch).
6467 ** and restart script processor at dispatcher.
6468 */
6469 OUTL (nc_temp, newtmp);
6470 OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch));
6471 return;
6472
6473 /*
6474 ** Unexpected phase changes that occurs when the current phase
6475 ** is not a DATA IN or DATA OUT phase are due to error conditions.
6476 ** Such event may only happen when the SCRIPTS is using a
6477 ** multibyte SCSI MOVE.
6478 **
6479 ** Phase change Some possible cause
6480 **
6481 ** COMMAND --> MSG IN SCSI parity error detected by target.
6482 ** COMMAND --> STATUS Bad command or refused by target.
6483 ** MSG OUT --> MSG IN Message rejected by target.
6484 ** MSG OUT --> COMMAND Bogus target that discards extended
6485 ** negotiation messages.
6486 **
6487 ** The code below does not care of the new phase and so
6488 ** trusts the target. Why to annoy it ?
6489 ** If the interrupted phase is COMMAND phase, we restart at
6490 ** dispatcher.
6491 ** If a target does not get all the messages after selection,
6492 ** the code assumes blindly that the target discards extended
6493 ** messages and clears the negotiation status.
6494 ** If the target does not want all our response to negotiation,
6495 ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
6496 ** bloat for such a should_not_happen situation).
6497 ** In all other situation, we reset the BUS.
6498 ** Are these assumptions reasonable ? (Wait and see ...)
6499 */
6500 unexpected_phase:
6501 dsp -= 8;
6502 nxtdsp = 0;
6503
6504 switch (cmd & 7) {
6505 case 2: /* COMMAND phase */
6506 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
6507 break;
6508 #if 0
6509 case 3: /* STATUS phase */
6510 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
6511 break;
6512 #endif
6513 case 6: /* MSG OUT phase */
6514 np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8);
6515 if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) {
6516 cp->host_status = HS_BUSY;
6517 nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on);
6518 }
6519 else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) ||
6520 dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) {
6521 nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase);
6522 }
6523 break;
6524 #if 0
6525 case 7: /* MSG IN phase */
6526 nxtdsp = NCB_SCRIPT_PHYS (np, clrack);
6527 break;
6528 #endif
6529 }
6530
6531 if (nxtdsp) {
6532 OUTL_DSP (nxtdsp);
6533 return;
6534 }
6535
6536 reset_all:
6537 ncr_start_reset(np);
6538 }
6539
6540
ncr_sir_to_redo(struct ncb * np,int num,struct ccb * cp)6541 static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp)
6542 {
6543 struct scsi_cmnd *cmd = cp->cmd;
6544 struct tcb *tp = &np->target[cmd->device->id];
6545 struct lcb *lp = tp->lp[cmd->device->lun];
6546 struct list_head *qp;
6547 struct ccb * cp2;
6548 int disc_cnt = 0;
6549 int busy_cnt = 0;
6550 u32 startp;
6551 u_char s_status = INB (SS_PRT);
6552
6553 /*
6554 ** Let the SCRIPTS processor skip all not yet started CCBs,
6555 ** and count disconnected CCBs. Since the busy queue is in
6556 ** the same order as the chip start queue, disconnected CCBs
6557 ** are before cp and busy ones after.
6558 */
6559 if (lp) {
6560 qp = lp->busy_ccbq.prev;
6561 while (qp != &lp->busy_ccbq) {
6562 cp2 = list_entry(qp, struct ccb, link_ccbq);
6563 qp = qp->prev;
6564 ++busy_cnt;
6565 if (cp2 == cp)
6566 break;
6567 cp2->start.schedule.l_paddr =
6568 cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip));
6569 }
6570 lp->held_ccb = cp; /* Requeue when this one completes */
6571 disc_cnt = lp->queuedccbs - busy_cnt;
6572 }
6573
6574 switch(s_status) {
6575 default: /* Just for safety, should never happen */
6576 case SAM_STAT_TASK_SET_FULL:
6577 /*
6578 ** Decrease number of tags to the number of
6579 ** disconnected commands.
6580 */
6581 if (!lp)
6582 goto out;
6583 if (bootverbose >= 1) {
6584 PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected "
6585 "CCBs\n", busy_cnt, disc_cnt);
6586 }
6587 if (disc_cnt < lp->numtags) {
6588 lp->numtags = disc_cnt > 2 ? disc_cnt : 2;
6589 lp->num_good = 0;
6590 ncr_setup_tags (np, cmd->device);
6591 }
6592 /*
6593 ** Requeue the command to the start queue.
6594 ** If any disconnected commands,
6595 ** Clear SIGP.
6596 ** Jump to reselect.
6597 */
6598 cp->phys.header.savep = cp->startp;
6599 cp->host_status = HS_BUSY;
6600 cp->scsi_status = SAM_STAT_ILLEGAL;
6601
6602 ncr_put_start_queue(np, cp);
6603 if (disc_cnt)
6604 INB (nc_ctest2); /* Clear SIGP */
6605 OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect));
6606 return;
6607 case SAM_STAT_COMMAND_TERMINATED:
6608 case SAM_STAT_CHECK_CONDITION:
6609 /*
6610 ** If we were requesting sense, give up.
6611 */
6612 if (cp->auto_sense)
6613 goto out;
6614
6615 /*
6616 ** Device returned CHECK CONDITION status.
6617 ** Prepare all needed data strutures for getting
6618 ** sense data.
6619 **
6620 ** identify message
6621 */
6622 cp->scsi_smsg2[0] = IDENTIFY(0, cmd->device->lun);
6623 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2));
6624 cp->phys.smsg.size = cpu_to_scr(1);
6625
6626 /*
6627 ** sense command
6628 */
6629 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd));
6630 cp->phys.cmd.size = cpu_to_scr(6);
6631
6632 /*
6633 ** patch requested size into sense command
6634 */
6635 cp->sensecmd[0] = 0x03;
6636 cp->sensecmd[1] = (cmd->device->lun & 0x7) << 5;
6637 cp->sensecmd[4] = sizeof(cp->sense_buf);
6638
6639 /*
6640 ** sense data
6641 */
6642 memset(cp->sense_buf, 0, sizeof(cp->sense_buf));
6643 cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0]));
6644 cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf));
6645
6646 /*
6647 ** requeue the command.
6648 */
6649 startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in));
6650
6651 cp->phys.header.savep = startp;
6652 cp->phys.header.goalp = startp + 24;
6653 cp->phys.header.lastp = startp;
6654 cp->phys.header.wgoalp = startp + 24;
6655 cp->phys.header.wlastp = startp;
6656
6657 cp->host_status = HS_BUSY;
6658 cp->scsi_status = SAM_STAT_ILLEGAL;
6659 cp->auto_sense = s_status;
6660
6661 cp->start.schedule.l_paddr =
6662 cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
6663
6664 /*
6665 ** Select without ATN for quirky devices.
6666 */
6667 if (cmd->device->select_no_atn)
6668 cp->start.schedule.l_paddr =
6669 cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn));
6670
6671 ncr_put_start_queue(np, cp);
6672
6673 OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
6674 return;
6675 }
6676
6677 out:
6678 OUTONB_STD ();
6679 return;
6680 }
6681
6682
6683 /*==========================================================
6684 **
6685 **
6686 ** ncr chip exception handler for programmed interrupts.
6687 **
6688 **
6689 **==========================================================
6690 */
6691
ncr_int_sir(struct ncb * np)6692 void ncr_int_sir (struct ncb *np)
6693 {
6694 u_char scntl3;
6695 u_char chg, ofs, per, fak, wide;
6696 u_char num = INB (nc_dsps);
6697 struct ccb *cp=NULL;
6698 u_long dsa = INL (nc_dsa);
6699 u_char target = INB (nc_sdid) & 0x0f;
6700 struct tcb *tp = &np->target[target];
6701 struct scsi_target *starget = tp->starget;
6702
6703 if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
6704
6705 switch (num) {
6706 case SIR_INTFLY:
6707 /*
6708 ** This is used for HP Zalon/53c720 where INTFLY
6709 ** operation is currently broken.
6710 */
6711 ncr_wakeup_done(np);
6712 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
6713 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8);
6714 #else
6715 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start));
6716 #endif
6717 return;
6718 case SIR_RESEL_NO_MSG_IN:
6719 case SIR_RESEL_NO_IDENTIFY:
6720 /*
6721 ** If devices reselecting without sending an IDENTIFY
6722 ** message still exist, this should help.
6723 ** We just assume lun=0, 1 CCB, no tag.
6724 */
6725 if (tp->lp[0]) {
6726 OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0]));
6727 return;
6728 }
6729 fallthrough;
6730 case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */
6731 case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */
6732 case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */
6733 case SIR_RESEL_BAD_I_T_L: /* Will send an ABORT message */
6734 printk ("%s:%d: SIR %d, "
6735 "incorrect nexus identification on reselection\n",
6736 ncr_name (np), target, num);
6737 goto out;
6738 case SIR_DONE_OVERFLOW:
6739 printk ("%s:%d: SIR %d, "
6740 "CCB done queue overflow\n",
6741 ncr_name (np), target, num);
6742 goto out;
6743 case SIR_BAD_STATUS:
6744 cp = np->header.cp;
6745 if (!cp || CCB_PHYS (cp, phys) != dsa)
6746 goto out;
6747 ncr_sir_to_redo(np, num, cp);
6748 return;
6749 default:
6750 /*
6751 ** lookup the ccb
6752 */
6753 cp = np->ccb;
6754 while (cp && (CCB_PHYS (cp, phys) != dsa))
6755 cp = cp->link_ccb;
6756
6757 BUG_ON(!cp);
6758 BUG_ON(cp != np->header.cp);
6759
6760 if (!cp || cp != np->header.cp)
6761 goto out;
6762 }
6763
6764 switch (num) {
6765 /*-----------------------------------------------------------------------------
6766 **
6767 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
6768 ** ("Everything you've always wanted to know about transfer mode
6769 ** negotiation")
6770 **
6771 ** We try to negotiate sync and wide transfer only after
6772 ** a successful inquire command. We look at byte 7 of the
6773 ** inquire data to determine the capabilities of the target.
6774 **
6775 ** When we try to negotiate, we append the negotiation message
6776 ** to the identify and (maybe) simple tag message.
6777 ** The host status field is set to HS_NEGOTIATE to mark this
6778 ** situation.
6779 **
6780 ** If the target doesn't answer this message immediately
6781 ** (as required by the standard), the SIR_NEGO_FAIL interrupt
6782 ** will be raised eventually.
6783 ** The handler removes the HS_NEGOTIATE status, and sets the
6784 ** negotiated value to the default (async / nowide).
6785 **
6786 ** If we receive a matching answer immediately, we check it
6787 ** for validity, and set the values.
6788 **
6789 ** If we receive a Reject message immediately, we assume the
6790 ** negotiation has failed, and fall back to standard values.
6791 **
6792 ** If we receive a negotiation message while not in HS_NEGOTIATE
6793 ** state, it's a target initiated negotiation. We prepare a
6794 ** (hopefully) valid answer, set our parameters, and send back
6795 ** this answer to the target.
6796 **
6797 ** If the target doesn't fetch the answer (no message out phase),
6798 ** we assume the negotiation has failed, and fall back to default
6799 ** settings.
6800 **
6801 ** When we set the values, we adjust them in all ccbs belonging
6802 ** to this target, in the controller's register, and in the "phys"
6803 ** field of the controller's struct ncb.
6804 **
6805 ** Possible cases: hs sir msg_in value send goto
6806 ** We try to negotiate:
6807 ** -> target doesn't msgin NEG FAIL noop defa. - dispatch
6808 ** -> target rejected our msg NEG FAIL reject defa. - dispatch
6809 ** -> target answered (ok) NEG SYNC sdtr set - clrack
6810 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
6811 ** -> target answered (ok) NEG WIDE wdtr set - clrack
6812 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
6813 ** -> any other msgin NEG FAIL noop defa. - dispatch
6814 **
6815 ** Target tries to negotiate:
6816 ** -> incoming message --- SYNC sdtr set SDTR -
6817 ** -> incoming message --- WIDE wdtr set WDTR -
6818 ** We sent our answer:
6819 ** -> target doesn't msgout --- PROTO ? defa. - dispatch
6820 **
6821 **-----------------------------------------------------------------------------
6822 */
6823
6824 case SIR_NEGO_FAILED:
6825 /*-------------------------------------------------------
6826 **
6827 ** Negotiation failed.
6828 ** Target doesn't send an answer message,
6829 ** or target rejected our message.
6830 **
6831 ** Remove negotiation request.
6832 **
6833 **-------------------------------------------------------
6834 */
6835 OUTB (HS_PRT, HS_BUSY);
6836
6837 fallthrough;
6838
6839 case SIR_NEGO_PROTO:
6840 /*-------------------------------------------------------
6841 **
6842 ** Negotiation failed.
6843 ** Target doesn't fetch the answer message.
6844 **
6845 **-------------------------------------------------------
6846 */
6847
6848 if (DEBUG_FLAGS & DEBUG_NEGO) {
6849 PRINT_ADDR(cp->cmd, "negotiation failed sir=%x "
6850 "status=%x.\n", num, cp->nego_status);
6851 }
6852
6853 /*
6854 ** any error in negotiation:
6855 ** fall back to default mode.
6856 */
6857 switch (cp->nego_status) {
6858
6859 case NS_SYNC:
6860 spi_period(starget) = 0;
6861 spi_offset(starget) = 0;
6862 ncr_setsync (np, cp, 0, 0xe0);
6863 break;
6864
6865 case NS_WIDE:
6866 spi_width(starget) = 0;
6867 ncr_setwide (np, cp, 0, 0);
6868 break;
6869
6870 }
6871 np->msgin [0] = NOP;
6872 np->msgout[0] = NOP;
6873 cp->nego_status = 0;
6874 break;
6875
6876 case SIR_NEGO_SYNC:
6877 if (DEBUG_FLAGS & DEBUG_NEGO) {
6878 ncr_print_msg(cp, "sync msgin", np->msgin);
6879 }
6880
6881 chg = 0;
6882 per = np->msgin[3];
6883 ofs = np->msgin[4];
6884 if (ofs==0) per=255;
6885
6886 /*
6887 ** if target sends SDTR message,
6888 ** it CAN transfer synch.
6889 */
6890
6891 if (ofs && starget)
6892 spi_support_sync(starget) = 1;
6893
6894 /*
6895 ** check values against driver limits.
6896 */
6897
6898 if (per < np->minsync)
6899 {chg = 1; per = np->minsync;}
6900 if (per < tp->minsync)
6901 {chg = 1; per = tp->minsync;}
6902 if (ofs > tp->maxoffs)
6903 {chg = 1; ofs = tp->maxoffs;}
6904
6905 /*
6906 ** Check against controller limits.
6907 */
6908 fak = 7;
6909 scntl3 = 0;
6910 if (ofs != 0) {
6911 ncr_getsync(np, per, &fak, &scntl3);
6912 if (fak > 7) {
6913 chg = 1;
6914 ofs = 0;
6915 }
6916 }
6917 if (ofs == 0) {
6918 fak = 7;
6919 per = 0;
6920 scntl3 = 0;
6921 tp->minsync = 0;
6922 }
6923
6924 if (DEBUG_FLAGS & DEBUG_NEGO) {
6925 PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d "
6926 "fak=%d chg=%d.\n", per, scntl3, ofs, fak, chg);
6927 }
6928
6929 if (INB (HS_PRT) == HS_NEGOTIATE) {
6930 OUTB (HS_PRT, HS_BUSY);
6931 switch (cp->nego_status) {
6932
6933 case NS_SYNC:
6934 /* This was an answer message */
6935 if (chg) {
6936 /* Answer wasn't acceptable. */
6937 spi_period(starget) = 0;
6938 spi_offset(starget) = 0;
6939 ncr_setsync(np, cp, 0, 0xe0);
6940 OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad));
6941 } else {
6942 /* Answer is ok. */
6943 spi_period(starget) = per;
6944 spi_offset(starget) = ofs;
6945 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
6946 OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack));
6947 }
6948 return;
6949
6950 case NS_WIDE:
6951 spi_width(starget) = 0;
6952 ncr_setwide(np, cp, 0, 0);
6953 break;
6954 }
6955 }
6956
6957 /*
6958 ** It was a request. Set value and
6959 ** prepare an answer message
6960 */
6961
6962 spi_period(starget) = per;
6963 spi_offset(starget) = ofs;
6964 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
6965
6966 spi_populate_sync_msg(np->msgout, per, ofs);
6967 cp->nego_status = NS_SYNC;
6968
6969 if (DEBUG_FLAGS & DEBUG_NEGO) {
6970 ncr_print_msg(cp, "sync msgout", np->msgout);
6971 }
6972
6973 if (!ofs) {
6974 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
6975 return;
6976 }
6977 np->msgin [0] = NOP;
6978
6979 break;
6980
6981 case SIR_NEGO_WIDE:
6982 /*
6983 ** Wide request message received.
6984 */
6985 if (DEBUG_FLAGS & DEBUG_NEGO) {
6986 ncr_print_msg(cp, "wide msgin", np->msgin);
6987 }
6988
6989 /*
6990 ** get requested values.
6991 */
6992
6993 chg = 0;
6994 wide = np->msgin[3];
6995
6996 /*
6997 ** if target sends WDTR message,
6998 ** it CAN transfer wide.
6999 */
7000
7001 if (wide && starget)
7002 spi_support_wide(starget) = 1;
7003
7004 /*
7005 ** check values against driver limits.
7006 */
7007
7008 if (wide > tp->usrwide)
7009 {chg = 1; wide = tp->usrwide;}
7010
7011 if (DEBUG_FLAGS & DEBUG_NEGO) {
7012 PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n", wide,
7013 chg);
7014 }
7015
7016 if (INB (HS_PRT) == HS_NEGOTIATE) {
7017 OUTB (HS_PRT, HS_BUSY);
7018 switch (cp->nego_status) {
7019
7020 case NS_WIDE:
7021 /*
7022 ** This was an answer message
7023 */
7024 if (chg) {
7025 /* Answer wasn't acceptable. */
7026 spi_width(starget) = 0;
7027 ncr_setwide(np, cp, 0, 1);
7028 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
7029 } else {
7030 /* Answer is ok. */
7031 spi_width(starget) = wide;
7032 ncr_setwide(np, cp, wide, 1);
7033 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
7034 }
7035 return;
7036
7037 case NS_SYNC:
7038 spi_period(starget) = 0;
7039 spi_offset(starget) = 0;
7040 ncr_setsync(np, cp, 0, 0xe0);
7041 break;
7042 }
7043 }
7044
7045 /*
7046 ** It was a request, set value and
7047 ** prepare an answer message
7048 */
7049
7050 spi_width(starget) = wide;
7051 ncr_setwide(np, cp, wide, 1);
7052 spi_populate_width_msg(np->msgout, wide);
7053
7054 np->msgin [0] = NOP;
7055
7056 cp->nego_status = NS_WIDE;
7057
7058 if (DEBUG_FLAGS & DEBUG_NEGO) {
7059 ncr_print_msg(cp, "wide msgout", np->msgin);
7060 }
7061 break;
7062
7063 /*--------------------------------------------------------------------
7064 **
7065 ** Processing of special messages
7066 **
7067 **--------------------------------------------------------------------
7068 */
7069
7070 case SIR_REJECT_RECEIVED:
7071 /*-----------------------------------------------
7072 **
7073 ** We received a MESSAGE_REJECT.
7074 **
7075 **-----------------------------------------------
7076 */
7077
7078 PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n",
7079 (unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]);
7080 break;
7081
7082 case SIR_REJECT_SENT:
7083 /*-----------------------------------------------
7084 **
7085 ** We received an unknown message
7086 **
7087 **-----------------------------------------------
7088 */
7089
7090 ncr_print_msg(cp, "MESSAGE_REJECT sent for", np->msgin);
7091 break;
7092
7093 /*--------------------------------------------------------------------
7094 **
7095 ** Processing of special messages
7096 **
7097 **--------------------------------------------------------------------
7098 */
7099
7100 case SIR_IGN_RESIDUE:
7101 /*-----------------------------------------------
7102 **
7103 ** We received an IGNORE RESIDUE message,
7104 ** which couldn't be handled by the script.
7105 **
7106 **-----------------------------------------------
7107 */
7108
7109 PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet "
7110 "implemented.\n");
7111 break;
7112 #if 0
7113 case SIR_MISSING_SAVE:
7114 /*-----------------------------------------------
7115 **
7116 ** We received an DISCONNECT message,
7117 ** but the datapointer wasn't saved before.
7118 **
7119 **-----------------------------------------------
7120 */
7121
7122 PRINT_ADDR(cp->cmd, "DISCONNECT received, but datapointer "
7123 "not saved: data=%x save=%x goal=%x.\n",
7124 (unsigned) INL (nc_temp),
7125 (unsigned) scr_to_cpu(np->header.savep),
7126 (unsigned) scr_to_cpu(np->header.goalp));
7127 break;
7128 #endif
7129 }
7130
7131 out:
7132 OUTONB_STD ();
7133 }
7134
7135 /*==========================================================
7136 **
7137 **
7138 ** Acquire a control block
7139 **
7140 **
7141 **==========================================================
7142 */
7143
ncr_get_ccb(struct ncb * np,struct scsi_cmnd * cmd)7144 static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd)
7145 {
7146 u_char tn = cmd->device->id;
7147 u_char ln = cmd->device->lun;
7148 struct tcb *tp = &np->target[tn];
7149 struct lcb *lp = tp->lp[ln];
7150 u_char tag = NO_TAG;
7151 struct ccb *cp = NULL;
7152
7153 /*
7154 ** Lun structure available ?
7155 */
7156 if (lp) {
7157 struct list_head *qp;
7158 /*
7159 ** Keep from using more tags than we can handle.
7160 */
7161 if (lp->usetags && lp->busyccbs >= lp->maxnxs)
7162 return NULL;
7163
7164 /*
7165 ** Allocate a new CCB if needed.
7166 */
7167 if (list_empty(&lp->free_ccbq))
7168 ncr_alloc_ccb(np, tn, ln);
7169
7170 /*
7171 ** Look for free CCB
7172 */
7173 qp = ncr_list_pop(&lp->free_ccbq);
7174 if (qp) {
7175 cp = list_entry(qp, struct ccb, link_ccbq);
7176 if (cp->magic) {
7177 PRINT_ADDR(cmd, "ccb free list corrupted "
7178 "(@%p)\n", cp);
7179 cp = NULL;
7180 } else {
7181 list_add_tail(qp, &lp->wait_ccbq);
7182 ++lp->busyccbs;
7183 }
7184 }
7185
7186 /*
7187 ** If a CCB is available,
7188 ** Get a tag for this nexus if required.
7189 */
7190 if (cp) {
7191 if (lp->usetags)
7192 tag = lp->cb_tags[lp->ia_tag];
7193 }
7194 else if (lp->actccbs > 0)
7195 return NULL;
7196 }
7197
7198 /*
7199 ** if nothing available, take the default.
7200 */
7201 if (!cp)
7202 cp = np->ccb;
7203
7204 /*
7205 ** Wait until available.
7206 */
7207 #if 0
7208 while (cp->magic) {
7209 if (flags & SCSI_NOSLEEP) break;
7210 if (tsleep ((caddr_t)cp, PRIBIO|PCATCH, "ncr", 0))
7211 break;
7212 }
7213 #endif
7214
7215 if (cp->magic)
7216 return NULL;
7217
7218 cp->magic = 1;
7219
7220 /*
7221 ** Move to next available tag if tag used.
7222 */
7223 if (lp) {
7224 if (tag != NO_TAG) {
7225 ++lp->ia_tag;
7226 if (lp->ia_tag == MAX_TAGS)
7227 lp->ia_tag = 0;
7228 lp->tags_umap |= (((tagmap_t) 1) << tag);
7229 }
7230 }
7231
7232 /*
7233 ** Remember all informations needed to free this CCB.
7234 */
7235 cp->tag = tag;
7236 cp->target = tn;
7237 cp->lun = ln;
7238
7239 if (DEBUG_FLAGS & DEBUG_TAGS) {
7240 PRINT_ADDR(cmd, "ccb @%p using tag %d.\n", cp, tag);
7241 }
7242
7243 return cp;
7244 }
7245
7246 /*==========================================================
7247 **
7248 **
7249 ** Release one control block
7250 **
7251 **
7252 **==========================================================
7253 */
7254
ncr_free_ccb(struct ncb * np,struct ccb * cp)7255 static void ncr_free_ccb (struct ncb *np, struct ccb *cp)
7256 {
7257 struct tcb *tp = &np->target[cp->target];
7258 struct lcb *lp = tp->lp[cp->lun];
7259
7260 if (DEBUG_FLAGS & DEBUG_TAGS) {
7261 PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n", cp, cp->tag);
7262 }
7263
7264 /*
7265 ** If lun control block available,
7266 ** decrement active commands and increment credit,
7267 ** free the tag if any and remove the JUMP for reselect.
7268 */
7269 if (lp) {
7270 if (cp->tag != NO_TAG) {
7271 lp->cb_tags[lp->if_tag++] = cp->tag;
7272 if (lp->if_tag == MAX_TAGS)
7273 lp->if_tag = 0;
7274 lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag);
7275 lp->tags_smap &= lp->tags_umap;
7276 lp->jump_ccb[cp->tag] =
7277 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q));
7278 } else {
7279 lp->jump_ccb[0] =
7280 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l));
7281 }
7282 }
7283
7284 /*
7285 ** Make this CCB available.
7286 */
7287
7288 if (lp) {
7289 if (cp != np->ccb)
7290 list_move(&cp->link_ccbq, &lp->free_ccbq);
7291 --lp->busyccbs;
7292 if (cp->queued) {
7293 --lp->queuedccbs;
7294 }
7295 }
7296 cp -> host_status = HS_IDLE;
7297 cp -> magic = 0;
7298 if (cp->queued) {
7299 --np->queuedccbs;
7300 cp->queued = 0;
7301 }
7302
7303 #if 0
7304 if (cp == np->ccb)
7305 wakeup ((caddr_t) cp);
7306 #endif
7307 }
7308
7309
7310 #define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r))
7311
7312 /*------------------------------------------------------------------------
7313 ** Initialize the fixed part of a CCB structure.
7314 **------------------------------------------------------------------------
7315 **------------------------------------------------------------------------
7316 */
ncr_init_ccb(struct ncb * np,struct ccb * cp)7317 static void ncr_init_ccb(struct ncb *np, struct ccb *cp)
7318 {
7319 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
7320
7321 /*
7322 ** Remember virtual and bus address of this ccb.
7323 */
7324 cp->p_ccb = vtobus(cp);
7325 cp->phys.header.cp = cp;
7326
7327 /*
7328 ** This allows list_del to work for the default ccb.
7329 */
7330 INIT_LIST_HEAD(&cp->link_ccbq);
7331
7332 /*
7333 ** Initialyze the start and restart launch script.
7334 **
7335 ** COPY(4) @(...p_phys), @(dsa)
7336 ** JUMP @(sched_point)
7337 */
7338 cp->start.setup_dsa[0] = cpu_to_scr(copy_4);
7339 cp->start.setup_dsa[1] = cpu_to_scr(CCB_PHYS(cp, start.p_phys));
7340 cp->start.setup_dsa[2] = cpu_to_scr(ncr_reg_bus_addr(nc_dsa));
7341 cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP);
7342 cp->start.p_phys = cpu_to_scr(CCB_PHYS(cp, phys));
7343
7344 memcpy(&cp->restart, &cp->start, sizeof(cp->restart));
7345
7346 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
7347 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort));
7348 }
7349
7350
7351 /*------------------------------------------------------------------------
7352 ** Allocate a CCB and initialize its fixed part.
7353 **------------------------------------------------------------------------
7354 **------------------------------------------------------------------------
7355 */
ncr_alloc_ccb(struct ncb * np,u_char tn,u_char ln)7356 static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln)
7357 {
7358 struct tcb *tp = &np->target[tn];
7359 struct lcb *lp = tp->lp[ln];
7360 struct ccb *cp = NULL;
7361
7362 /*
7363 ** Allocate memory for this CCB.
7364 */
7365 cp = m_calloc_dma(sizeof(struct ccb), "CCB");
7366 if (!cp)
7367 return;
7368
7369 /*
7370 ** Count it and initialyze it.
7371 */
7372 lp->actccbs++;
7373 np->actccbs++;
7374 memset(cp, 0, sizeof (*cp));
7375 ncr_init_ccb(np, cp);
7376
7377 /*
7378 ** Chain into wakeup list and free ccb queue and take it
7379 ** into account for tagged commands.
7380 */
7381 cp->link_ccb = np->ccb->link_ccb;
7382 np->ccb->link_ccb = cp;
7383
7384 list_add(&cp->link_ccbq, &lp->free_ccbq);
7385 }
7386
7387 /*==========================================================
7388 **
7389 **
7390 ** Allocation of resources for Targets/Luns/Tags.
7391 **
7392 **
7393 **==========================================================
7394 */
7395
7396
7397 /*------------------------------------------------------------------------
7398 ** Target control block initialisation.
7399 **------------------------------------------------------------------------
7400 ** This data structure is fully initialized after a SCSI command
7401 ** has been successfully completed for this target.
7402 ** It contains a SCRIPT that is called on target reselection.
7403 **------------------------------------------------------------------------
7404 */
ncr_init_tcb(struct ncb * np,u_char tn)7405 static void ncr_init_tcb (struct ncb *np, u_char tn)
7406 {
7407 struct tcb *tp = &np->target[tn];
7408 ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1);
7409 int th = tn & 3;
7410 int i;
7411
7412 /*
7413 ** Jump to next tcb if SFBR does not match this target.
7414 ** JUMP IF (SFBR != #target#), @(next tcb)
7415 */
7416 tp->jump_tcb.l_cmd =
7417 cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn))));
7418 tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr;
7419
7420 /*
7421 ** Load the synchronous transfer register.
7422 ** COPY @(tp->sval), @(sxfer)
7423 */
7424 tp->getscr[0] = cpu_to_scr(copy_1);
7425 tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval));
7426 #ifdef SCSI_NCR_BIG_ENDIAN
7427 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3);
7428 #else
7429 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer));
7430 #endif
7431
7432 /*
7433 ** Load the timing register.
7434 ** COPY @(tp->wval), @(scntl3)
7435 */
7436 tp->getscr[3] = cpu_to_scr(copy_1);
7437 tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval));
7438 #ifdef SCSI_NCR_BIG_ENDIAN
7439 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3);
7440 #else
7441 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3));
7442 #endif
7443
7444 /*
7445 ** Get the IDENTIFY message and the lun.
7446 ** CALL @script(resel_lun)
7447 */
7448 tp->call_lun.l_cmd = cpu_to_scr(SCR_CALL);
7449 tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun));
7450
7451 /*
7452 ** Look for the lun control block of this nexus.
7453 ** For i = 0 to 3
7454 ** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
7455 */
7456 for (i = 0 ; i < 4 ; i++) {
7457 tp->jump_lcb[i].l_cmd =
7458 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
7459 tp->jump_lcb[i].l_paddr =
7460 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify));
7461 }
7462
7463 /*
7464 ** Link this target control block to the JUMP chain.
7465 */
7466 np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb));
7467
7468 /*
7469 ** These assert's should be moved at driver initialisations.
7470 */
7471 #ifdef SCSI_NCR_BIG_ENDIAN
7472 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^
7473 offsetof(struct tcb , sval )) &3) != 3);
7474 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^
7475 offsetof(struct tcb , wval )) &3) != 3);
7476 #else
7477 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^
7478 offsetof(struct tcb , sval )) &3) != 0);
7479 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^
7480 offsetof(struct tcb , wval )) &3) != 0);
7481 #endif
7482 }
7483
7484
7485 /*------------------------------------------------------------------------
7486 ** Lun control block allocation and initialization.
7487 **------------------------------------------------------------------------
7488 ** This data structure is allocated and initialized after a SCSI
7489 ** command has been successfully completed for this target/lun.
7490 **------------------------------------------------------------------------
7491 */
ncr_alloc_lcb(struct ncb * np,u_char tn,u_char ln)7492 static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln)
7493 {
7494 struct tcb *tp = &np->target[tn];
7495 struct lcb *lp = tp->lp[ln];
7496 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
7497 int lh = ln & 3;
7498
7499 /*
7500 ** Already done, return.
7501 */
7502 if (lp)
7503 return lp;
7504
7505 /*
7506 ** Allocate the lcb.
7507 */
7508 lp = m_calloc_dma(sizeof(struct lcb), "LCB");
7509 if (!lp)
7510 goto fail;
7511 memset(lp, 0, sizeof(*lp));
7512 tp->lp[ln] = lp;
7513
7514 /*
7515 ** Initialize the target control block if not yet.
7516 */
7517 if (!tp->jump_tcb.l_cmd)
7518 ncr_init_tcb(np, tn);
7519
7520 /*
7521 ** Initialize the CCB queue headers.
7522 */
7523 INIT_LIST_HEAD(&lp->free_ccbq);
7524 INIT_LIST_HEAD(&lp->busy_ccbq);
7525 INIT_LIST_HEAD(&lp->wait_ccbq);
7526 INIT_LIST_HEAD(&lp->skip_ccbq);
7527
7528 /*
7529 ** Set max CCBs to 1 and use the default 1 entry
7530 ** jump table by default.
7531 */
7532 lp->maxnxs = 1;
7533 lp->jump_ccb = &lp->jump_ccb_0;
7534 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb));
7535
7536 /*
7537 ** Initilialyze the reselect script:
7538 **
7539 ** Jump to next lcb if SFBR does not match this lun.
7540 ** Load TEMP with the CCB direct jump table bus address.
7541 ** Get the SIMPLE TAG message and the tag.
7542 **
7543 ** JUMP IF (SFBR != #lun#), @(next lcb)
7544 ** COPY @(lp->p_jump_ccb), @(temp)
7545 ** JUMP @script(resel_notag)
7546 */
7547 lp->jump_lcb.l_cmd =
7548 cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff))));
7549 lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr;
7550
7551 lp->load_jump_ccb[0] = cpu_to_scr(copy_4);
7552 lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb));
7553 lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp));
7554
7555 lp->jump_tag.l_cmd = cpu_to_scr(SCR_JUMP);
7556 lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag));
7557
7558 /*
7559 ** Link this lun control block to the JUMP chain.
7560 */
7561 tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb));
7562
7563 /*
7564 ** Initialize command queuing control.
7565 */
7566 lp->busyccbs = 1;
7567 lp->queuedccbs = 1;
7568 lp->queuedepth = 1;
7569 fail:
7570 return lp;
7571 }
7572
7573
7574 /*------------------------------------------------------------------------
7575 ** Lun control block setup on INQUIRY data received.
7576 **------------------------------------------------------------------------
7577 ** We only support WIDE, SYNC for targets and CMDQ for logical units.
7578 ** This setup is done on each INQUIRY since we are expecting user
7579 ** will play with CHANGE DEFINITION commands. :-)
7580 **------------------------------------------------------------------------
7581 */
ncr_setup_lcb(struct ncb * np,struct scsi_device * sdev)7582 static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev)
7583 {
7584 unsigned char tn = sdev->id, ln = sdev->lun;
7585 struct tcb *tp = &np->target[tn];
7586 struct lcb *lp = tp->lp[ln];
7587
7588 /* If no lcb, try to allocate it. */
7589 if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln)))
7590 goto fail;
7591
7592 /*
7593 ** If unit supports tagged commands, allocate the
7594 ** CCB JUMP table if not yet.
7595 */
7596 if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) {
7597 int i;
7598 lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB");
7599 if (!lp->jump_ccb) {
7600 lp->jump_ccb = &lp->jump_ccb_0;
7601 goto fail;
7602 }
7603 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb));
7604 for (i = 0 ; i < 64 ; i++)
7605 lp->jump_ccb[i] =
7606 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q));
7607 for (i = 0 ; i < MAX_TAGS ; i++)
7608 lp->cb_tags[i] = i;
7609 lp->maxnxs = MAX_TAGS;
7610 lp->tags_stime = jiffies + 3*HZ;
7611 ncr_setup_tags (np, sdev);
7612 }
7613
7614
7615 fail:
7616 return lp;
7617 }
7618
7619 /*==========================================================
7620 **
7621 **
7622 ** Build Scatter Gather Block
7623 **
7624 **
7625 **==========================================================
7626 **
7627 ** The transfer area may be scattered among
7628 ** several non adjacent physical pages.
7629 **
7630 ** We may use MAX_SCATTER blocks.
7631 **
7632 **----------------------------------------------------------
7633 */
7634
7635 /*
7636 ** We try to reduce the number of interrupts caused
7637 ** by unexpected phase changes due to disconnects.
7638 ** A typical harddisk may disconnect before ANY block.
7639 ** If we wanted to avoid unexpected phase changes at all
7640 ** we had to use a break point every 512 bytes.
7641 ** Of course the number of scatter/gather blocks is
7642 ** limited.
7643 ** Under Linux, the scatter/gatter blocks are provided by
7644 ** the generic driver. We just have to copy addresses and
7645 ** sizes to the data segment array.
7646 */
7647
ncr_scatter(struct ncb * np,struct ccb * cp,struct scsi_cmnd * cmd)7648 static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd)
7649 {
7650 int segment = 0;
7651 int use_sg = scsi_sg_count(cmd);
7652
7653 cp->data_len = 0;
7654
7655 use_sg = map_scsi_sg_data(np, cmd);
7656 if (use_sg > 0) {
7657 struct scatterlist *sg;
7658 struct scr_tblmove *data;
7659
7660 if (use_sg > MAX_SCATTER) {
7661 unmap_scsi_data(np, cmd);
7662 return -1;
7663 }
7664
7665 data = &cp->phys.data[MAX_SCATTER - use_sg];
7666
7667 scsi_for_each_sg(cmd, sg, use_sg, segment) {
7668 dma_addr_t baddr = sg_dma_address(sg);
7669 unsigned int len = sg_dma_len(sg);
7670
7671 ncr_build_sge(np, &data[segment], baddr, len);
7672 cp->data_len += len;
7673 }
7674 } else
7675 segment = -2;
7676
7677 return segment;
7678 }
7679
7680 /*==========================================================
7681 **
7682 **
7683 ** Test the bus snoop logic :-(
7684 **
7685 ** Has to be called with interrupts disabled.
7686 **
7687 **
7688 **==========================================================
7689 */
7690
ncr_regtest(struct ncb * np)7691 static int __init ncr_regtest (struct ncb* np)
7692 {
7693 register volatile u32 data;
7694 /*
7695 ** ncr registers may NOT be cached.
7696 ** write 0xffffffff to a read only register area,
7697 ** and try to read it back.
7698 */
7699 data = 0xffffffff;
7700 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
7701 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
7702 #if 1
7703 if (data == 0xffffffff) {
7704 #else
7705 if ((data & 0xe2f0fffd) != 0x02000080) {
7706 #endif
7707 printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
7708 (unsigned) data);
7709 return (0x10);
7710 }
7711 return (0);
7712 }
7713
7714 static int __init ncr_snooptest (struct ncb* np)
7715 {
7716 u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
7717 int i, err=0;
7718 if (np->reg) {
7719 err |= ncr_regtest (np);
7720 if (err)
7721 return (err);
7722 }
7723
7724 /* init */
7725 pc = NCB_SCRIPTH_PHYS (np, snooptest);
7726 host_wr = 1;
7727 ncr_wr = 2;
7728 /*
7729 ** Set memory and register.
7730 */
7731 np->ncr_cache = cpu_to_scr(host_wr);
7732 OUTL (nc_temp, ncr_wr);
7733 /*
7734 ** Start script (exchange values)
7735 */
7736 OUTL_DSP (pc);
7737 /*
7738 ** Wait 'til done (with timeout)
7739 */
7740 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
7741 if (INB(nc_istat) & (INTF|SIP|DIP))
7742 break;
7743 /*
7744 ** Save termination position.
7745 */
7746 pc = INL (nc_dsp);
7747 /*
7748 ** Read memory and register.
7749 */
7750 host_rd = scr_to_cpu(np->ncr_cache);
7751 ncr_rd = INL (nc_scratcha);
7752 ncr_bk = INL (nc_temp);
7753 /*
7754 ** Reset ncr chip
7755 */
7756 ncr_chip_reset(np, 100);
7757 /*
7758 ** check for timeout
7759 */
7760 if (i>=NCR_SNOOP_TIMEOUT) {
7761 printk ("CACHE TEST FAILED: timeout.\n");
7762 return (0x20);
7763 }
7764 /*
7765 ** Check termination position.
7766 */
7767 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
7768 printk ("CACHE TEST FAILED: script execution failed.\n");
7769 printk ("start=%08lx, pc=%08lx, end=%08lx\n",
7770 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
7771 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
7772 return (0x40);
7773 }
7774 /*
7775 ** Show results.
7776 */
7777 if (host_wr != ncr_rd) {
7778 printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
7779 (int) host_wr, (int) ncr_rd);
7780 err |= 1;
7781 }
7782 if (host_rd != ncr_wr) {
7783 printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
7784 (int) ncr_wr, (int) host_rd);
7785 err |= 2;
7786 }
7787 if (ncr_bk != ncr_wr) {
7788 printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
7789 (int) ncr_wr, (int) ncr_bk);
7790 err |= 4;
7791 }
7792 return (err);
7793 }
7794
7795 /*==========================================================
7796 **
7797 ** Determine the ncr's clock frequency.
7798 ** This is essential for the negotiation
7799 ** of the synchronous transfer rate.
7800 **
7801 **==========================================================
7802 **
7803 ** Note: we have to return the correct value.
7804 ** THERE IS NO SAFE DEFAULT VALUE.
7805 **
7806 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
7807 ** 53C860 and 53C875 rev. 1 support fast20 transfers but
7808 ** do not have a clock doubler and so are provided with a
7809 ** 80 MHz clock. All other fast20 boards incorporate a doubler
7810 ** and so should be delivered with a 40 MHz clock.
7811 ** The future fast40 chips (895/895) use a 40 Mhz base clock
7812 ** and provide a clock quadrupler (160 Mhz). The code below
7813 ** tries to deal as cleverly as possible with all this stuff.
7814 **
7815 **----------------------------------------------------------
7816 */
7817
7818 /*
7819 * Select NCR SCSI clock frequency
7820 */
7821 static void ncr_selectclock(struct ncb *np, u_char scntl3)
7822 {
7823 if (np->multiplier < 2) {
7824 OUTB(nc_scntl3, scntl3);
7825 return;
7826 }
7827
7828 if (bootverbose >= 2)
7829 printk ("%s: enabling clock multiplier\n", ncr_name(np));
7830
7831 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
7832 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
7833 int i = 20;
7834 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
7835 udelay(20);
7836 if (!i)
7837 printk("%s: the chip cannot lock the frequency\n", ncr_name(np));
7838 } else /* Wait 20 micro-seconds for doubler */
7839 udelay(20);
7840 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
7841 OUTB(nc_scntl3, scntl3);
7842 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
7843 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
7844 }
7845
7846
7847 /*
7848 * calculate NCR SCSI clock frequency (in KHz)
7849 */
7850 static unsigned __init ncrgetfreq (struct ncb *np, int gen)
7851 {
7852 unsigned ms = 0;
7853 char count = 0;
7854
7855 /*
7856 * Measure GEN timer delay in order
7857 * to calculate SCSI clock frequency
7858 *
7859 * This code will never execute too
7860 * many loop iterations (if DELAY is
7861 * reasonably correct). It could get
7862 * too low a delay (too high a freq.)
7863 * if the CPU is slow executing the
7864 * loop for some reason (an NMI, for
7865 * example). For this reason we will
7866 * if multiple measurements are to be
7867 * performed trust the higher delay
7868 * (lower frequency returned).
7869 */
7870 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
7871 OUTW (nc_sien , 0); /* mask all scsi interrupts */
7872 (void) INW (nc_sist); /* clear pending scsi interrupt */
7873 OUTB (nc_dien , 0); /* mask all dma interrupts */
7874 (void) INW (nc_sist); /* another one, just to be sure :) */
7875 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
7876 OUTB (nc_stime1, 0); /* disable general purpose timer */
7877 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
7878 while (!(INW(nc_sist) & GEN) && ms++ < 100000) {
7879 for (count = 0; count < 10; count ++)
7880 udelay(100); /* count ms */
7881 }
7882 OUTB (nc_stime1, 0); /* disable general purpose timer */
7883 /*
7884 * set prescaler to divide by whatever 0 means
7885 * 0 ought to choose divide by 2, but appears
7886 * to set divide by 3.5 mode in my 53c810 ...
7887 */
7888 OUTB (nc_scntl3, 0);
7889
7890 if (bootverbose >= 2)
7891 printk ("%s: Delay (GEN=%d): %u msec\n", ncr_name(np), gen, ms);
7892 /*
7893 * adjust for prescaler, and convert into KHz
7894 */
7895 return ms ? ((1 << gen) * 4340) / ms : 0;
7896 }
7897
7898 /*
7899 * Get/probe NCR SCSI clock frequency
7900 */
7901 static void __init ncr_getclock (struct ncb *np, int mult)
7902 {
7903 unsigned char scntl3 = INB(nc_scntl3);
7904 unsigned char stest1 = INB(nc_stest1);
7905 unsigned f1;
7906
7907 np->multiplier = 1;
7908 f1 = 40000;
7909
7910 /*
7911 ** True with 875 or 895 with clock multiplier selected
7912 */
7913 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7914 if (bootverbose >= 2)
7915 printk ("%s: clock multiplier found\n", ncr_name(np));
7916 np->multiplier = mult;
7917 }
7918
7919 /*
7920 ** If multiplier not found or scntl3 not 7,5,3,
7921 ** reset chip and get frequency from general purpose timer.
7922 ** Otherwise trust scntl3 BIOS setting.
7923 */
7924 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7925 unsigned f2;
7926
7927 ncr_chip_reset(np, 5);
7928
7929 (void) ncrgetfreq (np, 11); /* throw away first result */
7930 f1 = ncrgetfreq (np, 11);
7931 f2 = ncrgetfreq (np, 11);
7932
7933 if(bootverbose)
7934 printk ("%s: NCR clock is %uKHz, %uKHz\n", ncr_name(np), f1, f2);
7935
7936 if (f1 > f2) f1 = f2; /* trust lower result */
7937
7938 if (f1 < 45000) f1 = 40000;
7939 else if (f1 < 55000) f1 = 50000;
7940 else f1 = 80000;
7941
7942 if (f1 < 80000 && mult > 1) {
7943 if (bootverbose >= 2)
7944 printk ("%s: clock multiplier assumed\n", ncr_name(np));
7945 np->multiplier = mult;
7946 }
7947 } else {
7948 if ((scntl3 & 7) == 3) f1 = 40000;
7949 else if ((scntl3 & 7) == 5) f1 = 80000;
7950 else f1 = 160000;
7951
7952 f1 /= np->multiplier;
7953 }
7954
7955 /*
7956 ** Compute controller synchronous parameters.
7957 */
7958 f1 *= np->multiplier;
7959 np->clock_khz = f1;
7960 }
7961
7962 /*===================== LINUX ENTRY POINTS SECTION ==========================*/
7963
7964 static int ncr53c8xx_slave_alloc(struct scsi_device *device)
7965 {
7966 struct Scsi_Host *host = device->host;
7967 struct ncb *np = ((struct host_data *) host->hostdata)->ncb;
7968 struct tcb *tp = &np->target[device->id];
7969 tp->starget = device->sdev_target;
7970
7971 return 0;
7972 }
7973
7974 static int ncr53c8xx_slave_configure(struct scsi_device *device)
7975 {
7976 struct Scsi_Host *host = device->host;
7977 struct ncb *np = ((struct host_data *) host->hostdata)->ncb;
7978 struct tcb *tp = &np->target[device->id];
7979 struct lcb *lp = tp->lp[device->lun];
7980 int numtags, depth_to_use;
7981
7982 ncr_setup_lcb(np, device);
7983
7984 /*
7985 ** Select queue depth from driver setup.
7986 ** Donnot use more than configured by user.
7987 ** Use at least 2.
7988 ** Donnot use more than our maximum.
7989 */
7990 numtags = device_queue_depth(np->unit, device->id, device->lun);
7991 if (numtags > tp->usrtags)
7992 numtags = tp->usrtags;
7993 if (!device->tagged_supported)
7994 numtags = 1;
7995 depth_to_use = numtags;
7996 if (depth_to_use < 2)
7997 depth_to_use = 2;
7998 if (depth_to_use > MAX_TAGS)
7999 depth_to_use = MAX_TAGS;
8000
8001 scsi_change_queue_depth(device, depth_to_use);
8002
8003 /*
8004 ** Since the queue depth is not tunable under Linux,
8005 ** we need to know this value in order not to
8006 ** announce stupid things to user.
8007 **
8008 ** XXX(hch): As of Linux 2.6 it certainly _is_ tunable..
8009 ** In fact we just tuned it, or did I miss
8010 ** something important? :)
8011 */
8012 if (lp) {
8013 lp->numtags = lp->maxtags = numtags;
8014 lp->scdev_depth = depth_to_use;
8015 }
8016 ncr_setup_tags (np, device);
8017
8018 #ifdef DEBUG_NCR53C8XX
8019 printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n",
8020 np->unit, device->id, device->lun, depth_to_use);
8021 #endif
8022
8023 if (spi_support_sync(device->sdev_target) &&
8024 !spi_initial_dv(device->sdev_target))
8025 spi_dv_device(device);
8026 return 0;
8027 }
8028
8029 static int ncr53c8xx_queue_command_lck (struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
8030 {
8031 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8032 unsigned long flags;
8033 int sts;
8034
8035 #ifdef DEBUG_NCR53C8XX
8036 printk("ncr53c8xx_queue_command\n");
8037 #endif
8038
8039 cmd->scsi_done = done;
8040 cmd->host_scribble = NULL;
8041 cmd->__data_mapped = 0;
8042 cmd->__data_mapping = 0;
8043
8044 spin_lock_irqsave(&np->smp_lock, flags);
8045
8046 if ((sts = ncr_queue_command(np, cmd)) != DID_OK) {
8047 set_host_byte(cmd, sts);
8048 #ifdef DEBUG_NCR53C8XX
8049 printk("ncr53c8xx : command not queued - result=%d\n", sts);
8050 #endif
8051 }
8052 #ifdef DEBUG_NCR53C8XX
8053 else
8054 printk("ncr53c8xx : command successfully queued\n");
8055 #endif
8056
8057 spin_unlock_irqrestore(&np->smp_lock, flags);
8058
8059 if (sts != DID_OK) {
8060 unmap_scsi_data(np, cmd);
8061 done(cmd);
8062 sts = 0;
8063 }
8064
8065 return sts;
8066 }
8067
8068 static DEF_SCSI_QCMD(ncr53c8xx_queue_command)
8069
8070 irqreturn_t ncr53c8xx_intr(int irq, void *dev_id)
8071 {
8072 unsigned long flags;
8073 struct Scsi_Host *shost = (struct Scsi_Host *)dev_id;
8074 struct host_data *host_data = (struct host_data *)shost->hostdata;
8075 struct ncb *np = host_data->ncb;
8076 struct scsi_cmnd *done_list;
8077
8078 #ifdef DEBUG_NCR53C8XX
8079 printk("ncr53c8xx : interrupt received\n");
8080 #endif
8081
8082 if (DEBUG_FLAGS & DEBUG_TINY) printk ("[");
8083
8084 spin_lock_irqsave(&np->smp_lock, flags);
8085 ncr_exception(np);
8086 done_list = np->done_list;
8087 np->done_list = NULL;
8088 spin_unlock_irqrestore(&np->smp_lock, flags);
8089
8090 if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n");
8091
8092 if (done_list)
8093 ncr_flush_done_cmds(done_list);
8094 return IRQ_HANDLED;
8095 }
8096
8097 static void ncr53c8xx_timeout(struct timer_list *t)
8098 {
8099 struct ncb *np = from_timer(np, t, timer);
8100 unsigned long flags;
8101 struct scsi_cmnd *done_list;
8102
8103 spin_lock_irqsave(&np->smp_lock, flags);
8104 ncr_timeout(np);
8105 done_list = np->done_list;
8106 np->done_list = NULL;
8107 spin_unlock_irqrestore(&np->smp_lock, flags);
8108
8109 if (done_list)
8110 ncr_flush_done_cmds(done_list);
8111 }
8112
8113 static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd)
8114 {
8115 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8116 int sts;
8117 unsigned long flags;
8118 struct scsi_cmnd *done_list;
8119
8120 /*
8121 * If the mid-level driver told us reset is synchronous, it seems
8122 * that we must call the done() callback for the involved command,
8123 * even if this command was not queued to the low-level driver,
8124 * before returning SUCCESS.
8125 */
8126
8127 spin_lock_irqsave(&np->smp_lock, flags);
8128 sts = ncr_reset_bus(np, cmd, 1);
8129
8130 done_list = np->done_list;
8131 np->done_list = NULL;
8132 spin_unlock_irqrestore(&np->smp_lock, flags);
8133
8134 ncr_flush_done_cmds(done_list);
8135
8136 return sts;
8137 }
8138
8139 #if 0 /* unused and broken */
8140 static int ncr53c8xx_abort(struct scsi_cmnd *cmd)
8141 {
8142 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8143 int sts;
8144 unsigned long flags;
8145 struct scsi_cmnd *done_list;
8146
8147 printk("ncr53c8xx_abort\n");
8148
8149 NCR_LOCK_NCB(np, flags);
8150
8151 sts = ncr_abort_command(np, cmd);
8152 out:
8153 done_list = np->done_list;
8154 np->done_list = NULL;
8155 NCR_UNLOCK_NCB(np, flags);
8156
8157 ncr_flush_done_cmds(done_list);
8158
8159 return sts;
8160 }
8161 #endif
8162
8163
8164 /*
8165 ** Scsi command waiting list management.
8166 **
8167 ** It may happen that we cannot insert a scsi command into the start queue,
8168 ** in the following circumstances.
8169 ** Too few preallocated ccb(s),
8170 ** maxtags < cmd_per_lun of the Linux host control block,
8171 ** etc...
8172 ** Such scsi commands are inserted into a waiting list.
8173 ** When a scsi command complete, we try to requeue the commands of the
8174 ** waiting list.
8175 */
8176
8177 #define next_wcmd host_scribble
8178
8179 static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd)
8180 {
8181 struct scsi_cmnd *wcmd;
8182
8183 #ifdef DEBUG_WAITING_LIST
8184 printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd);
8185 #endif
8186 cmd->next_wcmd = NULL;
8187 if (!(wcmd = np->waiting_list)) np->waiting_list = cmd;
8188 else {
8189 while (wcmd->next_wcmd)
8190 wcmd = (struct scsi_cmnd *) wcmd->next_wcmd;
8191 wcmd->next_wcmd = (char *) cmd;
8192 }
8193 }
8194
8195 static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd)
8196 {
8197 struct scsi_cmnd **pcmd = &np->waiting_list;
8198
8199 while (*pcmd) {
8200 if (cmd == *pcmd) {
8201 if (to_remove) {
8202 *pcmd = (struct scsi_cmnd *) cmd->next_wcmd;
8203 cmd->next_wcmd = NULL;
8204 }
8205 #ifdef DEBUG_WAITING_LIST
8206 printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd);
8207 #endif
8208 return cmd;
8209 }
8210 pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd;
8211 }
8212 return NULL;
8213 }
8214
8215 static void process_waiting_list(struct ncb *np, int sts)
8216 {
8217 struct scsi_cmnd *waiting_list, *wcmd;
8218
8219 waiting_list = np->waiting_list;
8220 np->waiting_list = NULL;
8221
8222 #ifdef DEBUG_WAITING_LIST
8223 if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts);
8224 #endif
8225 while ((wcmd = waiting_list) != NULL) {
8226 waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd;
8227 wcmd->next_wcmd = NULL;
8228 if (sts == DID_OK) {
8229 #ifdef DEBUG_WAITING_LIST
8230 printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd);
8231 #endif
8232 sts = ncr_queue_command(np, wcmd);
8233 }
8234 if (sts != DID_OK) {
8235 #ifdef DEBUG_WAITING_LIST
8236 printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts);
8237 #endif
8238 set_host_byte(wcmd, sts);
8239 ncr_queue_done_cmd(np, wcmd);
8240 }
8241 }
8242 }
8243
8244 #undef next_wcmd
8245
8246 static ssize_t show_ncr53c8xx_revision(struct device *dev,
8247 struct device_attribute *attr, char *buf)
8248 {
8249 struct Scsi_Host *host = class_to_shost(dev);
8250 struct host_data *host_data = (struct host_data *)host->hostdata;
8251
8252 return snprintf(buf, 20, "0x%x\n", host_data->ncb->revision_id);
8253 }
8254
8255 static struct device_attribute ncr53c8xx_revision_attr = {
8256 .attr = { .name = "revision", .mode = S_IRUGO, },
8257 .show = show_ncr53c8xx_revision,
8258 };
8259
8260 static struct device_attribute *ncr53c8xx_host_attrs[] = {
8261 &ncr53c8xx_revision_attr,
8262 NULL
8263 };
8264
8265 /*==========================================================
8266 **
8267 ** Boot command line.
8268 **
8269 **==========================================================
8270 */
8271 #ifdef MODULE
8272 char *ncr53c8xx; /* command line passed by insmod */
8273 module_param(ncr53c8xx, charp, 0);
8274 #endif
8275
8276 #ifndef MODULE
8277 static int __init ncr53c8xx_setup(char *str)
8278 {
8279 return sym53c8xx__setup(str);
8280 }
8281
8282 __setup("ncr53c8xx=", ncr53c8xx_setup);
8283 #endif
8284
8285
8286 /*
8287 * Host attach and initialisations.
8288 *
8289 * Allocate host data and ncb structure.
8290 * Request IO region and remap MMIO region.
8291 * Do chip initialization.
8292 * If all is OK, install interrupt handling and
8293 * start the timer daemon.
8294 */
8295 struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt,
8296 int unit, struct ncr_device *device)
8297 {
8298 struct host_data *host_data;
8299 struct ncb *np = NULL;
8300 struct Scsi_Host *instance = NULL;
8301 u_long flags = 0;
8302 int i;
8303
8304 if (!tpnt->name)
8305 tpnt->name = SCSI_NCR_DRIVER_NAME;
8306 if (!tpnt->shost_attrs)
8307 tpnt->shost_attrs = ncr53c8xx_host_attrs;
8308
8309 tpnt->queuecommand = ncr53c8xx_queue_command;
8310 tpnt->slave_configure = ncr53c8xx_slave_configure;
8311 tpnt->slave_alloc = ncr53c8xx_slave_alloc;
8312 tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset;
8313 tpnt->can_queue = SCSI_NCR_CAN_QUEUE;
8314 tpnt->this_id = 7;
8315 tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE;
8316 tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN;
8317
8318 if (device->differential)
8319 driver_setup.diff_support = device->differential;
8320
8321 printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n",
8322 unit, device->chip.revision_id, device->slot.irq);
8323
8324 instance = scsi_host_alloc(tpnt, sizeof(*host_data));
8325 if (!instance)
8326 goto attach_error;
8327 host_data = (struct host_data *) instance->hostdata;
8328
8329 np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB");
8330 if (!np)
8331 goto attach_error;
8332 spin_lock_init(&np->smp_lock);
8333 np->dev = device->dev;
8334 np->p_ncb = vtobus(np);
8335 host_data->ncb = np;
8336
8337 np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB");
8338 if (!np->ccb)
8339 goto attach_error;
8340
8341 /* Store input information in the host data structure. */
8342 np->unit = unit;
8343 np->verbose = driver_setup.verbose;
8344 sprintf(np->inst_name, "ncr53c720-%d", np->unit);
8345 np->revision_id = device->chip.revision_id;
8346 np->features = device->chip.features;
8347 np->clock_divn = device->chip.nr_divisor;
8348 np->maxoffs = device->chip.offset_max;
8349 np->maxburst = device->chip.burst_max;
8350 np->myaddr = device->host_id;
8351
8352 /* Allocate SCRIPTS areas. */
8353 np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT");
8354 if (!np->script0)
8355 goto attach_error;
8356 np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
8357 if (!np->scripth0)
8358 goto attach_error;
8359
8360 timer_setup(&np->timer, ncr53c8xx_timeout, 0);
8361
8362 /* Try to map the controller chip to virtual and physical memory. */
8363
8364 np->paddr = device->slot.base;
8365 np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0;
8366
8367 if (device->slot.base_v)
8368 np->vaddr = device->slot.base_v;
8369 else
8370 np->vaddr = ioremap(device->slot.base_c, 128);
8371
8372 if (!np->vaddr) {
8373 printk(KERN_ERR
8374 "%s: can't map memory mapped IO region\n",ncr_name(np));
8375 goto attach_error;
8376 } else {
8377 if (bootverbose > 1)
8378 printk(KERN_INFO
8379 "%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr);
8380 }
8381
8382 /* Make the controller's registers available. Now the INB INW INL
8383 * OUTB OUTW OUTL macros can be used safely.
8384 */
8385
8386 np->reg = (struct ncr_reg __iomem *)np->vaddr;
8387
8388 /* Do chip dependent initialization. */
8389 ncr_prepare_setting(np);
8390
8391 if (np->paddr2 && sizeof(struct script) > 4096) {
8392 np->paddr2 = 0;
8393 printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n",
8394 ncr_name(np));
8395 }
8396
8397 instance->max_channel = 0;
8398 instance->this_id = np->myaddr;
8399 instance->max_id = np->maxwide ? 16 : 8;
8400 instance->max_lun = SCSI_NCR_MAX_LUN;
8401 instance->base = (unsigned long) np->reg;
8402 instance->irq = device->slot.irq;
8403 instance->unique_id = device->slot.base;
8404 instance->dma_channel = 0;
8405 instance->cmd_per_lun = MAX_TAGS;
8406 instance->can_queue = (MAX_START-4);
8407 /* This can happen if you forget to call ncr53c8xx_init from
8408 * your module_init */
8409 BUG_ON(!ncr53c8xx_transport_template);
8410 instance->transportt = ncr53c8xx_transport_template;
8411
8412 /* Patch script to physical addresses */
8413 ncr_script_fill(&script0, &scripth0);
8414
8415 np->scripth = np->scripth0;
8416 np->p_scripth = vtobus(np->scripth);
8417 np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0);
8418
8419 ncr_script_copy_and_bind(np, (ncrcmd *) &script0,
8420 (ncrcmd *) np->script0, sizeof(struct script));
8421 ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0,
8422 (ncrcmd *) np->scripth0, sizeof(struct scripth));
8423 np->ccb->p_ccb = vtobus (np->ccb);
8424
8425 /* Patch the script for LED support. */
8426
8427 if (np->features & FE_LED0) {
8428 np->script0->idle[0] =
8429 cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01));
8430 np->script0->reselected[0] =
8431 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
8432 np->script0->start[0] =
8433 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
8434 }
8435
8436 /*
8437 * Look for the target control block of this nexus.
8438 * For i = 0 to 3
8439 * JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
8440 */
8441 for (i = 0 ; i < 4 ; i++) {
8442 np->jump_tcb[i].l_cmd =
8443 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
8444 np->jump_tcb[i].l_paddr =
8445 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target));
8446 }
8447
8448 ncr_chip_reset(np, 100);
8449
8450 /* Now check the cache handling of the chipset. */
8451
8452 if (ncr_snooptest(np)) {
8453 printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n");
8454 goto attach_error;
8455 }
8456
8457 /* Install the interrupt handler. */
8458 np->irq = device->slot.irq;
8459
8460 /* Initialize the fixed part of the default ccb. */
8461 ncr_init_ccb(np, np->ccb);
8462
8463 /*
8464 * After SCSI devices have been opened, we cannot reset the bus
8465 * safely, so we do it here. Interrupt handler does the real work.
8466 * Process the reset exception if interrupts are not enabled yet.
8467 * Then enable disconnects.
8468 */
8469 spin_lock_irqsave(&np->smp_lock, flags);
8470 if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
8471 printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np));
8472
8473 spin_unlock_irqrestore(&np->smp_lock, flags);
8474 goto attach_error;
8475 }
8476 ncr_exception(np);
8477
8478 np->disc = 1;
8479
8480 /*
8481 * The middle-level SCSI driver does not wait for devices to settle.
8482 * Wait synchronously if more than 2 seconds.
8483 */
8484 if (driver_setup.settle_delay > 2) {
8485 printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n",
8486 ncr_name(np), driver_setup.settle_delay);
8487 mdelay(1000 * driver_setup.settle_delay);
8488 }
8489
8490 /* start the timeout daemon */
8491 np->lasttime=0;
8492 ncr_timeout (np);
8493
8494 /* use SIMPLE TAG messages by default */
8495 #ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
8496 np->order = SIMPLE_QUEUE_TAG;
8497 #endif
8498
8499 spin_unlock_irqrestore(&np->smp_lock, flags);
8500
8501 return instance;
8502
8503 attach_error:
8504 if (!instance)
8505 return NULL;
8506 printk(KERN_INFO "%s: detaching...\n", ncr_name(np));
8507 if (!np)
8508 goto unregister;
8509 if (np->scripth0)
8510 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
8511 if (np->script0)
8512 m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
8513 if (np->ccb)
8514 m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
8515 m_free_dma(np, sizeof(struct ncb), "NCB");
8516 host_data->ncb = NULL;
8517
8518 unregister:
8519 scsi_host_put(instance);
8520
8521 return NULL;
8522 }
8523
8524
8525 void ncr53c8xx_release(struct Scsi_Host *host)
8526 {
8527 struct host_data *host_data = shost_priv(host);
8528 #ifdef DEBUG_NCR53C8XX
8529 printk("ncr53c8xx: release\n");
8530 #endif
8531 if (host_data->ncb)
8532 ncr_detach(host_data->ncb);
8533 scsi_host_put(host);
8534 }
8535
8536 static void ncr53c8xx_set_period(struct scsi_target *starget, int period)
8537 {
8538 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8539 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8540 struct tcb *tp = &np->target[starget->id];
8541
8542 if (period > np->maxsync)
8543 period = np->maxsync;
8544 else if (period < np->minsync)
8545 period = np->minsync;
8546
8547 tp->usrsync = period;
8548
8549 ncr_negotiate(np, tp);
8550 }
8551
8552 static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset)
8553 {
8554 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8555 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8556 struct tcb *tp = &np->target[starget->id];
8557
8558 if (offset > np->maxoffs)
8559 offset = np->maxoffs;
8560 else if (offset < 0)
8561 offset = 0;
8562
8563 tp->maxoffs = offset;
8564
8565 ncr_negotiate(np, tp);
8566 }
8567
8568 static void ncr53c8xx_set_width(struct scsi_target *starget, int width)
8569 {
8570 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8571 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8572 struct tcb *tp = &np->target[starget->id];
8573
8574 if (width > np->maxwide)
8575 width = np->maxwide;
8576 else if (width < 0)
8577 width = 0;
8578
8579 tp->usrwide = width;
8580
8581 ncr_negotiate(np, tp);
8582 }
8583
8584 static void ncr53c8xx_get_signalling(struct Scsi_Host *shost)
8585 {
8586 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8587 enum spi_signal_type type;
8588
8589 switch (np->scsi_mode) {
8590 case SMODE_SE:
8591 type = SPI_SIGNAL_SE;
8592 break;
8593 case SMODE_HVD:
8594 type = SPI_SIGNAL_HVD;
8595 break;
8596 default:
8597 type = SPI_SIGNAL_UNKNOWN;
8598 break;
8599 }
8600 spi_signalling(shost) = type;
8601 }
8602
8603 static struct spi_function_template ncr53c8xx_transport_functions = {
8604 .set_period = ncr53c8xx_set_period,
8605 .show_period = 1,
8606 .set_offset = ncr53c8xx_set_offset,
8607 .show_offset = 1,
8608 .set_width = ncr53c8xx_set_width,
8609 .show_width = 1,
8610 .get_signalling = ncr53c8xx_get_signalling,
8611 };
8612
8613 int __init ncr53c8xx_init(void)
8614 {
8615 ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions);
8616 if (!ncr53c8xx_transport_template)
8617 return -ENODEV;
8618 return 0;
8619 }
8620
8621 void ncr53c8xx_exit(void)
8622 {
8623 spi_release_transport(ncr53c8xx_transport_template);
8624 }
8625