1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Register definitions and functions for:
4  *  Philips UCB1400 driver
5  *
6  * Based on ucb1400_ts:
7  *  Author:	Nicolas Pitre
8  *  Created:	September 25, 2006
9  *  Copyright:	MontaVista Software, Inc.
10  *
11  * Spliting done by: Marek Vasut <marek.vasut@gmail.com>
12  * If something doesn't work and it worked before spliting, e-mail me,
13  * dont bother Nicolas please ;-)
14  *
15  * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
16  * covering the UCB1100, UCB1200 and UCB1300..  Support for the UCB1400 has
17  * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
18  */
19 
20 #ifndef _LINUX__UCB1400_H
21 #define _LINUX__UCB1400_H
22 
23 #include <sound/ac97_codec.h>
24 #include <linux/mutex.h>
25 #include <linux/platform_device.h>
26 #include <linux/gpio.h>
27 
28 /*
29  * UCB1400 AC-link registers
30  */
31 
32 #define UCB_IO_DATA		0x5a
33 #define UCB_IO_DIR		0x5c
34 #define UCB_IE_RIS		0x5e
35 #define UCB_IE_FAL		0x60
36 #define UCB_IE_STATUS		0x62
37 #define UCB_IE_CLEAR		0x62
38 #define UCB_IE_ADC		(1 << 11)
39 #define UCB_IE_TSPX		(1 << 12)
40 
41 #define UCB_TS_CR		0x64
42 #define UCB_TS_CR_TSMX_POW	(1 << 0)
43 #define UCB_TS_CR_TSPX_POW	(1 << 1)
44 #define UCB_TS_CR_TSMY_POW	(1 << 2)
45 #define UCB_TS_CR_TSPY_POW	(1 << 3)
46 #define UCB_TS_CR_TSMX_GND	(1 << 4)
47 #define UCB_TS_CR_TSPX_GND	(1 << 5)
48 #define UCB_TS_CR_TSMY_GND	(1 << 6)
49 #define UCB_TS_CR_TSPY_GND	(1 << 7)
50 #define UCB_TS_CR_MODE_INT	(0 << 8)
51 #define UCB_TS_CR_MODE_PRES	(1 << 8)
52 #define UCB_TS_CR_MODE_POS	(2 << 8)
53 #define UCB_TS_CR_BIAS_ENA	(1 << 11)
54 #define UCB_TS_CR_TSPX_LOW	(1 << 12)
55 #define UCB_TS_CR_TSMX_LOW	(1 << 13)
56 
57 #define UCB_ADC_CR		0x66
58 #define UCB_ADC_SYNC_ENA	(1 << 0)
59 #define UCB_ADC_VREFBYP_CON	(1 << 1)
60 #define UCB_ADC_INP_TSPX	(0 << 2)
61 #define UCB_ADC_INP_TSMX	(1 << 2)
62 #define UCB_ADC_INP_TSPY	(2 << 2)
63 #define UCB_ADC_INP_TSMY	(3 << 2)
64 #define UCB_ADC_INP_AD0		(4 << 2)
65 #define UCB_ADC_INP_AD1		(5 << 2)
66 #define UCB_ADC_INP_AD2		(6 << 2)
67 #define UCB_ADC_INP_AD3		(7 << 2)
68 #define UCB_ADC_EXT_REF		(1 << 5)
69 #define UCB_ADC_START		(1 << 7)
70 #define UCB_ADC_ENA		(1 << 15)
71 
72 #define UCB_ADC_DATA		0x68
73 #define UCB_ADC_DAT_VALID	(1 << 15)
74 
75 #define UCB_FCSR		0x6c
76 #define UCB_FCSR_AVE		(1 << 12)
77 
78 #define UCB_ADC_DAT_MASK	0x3ff
79 
80 #define UCB_ID			0x7e
81 #define UCB_ID_1400             0x4304
82 
83 struct ucb1400_gpio {
84 	struct gpio_chip	gc;
85 	struct snd_ac97		*ac97;
86 	int			gpio_offset;
87 	int			(*gpio_setup)(struct device *dev, int ngpio);
88 	int			(*gpio_teardown)(struct device *dev, int ngpio);
89 };
90 
91 struct ucb1400_ts {
92 	struct input_dev	*ts_idev;
93 	int			id;
94 	int			irq;
95 	struct snd_ac97		*ac97;
96 	wait_queue_head_t	ts_wait;
97 	bool			stopped;
98 };
99 
100 struct ucb1400 {
101 	struct platform_device	*ucb1400_ts;
102 	struct platform_device	*ucb1400_gpio;
103 };
104 
105 struct ucb1400_pdata {
106 	int	irq;
107 	int	gpio_offset;
108 	int	(*gpio_setup)(struct device *dev, int ngpio);
109 	int	(*gpio_teardown)(struct device *dev, int ngpio);
110 };
111 
ucb1400_reg_read(struct snd_ac97 * ac97,u16 reg)112 static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg)
113 {
114 	return ac97->bus->ops->read(ac97, reg);
115 }
116 
ucb1400_reg_write(struct snd_ac97 * ac97,u16 reg,u16 val)117 static inline void ucb1400_reg_write(struct snd_ac97 *ac97, u16 reg, u16 val)
118 {
119 	ac97->bus->ops->write(ac97, reg, val);
120 }
121 
ucb1400_gpio_get_value(struct snd_ac97 * ac97,u16 gpio)122 static inline u16 ucb1400_gpio_get_value(struct snd_ac97 *ac97, u16 gpio)
123 {
124 	return ucb1400_reg_read(ac97, UCB_IO_DATA) & (1 << gpio);
125 }
126 
ucb1400_gpio_set_value(struct snd_ac97 * ac97,u16 gpio,u16 val)127 static inline void ucb1400_gpio_set_value(struct snd_ac97 *ac97, u16 gpio,
128 						u16 val)
129 {
130 	ucb1400_reg_write(ac97, UCB_IO_DATA, val ?
131 			ucb1400_reg_read(ac97, UCB_IO_DATA) | (1 << gpio) :
132 			ucb1400_reg_read(ac97, UCB_IO_DATA) & ~(1 << gpio));
133 }
134 
ucb1400_gpio_get_direction(struct snd_ac97 * ac97,u16 gpio)135 static inline u16 ucb1400_gpio_get_direction(struct snd_ac97 *ac97, u16 gpio)
136 {
137 	return ucb1400_reg_read(ac97, UCB_IO_DIR) & (1 << gpio);
138 }
139 
ucb1400_gpio_set_direction(struct snd_ac97 * ac97,u16 gpio,u16 dir)140 static inline void ucb1400_gpio_set_direction(struct snd_ac97 *ac97, u16 gpio,
141 						u16 dir)
142 {
143 	ucb1400_reg_write(ac97, UCB_IO_DIR, dir ?
144 			ucb1400_reg_read(ac97, UCB_IO_DIR) | (1 << gpio) :
145 			ucb1400_reg_read(ac97, UCB_IO_DIR) & ~(1 << gpio));
146 }
147 
ucb1400_adc_enable(struct snd_ac97 * ac97)148 static inline void ucb1400_adc_enable(struct snd_ac97 *ac97)
149 {
150 	ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA);
151 }
152 
ucb1400_adc_disable(struct snd_ac97 * ac97)153 static inline void ucb1400_adc_disable(struct snd_ac97 *ac97)
154 {
155 	ucb1400_reg_write(ac97, UCB_ADC_CR, 0);
156 }
157 
158 
159 unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel,
160 			      int adcsync);
161 
162 #endif
163