1 #ifndef _IPXE_PCIBIOS_H
2 #define _IPXE_PCIBIOS_H
3 
4 #include <stdint.h>
5 
6 /** @file
7  *
8  * PCI configuration space access via PCI BIOS
9  *
10  */
11 
12 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
13 
14 #ifdef PCIAPI_PCBIOS
15 #define PCIAPI_PREFIX_pcbios
16 #else
17 #define PCIAPI_PREFIX_pcbios __pcbios_
18 #endif
19 
20 struct pci_device;
21 
22 #define PCIBIOS_INSTALLATION_CHECK	0xb1010000
23 #define PCIBIOS_READ_CONFIG_BYTE	0xb1080000
24 #define PCIBIOS_READ_CONFIG_WORD	0xb1090000
25 #define PCIBIOS_READ_CONFIG_DWORD	0xb10a0000
26 #define PCIBIOS_WRITE_CONFIG_BYTE	0xb10b0000
27 #define PCIBIOS_WRITE_CONFIG_WORD	0xb10c0000
28 #define PCIBIOS_WRITE_CONFIG_DWORD	0xb10d0000
29 
30 extern int pcibios_read ( struct pci_device *pci, uint32_t command,
31 			  uint32_t *value );
32 extern int pcibios_write ( struct pci_device *pci, uint32_t command,
33 			   uint32_t value );
34 
35 /**
36  * Read byte from PCI configuration space via PCI BIOS
37  *
38  * @v pci	PCI device
39  * @v where	Location within PCI configuration space
40  * @v value	Value read
41  * @ret rc	Return status code
42  */
43 static inline __always_inline int
PCIAPI_INLINE(pcbios,pci_read_config_byte)44 PCIAPI_INLINE ( pcbios, pci_read_config_byte ) ( struct pci_device *pci,
45 						 unsigned int where,
46 						 uint8_t *value ) {
47 	uint32_t tmp;
48 	int rc;
49 
50 	rc = pcibios_read ( pci, PCIBIOS_READ_CONFIG_BYTE | where, &tmp );
51 	*value = tmp;
52 	return rc;
53 }
54 
55 /**
56  * Read word from PCI configuration space via PCI BIOS
57  *
58  * @v pci	PCI device
59  * @v where	Location within PCI configuration space
60  * @v value	Value read
61  * @ret rc	Return status code
62  */
63 static inline __always_inline int
PCIAPI_INLINE(pcbios,pci_read_config_word)64 PCIAPI_INLINE ( pcbios, pci_read_config_word ) ( struct pci_device *pci,
65 						 unsigned int where,
66 						 uint16_t *value ) {
67 	uint32_t tmp;
68 	int rc;
69 
70 	rc = pcibios_read ( pci, PCIBIOS_READ_CONFIG_WORD | where, &tmp );
71 	*value = tmp;
72 	return rc;
73 }
74 
75 /**
76  * Read dword from PCI configuration space via PCI BIOS
77  *
78  * @v pci	PCI device
79  * @v where	Location within PCI configuration space
80  * @v value	Value read
81  * @ret rc	Return status code
82  */
83 static inline __always_inline int
PCIAPI_INLINE(pcbios,pci_read_config_dword)84 PCIAPI_INLINE ( pcbios, pci_read_config_dword ) ( struct pci_device *pci,
85 						  unsigned int where,
86 						  uint32_t *value ) {
87 	return pcibios_read ( pci, PCIBIOS_READ_CONFIG_DWORD | where, value );
88 }
89 
90 /**
91  * Write byte to PCI configuration space via PCI BIOS
92  *
93  * @v pci	PCI device
94  * @v where	Location within PCI configuration space
95  * @v value	Value to be written
96  * @ret rc	Return status code
97  */
98 static inline __always_inline int
PCIAPI_INLINE(pcbios,pci_write_config_byte)99 PCIAPI_INLINE ( pcbios, pci_write_config_byte ) ( struct pci_device *pci,
100 						  unsigned int where,
101 						  uint8_t value ) {
102 	return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_BYTE | where, value );
103 }
104 
105 /**
106  * Write word to PCI configuration space via PCI BIOS
107  *
108  * @v pci	PCI device
109  * @v where	Location within PCI configuration space
110  * @v value	Value to be written
111  * @ret rc	Return status code
112  */
113 static inline __always_inline int
PCIAPI_INLINE(pcbios,pci_write_config_word)114 PCIAPI_INLINE ( pcbios, pci_write_config_word ) ( struct pci_device *pci,
115 						  unsigned int where,
116 						  uint16_t value ) {
117 	return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_WORD | where, value );
118 }
119 
120 /**
121  * Write dword to PCI configuration space via PCI BIOS
122  *
123  * @v pci	PCI device
124  * @v where	Location within PCI configuration space
125  * @v value	Value to be written
126  * @ret rc	Return status code
127  */
128 static inline __always_inline int
PCIAPI_INLINE(pcbios,pci_write_config_dword)129 PCIAPI_INLINE ( pcbios, pci_write_config_dword ) ( struct pci_device *pci,
130 						   unsigned int where,
131 						   uint32_t value ) {
132 	return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_DWORD | where, value);
133 }
134 
135 /**
136  * Map PCI bus address as an I/O address
137  *
138  * @v bus_addr		PCI bus address
139  * @v len		Length of region
140  * @ret io_addr		I/O address, or NULL on error
141  */
142 static inline __always_inline void *
PCIAPI_INLINE(pcbios,pci_ioremap)143 PCIAPI_INLINE ( pcbios, pci_ioremap ) ( struct pci_device *pci __unused,
144 					unsigned long bus_addr, size_t len ) {
145 	return ioremap ( bus_addr, len );
146 }
147 
148 #endif /* _IPXE_PCIBIOS_H */
149