1 /* packet-ubertooth.c
2 * Routines for Ubertooth USB dissection
3 *
4 * Copyright 2013, Michal Labedzki for Tieto Corporation
5 *
6 * Wireshark - Network traffic analyzer
7 * By Gerald Combs <gerald@wireshark.org>
8 * Copyright 1998 Gerald Combs
9 *
10 * SPDX-License-Identifier: GPL-2.0-or-later
11 */
12
13 #include "config.h"
14
15 #include <epan/packet.h>
16 #include <epan/prefs.h>
17 #include <epan/expert.h>
18 #include <epan/addr_resolv.h>
19
20 #include "packet-bluetooth.h"
21 #include "packet-ubertooth.h"
22
23 static int proto_ubertooth = -1;
24
25 static int hf_command = -1;
26 static int hf_response = -1;
27 static int hf_argument_0 = -1;
28 static int hf_argument_1 = -1;
29 static int hf_estimated_length = -1;
30 static int hf_board_id = -1;
31 static int hf_reserved = -1;
32 static int hf_length = -1;
33 static int hf_firmware_revision = -1;
34 static int hf_firmware_compile_info = -1;
35 static int hf_user_led = -1;
36 static int hf_rx_led = -1;
37 static int hf_tx_led = -1;
38 static int hf_1v8_led = -1;
39 static int hf_channel = -1;
40 static int hf_status = -1;
41 static int hf_serial_number = -1;
42 static int hf_part_number = -1;
43 static int hf_packet_type = -1;
44 static int hf_chip_status_dma_overflow = -1;
45 static int hf_chip_status_dma_error = -1;
46 static int hf_chip_status_cs_trigger = -1;
47 static int hf_chip_status_fifo_overflow = -1;
48 static int hf_chip_status_rssi_trigger = -1;
49 static int hf_chip_status_reserved = -1;
50 static int hf_clock_ns = -1;
51 static int hf_clock_100ns = -1;
52 static int hf_rssi_min = -1;
53 static int hf_rssi_max = -1;
54 static int hf_rssi_avg = -1;
55 static int hf_rssi_count = -1;
56 static int hf_data = -1;
57 static int hf_crc_verify = -1;
58 static int hf_paen = -1;
59 static int hf_hgm = -1;
60 static int hf_modulation = -1;
61 static int hf_power_amplifier_reserved = -1;
62 static int hf_power_amplifier_level = -1;
63 static int hf_range_test_valid = -1;
64 static int hf_range_test_request_power_amplifier = -1;
65 static int hf_range_test_request_number = -1;
66 static int hf_range_test_reply_power_amplifier = -1;
67 static int hf_range_test_reply_number = -1;
68 static int hf_squelch = -1;
69 static int hf_register = -1;
70 static int hf_register_value = -1;
71 static int hf_access_address = -1;
72 static int hf_high_frequency = -1;
73 static int hf_low_frequency = -1;
74 static int hf_rx_packets = -1;
75 static int hf_rssi_threshold = -1;
76 static int hf_clock_offset = -1;
77 static int hf_afh_map = -1;
78 static int hf_bdaddr = -1;
79 static int hf_usb_rx_packet = -1;
80 static int hf_state = -1;
81 static int hf_crc_init = -1;
82 static int hf_hop_interval = -1;
83 static int hf_hop_increment = -1;
84 static int hf_usb_rx_packet_channel = -1;
85 static int hf_spectrum_entry = -1;
86 static int hf_frequency = -1;
87 static int hf_rssi = -1;
88 static int hf_jam_mode = -1;
89 static int hf_ego_mode = -1;
90 static int hf_cc2400_value = -1;
91 static int hf_cc2400_main_resetn = -1;
92 static int hf_cc2400_main_reserved_14_10 = -1;
93 static int hf_cc2400_main_fs_force_en = -1;
94 static int hf_cc2400_main_rxn_tx = -1;
95 static int hf_cc2400_main_reserved_7_4 = -1;
96 static int hf_cc2400_main_reserved_3 = -1;
97 static int hf_cc2400_main_reserved_2 = -1;
98 static int hf_cc2400_main_xosc16m_bypass = -1;
99 static int hf_cc2400_main_xosc16m_en = -1;
100 static int hf_cc2400_fsctrl_reserved = -1;
101 static int hf_cc2400_fsctrl_lock_threshold = -1;
102 static int hf_cc2400_fsctrl_cal_done = -1;
103 static int hf_cc2400_fsctrl_cal_running = -1;
104 static int hf_cc2400_fsctrl_lock_length = -1;
105 static int hf_cc2400_fsctrl_lock_status = -1;
106 static int hf_cc2400_fsdiv_reserved = -1;
107 static int hf_cc2400_fsdiv_frequency = -1;
108 static int hf_cc2400_fsdiv_freq_high = -1;
109 static int hf_cc2400_fsdiv_freq = -1;
110 static int hf_cc2400_mdmctrl_reserved = -1;
111 static int hf_cc2400_mdmctrl_mod_offset = -1;
112 static int hf_cc2400_mdmctrl_mod_dev = -1;
113 static int hf_cc2400_agcctrl_vga_gain = -1;
114 static int hf_cc2400_agcctrl_reserved = -1;
115 static int hf_cc2400_agcctrl_agc_locked = -1;
116 static int hf_cc2400_agcctrl_agc_lock = -1;
117 static int hf_cc2400_agcctrl_agc_sync_lock = -1;
118 static int hf_cc2400_agcctrl_vga_gain_oe = -1;
119 static int hf_cc2400_frend_reserved_15_4 = -1;
120 static int hf_cc2400_frend_reserved_3 = -1;
121 static int hf_cc2400_frend_pa_level = -1;
122 static int hf_cc2400_rssi_rssi_val = -1;
123 static int hf_cc2400_rssi_rssi_cs_thres = -1;
124 static int hf_cc2400_rssi_rssi_filt = -1;
125 static int hf_cc2400_freqest_rx_freq_offset = -1;
126 static int hf_cc2400_freqest_reserved = -1;
127 static int hf_cc2400_iocfg_reserved = -1;
128 static int hf_cc2400_iocfg_gio6_cfg = -1;
129 static int hf_cc2400_iocfg_gio1_cfg = -1;
130 static int hf_cc2400_iocfg_hssd_src = -1;
131 static int hf_cc2400_fsmtc_tc_rxon2agcen = -1;
132 static int hf_cc2400_fsmtc_tc_paon2switch = -1;
133 static int hf_cc2400_fsmtc_res = -1;
134 static int hf_cc2400_fsmtc_tc_txend2switch = -1;
135 static int hf_cc2400_fsmtc_tc_txend2paoff = -1;
136 static int hf_cc2400_reserved_0x0C_res_15_5 = -1;
137 static int hf_cc2400_reserved_0x0C_res_4_0 = -1;
138 static int hf_cc2400_manand_vga_reset_n = -1;
139 static int hf_cc2400_manand_lock_status = -1;
140 static int hf_cc2400_manand_balun_ctrl = -1;
141 static int hf_cc2400_manand_rxtx = -1;
142 static int hf_cc2400_manand_pre_pd = -1;
143 static int hf_cc2400_manand_pa_n_pd = -1;
144 static int hf_cc2400_manand_pa_p_pd = -1;
145 static int hf_cc2400_manand_dac_lpf_pd = -1;
146 static int hf_cc2400_manand_bias_pd = -1;
147 static int hf_cc2400_manand_xosc16m_pd = -1;
148 static int hf_cc2400_manand_chp_pd = -1;
149 static int hf_cc2400_manand_fs_pd = -1;
150 static int hf_cc2400_manand_adc_pd = -1;
151 static int hf_cc2400_manand_vga_pd = -1;
152 static int hf_cc2400_manand_rxbpf_pd = -1;
153 static int hf_cc2400_manand_lnamix_pd = -1;
154 static int hf_cc2400_fsmstate_reserved_15_13 = -1;
155 static int hf_cc2400_fsmstate_fsm_state_bkpt = -1;
156 static int hf_cc2400_fsmstate_reserved_7_5 = -1;
157 static int hf_cc2400_fsmstate_fsm_cur_state = -1;
158 static int hf_cc2400_adctst_reserved_15 = -1;
159 static int hf_cc2400_adctst_adc_i = -1;
160 static int hf_cc2400_adctst_reserved_7 = -1;
161 static int hf_cc2400_adctst_adc_q = -1;
162 static int hf_cc2400_rxbpftst_reserved = -1;
163 static int hf_cc2400_rxbpftst_rxbpf_cap_oe = -1;
164 static int hf_cc2400_rxbpftst_rxbpf_cap_o = -1;
165 static int hf_cc2400_rxbpftst_rxbpf_cap_res = -1;
166 static int hf_cc2400_pamtst_reserved_15_13 = -1;
167 static int hf_cc2400_pamtst_vc_in_test_en = -1;
168 static int hf_cc2400_pamtst_atestmod_pd = -1;
169 static int hf_cc2400_pamtst_atestmod_mode = -1;
170 static int hf_cc2400_pamtst_reserved_7 = -1;
171 static int hf_cc2400_pamtst_txmix_cap_array = -1;
172 static int hf_cc2400_pamtst_txmix_current = -1;
173 static int hf_cc2400_pamtst_pa_current = -1;
174 static int hf_cc2400_lmtst_reserved = -1;
175 static int hf_cc2400_lmtst_rxmix_hgm = -1;
176 static int hf_cc2400_lmtst_rxmix_tail = -1;
177 static int hf_cc2400_lmtst_rxmix_vcm = -1;
178 static int hf_cc2400_lmtst_rxmix_current = -1;
179 static int hf_cc2400_lmtst_lna_cap_array = -1;
180 static int hf_cc2400_lmtst_lna_lowgain = -1;
181 static int hf_cc2400_lmtst_lna_gain = -1;
182 static int hf_cc2400_lmtst_lna_current = -1;
183 static int hf_cc2400_manor_vga_reset_n = -1;
184 static int hf_cc2400_manor_lock_status = -1;
185 static int hf_cc2400_manor_balun_ctrl = -1;
186 static int hf_cc2400_manor_rxtx = -1;
187 static int hf_cc2400_manor_pre_pd = -1;
188 static int hf_cc2400_manor_pa_n_pd = -1;
189 static int hf_cc2400_manor_pa_p_pd = -1;
190 static int hf_cc2400_manor_dac_lpf_pd = -1;
191 static int hf_cc2400_manor_bias_pd = -1;
192 static int hf_cc2400_manor_xosc16m_pd = -1;
193 static int hf_cc2400_manor_chp_pd = -1;
194 static int hf_cc2400_manor_fs_pd = -1;
195 static int hf_cc2400_manor_adc_pd = -1;
196 static int hf_cc2400_manor_vga_pd = -1;
197 static int hf_cc2400_manor_rxbpf_pd = -1;
198 static int hf_cc2400_manor_lnamix_pd = -1;
199 static int hf_cc2400_mdmtst0_reserved = -1;
200 static int hf_cc2400_mdmtst0_tx_prng = -1;
201 static int hf_cc2400_mdmtst0_tx_1mhz_offset_n = -1;
202 static int hf_cc2400_mdmtst0_invert_data = -1;
203 static int hf_cc2400_mdmtst0_afc_adjust_on_packet = -1;
204 static int hf_cc2400_mdmtst0_afc_settling = -1;
205 static int hf_cc2400_mdmtst0_afc_delta = -1;
206 static int hf_cc2400_mdmtst1_reserved = -1;
207 static int hf_cc2400_mdmtst1_bsync_threshold = -1;
208 static int hf_cc2400_dactst_reserved = -1;
209 static int hf_cc2400_dactst_dac_src = -1;
210 static int hf_cc2400_dactst_dac_i_o = -1;
211 static int hf_cc2400_dactst_dac_q_o = -1;
212 static int hf_cc2400_agctst0_agc_settle_blank_dn = -1;
213 static int hf_cc2400_agctst0_agc_win_size = -1;
214 static int hf_cc2400_agctst0_agc_settle_peak = -1;
215 static int hf_cc2400_agctst0_agc_settle_adc = -1;
216 static int hf_cc2400_agctst0_agc_attempts = -1;
217 static int hf_cc2400_agctst1_reserved = -1;
218 static int hf_cc2400_agctst1_agc_var_gain_sat = -1;
219 static int hf_cc2400_agctst1_agc_settle_blank_up = -1;
220 static int hf_cc2400_agctst1_peakdet_cur_boost = -1;
221 static int hf_cc2400_agctst1_agc_mult_slow = -1;
222 static int hf_cc2400_agctst1_agc_settle_fixed = -1;
223 static int hf_cc2400_agctst1_agc_settle_var = -1;
224 static int hf_cc2400_agctst2_reserved = -1;
225 static int hf_cc2400_agctst2_agc_backend_blanking = -1;
226 static int hf_cc2400_agctst2_agc_adjust_m3db = -1;
227 static int hf_cc2400_agctst2_agc_adjust_m1db = -1;
228 static int hf_cc2400_agctst2_agc_adjust_p3db = -1;
229 static int hf_cc2400_agctst2_agc_adjust_p1db = -1;
230 static int hf_cc2400_fstst0_rxmixbuf_cur = -1;
231 static int hf_cc2400_fstst0_txmixbuf_cur = -1;
232 static int hf_cc2400_fstst0_vco_array_settle_long = -1;
233 static int hf_cc2400_fstst0_vco_array_oe = -1;
234 static int hf_cc2400_fstst0_vco_array_o = -1;
235 static int hf_cc2400_fstst0_vco_array_res = -1;
236 static int hf_cc2400_fstst1_rxbpf_locur = -1;
237 static int hf_cc2400_fstst1_rxbpf_midcur = -1;
238 static int hf_cc2400_fstst1_vco_current_ref = -1;
239 static int hf_cc2400_fstst1_vco_current_k = -1;
240 static int hf_cc2400_fstst1_vc_dac_en = -1;
241 static int hf_cc2400_fstst1_vc_dac_val = -1;
242 static int hf_cc2400_fstst2_reserved = -1;
243 static int hf_cc2400_fstst2_vco_curcal_speed = -1;
244 static int hf_cc2400_fstst2_vco_current_oe = -1;
245 static int hf_cc2400_fstst2_vco_current_o = -1;
246 static int hf_cc2400_fstst2_vco_current_res = -1;
247 static int hf_cc2400_fstst3_reserved = -1;
248 static int hf_cc2400_fstst3_chp_test_up = -1;
249 static int hf_cc2400_fstst3_chp_test_dn = -1;
250 static int hf_cc2400_fstst3_chp_disable = -1;
251 static int hf_cc2400_fstst3_pd_delay = -1;
252 static int hf_cc2400_fstst3_chp_step_period = -1;
253 static int hf_cc2400_fstst3_stop_chp_current = -1;
254 static int hf_cc2400_fstst3_start_chp_current = -1;
255 static int hf_cc2400_manfidl_partnum = -1;
256 static int hf_cc2400_manfidl_manfid = -1;
257 static int hf_cc2400_manfidh_version = -1;
258 static int hf_cc2400_manfidh_partnum = -1;
259 static int hf_cc2400_grmdm_reserved = -1;
260 static int hf_cc2400_grmdm_sync_errbits_allowed = -1;
261 static int hf_cc2400_grmdm_pin_mode = -1;
262 static int hf_cc2400_grmdm_packet_mode = -1;
263 static int hf_cc2400_grmdm_pre_bytes = -1;
264 static int hf_cc2400_grmdm_sync_word_size = -1;
265 static int hf_cc2400_grmdm_crc_on = -1;
266 static int hf_cc2400_grmdm_data_format = -1;
267 static int hf_cc2400_grmdm_modulation_format = -1;
268 static int hf_cc2400_grmdm_tx_gaussian_filter = -1;
269 static int hf_cc2400_grdec_reserved = -1;
270 static int hf_cc2400_grdec_ind_saturation = -1;
271 static int hf_cc2400_grdec_dec_shift = -1;
272 static int hf_cc2400_grdec_channel_dec = -1;
273 static int hf_cc2400_grdec_dec_val = -1;
274 static int hf_cc2400_pktstatus_reserved_15_11 = -1;
275 static int hf_cc2400_pktstatus_sync_word_received = -1;
276 static int hf_cc2400_pktstatus_crc_ok = -1;
277 static int hf_cc2400_pktstatus_reserved_8 = -1;
278 static int hf_cc2400_pktstatus_reserved_7_0 = -1;
279 static int hf_cc2400_int_reserved_15_8 = -1;
280 static int hf_cc2400_int_reserved_7 = -1;
281 static int hf_cc2400_int_pkt_polarity = -1;
282 static int hf_cc2400_int_fifo_polarity = -1;
283 static int hf_cc2400_int_fifo_threshold = -1;
284 static int hf_cc2400_reserved_0x24_res_15_14 = -1;
285 static int hf_cc2400_reserved_0x24_res_13_10 = -1;
286 static int hf_cc2400_reserved_0x24_res_9_7 = -1;
287 static int hf_cc2400_reserved_0x24_res_6_0 = -1;
288 static int hf_cc2400_reserved_0x25_res_15_12 = -1;
289 static int hf_cc2400_reserved_0x25_res_11_0 = -1;
290 static int hf_cc2400_reserved_0x26_res_15_10 = -1;
291 static int hf_cc2400_reserved_0x26_res_9_0 = -1;
292 static int hf_cc2400_reserved_0x27_res_15_8 = -1;
293 static int hf_cc2400_reserved_0x27_res_7_3 = -1;
294 static int hf_cc2400_reserved_0x27_res_2_0 = -1;
295 static int hf_cc2400_reserved_0x28_res_15 = -1;
296 static int hf_cc2400_reserved_0x28_res_14_13 = -1;
297 static int hf_cc2400_reserved_0x28_res_12_7 = -1;
298 static int hf_cc2400_reserved_0x28_res_6_0 = -1;
299 static int hf_cc2400_reserved_0x29_res_15_8 = -1;
300 static int hf_cc2400_reserved_0x29_res_7_3 = -1;
301 static int hf_cc2400_reserved_0x29_res_2_0 = -1;
302 static int hf_cc2400_reserved_0x2A_res_15_11 = -1;
303 static int hf_cc2400_reserved_0x2A_res_10 = -1;
304 static int hf_cc2400_reserved_0x2A_res_9_0 = -1;
305 static int hf_cc2400_reserved_0x2B_res_15_14 = -1;
306 static int hf_cc2400_reserved_0x2B_res_13 = -1;
307 static int hf_cc2400_reserved_0x2B_res_12 = -1;
308 static int hf_cc2400_reserved_0x2B_res_11_0 = -1;
309 static int hf_cc2400_syncl = -1;
310 static int hf_cc2400_synch = -1;
311
312 static gint ett_ubertooth = -1;
313 static gint ett_command = -1;
314 static gint ett_usb_rx_packet = -1;
315 static gint ett_usb_rx_packet_data = -1;
316 static gint ett_entry = -1;
317 static gint ett_register_value = -1;
318 static gint ett_fsdiv_frequency = -1;
319
320 static expert_field ei_unexpected_response = EI_INIT;
321 static expert_field ei_unknown_data = EI_INIT;
322 static expert_field ei_unexpected_data = EI_INIT;
323
324 static dissector_handle_t ubertooth_handle;
325 static dissector_handle_t bluetooth_ubertooth_handle;
326
327 static wmem_tree_t *command_info = NULL;
328
329 typedef struct _command_data {
330 guint32 bus_id;
331 guint32 device_address;
332
333 guint8 command;
334 guint32 command_frame_number;
335 gint32 register_id;
336 } command_data_t;
337
338
339 static const value_string command_vals[] = {
340 { 0, "Ping" },
341 { 1, "Rx Symbols" },
342 { 2, "Tx Symbols" },
343 { 3, "Get User LED" },
344 { 4, "Set User LED" },
345 { 5, "Get Rx LED" },
346 { 6, "Set Rx LED" },
347 { 7, "Get Tx LED" },
348 { 8, "Set Tx LED" },
349 { 9, "Get 1V8" },
350 { 10, "Set 1V8" },
351 { 11, "Get Channel" },
352 { 12, "Set Channel" },
353 { 13, "Reset" },
354 { 14, "Get Microcontroller Serial Number" },
355 { 15, "Get Microcontroller Part Number" },
356 { 16, "Get PAEN" },
357 { 17, "Set PAEN" },
358 { 18, "Get HGM" },
359 { 19, "Set HGM" },
360 { 20, "Tx Test" },
361 { 21, "Stop" },
362 { 22, "Get Modulation" },
363 { 23, "Set Modulation" },
364 { 24, "Set ISP" },
365 { 25, "Flash" },
366 { 26, "Bootloader Flash" },
367 { 27, "Spectrum Analyzer" },
368 { 28, "Get Power Amplifier Level" },
369 { 29, "Set Power Amplifier Level" },
370 { 30, "Repeater" },
371 { 31, "Range Test" },
372 { 32, "Range Check" },
373 { 33, "Get Firmware Revision Number" },
374 { 34, "LED Spectrum Analyzer" },
375 { 35, "Get Hardware Board ID" },
376 { 36, "Set Squelch" },
377 { 37, "Get Squelch" },
378 { 38, "Set BDADDR" },
379 { 39, "Start Hopping" },
380 { 40, "Set Clock" },
381 { 41, "Get Clock" },
382 { 42, "BTLE Sniffing" },
383 { 43, "Get Access Address" },
384 { 44, "Set Access Address" },
385 { 45, "Do Something" },
386 { 46, "Do Something Reply" },
387 { 47, "Get CRC Verify" },
388 { 48, "Set CRC Verify" },
389 { 49, "Poll" },
390 { 50, "BTLE Promiscuous Mode" },
391 { 51, "Set AFH Map" },
392 { 52, "Clear AFH Map" },
393 { 53, "Read Register" },
394 { 54, "BTLE Slave" },
395 { 55, "Get Compile Info" },
396 { 56, "BTLE Set Target" },
397 { 57, "BTLE Phy" },
398 { 58, "Write Register" },
399 { 59, "Jam Mode" },
400 { 60, "Ego" },
401 { 0x00, NULL }
402 };
403 static value_string_ext(command_vals_ext) = VALUE_STRING_EXT_INIT(command_vals);
404
405 static const value_string board_id_vals[] = {
406 { 0x00, "Ubertooth Zero" },
407 { 0x01, "Ubertooth One" },
408 { 0x02, "ToorCon 13 Badge" },
409 { 0x00, NULL }
410 };
411 static value_string_ext(board_id_vals_ext) = VALUE_STRING_EXT_INIT(board_id_vals);
412
413 static const value_string led_state_vals[] = {
414 { 0x00, "Off" },
415 { 0x01, "On" },
416 { 0x00, NULL }
417 };
418 static value_string_ext(led_state_vals_ext) = VALUE_STRING_EXT_INIT(led_state_vals);
419
420 static const value_string state_vals[] = {
421 { 0x00, "False" },
422 { 0x01, "True" },
423 { 0x00, NULL }
424 };
425 static value_string_ext(state_vals_ext) = VALUE_STRING_EXT_INIT(state_vals);
426
427 static const value_string packet_type_vals[] = {
428 { 0x00, "BR/EDR" },
429 { 0x01, "LE" },
430 { 0x02, "Message" },
431 { 0x03, "Keep Alive" },
432 { 0x04, "Spectrum Analyze"},
433 { 0x05, "LE Promiscuous" },
434 { 0x06, "Ego Packet" },
435 { 0x00, NULL }
436 };
437 static value_string_ext(packet_type_vals_ext) = VALUE_STRING_EXT_INIT(packet_type_vals);
438
439 static const value_string usb_rx_packet_state_vals[] = {
440 { 0x00, "Access Address" },
441 { 0x01, "CRC Init" },
442 { 0x02, "Hop Interval" },
443 { 0x03, "Hop Increment" },
444 { 0x00, NULL }
445 };
446
447 static const value_string modulation_vals[] = {
448 { 0x00, "Basic Rate" },
449 { 0x01, "Low Energy" },
450 { 0x02, "802.11 FHSS" },
451 { 0x00, NULL }
452 };
453 static value_string_ext(modulation_vals_ext) = VALUE_STRING_EXT_INIT(modulation_vals);
454
455
456 static const value_string jam_mode_vals[] = {
457 { 0x00, "None" },
458 { 0x01, "Once" },
459 { 0x02, "Continuous" },
460 { 0x00, NULL }
461 };
462
463
464 static const value_string ego_mode_vals[] = {
465 { 0x00, "Follow" },
466 { 0x01, "Continuous Rx" },
467 { 0x02, "Jam" },
468 { 0x00, NULL }
469 };
470
471 static const value_string register_vals[] = {
472 { 0x00, "MAIN" },
473 { 0x01, "FSCTRL" },
474 { 0x02, "FSDIV" },
475 { 0x03, "MDMCTRL" },
476 { 0x04, "AGCCTRL" },
477 { 0x05, "FREND" },
478 { 0x06, "RSSI" },
479 { 0x07, "FREQEST" },
480 { 0x08, "IOCFG" },
481 { 0x0B, "FSMTC" },
482 { 0x0C, "RESERVED 0x0C" },
483 { 0x0D, "MANAND" },
484 { 0x0E, "FSMSTATE" },
485 { 0x0F, "ADCTST" },
486 { 0x10, "RXBPFTST" },
487 { 0x11, "PAMTST" },
488 { 0x12, "LMTST" },
489 { 0x13, "MANOR" },
490 { 0x14, "MDMTST0" },
491 { 0x15, "MDMTST1" },
492 { 0x16, "DACTST" },
493 { 0x17, "AGCTST0" },
494 { 0x18, "AGCTST1" },
495 { 0x19, "AGCTST2" },
496 { 0x1A, "FSTST0" },
497 { 0x1B, "FSTST1" },
498 { 0x1C, "FSTST2" },
499 { 0x1D, "FSTST3" },
500 { 0x1E, "MANFIDL" },
501 { 0x1F, "MANFIDH" },
502 { 0x20, "GRMDM" },
503 { 0x21, "GRDEC" },
504 { 0x22, "PKTSTATUS" },
505 { 0x23, "INT" },
506 { 0x24, "RESERVED 0x24" },
507 { 0x25, "RESERVED 0x25" },
508 { 0x26, "RESERVED 0x26" },
509 { 0x27, "RESERVED 0x27" },
510 { 0x28, "RESERVED 0x28" },
511 { 0x29, "RESERVED 0x29" },
512 { 0x2A, "RESERVED 0x2A" },
513 { 0x2B, "RESERVED 0x2B" },
514 { 0x2C, "SYNCL" },
515 { 0x2D, "SYNCH" },
516 { 0x60, "SXOSCON" },
517 { 0x61, "SFSON" },
518 { 0x62, "SRX" },
519 { 0x63, "STX" },
520 { 0x64, "SRFOFF" },
521 { 0x65, "SXOSCOFF" },
522 { 0x70, "FIFOREG" },
523 { 0x00, NULL }
524 };
525 static value_string_ext(register_vals_ext) = VALUE_STRING_EXT_INIT(register_vals);
526
527 static const value_string register_description_vals[] = {
528 { 0x00, "Main Control Register" },
529 { 0x01, "Frequency Synthesiser Control and Status" },
530 { 0x02, "Frequency Synthesiser Frequency Division Control" },
531 { 0x03, "Modem Control and Status" },
532 { 0x04, "Automatic Gain Control and Status" },
533 { 0x05, "Front-end Control Register" },
534 { 0x06, "Received Signal Strength Indicator Status and Control Register" },
535 { 0x07, "Received Frequency Offset Estimation" },
536 { 0x08, "IO Configuration Register" },
537 { 0x0B, "Finite State Machine Time Constants" },
538 { 0x0C, "Reserved Register Containing Spare Control and Status Bits" },
539 { 0x0D, "Manual Signal and Override Register" },
540 { 0x0E, "Finite State Machine Information and Breakpoint" },
541 { 0x0F, "Analog-to-Digital Converter Test Register" },
542 { 0x10, "Receiver Band-pass Filters Test Register" },
543 { 0x11, "Power Amplifier and Transmit Mixers Test Register" },
544 { 0x12, "Low Noise Amplifier and Receive Mixers Test Register" },
545 { 0x13, "Manual Signal or Override Register" },
546 { 0x14, "Modem Test Register 0" },
547 { 0x15, "Modem Test Register 1" },
548 { 0x16, "Digital-to-Analog Converter Test Register" },
549 { 0x17, "Automatic Gain Control Test Register 0" },
550 { 0x18, "Automatic Gain Control Test Register 1" },
551 { 0x19, "Automatic Gain Control Test Register 2" },
552 { 0x1A, "Frequency Synthesiser Test Register 0" },
553 { 0x1B, "Frequency Synthesiser Test Register 1" },
554 { 0x1C, "Frequency Synthesiser Test Register 2" },
555 { 0x1D, "Frequency Synthesiser Test Register 3" },
556 { 0x1E, "Manufacturer ID, Lower 16 Bit" },
557 { 0x1F, "Manufacturer ID, Upper 16 Bit" },
558 { 0x20, "Generic Radio Modem Control and Status" },
559 { 0x21, "Generic Radio Decimation Control and Status" },
560 { 0x22, "Packet Mode Status" },
561 { 0x23, "Interrupt Register" },
562 { 0x24, "Reserved 0x24" },
563 { 0x25, "Reserved 0x25" },
564 { 0x26, "Reserved 0x26" },
565 { 0x27, "Reserved 0x27" },
566 { 0x28, "Reserved 0x28" },
567 { 0x29, "Reserved 0x29" },
568 { 0x2A, "Reserved 0x2A" },
569 { 0x2B, "Reserved 0x2B" },
570 { 0x2C, "Sync Word, Lower 16 Bit" },
571 { 0x2D, "Sync Word, Upper 16 Bit" },
572 { 0x60, "Command Strobe Register: Turn on XOSC" },
573 { 0x61, "Command Strobe register: Start and calibrate Frequency Synthesizer and go from RX/TX to a wait mode where the Frequency Synthesizer is running" },
574 { 0x62, "Command Strobe register: Start RX" },
575 { 0x63, "Command Strobe register: Start TX (turn on Power Amplifier)" },
576 { 0x64, "Command Strobe register: Turn off RX/TX and Frequency Synthesizer" },
577 { 0x65, "Command Strobe register: Turn off XOSC" },
578 { 0x70, "Used to write data to and read data from the 8-bit wide 32 bytes FIFO used to buffer outgoing TX data and incoming RX data in buffered RF mode" },
579 { 0x00, NULL }
580 };
581 static value_string_ext(register_description_vals_ext) = VALUE_STRING_EXT_INIT(register_description_vals);
582
583 static const value_string cc2400_grdec_dec_shift_vals[] = {
584 { 0x00, "0" },
585 { 0x01, "1" },
586 { 0x02, "-2" },
587 { 0x03, "-1" },
588 { 0x00, NULL }
589 };
590 static value_string_ext(cc2400_grdec_dec_shift_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grdec_dec_shift_vals);
591
592 static const value_string cc2400_grdec_channel_dec_vals[] = {
593 { 0x00, "1 MHz (used for 1Mbps and 250 kbps datarates)" },
594 { 0x01, "500 kHz (used for 10 kbps data rate)" },
595 { 0x02, "250 kHz" },
596 { 0x03, "125 kHz" },
597 { 0x00, NULL }
598 };
599 static value_string_ext(cc2400_grdec_channel_dec_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grdec_channel_dec_vals);
600
601 static const value_string cc2400_grmdm_pin_mode_vals[] = {
602 { 0x00, "Unbuffered Mode" },
603 { 0x01, "Buffered Mode" },
604 { 0x02, "HSSD Test Mode" },
605 { 0x03, "Unused" },
606 { 0x00, NULL }
607 };
608 static value_string_ext(cc2400_grmdm_pin_mode_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grmdm_pin_mode_vals);
609
610 static const value_string cc2400_grmdm_pre_bytes_vals[] = {
611 { 0x00, "0" },
612 { 0x01, "1" },
613 { 0x02, "2" },
614 { 0x03, "4" },
615 { 0x04, "8" },
616 { 0x05, "16" },
617 { 0x06, "32" },
618 { 0x07, "Infinitely On" },
619 { 0x00, NULL }
620 };
621 static value_string_ext(cc2400_grmdm_pre_bytes_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grmdm_pre_bytes_vals);
622
623 static const value_string cc2400_grmdm_sync_word_size_vals[] = {
624 { 0x00, "The 8 MSB bits of SYNC_WORD" },
625 { 0x01, "The 16 MSB bits of SYNC_WORD" },
626 { 0x02, "The 24 MSB bits of SYNC_WORD" },
627 { 0x03, "The 32 MSB bits of SYNC_WORD" },
628 { 0x00, NULL }
629 };
630 static value_string_ext(cc2400_grmdm_sync_word_size_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grmdm_sync_word_size_vals);
631
632 static const value_string cc2400_grmdm_data_format_vals[] = {
633 { 0x00, "NRZ" },
634 { 0x01, "Manchester" },
635 { 0x02, "8/10 line-coding (Not applied to preambles or sync words)" },
636 { 0x03, "Reserved" },
637 { 0x00, NULL }
638 };
639 static value_string_ext(cc2400_grmdm_data_format_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grmdm_data_format_vals);
640
641 static const value_string cc2400_grmdm_modulation_format_vals[] = {
642 { 0x00, "FSK/GFSK" },
643 { 0x01, "Reserved" },
644 { 0x00, NULL }
645 };
646 static value_string_ext(cc2400_grmdm_modulation_format_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_grmdm_modulation_format_vals);
647
648 static const value_string cc2400_fstst3_pd_delay_vals[] = {
649 { 0x00, "Short Reset Delay" },
650 { 0x01, "Long Reset Delay" },
651 { 0x00, NULL }
652 };
653 static value_string_ext(cc2400_fstst3_pd_delay_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst3_pd_delay_vals);
654
655 static const value_string cc2400_fstst3_chp_step_period_vals[] = {
656 { 0x00, "0.25 us" },
657 { 0x01, "0.5 us" },
658 { 0x02, "1 us" },
659 { 0x03, "4 us" },
660 { 0x00, NULL }
661 };
662 static value_string_ext(cc2400_fstst3_chp_step_period_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst3_chp_step_period_vals);
663
664 static const value_string cc2400_fstst2_vco_curcal_speed_vals[] = {
665 { 0x00, "Normal" },
666 { 0x01, "Undefined" },
667 { 0x02, "Half Speed" },
668 { 0x03, "Undefined" },
669 { 0x00, NULL }
670 };
671 static value_string_ext(cc2400_fstst2_vco_curcal_speed_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst2_vco_curcal_speed_vals);
672
673 static const value_string cc2400_fstst1_rxbpf_locur_vals[] = {
674 { 0x00, "4 uA (nominal)" },
675 { 0x01, "3 uA" },
676 { 0x00, NULL }
677 };
678 static value_string_ext(cc2400_fstst1_rxbpf_locur_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst1_rxbpf_locur_vals);
679
680 static const value_string cc2400_fstst1_rxbpf_midcur_vals[] = {
681 { 0x00, "4 uA (nominal)" },
682 { 0x01, "3.5 uA" },
683 { 0x00, NULL }
684 };
685 static value_string_ext(cc2400_fstst1_rxbpf_midcur_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst1_rxbpf_midcur_vals);
686
687 static const value_string cc2400_fstst1_vc_dac_en_vals[] = {
688 { 0x00, "Loop filter (closed loop PLL)" },
689 { 0x01, "VC DAC(open loop PLL)" },
690 { 0x00, NULL }
691 };
692 static value_string_ext(cc2400_fstst1_vc_dac_en_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst1_vc_dac_en_vals);
693
694 static const value_string cc2400_fstst0_rxtxmixbuf_cur_vals[] = {
695 { 0x00, "690 uA" },
696 { 0x01, "980 uA" },
697 { 0x02, "1.16 mA (nominal)" },
698 { 0x03, "1.44 mA" },
699 { 0x00, NULL }
700 };
701 static value_string_ext(cc2400_fstst0_rxtxmixbuf_cur_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fstst0_rxtxmixbuf_cur_vals);
702
703
704 static const value_string cc2400_agctst1_agc_var_gain_sat_vals[] = {
705 { 0x00, "-1/-3 gain steps" },
706 { 0x01, "-3/-5 gain steps" },
707 { 0x00, NULL }
708 };
709 static value_string_ext(cc2400_agctst1_agc_var_gain_sat_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_agctst1_agc_var_gain_sat_vals);
710
711 static const value_string cc2400_dactst_dac_src_vals[] = {
712 { 0x00, "Normal Operation (from Modulator)" },
713 { 0x01, "The DAC_I_O and DAC_Q_O override values below" },
714 { 0x02, "From ADC" },
715 { 0x03, "I/Q after digital down-mixing and channel filtering" },
716 { 0x04, "Full-spectrum White Noise (from PRNG)" },
717 { 0x05, "RX signal magnitude / frequency filtered (from demodulator)" },
718 { 0x06, "RSSI/RX frequency offset estimation" },
719 { 0x07, "HSSD module" },
720 { 0x00, NULL }
721 };
722 static value_string_ext(cc2400_dactst_dac_src_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_dactst_dac_src_vals);
723
724 static const value_string cc2400_mdmtst0_afc_settling_vals[] = {
725 { 0x00, "1 pair" },
726 { 0x01, "2 pairs" },
727 { 0x02, "4 pairs" },
728 { 0x03, "8 pairs" },
729 { 0x00, NULL }
730 };
731 static value_string_ext(cc2400_mdmtst0_afc_settling_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_mdmtst0_afc_settling_vals);
732
733 static const value_string cc2400_lmtst_rxmix_tail_vals[] = {
734 { 0x00, "12 uA" },
735 { 0x01, "16 uA (Nominal)" },
736 { 0x02, "20 uA" },
737 { 0x03, "24 uA" },
738 { 0x00, NULL }
739 };
740 static value_string_ext(cc2400_lmtst_rxmix_tail_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_rxmix_tail_vals);
741
742 static const value_string cc2400_lmtst_rxmix_vcm_vals[] = {
743 { 0x00, "8 uA mixer current" },
744 { 0x01, "12 uA mixer current (Nominal)" },
745 { 0x02, "16 uA mixer current" },
746 { 0x03, "20 uA mixer current" },
747 { 0x00, NULL }
748 };
749 static value_string_ext(cc2400_lmtst_rxmix_vcm_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_rxmix_vcm_vals);
750
751 static const value_string cc2400_lmtst_rxmix_current_vals[] = {
752 { 0x00, "360 uA mixer current (x2)" },
753 { 0x01, "720 uA mixer current (x2)" },
754 { 0x02, "900 uA mixer current (x2) (Nominal)" },
755 { 0x03, "1260 uA mixer current (x2)" },
756 { 0x00, NULL }
757 };
758 static value_string_ext(cc2400_lmtst_rxmix_current_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_rxmix_current_vals);
759
760 static const value_string cc2400_lmtst_lna_cap_array_vals[] = {
761 { 0x00, "Off" },
762 { 0x01, "0.1pF (x2) (Nominal)" },
763 { 0x02, "0.2pF (x2)" },
764 { 0x03, "0.3pF (x2)" },
765 { 0x00, NULL }
766 };
767 static value_string_ext(cc2400_lmtst_lna_cap_array_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_lna_cap_array_vals);
768
769 static const value_string cc2400_lmtst_lna_lowgain_vals[] = {
770 { 0x00, "19 dB (Nominal)" },
771 { 0x01, "7 dB" },
772 { 0x00, NULL }
773 };
774 static value_string_ext(cc2400_lmtst_lna_lowgain_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_lna_lowgain_vals);
775
776 static const value_string cc2400_lmtst_lna_gain_vals[] = {
777 { 0x00, "Off (Nominal)" },
778 { 0x01, "100 uA LNA current" },
779 { 0x02, "300 uA LNA current" },
780 { 0x03, "1000 uA LNA current" },
781 { 0x00, NULL }
782 };
783 static value_string_ext(cc2400_lmtst_lna_gain_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_lna_gain_vals);
784
785 static const value_string cc2400_lmtst_lna_current_vals[] = {
786 { 0x00, "240 uA LNA current (x2)" },
787 { 0x01, "480 uA LNA current (x2)" },
788 { 0x02, "640 uA LNA current (x2) (Nominal)" },
789 { 0x03, "1280 uA LNA current (x2)" },
790 { 0x00, NULL }
791 };
792 static value_string_ext(cc2400_lmtst_lna_current_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_lmtst_lna_current_vals);
793
794 static const value_string cc2400_pamtst_atestmod_mode_vals[] = {
795 { 0x00, "Outputs I (ATEST2) and Q (ATEST1) from RxMIX" },
796 { 0x01, "Inputs I (ATEST2) and Q (ATEST1) to BPF" },
797 { 0x02, "Outputs I (ATEST2) and Q (ATEST1) from VGA" },
798 { 0x03, "Inputs I (ATEST2) and Q (ATEST1) to ADC" },
799 { 0x04, "Outputs I (ATEST2) and Q (ATEST1) from LPF" },
800 { 0x05, "Inputs I (ATEST2) and Q (ATEST1) to TxMIX" },
801 { 0x06, "Outputs P (ATEST2) and N (ATEST1) from Prescaler" },
802 { 0x07, "Connects TX IF to RX IF and simultaneously the ATEST1 pin to the internal VC node" },
803 { 0x00, NULL }
804 };
805 static value_string_ext(cc2400_pamtst_atestmod_mode_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_pamtst_atestmod_mode_vals);
806
807 static const value_string cc2400_pamtst_txmix_current_vals[] = {
808 { 0x00, "1.72 mA" },
809 { 0x01, "1.88 mA" },
810 { 0x02, "2.05 mA" },
811 { 0x03, "2.21 mA" },
812 { 0x00, NULL }
813 };
814 static value_string_ext(cc2400_pamtst_txmix_current_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_pamtst_txmix_current_vals);
815
816 static const value_string cc2400_pamtst_pa_current_vals[] = {
817 { 0x00, "-3 current adjustment" },
818 { 0x01, "-2 current adjustment" },
819 { 0x02, "-1 current adjustment" },
820 { 0x03, "Nominal Setting" },
821 { 0x04, "+1 current adjustment" },
822 { 0x05, "+2 current adjustment" },
823 { 0x06, "+3 current adjustment" },
824 { 0x07, "+4 current adjustment" },
825 { 0x00, NULL }
826 };
827 static value_string_ext(cc2400_pamtst_pa_current_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_pamtst_pa_current_vals);
828
829 static const value_string cc2400_iocfg_hssd_src_vals[] = {
830 { 0x00, "Off" },
831 { 0x01, "Output AGC status (gain setting / peak detector status / accumulator value)" },
832 { 0x02, "Output ADC I and Q values" },
833 { 0x03, "Output I/Q after digital down-mixing and channel filtering" },
834 { 0x04, "Output RX signal magnitude / frequency unfiltered (from demodulator)" },
835 { 0x05, "Output RX signal magnitude / frequency filtered (from demodulator)" },
836 { 0x06, "Output RSSI / RX frequency offset estimation" },
837 { 0x07, "Input DAC values" },
838 { 0x00, NULL }
839 };
840 static value_string_ext(cc2400_iocfg_hssd_src_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_iocfg_hssd_src_vals);
841
842 static const value_string cc2400_rssi_rssi_filt_vals[] = {
843 { 0x00, "0 bits (no filtering)" },
844 { 0x01, "1 bit" },
845 { 0x02, "4 bits" },
846 { 0x03, "8 bits" },
847 { 0x00, NULL }
848 };
849 static value_string_ext(cc2400_rssi_rssi_filt_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_rssi_rssi_filt_vals);
850
851 static const value_string cc2400_fsctlr_lock_threshold_vals[] = {
852 { 0x00, "64" },
853 { 0x01, "128" },
854 { 0x02, "256" },
855 { 0x03, "512" },
856 { 0x00, NULL }
857 };
858 static value_string_ext(cc2400_fsctlr_lock_threshold_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fsctlr_lock_threshold_vals);
859
860 static const value_string cc2400_fsctlr_lock_length_vals[] = {
861 { 0x00, "2 CLK_PRE Periods" },
862 { 0x01, "4 CLK_PRE Periods" },
863 { 0x00, NULL }
864 };
865 static value_string_ext(cc2400_fsctlr_lock_length_vals_ext) = VALUE_STRING_EXT_INIT(cc2400_fsctlr_lock_length_vals);
866
867 void proto_register_ubertooth(void);
868 void proto_reg_handoff_ubertooth(void);
869
870
871 static void
dissect_cc2400_register(proto_tree * tree,tvbuff_t * tvb,gint offset,guint8 register_id)872 dissect_cc2400_register(proto_tree *tree, tvbuff_t *tvb, gint offset, guint8 register_id)
873 {
874 proto_item *sub_item;
875 proto_item *sub_tree;
876
877 switch (register_id) {
878 case 0x00: /* MAIN */
879 proto_tree_add_item(tree, hf_cc2400_main_resetn, tvb, offset, 2, ENC_BIG_ENDIAN);
880 proto_tree_add_item(tree, hf_cc2400_main_reserved_14_10, tvb, offset, 2, ENC_BIG_ENDIAN);
881 proto_tree_add_item(tree, hf_cc2400_main_fs_force_en, tvb, offset, 2, ENC_BIG_ENDIAN);
882 proto_tree_add_item(tree, hf_cc2400_main_rxn_tx, tvb, offset, 2, ENC_BIG_ENDIAN);
883 proto_tree_add_item(tree, hf_cc2400_main_reserved_7_4, tvb, offset, 2, ENC_BIG_ENDIAN);
884 proto_tree_add_item(tree, hf_cc2400_main_reserved_3, tvb, offset, 2, ENC_BIG_ENDIAN);
885 proto_tree_add_item(tree, hf_cc2400_main_reserved_2, tvb, offset, 2, ENC_BIG_ENDIAN);
886 proto_tree_add_item(tree, hf_cc2400_main_xosc16m_bypass, tvb, offset, 2, ENC_BIG_ENDIAN);
887 proto_tree_add_item(tree, hf_cc2400_main_xosc16m_en, tvb, offset, 2, ENC_BIG_ENDIAN);
888 break;
889 case 0x01: /* FSCTRL */
890 proto_tree_add_item(tree, hf_cc2400_fsctrl_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
891 proto_tree_add_item(tree, hf_cc2400_fsctrl_lock_threshold, tvb, offset, 2, ENC_BIG_ENDIAN);
892 proto_tree_add_item(tree, hf_cc2400_fsctrl_cal_done, tvb, offset, 2, ENC_BIG_ENDIAN);
893 proto_tree_add_item(tree, hf_cc2400_fsctrl_cal_running, tvb, offset, 2, ENC_BIG_ENDIAN);
894 proto_tree_add_item(tree, hf_cc2400_fsctrl_lock_length, tvb, offset, 2, ENC_BIG_ENDIAN);
895 proto_tree_add_item(tree, hf_cc2400_fsctrl_lock_status, tvb, offset, 2, ENC_BIG_ENDIAN);
896 break;
897 case 0x02: /* FSDIV */
898 proto_tree_add_item(tree, hf_cc2400_fsdiv_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
899 sub_item = proto_tree_add_item(tree, hf_cc2400_fsdiv_frequency, tvb, offset, 2, ENC_BIG_ENDIAN);
900 sub_tree = proto_item_add_subtree(sub_item, ett_fsdiv_frequency);
901
902 proto_tree_add_item(sub_tree, hf_cc2400_fsdiv_freq_high, tvb, offset, 2, ENC_BIG_ENDIAN);
903 proto_tree_add_item(sub_tree, hf_cc2400_fsdiv_freq, tvb, offset, 2, ENC_BIG_ENDIAN);
904 break;
905 case 0x03: /* MDMCTRL */
906 proto_tree_add_item(tree, hf_cc2400_mdmctrl_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
907 proto_tree_add_item(tree, hf_cc2400_mdmctrl_mod_offset, tvb, offset, 2, ENC_BIG_ENDIAN);
908 proto_tree_add_item(tree, hf_cc2400_mdmctrl_mod_dev, tvb, offset, 2, ENC_BIG_ENDIAN);
909 break;
910 case 0x04: /* AGCCTRL */
911 proto_tree_add_item(tree, hf_cc2400_agcctrl_vga_gain, tvb, offset, 2, ENC_BIG_ENDIAN);
912 proto_tree_add_item(tree, hf_cc2400_agcctrl_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
913 proto_tree_add_item(tree, hf_cc2400_agcctrl_agc_locked, tvb, offset, 2, ENC_BIG_ENDIAN);
914 proto_tree_add_item(tree, hf_cc2400_agcctrl_agc_lock, tvb, offset, 2, ENC_BIG_ENDIAN);
915 proto_tree_add_item(tree, hf_cc2400_agcctrl_agc_sync_lock, tvb, offset, 2, ENC_BIG_ENDIAN);
916 proto_tree_add_item(tree, hf_cc2400_agcctrl_vga_gain_oe, tvb, offset, 2, ENC_BIG_ENDIAN);
917 break;
918 case 0x05: /* FREND */
919 proto_tree_add_item(tree, hf_cc2400_frend_reserved_15_4, tvb, offset, 2, ENC_BIG_ENDIAN);
920 proto_tree_add_item(tree, hf_cc2400_frend_reserved_3, tvb, offset, 2, ENC_BIG_ENDIAN);
921 proto_tree_add_item(tree, hf_cc2400_frend_pa_level, tvb, offset, 2, ENC_BIG_ENDIAN);
922 break;
923 case 0x06: /* RSSI */
924 proto_tree_add_item(tree, hf_cc2400_rssi_rssi_val, tvb, offset, 2, ENC_BIG_ENDIAN);
925 proto_tree_add_item(tree, hf_cc2400_rssi_rssi_cs_thres, tvb, offset, 2, ENC_BIG_ENDIAN);
926 proto_tree_add_item(tree, hf_cc2400_rssi_rssi_filt, tvb, offset, 2, ENC_BIG_ENDIAN);
927 break;
928 case 0x07: /* FREQEST */
929 proto_tree_add_item(tree, hf_cc2400_freqest_rx_freq_offset, tvb, offset, 2, ENC_BIG_ENDIAN);
930 proto_tree_add_item(tree, hf_cc2400_freqest_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
931 break;
932 case 0x08: /* IOCFG */
933 proto_tree_add_item(tree, hf_cc2400_iocfg_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
934 proto_tree_add_item(tree, hf_cc2400_iocfg_gio6_cfg, tvb, offset, 2, ENC_BIG_ENDIAN);
935 proto_tree_add_item(tree, hf_cc2400_iocfg_gio1_cfg, tvb, offset, 2, ENC_BIG_ENDIAN);
936 proto_tree_add_item(tree, hf_cc2400_iocfg_hssd_src, tvb, offset, 2, ENC_BIG_ENDIAN);
937 break;
938 case 0x0B: /* FSMTC */
939 proto_tree_add_item(tree, hf_cc2400_fsmtc_tc_rxon2agcen, tvb, offset, 2, ENC_BIG_ENDIAN);
940 proto_tree_add_item(tree, hf_cc2400_fsmtc_tc_paon2switch, tvb, offset, 2, ENC_BIG_ENDIAN);
941 proto_tree_add_item(tree, hf_cc2400_fsmtc_res, tvb, offset, 2, ENC_BIG_ENDIAN);
942 proto_tree_add_item(tree, hf_cc2400_fsmtc_tc_txend2switch, tvb, offset, 2, ENC_BIG_ENDIAN);
943 proto_tree_add_item(tree, hf_cc2400_fsmtc_tc_txend2paoff, tvb, offset, 2, ENC_BIG_ENDIAN);
944 break;
945 case 0x0C: /* Reserved */
946 proto_tree_add_item(tree, hf_cc2400_reserved_0x0C_res_15_5, tvb, offset, 2, ENC_BIG_ENDIAN);
947 proto_tree_add_item(tree, hf_cc2400_reserved_0x0C_res_4_0, tvb, offset, 2, ENC_BIG_ENDIAN);
948 break;
949 case 0x0D: /* MANAND */
950 proto_tree_add_item(tree, hf_cc2400_manand_vga_reset_n, tvb, offset, 2, ENC_BIG_ENDIAN);
951 proto_tree_add_item(tree, hf_cc2400_manand_lock_status, tvb, offset, 2, ENC_BIG_ENDIAN);
952 proto_tree_add_item(tree, hf_cc2400_manand_balun_ctrl, tvb, offset, 2, ENC_BIG_ENDIAN);
953 proto_tree_add_item(tree, hf_cc2400_manand_rxtx, tvb, offset, 2, ENC_BIG_ENDIAN);
954 proto_tree_add_item(tree, hf_cc2400_manand_pre_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
955 proto_tree_add_item(tree, hf_cc2400_manand_pa_n_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
956 proto_tree_add_item(tree, hf_cc2400_manand_pa_p_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
957 proto_tree_add_item(tree, hf_cc2400_manand_dac_lpf_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
958 proto_tree_add_item(tree, hf_cc2400_manand_bias_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
959 proto_tree_add_item(tree, hf_cc2400_manand_xosc16m_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
960 proto_tree_add_item(tree, hf_cc2400_manand_chp_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
961 proto_tree_add_item(tree, hf_cc2400_manand_fs_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
962 proto_tree_add_item(tree, hf_cc2400_manand_adc_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
963 proto_tree_add_item(tree, hf_cc2400_manand_vga_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
964 proto_tree_add_item(tree, hf_cc2400_manand_rxbpf_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
965 proto_tree_add_item(tree, hf_cc2400_manand_lnamix_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
966 break;
967 case 0x0E: /* FSMSTATE */
968 proto_tree_add_item(tree, hf_cc2400_fsmstate_reserved_15_13, tvb, offset, 2, ENC_BIG_ENDIAN);
969 proto_tree_add_item(tree, hf_cc2400_fsmstate_fsm_state_bkpt, tvb, offset, 2, ENC_BIG_ENDIAN);
970 proto_tree_add_item(tree, hf_cc2400_fsmstate_reserved_7_5, tvb, offset, 2, ENC_BIG_ENDIAN);
971 proto_tree_add_item(tree, hf_cc2400_fsmstate_fsm_cur_state, tvb, offset, 2, ENC_BIG_ENDIAN);
972 break;
973 case 0x0F: /* ADCTST */
974 proto_tree_add_item(tree, hf_cc2400_adctst_reserved_15, tvb, offset, 2, ENC_BIG_ENDIAN);
975 proto_tree_add_item(tree, hf_cc2400_adctst_adc_i, tvb, offset, 2, ENC_BIG_ENDIAN);
976 proto_tree_add_item(tree, hf_cc2400_adctst_reserved_7, tvb, offset, 2, ENC_BIG_ENDIAN);
977 proto_tree_add_item(tree, hf_cc2400_adctst_adc_q, tvb, offset, 2, ENC_BIG_ENDIAN);
978 break;
979 case 0x10: /* RXBPFTST */
980 proto_tree_add_item(tree, hf_cc2400_rxbpftst_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
981 proto_tree_add_item(tree, hf_cc2400_rxbpftst_rxbpf_cap_oe, tvb, offset, 2, ENC_BIG_ENDIAN);
982 proto_tree_add_item(tree, hf_cc2400_rxbpftst_rxbpf_cap_o, tvb, offset, 2, ENC_BIG_ENDIAN);
983 proto_tree_add_item(tree, hf_cc2400_rxbpftst_rxbpf_cap_res, tvb, offset, 2, ENC_BIG_ENDIAN);
984 break;
985 case 0x11: /* PAMTST */
986 proto_tree_add_item(tree, hf_cc2400_pamtst_reserved_15_13, tvb, offset, 2, ENC_BIG_ENDIAN);
987 proto_tree_add_item(tree, hf_cc2400_pamtst_vc_in_test_en, tvb, offset, 2, ENC_BIG_ENDIAN);
988 proto_tree_add_item(tree, hf_cc2400_pamtst_atestmod_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
989 proto_tree_add_item(tree, hf_cc2400_pamtst_atestmod_mode, tvb, offset, 2, ENC_BIG_ENDIAN);
990 proto_tree_add_item(tree, hf_cc2400_pamtst_reserved_7, tvb, offset, 2, ENC_BIG_ENDIAN);
991 proto_tree_add_item(tree, hf_cc2400_pamtst_txmix_cap_array, tvb, offset, 2, ENC_BIG_ENDIAN);
992 proto_tree_add_item(tree, hf_cc2400_pamtst_txmix_current, tvb, offset, 2, ENC_BIG_ENDIAN);
993 proto_tree_add_item(tree, hf_cc2400_pamtst_pa_current, tvb, offset, 2, ENC_BIG_ENDIAN);
994 break;
995 case 0x12: /* LMTST */
996 proto_tree_add_item(tree, hf_cc2400_lmtst_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
997 proto_tree_add_item(tree, hf_cc2400_lmtst_rxmix_hgm, tvb, offset, 2, ENC_BIG_ENDIAN);
998 proto_tree_add_item(tree, hf_cc2400_lmtst_rxmix_tail, tvb, offset, 2, ENC_BIG_ENDIAN);
999 proto_tree_add_item(tree, hf_cc2400_lmtst_rxmix_vcm, tvb, offset, 2, ENC_BIG_ENDIAN);
1000 proto_tree_add_item(tree, hf_cc2400_lmtst_rxmix_current, tvb, offset, 2, ENC_BIG_ENDIAN);
1001 proto_tree_add_item(tree, hf_cc2400_lmtst_lna_cap_array, tvb, offset, 2, ENC_BIG_ENDIAN);
1002 proto_tree_add_item(tree, hf_cc2400_lmtst_lna_lowgain, tvb, offset, 2, ENC_BIG_ENDIAN);
1003 proto_tree_add_item(tree, hf_cc2400_lmtst_lna_gain, tvb, offset, 2, ENC_BIG_ENDIAN);
1004 proto_tree_add_item(tree, hf_cc2400_lmtst_lna_current, tvb, offset, 2, ENC_BIG_ENDIAN);
1005 break;
1006 case 0x13: /* MANOR */
1007 proto_tree_add_item(tree, hf_cc2400_manor_vga_reset_n, tvb, offset, 2, ENC_BIG_ENDIAN);
1008 proto_tree_add_item(tree, hf_cc2400_manor_lock_status, tvb, offset, 2, ENC_BIG_ENDIAN);
1009 proto_tree_add_item(tree, hf_cc2400_manor_balun_ctrl, tvb, offset, 2, ENC_BIG_ENDIAN);
1010 proto_tree_add_item(tree, hf_cc2400_manor_rxtx, tvb, offset, 2, ENC_BIG_ENDIAN);
1011 proto_tree_add_item(tree, hf_cc2400_manor_pre_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1012 proto_tree_add_item(tree, hf_cc2400_manor_pa_n_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1013 proto_tree_add_item(tree, hf_cc2400_manor_pa_p_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1014 proto_tree_add_item(tree, hf_cc2400_manor_dac_lpf_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1015 proto_tree_add_item(tree, hf_cc2400_manor_bias_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1016 proto_tree_add_item(tree, hf_cc2400_manor_xosc16m_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1017 proto_tree_add_item(tree, hf_cc2400_manor_chp_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1018 proto_tree_add_item(tree, hf_cc2400_manor_fs_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1019 proto_tree_add_item(tree, hf_cc2400_manor_adc_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1020 proto_tree_add_item(tree, hf_cc2400_manor_vga_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1021 proto_tree_add_item(tree, hf_cc2400_manor_rxbpf_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1022 proto_tree_add_item(tree, hf_cc2400_manor_lnamix_pd, tvb, offset, 2, ENC_BIG_ENDIAN);
1023 break;
1024 case 0x14: /* MDMTST0 */
1025 proto_tree_add_item(tree, hf_cc2400_mdmtst0_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1026 proto_tree_add_item(tree, hf_cc2400_mdmtst0_tx_prng, tvb, offset, 2, ENC_BIG_ENDIAN);
1027 proto_tree_add_item(tree, hf_cc2400_mdmtst0_tx_1mhz_offset_n, tvb, offset, 2, ENC_BIG_ENDIAN);
1028 proto_tree_add_item(tree, hf_cc2400_mdmtst0_invert_data, tvb, offset, 2, ENC_BIG_ENDIAN);
1029 proto_tree_add_item(tree, hf_cc2400_mdmtst0_afc_adjust_on_packet, tvb, offset, 2, ENC_BIG_ENDIAN);
1030 proto_tree_add_item(tree, hf_cc2400_mdmtst0_afc_settling, tvb, offset, 2, ENC_BIG_ENDIAN);
1031 proto_tree_add_item(tree, hf_cc2400_mdmtst0_afc_delta, tvb, offset, 2, ENC_BIG_ENDIAN);
1032 break;
1033 case 0x15: /* MDMTST1 */
1034 proto_tree_add_item(tree, hf_cc2400_mdmtst1_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1035 proto_tree_add_item(tree, hf_cc2400_mdmtst1_bsync_threshold, tvb, offset, 2, ENC_BIG_ENDIAN);
1036 break;
1037 case 0x16: /* DACTST */
1038 proto_tree_add_item(tree, hf_cc2400_dactst_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1039 proto_tree_add_item(tree, hf_cc2400_dactst_dac_src, tvb, offset, 2, ENC_BIG_ENDIAN);
1040 proto_tree_add_item(tree, hf_cc2400_dactst_dac_i_o, tvb, offset, 2, ENC_BIG_ENDIAN);
1041 proto_tree_add_item(tree, hf_cc2400_dactst_dac_q_o, tvb, offset, 2, ENC_BIG_ENDIAN);
1042 break;
1043 case 0x17: /* AGCTST0 */
1044 proto_tree_add_item(tree, hf_cc2400_agctst0_agc_settle_blank_dn, tvb, offset, 2, ENC_BIG_ENDIAN);
1045 proto_tree_add_item(tree, hf_cc2400_agctst0_agc_win_size, tvb, offset, 2, ENC_BIG_ENDIAN);
1046 proto_tree_add_item(tree, hf_cc2400_agctst0_agc_settle_peak, tvb, offset, 2, ENC_BIG_ENDIAN);
1047 proto_tree_add_item(tree, hf_cc2400_agctst0_agc_settle_adc, tvb, offset, 2, ENC_BIG_ENDIAN);
1048 proto_tree_add_item(tree, hf_cc2400_agctst0_agc_attempts, tvb, offset, 2, ENC_BIG_ENDIAN);
1049 break;
1050 case 0x18: /* AGCTST1 */
1051 proto_tree_add_item(tree, hf_cc2400_agctst1_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1052 proto_tree_add_item(tree, hf_cc2400_agctst1_agc_var_gain_sat, tvb, offset, 2, ENC_BIG_ENDIAN);
1053 proto_tree_add_item(tree, hf_cc2400_agctst1_agc_settle_blank_up, tvb, offset, 2, ENC_BIG_ENDIAN);
1054 proto_tree_add_item(tree, hf_cc2400_agctst1_peakdet_cur_boost, tvb, offset, 2, ENC_BIG_ENDIAN);
1055 proto_tree_add_item(tree, hf_cc2400_agctst1_agc_mult_slow, tvb, offset, 2, ENC_BIG_ENDIAN);
1056 proto_tree_add_item(tree, hf_cc2400_agctst1_agc_settle_fixed, tvb, offset, 2, ENC_BIG_ENDIAN);
1057 proto_tree_add_item(tree, hf_cc2400_agctst1_agc_settle_var, tvb, offset, 2, ENC_BIG_ENDIAN);
1058 break;
1059 case 0x19: /* AGCTST2 */
1060 proto_tree_add_item(tree, hf_cc2400_agctst2_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1061 proto_tree_add_item(tree, hf_cc2400_agctst2_agc_backend_blanking, tvb, offset, 2, ENC_BIG_ENDIAN);
1062 proto_tree_add_item(tree, hf_cc2400_agctst2_agc_adjust_m3db, tvb, offset, 2, ENC_BIG_ENDIAN);
1063 proto_tree_add_item(tree, hf_cc2400_agctst2_agc_adjust_m1db, tvb, offset, 2, ENC_BIG_ENDIAN);
1064 proto_tree_add_item(tree, hf_cc2400_agctst2_agc_adjust_p3db, tvb, offset, 2, ENC_BIG_ENDIAN);
1065 proto_tree_add_item(tree, hf_cc2400_agctst2_agc_adjust_p1db, tvb, offset, 2, ENC_BIG_ENDIAN);
1066 break;
1067 case 0x1A: /* FSTST0 */
1068 proto_tree_add_item(tree, hf_cc2400_fstst0_rxmixbuf_cur, tvb, offset, 2, ENC_BIG_ENDIAN);
1069 proto_tree_add_item(tree, hf_cc2400_fstst0_txmixbuf_cur, tvb, offset, 2, ENC_BIG_ENDIAN);
1070 proto_tree_add_item(tree, hf_cc2400_fstst0_vco_array_settle_long, tvb, offset, 2, ENC_BIG_ENDIAN);
1071 proto_tree_add_item(tree, hf_cc2400_fstst0_vco_array_oe, tvb, offset, 2, ENC_BIG_ENDIAN);
1072 proto_tree_add_item(tree, hf_cc2400_fstst0_vco_array_o, tvb, offset, 2, ENC_BIG_ENDIAN);
1073 proto_tree_add_item(tree, hf_cc2400_fstst0_vco_array_res, tvb, offset, 2, ENC_BIG_ENDIAN);
1074 break;
1075 case 0x1B: /* FSTST1 */
1076 proto_tree_add_item(tree, hf_cc2400_fstst1_rxbpf_locur, tvb, offset, 2, ENC_BIG_ENDIAN);
1077 proto_tree_add_item(tree, hf_cc2400_fstst1_rxbpf_midcur, tvb, offset, 2, ENC_BIG_ENDIAN);
1078 proto_tree_add_item(tree, hf_cc2400_fstst1_vco_current_ref, tvb, offset, 2, ENC_BIG_ENDIAN);
1079 proto_tree_add_item(tree, hf_cc2400_fstst1_vco_current_k, tvb, offset, 2, ENC_BIG_ENDIAN);
1080 proto_tree_add_item(tree, hf_cc2400_fstst1_vc_dac_en, tvb, offset, 2, ENC_BIG_ENDIAN);
1081 proto_tree_add_item(tree, hf_cc2400_fstst1_vc_dac_val, tvb, offset, 2, ENC_BIG_ENDIAN);
1082 break;
1083 case 0x1C: /* FSTST2 */
1084 proto_tree_add_item(tree, hf_cc2400_fstst2_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1085 proto_tree_add_item(tree, hf_cc2400_fstst2_vco_curcal_speed, tvb, offset, 2, ENC_BIG_ENDIAN);
1086 proto_tree_add_item(tree, hf_cc2400_fstst2_vco_current_oe, tvb, offset, 2, ENC_BIG_ENDIAN);
1087 proto_tree_add_item(tree, hf_cc2400_fstst2_vco_current_o, tvb, offset, 2, ENC_BIG_ENDIAN);
1088 proto_tree_add_item(tree, hf_cc2400_fstst2_vco_current_res, tvb, offset, 2, ENC_BIG_ENDIAN);
1089 break;
1090 case 0x1D: /* FSTST3 */
1091 proto_tree_add_item(tree, hf_cc2400_fstst3_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1092 proto_tree_add_item(tree, hf_cc2400_fstst3_chp_test_up, tvb, offset, 2, ENC_BIG_ENDIAN);
1093 proto_tree_add_item(tree, hf_cc2400_fstst3_chp_test_dn, tvb, offset, 2, ENC_BIG_ENDIAN);
1094 proto_tree_add_item(tree, hf_cc2400_fstst3_chp_disable, tvb, offset, 2, ENC_BIG_ENDIAN);
1095 proto_tree_add_item(tree, hf_cc2400_fstst3_pd_delay, tvb, offset, 2, ENC_BIG_ENDIAN);
1096 proto_tree_add_item(tree, hf_cc2400_fstst3_chp_step_period, tvb, offset, 2, ENC_BIG_ENDIAN);
1097 proto_tree_add_item(tree, hf_cc2400_fstst3_stop_chp_current, tvb, offset, 2, ENC_BIG_ENDIAN);
1098 proto_tree_add_item(tree, hf_cc2400_fstst3_start_chp_current, tvb, offset, 2, ENC_BIG_ENDIAN);
1099 break;
1100 case 0x1E: /* MANFIDL */
1101 proto_tree_add_item(tree, hf_cc2400_manfidl_partnum, tvb, offset, 2, ENC_BIG_ENDIAN);
1102 proto_tree_add_item(tree, hf_cc2400_manfidl_manfid, tvb, offset, 2, ENC_BIG_ENDIAN);
1103 break;
1104 case 0x1F: /* MANFIDH */
1105 proto_tree_add_item(tree, hf_cc2400_manfidh_version, tvb, offset, 2, ENC_BIG_ENDIAN);
1106 proto_tree_add_item(tree, hf_cc2400_manfidh_partnum, tvb, offset, 2, ENC_BIG_ENDIAN);
1107 break;
1108 case 0x20: /* GRMDM */
1109 proto_tree_add_item(tree, hf_cc2400_grmdm_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1110 proto_tree_add_item(tree, hf_cc2400_grmdm_sync_errbits_allowed, tvb, offset, 2, ENC_BIG_ENDIAN);
1111 proto_tree_add_item(tree, hf_cc2400_grmdm_pin_mode, tvb, offset, 2, ENC_BIG_ENDIAN);
1112 proto_tree_add_item(tree, hf_cc2400_grmdm_packet_mode, tvb, offset, 2, ENC_BIG_ENDIAN);
1113 proto_tree_add_item(tree, hf_cc2400_grmdm_pre_bytes, tvb, offset, 2, ENC_BIG_ENDIAN);
1114 proto_tree_add_item(tree, hf_cc2400_grmdm_sync_word_size, tvb, offset, 2, ENC_BIG_ENDIAN);
1115 proto_tree_add_item(tree, hf_cc2400_grmdm_crc_on, tvb, offset, 2, ENC_BIG_ENDIAN);
1116 proto_tree_add_item(tree, hf_cc2400_grmdm_data_format, tvb, offset, 2, ENC_BIG_ENDIAN);
1117 proto_tree_add_item(tree, hf_cc2400_grmdm_modulation_format, tvb, offset, 2, ENC_BIG_ENDIAN);
1118 proto_tree_add_item(tree, hf_cc2400_grmdm_tx_gaussian_filter, tvb, offset, 2, ENC_BIG_ENDIAN);
1119 break;
1120 case 0x21: /* GRDEC */
1121 proto_tree_add_item(tree, hf_cc2400_grdec_reserved, tvb, offset, 2, ENC_BIG_ENDIAN);
1122 proto_tree_add_item(tree, hf_cc2400_grdec_ind_saturation, tvb, offset, 2, ENC_BIG_ENDIAN);
1123 proto_tree_add_item(tree, hf_cc2400_grdec_dec_shift, tvb, offset, 2, ENC_BIG_ENDIAN);
1124 proto_tree_add_item(tree, hf_cc2400_grdec_channel_dec, tvb, offset, 2, ENC_BIG_ENDIAN);
1125 proto_tree_add_item(tree, hf_cc2400_grdec_dec_val, tvb, offset, 2, ENC_BIG_ENDIAN);
1126 break;
1127 case 0x22: /* PKTSTATUS */
1128 proto_tree_add_item(tree, hf_cc2400_pktstatus_reserved_15_11, tvb, offset, 2, ENC_BIG_ENDIAN);
1129 proto_tree_add_item(tree, hf_cc2400_pktstatus_sync_word_received, tvb, offset, 2, ENC_BIG_ENDIAN);
1130 proto_tree_add_item(tree, hf_cc2400_pktstatus_crc_ok, tvb, offset, 2, ENC_BIG_ENDIAN);
1131 proto_tree_add_item(tree, hf_cc2400_pktstatus_reserved_8, tvb, offset, 2, ENC_BIG_ENDIAN);
1132 proto_tree_add_item(tree, hf_cc2400_pktstatus_reserved_7_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1133 break;
1134 case 0x23: /* INT */
1135 proto_tree_add_item(tree, hf_cc2400_int_reserved_15_8, tvb, offset, 2, ENC_BIG_ENDIAN);
1136 proto_tree_add_item(tree, hf_cc2400_int_reserved_7, tvb, offset, 2, ENC_BIG_ENDIAN);
1137 proto_tree_add_item(tree, hf_cc2400_int_pkt_polarity, tvb, offset, 2, ENC_BIG_ENDIAN);
1138 proto_tree_add_item(tree, hf_cc2400_int_fifo_polarity, tvb, offset, 2, ENC_BIG_ENDIAN);
1139 proto_tree_add_item(tree, hf_cc2400_int_fifo_threshold, tvb, offset, 2, ENC_BIG_ENDIAN);
1140 break;
1141 case 0x24: /* Reserved */
1142 proto_tree_add_item(tree, hf_cc2400_reserved_0x24_res_15_14, tvb, offset, 2, ENC_BIG_ENDIAN);
1143 proto_tree_add_item(tree, hf_cc2400_reserved_0x24_res_13_10, tvb, offset, 2, ENC_BIG_ENDIAN);
1144 proto_tree_add_item(tree, hf_cc2400_reserved_0x24_res_9_7, tvb, offset, 2, ENC_BIG_ENDIAN);
1145 proto_tree_add_item(tree, hf_cc2400_reserved_0x24_res_6_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1146 break;
1147 case 0x25: /* Reserved */
1148 proto_tree_add_item(tree, hf_cc2400_reserved_0x25_res_15_12, tvb, offset, 2, ENC_BIG_ENDIAN);
1149 proto_tree_add_item(tree, hf_cc2400_reserved_0x25_res_11_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1150 break;
1151 case 0x26: /* Reserved */
1152 proto_tree_add_item(tree, hf_cc2400_reserved_0x26_res_15_10, tvb, offset, 2, ENC_BIG_ENDIAN);
1153 proto_tree_add_item(tree, hf_cc2400_reserved_0x26_res_9_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1154 break;
1155 case 0x27: /* Reserved */
1156 proto_tree_add_item(tree, hf_cc2400_reserved_0x27_res_15_8, tvb, offset, 2, ENC_BIG_ENDIAN);
1157 proto_tree_add_item(tree, hf_cc2400_reserved_0x27_res_7_3, tvb, offset, 2, ENC_BIG_ENDIAN);
1158 proto_tree_add_item(tree, hf_cc2400_reserved_0x27_res_2_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1159 break;
1160 case 0x28: /* Reserved */
1161 proto_tree_add_item(tree, hf_cc2400_reserved_0x28_res_15, tvb, offset, 2, ENC_BIG_ENDIAN);
1162 proto_tree_add_item(tree, hf_cc2400_reserved_0x28_res_14_13, tvb, offset, 2, ENC_BIG_ENDIAN);
1163 proto_tree_add_item(tree, hf_cc2400_reserved_0x28_res_12_7, tvb, offset, 2, ENC_BIG_ENDIAN);
1164 proto_tree_add_item(tree, hf_cc2400_reserved_0x28_res_6_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1165 break;
1166 case 0x29: /* Reserved */
1167 proto_tree_add_item(tree, hf_cc2400_reserved_0x29_res_15_8, tvb, offset, 2, ENC_BIG_ENDIAN);
1168 proto_tree_add_item(tree, hf_cc2400_reserved_0x29_res_7_3, tvb, offset, 2, ENC_BIG_ENDIAN);
1169 proto_tree_add_item(tree, hf_cc2400_reserved_0x29_res_2_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1170 break;
1171 case 0x2A: /* Reserved */
1172 proto_tree_add_item(tree, hf_cc2400_reserved_0x2A_res_15_11, tvb, offset, 2, ENC_BIG_ENDIAN);
1173 proto_tree_add_item(tree, hf_cc2400_reserved_0x2A_res_10, tvb, offset, 2, ENC_BIG_ENDIAN);
1174 proto_tree_add_item(tree, hf_cc2400_reserved_0x2A_res_9_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1175 break;
1176 case 0x2B: /* Reserved */
1177 proto_tree_add_item(tree, hf_cc2400_reserved_0x2B_res_15_14, tvb, offset, 2, ENC_BIG_ENDIAN);
1178 proto_tree_add_item(tree, hf_cc2400_reserved_0x2B_res_13, tvb, offset, 2, ENC_BIG_ENDIAN);
1179 proto_tree_add_item(tree, hf_cc2400_reserved_0x2B_res_12, tvb, offset, 2, ENC_BIG_ENDIAN);
1180 proto_tree_add_item(tree, hf_cc2400_reserved_0x2B_res_11_0, tvb, offset, 2, ENC_BIG_ENDIAN);
1181 break;
1182 case 0x2C: /* SYNCL */
1183 proto_tree_add_item(tree, hf_cc2400_syncl, tvb, offset, 2, ENC_BIG_ENDIAN);
1184 break;
1185 case 0x2D: /* SYNCH */
1186 proto_tree_add_item(tree, hf_cc2400_synch, tvb, offset, 2, ENC_BIG_ENDIAN);
1187 break;
1188 default:
1189 proto_tree_add_item(tree, hf_cc2400_value, tvb, offset, 2, ENC_BIG_ENDIAN);
1190 }
1191 }
1192
1193 static gint
dissect_usb_rx_packet(proto_tree * main_tree,proto_tree * tree,packet_info * pinfo,tvbuff_t * tvb,gint offset,gint16 command,usb_conv_info_t * usb_conv_info)1194 dissect_usb_rx_packet(proto_tree *main_tree, proto_tree *tree, packet_info *pinfo,
1195 tvbuff_t *tvb, gint offset, gint16 command, usb_conv_info_t *usb_conv_info)
1196 {
1197 proto_item *sub_item;
1198 proto_tree *sub_tree;
1199 proto_item *p_item;
1200 proto_item *data_item;
1201 proto_tree *data_tree;
1202 proto_item *entry_item;
1203 proto_tree *entry_tree;
1204 gint i_spec;
1205 gint length;
1206 tvbuff_t *next_tvb;
1207 guint8 packet_type;
1208 guint32 start_offset;
1209 guint32 clock_100ns;
1210 guint8 channel;
1211 ubertooth_data_t *ubertooth_data;
1212
1213 sub_item = proto_tree_add_item(tree, hf_usb_rx_packet, tvb, offset, 64, ENC_NA);
1214 sub_tree = proto_item_add_subtree(sub_item, ett_usb_rx_packet);
1215
1216 start_offset = offset;
1217
1218 proto_tree_add_item(sub_tree, hf_packet_type, tvb, offset, 1, ENC_NA);
1219 packet_type = tvb_get_guint8(tvb, offset);
1220 offset += 1;
1221
1222 if (packet_type == 0x05) { /* LE_PROMISC */
1223 guint8 state;
1224
1225 proto_tree_add_item(sub_tree, hf_state, tvb, offset, 1, ENC_NA);
1226 state = tvb_get_guint8(tvb, offset);
1227 col_append_fstr(pinfo->cinfo, COL_INFO, " LE Promiscuous - %s", val_to_str_const(state, usb_rx_packet_state_vals, "Unknown"));
1228 offset += 1;
1229
1230 switch (state) {
1231 case 0: /* Access Address */
1232 proto_tree_add_item(sub_tree, hf_access_address, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1233 col_append_fstr(pinfo->cinfo, COL_INFO, " 0x%04x", tvb_get_letohl(tvb, offset));
1234 offset += 4;
1235 break;
1236 case 1: /* CRC Init */
1237 proto_tree_add_item(sub_tree, hf_crc_init, tvb, offset, 3, ENC_LITTLE_ENDIAN);
1238 col_append_fstr(pinfo->cinfo, COL_INFO, " 0x%06x", tvb_get_letoh24(tvb, offset));
1239 offset += 3;
1240 break;
1241 case 2: /* Hop Interval */
1242 p_item = proto_tree_add_item(sub_tree, hf_hop_interval, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1243 proto_item_append_text(p_item, " (%f ms), ", tvb_get_letohs(tvb, offset) * 1.25);
1244 col_append_fstr(pinfo->cinfo, COL_INFO, " %f ms", tvb_get_letohs(tvb, offset) * 1.25);
1245 offset += 2;
1246 break;
1247 case 3: /* Hop Increment */
1248 proto_tree_add_item(sub_tree, hf_hop_increment, tvb, offset, 1, ENC_NA);
1249 col_append_fstr(pinfo->cinfo, COL_INFO, " %u", tvb_get_guint8(tvb, offset));
1250 offset += 1;
1251 break;
1252 }
1253
1254 proto_tree_add_item(sub_tree, hf_reserved, tvb, offset, 64 - (offset - start_offset), ENC_NA);
1255 offset += 64 - (offset - start_offset);
1256
1257 return offset;
1258 }
1259
1260 proto_tree_add_item(sub_tree, hf_chip_status_reserved, tvb, offset, 1, ENC_NA);
1261 proto_tree_add_item(sub_tree, hf_chip_status_rssi_trigger, tvb, offset, 1, ENC_NA);
1262 proto_tree_add_item(sub_tree, hf_chip_status_cs_trigger, tvb, offset, 1, ENC_NA);
1263 proto_tree_add_item(sub_tree, hf_chip_status_fifo_overflow, tvb, offset, 1, ENC_NA);
1264 proto_tree_add_item(sub_tree, hf_chip_status_dma_error, tvb, offset, 1, ENC_NA);
1265 proto_tree_add_item(sub_tree, hf_chip_status_dma_overflow, tvb, offset, 1, ENC_NA);
1266 offset += 1;
1267
1268 proto_tree_add_item(sub_tree, hf_usb_rx_packet_channel, tvb, offset, 1, ENC_NA);
1269 channel = tvb_get_guint8(tvb, offset);
1270 offset += 1;
1271
1272 proto_tree_add_item(sub_tree, hf_clock_ns, tvb, offset, 1, ENC_NA);
1273 offset += 1;
1274
1275 proto_tree_add_item(sub_tree, hf_clock_100ns, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1276 clock_100ns = tvb_get_letohl(tvb, offset);
1277 offset += 4;
1278
1279 proto_tree_add_item(sub_tree, hf_rssi_max, tvb, offset, 1, ENC_NA);
1280 offset += 1;
1281
1282 proto_tree_add_item(sub_tree, hf_rssi_min, tvb, offset, 1, ENC_NA);
1283 offset += 1;
1284
1285 proto_tree_add_item(sub_tree, hf_rssi_avg, tvb, offset, 1, ENC_NA);
1286 offset += 1;
1287
1288 proto_tree_add_item(sub_tree, hf_rssi_count, tvb, offset, 1, ENC_NA);
1289 offset += 1;
1290
1291 proto_tree_add_item(sub_tree, hf_reserved, tvb, offset, 2, ENC_NA);
1292 offset += 2;
1293
1294 data_item = proto_tree_add_item(sub_tree, hf_data, tvb, offset, 50, ENC_NA);
1295 data_tree = proto_item_add_subtree(data_item, ett_usb_rx_packet_data);
1296
1297 switch (command) {
1298 case 27: /* Spectrum Analyzer */
1299 for (i_spec = 0; i_spec < 48; i_spec += 3) {
1300 entry_item = proto_tree_add_item(data_tree, hf_spectrum_entry, tvb, offset, 3, ENC_NA);
1301 entry_tree = proto_item_add_subtree(entry_item, ett_entry);
1302
1303 proto_tree_add_item(entry_tree, hf_frequency, tvb, offset, 2, ENC_BIG_ENDIAN);
1304 offset += 2;
1305
1306 proto_tree_add_item(entry_tree, hf_rssi, tvb, offset, 1, ENC_NA);
1307 offset += 1;
1308
1309 proto_item_append_text(entry_item, " Frequency = %u MHz, RSSI = %i", tvb_get_ntohs(tvb, offset - 3), tvb_get_gint8(tvb, offset - 1));
1310 }
1311
1312 proto_tree_add_item(data_tree, hf_reserved, tvb, offset, 2, ENC_NA);
1313 offset += 2;
1314 break;
1315 case 49: /* Poll */
1316 if (packet_type == 0x00) {/* BD/EDR */
1317 /* TODO: btbb dissector */
1318 offset += 50;
1319 } else if (packet_type == 0x01 || packet_type == 0x05) { /* LE || LE Promiscuous */
1320 length = 9; /* From BTLE: AccessAddress (4) + Header (2) + Length from Header (below) + CRC (3) */
1321
1322 if (tvb_get_letohl(tvb, offset) == ACCESS_ADDRESS_ADVERTISING)
1323 length += tvb_get_guint8(tvb, offset + 5) & 0x3f;
1324 else
1325 length += tvb_get_guint8(tvb, offset + 5) & 0x1f;
1326
1327 ubertooth_data = wmem_new(pinfo->pool, ubertooth_data_t);
1328 ubertooth_data->bus_id = usb_conv_info->bus_id;
1329 ubertooth_data->device_address = usb_conv_info->device_address;
1330 ubertooth_data->clock_100ns = clock_100ns;
1331 ubertooth_data->channel = channel;
1332
1333 next_tvb = tvb_new_subset_length(tvb, offset, length);
1334 call_dissector_with_data(bluetooth_ubertooth_handle, next_tvb, pinfo, main_tree, ubertooth_data);
1335 offset += length;
1336 } else if (packet_type == 0x06) {/* Ego */
1337 /* NOTE: Yuneec E-GO skateboard - unknown protocol */
1338 offset += 50;
1339 } else if (packet_type == 0x02 || packet_type == 0x03 || packet_type == 0x04) { /* Message || Keep Alive || Spectrum Analyze */
1340 /* NOTE: ? */
1341 offset += 50;
1342 }
1343
1344 if (tvb_reported_length_remaining(tvb, offset) > 0) {
1345 proto_tree_add_item(data_tree, hf_reserved, tvb, offset, -1, ENC_NA);
1346 offset += tvb_captured_length_remaining(tvb, offset);
1347 }
1348
1349 break;
1350 default:
1351 offset += 50;
1352 }
1353
1354 return offset;
1355 }
1356
1357 static gint
dissect_ubertooth(tvbuff_t * tvb,packet_info * pinfo,proto_tree * tree,void * data)1358 dissect_ubertooth(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, void *data)
1359 {
1360 proto_item *main_tree = NULL;
1361 proto_tree *main_item = NULL;
1362 proto_item *command_item;
1363 proto_item *command_tree;
1364 proto_item *sub_item;
1365 proto_item *sub_tree;
1366 gint offset = 0;
1367 usb_conv_info_t *usb_conv_info = (usb_conv_info_t *)data;
1368 gint p2p_dir_save;
1369 guint8 command;
1370 gint16 command_response = -1;
1371 command_data_t *command_data = NULL;
1372 wmem_tree_t *wmem_tree;
1373 wmem_tree_key_t key[5];
1374 guint32 bus_id;
1375 guint32 device_address;
1376 guint32 k_bus_id;
1377 guint32 k_device_address;
1378 guint32 k_frame_number;
1379 guint8 length;
1380 guint32 *serial;
1381 guint8 status;
1382 gint32 register_id = -1;
1383
1384 main_item = proto_tree_add_item(tree, proto_ubertooth, tvb, offset, -1, ENC_NA);
1385 main_tree = proto_item_add_subtree(main_item, ett_ubertooth);
1386
1387 col_set_str(pinfo->cinfo, COL_PROTOCOL, "UBERTOOTH");
1388
1389 if (!usb_conv_info) return offset;
1390
1391 p2p_dir_save = pinfo->p2p_dir;
1392 pinfo->p2p_dir = (usb_conv_info->is_request) ? P2P_DIR_SENT : P2P_DIR_RECV;
1393
1394 switch (pinfo->p2p_dir) {
1395
1396 case P2P_DIR_SENT:
1397 col_add_str(pinfo->cinfo, COL_INFO, "Sent ");
1398 break;
1399
1400 case P2P_DIR_RECV:
1401 col_add_str(pinfo->cinfo, COL_INFO, "Rcvd ");
1402 break;
1403
1404 default:
1405 col_add_fstr(pinfo->cinfo, COL_INFO, "Unknown direction %d ",
1406 pinfo->p2p_dir);
1407 break;
1408 }
1409
1410 bus_id = usb_conv_info->bus_id;
1411 device_address = usb_conv_info->device_address;
1412
1413 k_bus_id = bus_id;
1414 k_device_address = device_address;
1415 k_frame_number = pinfo->num;
1416
1417 key[0].length = 1;
1418 key[0].key = &k_bus_id;
1419 key[1].length = 1;
1420 key[1].key = &k_device_address;
1421
1422
1423 if (usb_conv_info->is_setup) {
1424 proto_tree_add_item(main_tree, hf_command, tvb, offset, 1, ENC_NA);
1425 command = tvb_get_guint8(tvb, offset);
1426 offset += 1;
1427
1428 col_append_fstr(pinfo->cinfo, COL_INFO, "Command: %s",
1429 val_to_str_ext_const(command, &command_vals_ext, "Unknown"));
1430
1431 switch (command) {
1432 /* Group of commands with parameters by "setup" */
1433 case 1: /* Rx Symbols */
1434 case 4: /* Set User LED */
1435 case 6: /* Set Rx LED */
1436 case 8: /* Set Tx LED */
1437 case 10: /* Set 1V8 */
1438 case 12: /* Set Channel */
1439 case 17: /* Set PAEN */
1440 case 19: /* Set HGM */
1441 case 23: /* Set Modulation */
1442 case 29: /* Set Power Amplifier Level */
1443 case 34: /* LED Spectrum Analyzer */
1444 case 36: /* Set Squelch */
1445 case 42: /* BTLE Sniffing */
1446 case 48: /* Set CRC Verify */
1447 case 53: /* Read Register */
1448 case 58: /* Write Register */
1449 case 59: /* Jam Mode */
1450 case 60: /* Ego */
1451
1452 switch (command) {
1453 case 1: /* Rx Symbols */
1454 case 42: /* BTLE Sniffing */
1455 proto_tree_add_item(main_tree, hf_rx_packets, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1456 col_append_fstr(pinfo->cinfo, COL_INFO, " - Rx Packets: %u", tvb_get_letohs(tvb, offset));
1457 offset += 2;
1458
1459 break;
1460 case 4: /* Set User LED */
1461 proto_tree_add_item(main_tree, hf_user_led, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1462 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &led_state_vals_ext, "Unknown"));
1463 offset += 2;
1464
1465 break;
1466 case 6: /* Set Rx LED */
1467 proto_tree_add_item(main_tree, hf_rx_led, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1468 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &led_state_vals_ext, "Unknown"));
1469 offset += 2;
1470
1471 break;
1472 case 8: /* Set Tx LED */
1473 proto_tree_add_item(main_tree, hf_tx_led, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1474 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &led_state_vals_ext, "Unknown"));
1475 offset += 2;
1476
1477 break;
1478 case 10: /* Set 1V8 */
1479 proto_tree_add_item(main_tree, hf_1v8_led, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1480 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &led_state_vals_ext, "Unknown"));
1481 offset += 2;
1482
1483 break;
1484 case 12: /* Set Channel */
1485 proto_tree_add_item(main_tree, hf_channel, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1486 col_append_fstr(pinfo->cinfo, COL_INFO, " - %u MHz", tvb_get_letohs(tvb, offset));
1487 offset += 2;
1488
1489 break;
1490 case 17: /* Set PAEN */
1491 proto_tree_add_item(main_tree, hf_paen, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1492 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &state_vals_ext, "Unknown"));
1493 offset += 2;
1494
1495 break;
1496 case 19: /* Set HGM */
1497 proto_tree_add_item(main_tree, hf_hgm, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1498 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &state_vals_ext, "Unknown"));
1499 offset += 2;
1500
1501 break;
1502 case 23: /* Set Modulation */
1503 proto_tree_add_item(main_tree, hf_modulation, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1504 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &modulation_vals_ext, "Unknown"));
1505 offset += 2;
1506
1507 break;
1508 case 29: /* Set Power Amplifier Level */
1509 proto_tree_add_item(main_tree, hf_power_amplifier_reserved, tvb, offset, 1, ENC_NA);
1510 proto_tree_add_item(main_tree, hf_power_amplifier_level, tvb, offset, 1, ENC_NA);
1511 col_append_fstr(pinfo->cinfo, COL_INFO, " = %u", tvb_get_letohs(tvb, offset) & 0x7);
1512 offset += 1;
1513
1514 proto_tree_add_item(main_tree, hf_reserved, tvb, offset, 1, ENC_NA);
1515 offset += 1;
1516
1517 break;
1518 case 34: /* LED Spectrum Analyzer */
1519 proto_tree_add_item(main_tree, hf_rssi_threshold, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1520 col_append_fstr(pinfo->cinfo, COL_INFO, " = %i", tvb_get_letohis(tvb, offset));
1521 offset += 2;
1522
1523 break;
1524 case 36: /* Set Squelch */
1525 proto_tree_add_item(main_tree, hf_squelch, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1526 col_append_fstr(pinfo->cinfo, COL_INFO, " = %i", tvb_get_letohis(tvb, offset));
1527 offset += 2;
1528
1529 break;
1530 case 48: /* Set CRC Verify */
1531 proto_tree_add_item(main_tree, hf_crc_verify, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1532 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_ext_const(tvb_get_letohs(tvb, offset), &state_vals_ext, "Unknown"));
1533 offset += 2;
1534
1535 break;
1536 case 53: /* Read Register */
1537 sub_item = proto_tree_add_item(main_tree, hf_register, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1538 register_id = tvb_get_letohs(tvb, offset);
1539 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s",
1540 val_to_str_ext_const(register_id, ®ister_vals_ext, "Unknown"));
1541 if (try_val_to_str_ext(register_id, ®ister_vals_ext))
1542 proto_item_append_text(sub_item, " [%s]", val_to_str_ext_const(register_id, ®ister_description_vals_ext, "Unknown"));
1543 offset += 2;
1544
1545 break;
1546 case 58: /* Write Register */
1547 sub_item = proto_tree_add_item(main_tree, hf_register, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1548 register_id = tvb_get_letohs(tvb, offset);
1549 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s",
1550 val_to_str_ext_const(register_id, ®ister_vals_ext, "Unknown"));
1551 if (try_val_to_str_ext(register_id, ®ister_vals_ext))
1552 proto_item_append_text(sub_item, " [%s]", val_to_str_ext_const(register_id, ®ister_description_vals_ext, "Unknown"));
1553 offset += 2;
1554
1555 sub_item = proto_tree_add_item(main_tree, hf_register_value, tvb, offset, 2, ENC_BIG_ENDIAN);
1556 sub_tree = proto_item_add_subtree(sub_item, ett_register_value);
1557 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s: 0x%04x",
1558 val_to_str_ext_const(register_id, ®ister_vals_ext, "Unknown"),
1559 tvb_get_ntohs(tvb, offset));
1560
1561 dissect_cc2400_register(sub_tree, tvb, offset, register_id);
1562 offset += 2;
1563
1564 break;
1565 case 59: /* Jam Mode */
1566 proto_tree_add_item(main_tree, hf_jam_mode, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1567 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_const(tvb_get_letohs(tvb, offset), jam_mode_vals, "Unknown"));
1568 offset += 2;
1569
1570 break;
1571 case 60: /* Ego */
1572 proto_tree_add_item(main_tree, hf_ego_mode, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1573 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", val_to_str_const(tvb_get_letohs(tvb, offset), ego_mode_vals, "Unknown"));
1574 offset += 2;
1575
1576 break;
1577 default:
1578 proto_tree_add_item(main_tree, hf_argument_0, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1579 offset += 2;
1580 }
1581
1582 proto_tree_add_item(main_tree, hf_argument_1, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1583 offset += 2;
1584
1585 break;
1586 case 27: /* Spectrum Analyzer */
1587 proto_tree_add_item(main_tree, hf_low_frequency, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1588 offset += 2;
1589
1590 proto_tree_add_item(main_tree, hf_high_frequency, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1591 offset += 2;
1592
1593 col_append_fstr(pinfo->cinfo, COL_INFO, " - %u-%u MHz", tvb_get_letohs(tvb, offset - 4), tvb_get_letohs(tvb, offset - 2));
1594
1595 break;
1596 /* Group of commands with parameters by "data" but no "setup"*/
1597 case 38: /* Set BDADDR */
1598 case 39: /* Start Hopping */
1599 case 40: /* Set Clock */
1600 case 44: /* Set Access Address */
1601 case 51: /* Set AFH Map */
1602 case 54: /* BTLE Slave */
1603 /* Group of commands without any parameters */
1604 case 0: /* Ping */
1605 case 2: /* Tx Symbols */ /* NOTE: This one seems to be not implemented in firmware at all*/
1606 case 3: /* Get User LED */
1607 case 5: /* Get Rx LED */
1608 case 7: /* Get Tx LED */
1609 case 9: /* Get 1V8 */
1610 case 11: /* Get Channel */
1611 case 13: /* Reset */
1612 case 14: /* Get Microcontroller Serial Number */
1613 case 15: /* Get Microcontroller Part Number */
1614 case 16: /* Get PAEN */
1615 case 18: /* Get HGM */
1616 case 20: /* Tx Test */
1617 case 21: /* Stop */
1618 case 22: /* Get Modulation */
1619 case 24: /* Set ISP */
1620 case 25: /* Flash */
1621 case 26: /* Bootloader Flash */ /* NOTE: This one seems to be not implemented in firmware at all*/
1622 case 28: /* Get Power Amplifier Level */
1623 case 30: /* Repeater */
1624 case 31: /* Range Test */
1625 case 32: /* Range Check */
1626 case 33: /* Get Firmware Revision Number */
1627 case 35: /* Get Hardware Board ID */
1628 case 37: /* Get Squelch */
1629 case 41: /* Get Clock */
1630 case 43: /* Get Access Address */
1631 case 45: /* Do Something */
1632 case 46: /* Do Something Reply */
1633 case 47: /* Get CRC Verify */
1634 case 49: /* Poll */
1635 case 50: /* BTLE Promiscuous Mode */
1636 case 52: /* Clear AFH Map */
1637 case 55: /* Get Compile Info */
1638 default:
1639 proto_tree_add_item(main_tree, hf_argument_0, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1640 offset += 2;
1641
1642 proto_tree_add_item(main_tree, hf_argument_1, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1643 offset += 2;
1644 }
1645
1646 proto_tree_add_item(main_tree, hf_estimated_length, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1647 offset += 2;
1648
1649
1650 switch (command) {
1651 case 38: /* Set BDADDR */
1652 case 54: /* BTLE Slave */
1653 case 56: /* BTLE Set Target */
1654 proto_tree_add_item(main_tree, hf_bdaddr, tvb, offset, 6, ENC_NA);
1655 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s",
1656 tvb_get_ether_name(tvb, offset));
1657
1658 offset += 6;
1659 break;
1660 case 39: /* Start Hopping */
1661 proto_tree_add_item(main_tree, hf_clock_offset, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1662 col_append_fstr(pinfo->cinfo, COL_INFO, " - %u", tvb_get_letohl(tvb, offset));
1663
1664 offset += 4;
1665 break;
1666 case 40: /* Set Clock */
1667 proto_tree_add_item(main_tree, hf_clock_100ns, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1668 col_append_fstr(pinfo->cinfo, COL_INFO, " - %u", tvb_get_letohl(tvb, offset));
1669
1670 offset += 4;
1671 break;
1672 case 44: /* Set Access Address */
1673 proto_tree_add_item(main_tree, hf_access_address, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1674 col_append_fstr(pinfo->cinfo, COL_INFO, " - %08x", tvb_get_letohl(tvb, offset));
1675
1676 offset += 4;
1677 break;
1678 case 51: /* Set AFH Map */
1679 proto_tree_add_item(main_tree, hf_afh_map, tvb, offset, 10, ENC_NA);
1680 col_append_fstr(pinfo->cinfo, COL_INFO, " - %s", tvb_bytes_to_str(pinfo->pool, tvb, offset, 10));
1681
1682 offset += 10;
1683 break;
1684 }
1685
1686 if (tvb_reported_length_remaining(tvb, offset) > 0) {
1687 proto_tree_add_expert(main_tree, pinfo, &ei_unexpected_data, tvb, offset, tvb_captured_length_remaining(tvb, offset));
1688 offset = tvb_captured_length(tvb);
1689 }
1690
1691 /* Save request info (command_data) */
1692 if (!pinfo->fd->visited && command != 21) {
1693 key[2].length = 1;
1694 key[2].key = &k_frame_number;
1695 key[3].length = 0;
1696 key[3].key = NULL;
1697
1698 command_data = wmem_new(wmem_file_scope(), command_data_t);
1699 command_data->bus_id = bus_id;
1700 command_data->device_address = device_address;
1701
1702 command_data->command = command;
1703 command_data->command_frame_number = pinfo->num;
1704 command_data->register_id = register_id;
1705
1706 wmem_tree_insert32_array(command_info, key, command_data);
1707 }
1708
1709 pinfo->p2p_dir = p2p_dir_save;
1710
1711 return offset;
1712 }
1713
1714 /* Get request info (command_data) */
1715 key[2].length = 0;
1716 key[2].key = NULL;
1717
1718 wmem_tree = (wmem_tree_t *) wmem_tree_lookup32_array(command_info, key);
1719 if (wmem_tree) {
1720 command_data = (command_data_t *) wmem_tree_lookup32_le(wmem_tree, pinfo->num);
1721 if (command_data) {
1722 command_response = command_data->command;
1723 register_id = command_data->register_id;
1724 }
1725 }
1726
1727 if (!command_data) {
1728 col_append_str(pinfo->cinfo, COL_INFO, "Response: Unknown");
1729
1730 proto_tree_add_expert(main_tree, pinfo, &ei_unknown_data, tvb, offset, tvb_captured_length_remaining(tvb, offset));
1731
1732 pinfo->p2p_dir = p2p_dir_save;
1733
1734 return tvb_captured_length(tvb);
1735 }
1736
1737 col_append_fstr(pinfo->cinfo, COL_INFO, "Response: %s",
1738 val_to_str_ext_const(command_response, &command_vals_ext, "Unknown"));
1739
1740 command_item = proto_tree_add_uint(main_tree, hf_response, tvb, offset, 0, command_response);
1741 command_tree = proto_item_add_subtree(command_item, ett_command);
1742 proto_item_set_generated(command_item);
1743 switch (command_response) {
1744
1745 case 1: /* Rx Symbols */
1746 case 27: /* Spectrum Analyzer */
1747 if (usb_conv_info->transfer_type == URB_BULK) {
1748
1749 while (tvb_reported_length_remaining(tvb, offset) > 0) {
1750 offset = dissect_usb_rx_packet(tree, main_tree, pinfo, tvb, offset, command_response, usb_conv_info);
1751 }
1752 break;
1753 }
1754 /* FALLTHROUGH */
1755 case 0: /* Ping */
1756 case 2: /* Tx Symbols */ /* NOTE: This one seems to be not implemented in firmware at all*/
1757 case 26: /* Bootloader Flash */ /* NOTE: This one seems to be not implemented in firmware at all*/
1758 case 4: /* Set User LED */
1759 case 6: /* Set Rx LED */
1760 case 8: /* Set Tx LED */
1761 case 10: /* Set 1V8 */
1762 case 12: /* Set Channel */
1763 case 13: /* Reset */
1764 case 17: /* Set PAEN */
1765 case 19: /* Set HGM */
1766 case 20: /* Tx Test */
1767 case 21: /* Stop */
1768 case 29: /* Set Power Amplifier Level */
1769 case 30: /* Repeater */
1770 case 31: /* Range Test */
1771 case 23: /* Set Modulation */
1772 case 24: /* Set ISP */
1773 case 25: /* Flash */
1774 case 34: /* LED Spectrum Analyzer */
1775 case 36: /* Set Squelch */
1776 case 38: /* Set BDADDR */
1777 case 39: /* Start Hopping */
1778 case 40: /* Set Clock */
1779 case 42: /* BTLE Sniffing */
1780 case 44: /* Set Access Address */
1781 case 45: /* Do Something */
1782 case 48: /* Set CRC Verify */
1783 case 50: /* BTLE Promiscuous Mode */
1784 case 51: /* Set AFH Map */
1785 case 52: /* Clear AFH Map */
1786 case 54: /* BTLE Slave */
1787 case 56: /* BTLE Set Target */
1788 case 58: /* Write Register */
1789 proto_tree_add_expert(command_tree, pinfo, &ei_unexpected_response, tvb, offset, 0);
1790 if (tvb_reported_length_remaining(tvb, offset) > 0) {
1791 proto_tree_add_expert(main_tree, pinfo, &ei_unknown_data, tvb, offset, -1);
1792 offset = tvb_captured_length(tvb);
1793 }
1794 break;
1795 case 3: /* Get User LED */
1796 proto_tree_add_item(main_tree, hf_user_led, tvb, offset, 1, ENC_NA);
1797 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &led_state_vals_ext, "Unknown"));
1798 offset += 1;
1799
1800 break;
1801 case 5: /* Get Rx LED */
1802 proto_tree_add_item(main_tree, hf_rx_led, tvb, offset, 1, ENC_NA);
1803 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &led_state_vals_ext, "Unknown"));
1804 offset += 1;
1805
1806 break;
1807 case 7: /* Get Tx LED */
1808 proto_tree_add_item(main_tree, hf_tx_led, tvb, offset, 1, ENC_NA);
1809 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &led_state_vals_ext, "Unknown"));
1810 offset += 1;
1811
1812 break;
1813 case 9: /* Get 1V8 */
1814 proto_tree_add_item(main_tree, hf_1v8_led, tvb, offset, 1, ENC_NA);
1815 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &led_state_vals_ext, "Unknown"));
1816 offset += 1;
1817
1818 break;
1819 case 11: /* Get Channel */
1820 proto_tree_add_item(main_tree, hf_channel, tvb, offset, 2, ENC_LITTLE_ENDIAN);
1821 col_append_fstr(pinfo->cinfo, COL_INFO, " = %u MHz", tvb_get_letohs(tvb, offset));
1822 offset += 2;
1823
1824 break;
1825 case 14: /* Get Microcontroller Serial Number */
1826 proto_tree_add_item(main_tree, hf_status, tvb, offset, 1, ENC_NA);
1827 status = tvb_get_guint8(tvb, offset);
1828 offset += 1;
1829
1830 if (status) break;
1831
1832 serial = (guint32 *) wmem_alloc(pinfo->pool, 16);
1833 serial[0] = tvb_get_ntohl(tvb, offset);
1834 serial[1] = tvb_get_ntohl(tvb, offset + 4);
1835 serial[2] = tvb_get_ntohl(tvb, offset + 8);
1836 serial[3] = tvb_get_ntohl(tvb, offset + 12);
1837
1838 proto_tree_add_bytes(main_tree, hf_serial_number, tvb,
1839 offset, 16, (guint8 *) serial);
1840 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s",
1841 bytes_to_str(pinfo->pool, (guint8 *) serial, 16));
1842 offset += 16;
1843
1844 break;
1845 case 15: /* Get Microcontroller Part Number */
1846 proto_tree_add_item(main_tree, hf_status, tvb, offset, 1, ENC_NA);
1847 status = tvb_get_guint8(tvb, offset);
1848 offset += 1;
1849
1850 if (status) break;
1851
1852 proto_tree_add_item(main_tree, hf_part_number, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1853 col_append_fstr(pinfo->cinfo, COL_INFO, " = %08X", tvb_get_letohl(tvb, offset));
1854 offset += 4;
1855
1856 break;
1857 case 16: /* Get PAEN */
1858 proto_tree_add_item(main_tree, hf_paen, tvb, offset, 1, ENC_NA);
1859 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &state_vals_ext, "Unknown"));
1860 offset += 1;
1861
1862 break;
1863 case 18: /* Get HGM */
1864 proto_tree_add_item(main_tree, hf_hgm, tvb, offset, 1, ENC_NA);
1865 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &state_vals_ext, "Unknown"));
1866 offset += 1;
1867
1868 break;
1869 case 22: /* Get Modulation */
1870 proto_tree_add_item(main_tree, hf_modulation, tvb, offset, 1, ENC_NA);
1871 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &modulation_vals_ext, "Unknown"));
1872 offset += 1;
1873
1874 break;
1875 case 28: /* Get Power Amplifier Level */
1876 proto_tree_add_item(main_tree, hf_power_amplifier_reserved, tvb, offset, 1, ENC_NA);
1877 proto_tree_add_item(main_tree, hf_power_amplifier_level, tvb, offset, 1, ENC_NA);
1878 col_append_fstr(pinfo->cinfo, COL_INFO, " = %u", tvb_get_guint8(tvb, offset) & 0x7);
1879 offset += 1;
1880
1881 break;
1882 case 32: /* Range Check */
1883 proto_tree_add_item(main_tree, hf_range_test_valid, tvb, offset, 1, ENC_NA);
1884 offset += 1;
1885
1886 proto_tree_add_item(main_tree, hf_range_test_request_power_amplifier, tvb, offset, 1, ENC_NA);
1887 offset += 1;
1888
1889 proto_tree_add_item(main_tree, hf_range_test_request_number, tvb, offset, 1, ENC_NA);
1890 offset += 1;
1891
1892 proto_tree_add_item(main_tree, hf_range_test_reply_power_amplifier, tvb, offset, 1, ENC_NA);
1893 offset += 1;
1894
1895 proto_tree_add_item(main_tree, hf_range_test_reply_number, tvb, offset, 1, ENC_NA);
1896 offset += 1;
1897
1898 break;
1899 case 33: /* Get Firmware Revision Number */
1900 {
1901 const guint8* firmware;
1902 proto_tree_add_item(main_tree, hf_reserved, tvb, offset, 2, ENC_NA);
1903 offset += 2;
1904
1905 proto_tree_add_item(main_tree, hf_length, tvb, offset, 1, ENC_NA);
1906 length = tvb_get_guint8(tvb, offset);
1907 offset += 1;
1908
1909 proto_tree_add_item_ret_string(main_tree, hf_firmware_revision, tvb, offset, length, ENC_NA | ENC_ASCII, pinfo->pool, &firmware);
1910 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", firmware);
1911 offset += length;
1912 }
1913 break;
1914 case 35: /* Get Hardware Board ID */
1915 proto_tree_add_item(main_tree, hf_board_id, tvb, offset, 1, ENC_NA);
1916 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &board_id_vals_ext, "Unknown"));
1917 offset += 1;
1918
1919 break;
1920 case 37: /* Get Squelch */
1921 proto_tree_add_item(main_tree, hf_squelch, tvb, offset, 1, ENC_NA);
1922 col_append_fstr(pinfo->cinfo, COL_INFO, " = %i", tvb_get_gint8(tvb, offset));
1923 offset += 1;
1924
1925 break;
1926 case 41: /* Get Clock */
1927 proto_tree_add_item(main_tree, hf_clock_ns, tvb, offset, 1, ENC_NA);
1928 col_append_fstr(pinfo->cinfo, COL_INFO, " = %u", tvb_get_guint8(tvb, offset));
1929 offset += 1;
1930
1931 break;
1932 case 43: /* Get Access Address */
1933 proto_tree_add_item(main_tree, hf_access_address, tvb, offset, 4, ENC_LITTLE_ENDIAN);
1934 col_append_fstr(pinfo->cinfo, COL_INFO, " = %08x", tvb_get_letohl(tvb, offset));
1935 offset += 4;
1936
1937 break;
1938 case 46: /* Do Something Reply */
1939 proto_tree_add_item(main_tree, hf_reserved, tvb, offset, 2, ENC_NA);
1940 offset += 2;
1941
1942 break;
1943 case 47: /* Get CRC Verify */
1944 proto_tree_add_item(main_tree, hf_crc_verify, tvb, offset, 1, ENC_NA);
1945 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", val_to_str_ext_const(tvb_get_guint8(tvb, offset), &state_vals_ext, "Unknown"));
1946 offset += 1;
1947
1948 break;
1949 case 49: /* Poll */
1950 case 59: /* Jam Mode */
1951 case 60: /* Ego */
1952 if (tvb_reported_length_remaining(tvb, offset) == 1) {
1953 proto_tree_add_item(main_tree, hf_reserved, tvb, offset, 1, ENC_NA);
1954 offset += 1;
1955 break;
1956 }
1957
1958 offset = dissect_usb_rx_packet(tree, main_tree, pinfo, tvb, offset, command_response, usb_conv_info);
1959
1960 break;
1961 case 53: /* Read Register */
1962 sub_item = proto_tree_add_uint(main_tree, hf_register, tvb, offset, 0, register_id);
1963 proto_item_set_generated(sub_item);
1964 if (try_val_to_str_ext(register_id, ®ister_vals_ext))
1965 proto_item_append_text(sub_item, " [%s]", val_to_str_ext_const(register_id, ®ister_description_vals_ext, "Unknown"));
1966
1967
1968 sub_item = proto_tree_add_item(main_tree, hf_register_value, tvb, offset, 2, ENC_BIG_ENDIAN);
1969 sub_tree = proto_item_add_subtree(sub_item, ett_register_value);
1970 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s: 0x%04x",
1971 val_to_str_ext_const(register_id, ®ister_vals_ext, "Unknown"),
1972 tvb_get_ntohs(tvb, offset));
1973
1974 dissect_cc2400_register(sub_tree, tvb, offset, register_id);
1975 offset += 2;
1976
1977 break;
1978 case 55: /* Get Compile Info */
1979 {
1980 const guint8* compile;
1981 proto_tree_add_item(main_tree, hf_length, tvb, offset, 1, ENC_NA);
1982 length = tvb_get_guint8(tvb, offset);
1983 offset += 1;
1984
1985 proto_tree_add_item_ret_string(main_tree, hf_firmware_compile_info, tvb, offset, length, ENC_NA | ENC_ASCII, pinfo->pool, &compile);
1986 col_append_fstr(pinfo->cinfo, COL_INFO, " = %s", compile);
1987 offset += length;
1988 }
1989 break;
1990 }
1991
1992 if (tvb_reported_length_remaining(tvb, offset) > 0) {
1993 proto_tree_add_expert(main_tree, pinfo, &ei_unknown_data, tvb, offset, -1);
1994 offset = tvb_captured_length(tvb);
1995 }
1996
1997 pinfo->p2p_dir = p2p_dir_save;
1998
1999 return offset;
2000 }
2001
2002 void
proto_register_ubertooth(void)2003 proto_register_ubertooth(void)
2004 {
2005 module_t *module;
2006 expert_module_t *expert_module;
2007
2008 static hf_register_info hf[] = {
2009 { &hf_command,
2010 { "Command", "ubertooth.command",
2011 FT_UINT8, BASE_DEC | BASE_EXT_STRING, &command_vals_ext, 0x00,
2012 NULL, HFILL }
2013 },
2014 { &hf_response,
2015 { "Response", "ubertooth.response",
2016 FT_UINT8, BASE_DEC | BASE_EXT_STRING, &command_vals_ext, 0x00,
2017 NULL, HFILL }
2018 },
2019 { &hf_argument_0,
2020 { "Unused Argument 0", "ubertooth.argument.0",
2021 FT_UINT16, BASE_HEX, NULL, 0x00,
2022 NULL, HFILL }
2023 },
2024 { &hf_argument_1,
2025 { "Unused Argument 1", "ubertooth.argument.1",
2026 FT_UINT16, BASE_HEX, NULL, 0x00,
2027 NULL, HFILL }
2028 },
2029 { &hf_estimated_length,
2030 { "Estimated Length", "ubertooth.estimated_length",
2031 FT_UINT16, BASE_DEC, NULL, 0x00,
2032 NULL, HFILL }
2033 },
2034 { &hf_board_id,
2035 { "Board ID", "ubertooth.board_id",
2036 FT_UINT8, BASE_HEX | BASE_EXT_STRING, &board_id_vals_ext, 0x00,
2037 NULL, HFILL }
2038 },
2039 { &hf_reserved,
2040 { "Reserved", "ubertooth.reserved",
2041 FT_BYTES, BASE_NONE, NULL, 0x00,
2042 NULL, HFILL }
2043 },
2044 { &hf_length,
2045 { "Length", "ubertooth.length",
2046 FT_UINT8, BASE_DEC, NULL, 0x00,
2047 NULL, HFILL }
2048 },
2049 { &hf_firmware_revision,
2050 { "Firmware Revision", "ubertooth.firmware.reversion",
2051 FT_STRING, BASE_NONE, NULL, 0x00,
2052 NULL, HFILL }
2053 },
2054 { &hf_firmware_compile_info,
2055 { "Firmware Compile Info", "ubertooth.firmware.compile_info",
2056 FT_STRING, BASE_NONE, NULL, 0x00,
2057 NULL, HFILL }
2058 },
2059 { &hf_user_led,
2060 { "User LED State", "ubertooth.user_led",
2061 FT_UINT16, BASE_HEX | BASE_EXT_STRING, &led_state_vals_ext, 0x00,
2062 NULL, HFILL }
2063 },
2064 { &hf_rx_led,
2065 { "Rx LED State", "ubertooth.rx_led",
2066 FT_UINT16, BASE_HEX | BASE_EXT_STRING, &led_state_vals_ext, 0x00,
2067 NULL, HFILL }
2068 },
2069 { &hf_tx_led,
2070 { "Tx LED State", "ubertooth.tx_led",
2071 FT_UINT16, BASE_HEX | BASE_EXT_STRING, &led_state_vals_ext, 0x00,
2072 NULL, HFILL }
2073 },
2074 { &hf_1v8_led,
2075 { "1V8 LED State", "ubertooth.1v8_led",
2076 FT_UINT16, BASE_HEX | BASE_EXT_STRING, &led_state_vals_ext, 0x00,
2077 NULL, HFILL }
2078 },
2079 { &hf_channel,
2080 { "Channel", "ubertooth.channel",
2081 FT_UINT16, BASE_DEC, NULL, 0x00,
2082 NULL, HFILL }
2083 },
2084 { &hf_usb_rx_packet_channel,
2085 { "Channel", "ubertooth.usb_rx_packet.channel",
2086 FT_UINT8, BASE_DEC, NULL, 0x00,
2087 NULL, HFILL }
2088 },
2089 { &hf_serial_number,
2090 { "Serial Number", "ubertooth.serial_number",
2091 FT_BYTES, BASE_NONE, NULL, 0x00,
2092 NULL, HFILL }
2093 },
2094 { &hf_status,
2095 { "Status", "ubertooth.status",
2096 FT_UINT8, BASE_HEX, NULL, 0x00,
2097 NULL, HFILL }
2098 },
2099 { &hf_part_number,
2100 { "Part Number", "ubertooth.part_number",
2101 FT_UINT32, BASE_HEX, NULL, 0x00,
2102 NULL, HFILL }
2103 },
2104 { &hf_packet_type,
2105 { "Packet Type", "ubertooth.packet_type",
2106 FT_UINT8, BASE_HEX | BASE_EXT_STRING, &packet_type_vals_ext, 0x00,
2107 NULL, HFILL }
2108 },
2109 { &hf_state,
2110 { "State", "ubertooth.state",
2111 FT_UINT8, BASE_HEX, VALS(usb_rx_packet_state_vals), 0x00,
2112 NULL, HFILL }
2113 },
2114 { &hf_crc_init,
2115 { "CRC Init", "ubertooth.crc_init",
2116 FT_UINT24, BASE_HEX, NULL, 0x00,
2117 NULL, HFILL }
2118 },
2119 { &hf_hop_interval,
2120 { "Hop Interval", "ubertooth.hop_interval",
2121 FT_UINT16, BASE_DEC, NULL, 0x00,
2122 "Hop Interval in unit 1.25ms", HFILL }
2123 },
2124 { &hf_hop_increment,
2125 { "Hop Increment", "ubertooth.hop_increment",
2126 FT_UINT8, BASE_DEC, NULL, 0x00,
2127 NULL, HFILL }
2128 },
2129 { &hf_chip_status_reserved,
2130 { "Reserved", "ubertooth.status.reserved",
2131 FT_BOOLEAN, 8, NULL, 0xE0,
2132 NULL, HFILL }
2133 },
2134 { &hf_chip_status_rssi_trigger,
2135 { "RSSI Trigger", "ubertooth.status.rssi_trigger",
2136 FT_BOOLEAN, 8, NULL, 0x10,
2137 NULL, HFILL }
2138 },
2139 { &hf_chip_status_cs_trigger,
2140 { "CS Trigger", "ubertooth.status.cs_trigger",
2141 FT_BOOLEAN, 8, NULL, 0x08,
2142 NULL, HFILL }
2143 },
2144 { &hf_chip_status_fifo_overflow,
2145 { "FIFO Overflow", "ubertooth.status.fifo_overflow",
2146 FT_BOOLEAN, 8, NULL, 0x04,
2147 NULL, HFILL }
2148 },
2149 { &hf_chip_status_dma_error,
2150 { "DMA Error", "ubertooth.status.dma_error",
2151 FT_BOOLEAN, 8, NULL, 0x02,
2152 NULL, HFILL }
2153 },
2154 { &hf_chip_status_dma_overflow,
2155 { "DMA Overflow", "ubertooth.status.dma_overflow",
2156 FT_BOOLEAN, 8, NULL, 0x01,
2157 NULL, HFILL }
2158 },
2159 { &hf_clock_ns,
2160 { "Clock 1ns", "ubertooth.clock_ns",
2161 FT_UINT8, BASE_DEC, NULL, 0x00,
2162 NULL, HFILL }
2163 },
2164 { &hf_clock_100ns,
2165 { "Clock 100ns", "ubertooth.clock_100ns",
2166 FT_UINT32, BASE_DEC, NULL, 0x00,
2167 NULL, HFILL }
2168 },
2169 { &hf_rssi_min,
2170 { "RSSI Min", "ubertooth.rssi_min",
2171 FT_INT8, BASE_DEC, NULL, 0x00,
2172 NULL, HFILL }
2173 },
2174 { &hf_rssi_max,
2175 { "RSSI Max", "ubertooth.rssi_max",
2176 FT_INT8, BASE_DEC, NULL, 0x00,
2177 NULL, HFILL }
2178 },
2179 { &hf_rssi_avg,
2180 { "RSSI Avg", "ubertooth.rssi_avg",
2181 FT_INT8, BASE_DEC, NULL, 0x00,
2182 NULL, HFILL }
2183 },
2184 { &hf_rssi_count,
2185 { "RSSI Count", "ubertooth.rssi_count",
2186 FT_UINT8, BASE_DEC, NULL, 0x00,
2187 NULL, HFILL }
2188 },
2189 { &hf_paen,
2190 { "PAEN", "ubertooth.paen",
2191 FT_UINT16, BASE_HEX | BASE_EXT_STRING, &state_vals_ext, 0x00,
2192 NULL, HFILL }
2193 },
2194 { &hf_hgm,
2195 { "HGM", "ubertooth.hgm",
2196 FT_UINT16, BASE_HEX | BASE_EXT_STRING, &state_vals_ext, 0x00,
2197 NULL, HFILL }
2198 },
2199 { &hf_crc_verify,
2200 { "CRC Verify", "ubertooth.crc_verify",
2201 FT_UINT16, BASE_HEX | BASE_EXT_STRING, &state_vals_ext, 0x00,
2202 NULL, HFILL }
2203 },
2204 { &hf_modulation,
2205 { "Modulation", "ubertooth.modulation",
2206 FT_UINT16, BASE_HEX | BASE_EXT_STRING, &modulation_vals_ext, 0x00,
2207 NULL, HFILL }
2208 },
2209 { &hf_power_amplifier_reserved,
2210 { "Reserved", "ubertooth.power_amplifier.reserved",
2211 FT_UINT8, BASE_HEX, NULL, 0xF8,
2212 NULL, HFILL }
2213 },
2214 { &hf_power_amplifier_level,
2215 { "Level", "ubertooth.power_amplifier.level",
2216 FT_UINT8, BASE_DEC, NULL, 0x07,
2217 NULL, HFILL }
2218 },
2219 { &hf_range_test_valid,
2220 { "Valid", "ubertooth.range_test.valid",
2221 FT_UINT8, BASE_DEC, NULL, 0x00,
2222 NULL, HFILL }
2223 },
2224 { &hf_range_test_request_power_amplifier,
2225 { "Request Power Amplifier", "ubertooth.range_test.request_power_amplifier",
2226 FT_UINT8, BASE_DEC, NULL, 0x00,
2227 NULL, HFILL }
2228 },
2229 { &hf_range_test_request_number,
2230 { "Request Power Amplifier", "ubertooth.range_test.request_number",
2231 FT_UINT8, BASE_DEC, NULL, 0x00,
2232 NULL, HFILL }
2233 },
2234 { &hf_range_test_reply_power_amplifier,
2235 { "Request Power Amplifier", "ubertooth.range_test.reply_power_amplifier",
2236 FT_UINT8, BASE_DEC, NULL, 0x00,
2237 NULL, HFILL }
2238 },
2239 { &hf_range_test_reply_number,
2240 { "Reply Power Amplifier", "ubertooth.range_test.reply_number",
2241 FT_UINT8, BASE_DEC, NULL, 0x00,
2242 NULL, HFILL }
2243 },
2244 { &hf_squelch,
2245 { "Squelch", "ubertooth.squelch",
2246 FT_INT16, BASE_DEC, NULL, 0x00,
2247 NULL, HFILL }
2248 },
2249 { &hf_access_address,
2250 { "Access Address", "ubertooth.access_address",
2251 FT_UINT32, BASE_HEX, NULL, 0x00,
2252 NULL, HFILL }
2253 },
2254 { &hf_jam_mode,
2255 { "Jam Mode", "ubertooth.jam_mode",
2256 FT_UINT16, BASE_HEX, VALS(jam_mode_vals), 0x00,
2257 NULL, HFILL }
2258 },
2259 { &hf_ego_mode,
2260 { "Ego Mode", "ubertooth.ego_mode",
2261 FT_UINT16, BASE_HEX, VALS(ego_mode_vals), 0x00,
2262 NULL, HFILL }
2263 },
2264 { &hf_register,
2265 { "Register", "ubertooth.register",
2266 FT_UINT16, BASE_HEX | BASE_EXT_STRING, ®ister_vals_ext, 0x00,
2267 NULL, HFILL }
2268 },
2269 { &hf_register_value,
2270 { "Register Value", "ubertooth.register.value",
2271 FT_UINT16, BASE_HEX, NULL, 0x00,
2272 NULL, HFILL }
2273 },
2274 { &hf_low_frequency,
2275 { "Low Frequency", "ubertooth.low_frequency",
2276 FT_UINT16, BASE_DEC, NULL, 0x00,
2277 NULL, HFILL }
2278 },
2279 { &hf_high_frequency,
2280 { "High Frequency", "ubertooth.high_frequency",
2281 FT_UINT16, BASE_DEC, NULL, 0x00,
2282 NULL, HFILL }
2283 },
2284 { &hf_rx_packets,
2285 { "Rx Packets", "ubertooth.rx_packets",
2286 FT_UINT16, BASE_DEC, NULL, 0x00,
2287 NULL, HFILL }
2288 },
2289 { &hf_rssi_threshold,
2290 { "RSSI Threshold", "ubertooth.rssi_threshold",
2291 FT_INT16, BASE_DEC, NULL, 0x00,
2292 NULL, HFILL }
2293 },
2294 { &hf_clock_offset,
2295 { "Clock Offset", "ubertooth.clock_offset",
2296 FT_UINT32, BASE_DEC, NULL, 0x00,
2297 NULL, HFILL }
2298 },
2299 { &hf_afh_map,
2300 { "AFH Map", "ubertooth.afh_map",
2301 FT_BYTES, BASE_NONE, NULL, 0x00,
2302 NULL, HFILL }
2303 },
2304 { &hf_bdaddr,
2305 { "BD_ADDR", "ubertooth.bd_addr",
2306 FT_ETHER, BASE_NONE, NULL, 0x0,
2307 "Bluetooth Device Address", HFILL}
2308 },
2309 { &hf_usb_rx_packet,
2310 { "USB Rx Packet", "ubertooth.usb_rx_packet",
2311 FT_NONE, BASE_NONE, NULL, 0x00,
2312 NULL, HFILL }
2313 },
2314 { &hf_spectrum_entry,
2315 { "Spectrum Entry", "ubertooth.spectrum_entry",
2316 FT_NONE, BASE_NONE, NULL, 0x00,
2317 NULL, HFILL }
2318 },
2319 { &hf_frequency,
2320 { "Frequency", "ubertooth.spectrum_entry.frequency",
2321 FT_UINT16, BASE_DEC, NULL, 0x00,
2322 NULL, HFILL }
2323 },
2324 { &hf_rssi,
2325 { "RSSI", "ubertooth.spectrum_entry.rssi",
2326 FT_INT8, BASE_DEC, NULL, 0x00,
2327 NULL, HFILL }
2328 },
2329 { &hf_data,
2330 { "Data", "ubertooth.data",
2331 FT_NONE, BASE_NONE, NULL, 0x00,
2332 NULL, HFILL }
2333 },
2334 { &hf_cc2400_value,
2335 { "Value", "ubertooth.register.value",
2336 FT_UINT16, BASE_HEX_DEC, NULL, 0xFFFF,
2337 NULL, HFILL }
2338 },
2339 { &hf_cc2400_syncl,
2340 { "Synchronisation Word, lower 16 bit", "ubertooth.register.value.syncl",
2341 FT_UINT16, BASE_HEX, NULL, 0x00,
2342 NULL, HFILL }
2343 },
2344 { &hf_cc2400_synch,
2345 { "Synchronisation Word, upper 16 bit", "ubertooth.register.value.synch",
2346 FT_UINT16, BASE_HEX, NULL, 0x00,
2347 NULL, HFILL }
2348 },
2349 { &hf_cc2400_reserved_0x2B_res_15_14,
2350 { "Reserved [15:14]", "ubertooth.register.value.reserved.0x2B.15_14",
2351 FT_UINT16, BASE_DEC, NULL, 0xC000,
2352 NULL, HFILL }
2353 },
2354 { &hf_cc2400_reserved_0x2B_res_13,
2355 { "Reserved [13]", "ubertooth.register.value.reserved.0x2B.13",
2356 FT_BOOLEAN, 16, NULL, 0x2000,
2357 NULL, HFILL }
2358 },
2359 { &hf_cc2400_reserved_0x2B_res_12,
2360 { "Reserved [12]", "ubertooth.register.value.reserved.0x2B.12",
2361 FT_BOOLEAN, 16, NULL, 0x1000,
2362 NULL, HFILL }
2363 },
2364 { &hf_cc2400_reserved_0x2B_res_11_0,
2365 { "Reserved [11:0]", "ubertooth.register.value.reserved.0x2B.11_0",
2366 FT_UINT16, BASE_DEC, NULL, 0x0FFF,
2367 NULL, HFILL }
2368 },
2369 { &hf_cc2400_reserved_0x2A_res_15_11,
2370 { "Reserved [15:11]", "ubertooth.register.value.reserved.0x2A.15_11",
2371 FT_UINT16, BASE_DEC, NULL, 0xF800,
2372 NULL, HFILL }
2373 },
2374 { &hf_cc2400_reserved_0x2A_res_10,
2375 { "Reserved [10]", "ubertooth.register.value.reserved.0x2A.10",
2376 FT_BOOLEAN, 16, NULL, 0x0400,
2377 NULL, HFILL }
2378 },
2379 { &hf_cc2400_reserved_0x2A_res_9_0,
2380 { "Reserved [9:0]", "ubertooth.register.value.reserved.0x2A.9_0",
2381 FT_UINT16, BASE_DEC, NULL, 0x03FF,
2382 NULL, HFILL }
2383 },
2384 { &hf_cc2400_reserved_0x29_res_15_8,
2385 { "Reserved [15:8]", "ubertooth.register.value.reserved.0x29.15_8",
2386 FT_UINT16, BASE_DEC, NULL, 0xFF00,
2387 NULL, HFILL }
2388 },
2389 { &hf_cc2400_reserved_0x29_res_7_3,
2390 { "Reserved [7:3]", "ubertooth.register.value.reserved.0x29.7_3",
2391 FT_UINT16, BASE_DEC, NULL, 0x00F8,
2392 NULL, HFILL }
2393 },
2394 { &hf_cc2400_reserved_0x29_res_2_0,
2395 { "Reserved [2:0]", "ubertooth.register.value.reserved.0x29.2_0",
2396 FT_UINT16, BASE_DEC, NULL, 0x0007,
2397 NULL, HFILL }
2398 },
2399 { &hf_cc2400_reserved_0x28_res_15,
2400 { "Reserved [15]", "ubertooth.register.value.reserved.0x28.15",
2401 FT_BOOLEAN, 16, NULL, 0x8000,
2402 NULL, HFILL }
2403 },
2404 { &hf_cc2400_reserved_0x28_res_14_13,
2405 { "Reserved [14:13]", "ubertooth.register.value.reserved.0x28.14_13",
2406 FT_UINT16, BASE_DEC, NULL, 0x6000,
2407 NULL, HFILL }
2408 },
2409 { &hf_cc2400_reserved_0x28_res_12_7,
2410 { "Reserved [12:7]", "ubertooth.register.value.reserved.0x28.12_7",
2411 FT_UINT16, BASE_DEC, NULL, 0x1F80,
2412 NULL, HFILL }
2413 },
2414 { &hf_cc2400_reserved_0x28_res_6_0,
2415 { "Reserved [6:0]", "ubertooth.register.value.reserved.0x28.6_0",
2416 FT_UINT16, BASE_DEC, NULL, 0x007F,
2417 NULL, HFILL }
2418 },
2419 { &hf_cc2400_reserved_0x27_res_15_8,
2420 { "Reserved [15:8]", "ubertooth.register.value.reserved.0x27.15_8",
2421 FT_UINT16, BASE_DEC, NULL, 0xFF00,
2422 NULL, HFILL }
2423 },
2424 { &hf_cc2400_reserved_0x27_res_7_3,
2425 { "Reserved [7:3]", "ubertooth.register.value.reserved.0x27.7_3",
2426 FT_UINT16, BASE_DEC, NULL, 0x00F8,
2427 NULL, HFILL }
2428 },
2429 { &hf_cc2400_reserved_0x27_res_2_0,
2430 { "Reserved [2:0]", "ubertooth.register.value.reserved.0x27.2_0",
2431 FT_UINT16, BASE_DEC, NULL, 0x0007,
2432 NULL, HFILL }
2433 },
2434 { &hf_cc2400_reserved_0x26_res_15_10,
2435 { "Reserved [15:10]", "ubertooth.register.value.reserved.0x26.15_10",
2436 FT_UINT16, BASE_DEC, NULL, 0xFC00,
2437 NULL, HFILL }
2438 },
2439 { &hf_cc2400_reserved_0x26_res_9_0,
2440 { "Reserved [9:0]", "ubertooth.register.value.reserved.0x26.9_0",
2441 FT_UINT16, BASE_DEC, NULL, 0x03FF,
2442 NULL, HFILL }
2443 },
2444
2445 { &hf_cc2400_reserved_0x25_res_15_12,
2446 { "Reserved [15:12]", "ubertooth.register.value.reserved.0x25.15_12",
2447 FT_UINT16, BASE_DEC, NULL, 0xF000,
2448 NULL, HFILL }
2449 },
2450 { &hf_cc2400_reserved_0x25_res_11_0,
2451 { "Reserved [11:0]", "ubertooth.register.value.reserved.0x25.11_0",
2452 FT_UINT16, BASE_DEC, NULL, 0x0FFF,
2453 NULL, HFILL }
2454 },
2455 { &hf_cc2400_reserved_0x24_res_15_14,
2456 { "Reserved [15:14]", "ubertooth.register.value.reserved.0x24.15_14",
2457 FT_UINT16, BASE_DEC, NULL, 0xC000,
2458 NULL, HFILL }
2459 },
2460 { &hf_cc2400_reserved_0x24_res_13_10,
2461 { "Reserved [13:10]", "ubertooth.register.value.reserved.0x24.13_10",
2462 FT_UINT16, BASE_DEC, NULL, 0x3C00,
2463 NULL, HFILL }
2464 },
2465 { &hf_cc2400_reserved_0x24_res_9_7,
2466 { "Reserved [9:7]", "ubertooth.register.value.reserved.0x24.9_7",
2467 FT_UINT16, BASE_DEC, NULL, 0x0380,
2468 NULL, HFILL }
2469 },
2470 { &hf_cc2400_reserved_0x24_res_6_0,
2471 { "Reserved [6:0]", "ubertooth.register.value.reserved.0x24.6_0",
2472 FT_UINT16, BASE_DEC, NULL, 0x007F,
2473 NULL, HFILL }
2474 },
2475 { &hf_cc2400_int_reserved_15_8,
2476 { "Reserved [15:8]", "ubertooth.register.value.int.reserved.15_8",
2477 FT_UINT16, BASE_DEC, NULL, 0xFF00,
2478 NULL, HFILL }
2479 },
2480 { &hf_cc2400_int_reserved_7,
2481 { "Reserved [7]", "ubertooth.register.value.int.reserved.7",
2482 FT_BOOLEAN, 16, NULL, 0x0080,
2483 NULL, HFILL }
2484 },
2485 { &hf_cc2400_int_pkt_polarity,
2486 { "PKT Polarity", "ubertooth.register.value.int.pkt_polarity",
2487 FT_BOOLEAN, 16, NULL, 0x0040,
2488 NULL, HFILL }
2489 },
2490 { &hf_cc2400_int_fifo_polarity,
2491 { "FIFO Polarity", "ubertooth.register.value.int.fifo_polarity",
2492 FT_BOOLEAN, 16, NULL, 0x0020,
2493 NULL, HFILL }
2494 },
2495 { &hf_cc2400_int_fifo_threshold,
2496 { "FIFO Threshold", "ubertooth.register.value.int.fifo_threshold",
2497 FT_UINT16, BASE_DEC, NULL, 0x001F,
2498 NULL, HFILL }
2499 },
2500 { &hf_cc2400_main_resetn,
2501 { "Reset N", "ubertooth.register.value.main.resetn",
2502 FT_BOOLEAN, 16, NULL, 0x8000,
2503 NULL, HFILL }
2504 },
2505 { &hf_cc2400_main_reserved_14_10,
2506 { "Reserved [14:10]", "ubertooth.register.value.main.reserved.14_10",
2507 FT_UINT16, BASE_DEC, NULL, 0x7C00,
2508 NULL, HFILL }
2509 },
2510 { &hf_cc2400_main_fs_force_en,
2511 { "Forces Frequency Synthesiser", "ubertooth.register.value.main.fs_force_en",
2512 FT_BOOLEAN, 16, NULL, 0x0200,
2513 NULL, HFILL }
2514 },
2515 { &hf_cc2400_main_rxn_tx,
2516 { "RxN Tx", "ubertooth.register.value.main.rxn_tx",
2517 FT_BOOLEAN, 16, NULL, 0x0100,
2518 NULL, HFILL }
2519 },
2520 { &hf_cc2400_main_reserved_7_4,
2521 { "Reserved [7:4]", "ubertooth.register.value.main.reserved.7_4",
2522 FT_UINT16, BASE_DEC, NULL, 0x00F0,
2523 NULL, HFILL }
2524 },
2525 { &hf_cc2400_main_reserved_3,
2526 { "Reserved [3]", "ubertooth.register.value.main.reserved.3",
2527 FT_BOOLEAN, 16, NULL, 0x0008,
2528 NULL, HFILL }
2529 },
2530 { &hf_cc2400_main_reserved_2,
2531 { "Reserved [2]", "ubertooth.register.value.main.reserved.2",
2532 FT_BOOLEAN, 16, NULL, 0x0004,
2533 NULL, HFILL }
2534 },
2535 { &hf_cc2400_main_xosc16m_bypass,
2536 { "Bypass 16 MHz Crystal Oscillator", "ubertooth.register.value.main.xosc16m_bypass",
2537 FT_BOOLEAN, 16, NULL, 0x0002,
2538 NULL, HFILL }
2539 },
2540 { &hf_cc2400_main_xosc16m_en,
2541 { "Force 16 MHz Crystal Oscillator", "ubertooth.register.value.main.xosc16m_en",
2542 FT_BOOLEAN, 16, NULL, 0x0001,
2543 NULL, HFILL }
2544 },
2545 { &hf_cc2400_fsctrl_reserved,
2546 { "Reserved [15:6]", "ubertooth.register.value.fsctrl.reserved.15_6",
2547 FT_UINT16, BASE_DEC, NULL, 0xFFC0,
2548 NULL, HFILL }
2549 },
2550 { &hf_cc2400_fsctrl_lock_threshold,
2551 { "Lock Threshold", "ubertooth.register.value.fsctrl.lock_threshold",
2552 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fsctlr_lock_threshold_vals_ext, 0x0030,
2553 NULL, HFILL }
2554 },
2555 { &hf_cc2400_fsctrl_cal_done,
2556 { "Calibration Done", "ubertooth.register.value.fsctrl.cal_done",
2557 FT_BOOLEAN, 16, NULL, 0x0008,
2558 NULL, HFILL }
2559 },
2560 { &hf_cc2400_fsctrl_cal_running,
2561 { "Calibration Running", "ubertooth.register.value.fsctrl.cal_running",
2562 FT_BOOLEAN, 16, NULL, 0x0004,
2563 NULL, HFILL }
2564 },
2565 { &hf_cc2400_fsctrl_lock_length,
2566 { "Lock Length", "ubertooth.register.value.fsctrl.lock_length",
2567 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fsctlr_lock_length_vals_ext, 0x0002,
2568 NULL, HFILL }
2569 },
2570 { &hf_cc2400_fsctrl_lock_status,
2571 { "PLL Lock Status", "ubertooth.register.value.fsctrl.lock_status",
2572 FT_BOOLEAN, 16, NULL, 0x0001,
2573 NULL, HFILL }
2574 },
2575 { &hf_cc2400_fsdiv_reserved,
2576 { "Reserved [15:12]", "ubertooth.register.value.fsdiv.reserved.15_12",
2577 FT_UINT16, BASE_DEC, NULL, 0xF000,
2578 NULL, HFILL }
2579 },
2580 { &hf_cc2400_fsdiv_frequency,
2581 { "Frequency", "ubertooth.register.value.fsdiv.frequency",
2582 FT_UINT16, BASE_DEC, NULL, 0x0FFF,
2583 NULL, HFILL }
2584 },
2585 { &hf_cc2400_fsdiv_freq_high,
2586 { "Frequency High Part", "ubertooth.register.value.fsdiv.frequency.high",
2587 FT_UINT16, BASE_DEC, NULL, 0x0C00,
2588 NULL, HFILL }
2589 },
2590 { &hf_cc2400_fsdiv_freq,
2591 { "Frequency Lower Part", "ubertooth.register.value.fsdiv.frequency.low",
2592 FT_UINT16, BASE_DEC, NULL, 0x03FF,
2593 NULL, HFILL }
2594 },
2595 { &hf_cc2400_mdmctrl_reserved,
2596 { "Reserved [15:13]", "ubertooth.register.value.mdmctrl.reserved.15_13",
2597 FT_UINT16, BASE_DEC, NULL, 0xE000,
2598 NULL, HFILL }
2599 },
2600 { &hf_cc2400_mdmctrl_mod_offset,
2601 { "Modulator Offset", "ubertooth.register.value.mdmctrl.mod_offset",
2602 FT_UINT16, BASE_DEC, NULL, 0x1F80,
2603 NULL, HFILL }
2604 },
2605 { &hf_cc2400_mdmctrl_mod_dev,
2606 { "Modulator Deviation", "ubertooth.register.value.mdmctrl.mod_dev",
2607 FT_UINT16, BASE_DEC, NULL, 0x007F,
2608 NULL, HFILL }
2609 },
2610 { &hf_cc2400_agcctrl_vga_gain,
2611 { "VGA Gain", "ubertooth.register.value.agcctrl.vga_gain",
2612 FT_UINT16, BASE_HEX, NULL, 0xFF00,
2613 NULL, HFILL }
2614 },
2615 { &hf_cc2400_agcctrl_reserved,
2616 { "Reserved [7:4]", "ubertooth.register.value.agcctrl.reserved.7_4",
2617 FT_UINT16, BASE_DEC, NULL, 0x00F0,
2618 NULL, HFILL }
2619 },
2620 { &hf_cc2400_agcctrl_agc_locked,
2621 { "AGC Locked", "ubertooth.register.value.agcctrl.agc_locked",
2622 FT_BOOLEAN, 16, NULL, 0x0008,
2623 NULL, HFILL }
2624 },
2625 { &hf_cc2400_agcctrl_agc_lock,
2626 { "AGC Lock", "ubertooth.register.value.agcctrl.agc_lock",
2627 FT_BOOLEAN, 16, NULL, 0x0004,
2628 NULL, HFILL }
2629 },
2630 { &hf_cc2400_agcctrl_agc_sync_lock,
2631 { "AGC Sync Lock", "ubertooth.register.value.agcctrl.agc_sync_lock",
2632 FT_BOOLEAN, 16, NULL, 0x0002,
2633 NULL, HFILL }
2634 },
2635 { &hf_cc2400_agcctrl_vga_gain_oe,
2636 { "VGA Gain Override Enable", "ubertooth.register.value.agcctrl.vga_gain_oe",
2637 FT_BOOLEAN, 16, NULL, 0x0001,
2638 NULL, HFILL }
2639 },
2640 { &hf_cc2400_frend_reserved_15_4,
2641 { "Reserved [15:4]", "ubertooth.register.value.frend.reserved.15_4",
2642 FT_UINT16, BASE_DEC, NULL, 0xFFF0,
2643 NULL, HFILL }
2644 },
2645 { &hf_cc2400_frend_reserved_3,
2646 { "Reserved [3]", "ubertooth.register.value.frend.reserved.3",
2647 FT_BOOLEAN, 16, NULL, 0x0008,
2648 NULL, HFILL }
2649 },
2650 { &hf_cc2400_frend_pa_level,
2651 { "Power Amplifier Level", "ubertooth.register.value.frend.pa_level",
2652 FT_UINT16, BASE_DEC, NULL, 0x0007,
2653 NULL, HFILL }
2654 },
2655 { &hf_cc2400_rssi_rssi_val,
2656 { "Average RSSI Value", "ubertooth.register.value.rssi.rssi_val",
2657 FT_INT16, BASE_DEC, NULL, 0xFF00,
2658 NULL, HFILL }
2659 },
2660 { &hf_cc2400_rssi_rssi_cs_thres,
2661 { "RSSI Carrier Sense Threshold", "ubertooth.register.value.rssi.rssi_cs_thres",
2662 FT_INT16, BASE_DEC, NULL, 0x00FC,
2663 NULL, HFILL }
2664 },
2665 { &hf_cc2400_rssi_rssi_filt,
2666 { "RSSI Averaging Filter Length", "ubertooth.register.value.rssi.rssi_filt",
2667 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_rssi_rssi_filt_vals_ext, 0x0003,
2668 NULL, HFILL }
2669 },
2670 { &hf_cc2400_freqest_rx_freq_offset,
2671 { "Rx Frequency Offset", "ubertooth.register.value.freqest.rx_freq_offset",
2672 FT_INT16, BASE_DEC, NULL, 0xFF00,
2673 NULL, HFILL }
2674 },
2675 { &hf_cc2400_freqest_reserved,
2676 { "Reserved [7:0]", "ubertooth.register.value.freqest.reserved.7_0",
2677 FT_UINT16, BASE_DEC, NULL, 0x00FF,
2678 NULL, HFILL }
2679 },
2680 { &hf_cc2400_iocfg_reserved,
2681 { "Reserved [15]", "ubertooth.register.value.iocfg.reserved.15",
2682 FT_BOOLEAN, 16, NULL, 0x8000,
2683 NULL, HFILL }
2684 },
2685 { &hf_cc2400_iocfg_gio6_cfg,
2686 { "GIO6 Configuration", "ubertooth.register.value.iocfg.gio6_cfg",
2687 FT_UINT16, BASE_DEC, NULL, 0x7E00,
2688 NULL, HFILL }
2689 },
2690 { &hf_cc2400_iocfg_gio1_cfg,
2691 { "GIO1 Configuration", "ubertooth.register.value.iocfg.gio1_cfg",
2692 FT_UINT16, BASE_DEC, NULL, 0x01F8,
2693 NULL, HFILL }
2694 },
2695 { &hf_cc2400_iocfg_hssd_src,
2696 { "High Speed Serial Data Source", "ubertooth.register.value.iocfg.hssd_src",
2697 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_iocfg_hssd_src_vals_ext, 0x0007,
2698 NULL, HFILL }
2699 },
2700 { &hf_cc2400_fsmtc_tc_rxon2agcen,
2701 { "Rx On to AGC Enabled", "ubertooth.register.value.fsmtc.tc_rxon2agcen",
2702 FT_UINT16, BASE_DEC, NULL, 0xE000,
2703 NULL, HFILL }
2704 },
2705 { &hf_cc2400_fsmtc_tc_paon2switch,
2706 { "Power Amplifier On to Switch", "ubertooth.register.value.fsmtc.tc_paon2switch",
2707 FT_UINT16, BASE_DEC, NULL, 0x1C00,
2708 NULL, HFILL }
2709 },
2710 { &hf_cc2400_fsmtc_res,
2711 { "Reserved [9:6]", "ubertooth.register.value.fsmtc.reserved.9_6",
2712 FT_UINT16, BASE_DEC, NULL, 0x03C0,
2713 NULL, HFILL }
2714 },
2715 { &hf_cc2400_fsmtc_tc_txend2switch,
2716 { "Tx End to Switch", "ubertooth.register.value.fsmtc.tc_txend2switch",
2717 FT_UINT16, BASE_DEC, NULL, 0x0038,
2718 NULL, HFILL }
2719 },
2720 { &hf_cc2400_fsmtc_tc_txend2paoff,
2721 { "Tx End to Power Amplifier Off", "ubertooth.register.value.fsmtc.tc_txend2paoff",
2722 FT_UINT16, BASE_DEC, NULL, 0x0007,
2723 NULL, HFILL }
2724 },
2725 { &hf_cc2400_reserved_0x0C_res_15_5,
2726 { "Reserved [15:5]", "ubertooth.register.value.reserved.0x0C.15_5",
2727 FT_UINT16, BASE_DEC, NULL, 0xFFE0,
2728 NULL, HFILL }
2729 },
2730 { &hf_cc2400_reserved_0x0C_res_4_0,
2731 { "Reserved [4:0]", "ubertooth.register.value.reserved.0x0C.4_0",
2732 FT_UINT16, BASE_DEC, NULL, 0x001F,
2733 NULL, HFILL }
2734 },
2735 { &hf_cc2400_manand_vga_reset_n,
2736 { "No VGA Reset", "ubertooth.register.value.manand.vga_reset_n",
2737 FT_BOOLEAN, 16, NULL, 0x8000,
2738 NULL, HFILL }
2739 },
2740 { &hf_cc2400_manand_lock_status,
2741 { "Lock Status", "ubertooth.register.value.manand.lock_status",
2742 FT_BOOLEAN, 16, NULL, 0x4000,
2743 NULL, HFILL }
2744 },
2745 { &hf_cc2400_manand_balun_ctrl,
2746 { "Balun Control", "ubertooth.register.value.manand.balun_ctrl",
2747 FT_BOOLEAN, 16, NULL, 0x2000,
2748 NULL, HFILL }
2749 },
2750 { &hf_cc2400_manand_rxtx,
2751 { "RxTx", "ubertooth.register.value.manand.rxtx",
2752 FT_BOOLEAN, 16, NULL, 0x1000,
2753 NULL, HFILL }
2754 },
2755 { &hf_cc2400_manand_pre_pd,
2756 { "Power Down of Prescaler", "ubertooth.register.value.manand.pre_pd",
2757 FT_BOOLEAN, 16, NULL, 0x0800,
2758 NULL, HFILL }
2759 },
2760 { &hf_cc2400_manand_pa_n_pd,
2761 { "Power Down of Power Amplifier (negative path)", "ubertooth.register.value.manand.pa_n_pd",
2762 FT_BOOLEAN, 16, NULL, 0x0400,
2763 NULL, HFILL }
2764 },
2765 { &hf_cc2400_manand_pa_p_pd,
2766 { "Power Down of Power Amplifier (positive path)", "ubertooth.register.value.manand.pa_p_pd",
2767 FT_BOOLEAN, 16, NULL, 0x0200,
2768 NULL, HFILL }
2769 },
2770 { &hf_cc2400_manand_dac_lpf_pd,
2771 { "Power Down of Tx DAC", "ubertooth.register.value.manand.dac_lpf_pd",
2772 FT_BOOLEAN, 16, NULL, 0x0100,
2773 NULL, HFILL }
2774 },
2775 { &hf_cc2400_manand_bias_pd,
2776 { "Power Down control of global bias generator + XOSC clock buffer", "ubertooth.register.value.manand.bias_pd",
2777 FT_BOOLEAN, 16, NULL, 0x0080,
2778 NULL, HFILL }
2779 },
2780 { &hf_cc2400_manand_xosc16m_pd,
2781 { "Power Down control of 16 MHz XOSC core", "ubertooth.register.value.manand.xosc16m_pd",
2782 FT_BOOLEAN, 16, NULL, 0x0040,
2783 NULL, HFILL }
2784 },
2785 { &hf_cc2400_manand_chp_pd,
2786 { "Power Down control of Charge Pump", "ubertooth.register.value.manand.chp_pd",
2787 FT_BOOLEAN, 16, NULL, 0x0020,
2788 NULL, HFILL }
2789 },
2790 { &hf_cc2400_manand_fs_pd,
2791 { "Power Down control of VCO, I/Q generator, LO buffers", "ubertooth.register.value.manand.fs_pd",
2792 FT_BOOLEAN, 16, NULL, 0x0010,
2793 NULL, HFILL }
2794 },
2795 { &hf_cc2400_manand_adc_pd,
2796 { "Power Down control of the ADC", "ubertooth.register.value.manand.adc_pd",
2797 FT_BOOLEAN, 16, NULL, 0x0008,
2798 NULL, HFILL }
2799 },
2800 { &hf_cc2400_manand_vga_pd,
2801 { "Power Down control of the VGA", "ubertooth.register.value.manand.vga_pd",
2802 FT_BOOLEAN, 16, NULL, 0x0004,
2803 NULL, HFILL }
2804 },
2805 { &hf_cc2400_manand_rxbpf_pd,
2806 { "Power Down control of complex band-pass receive filter", "ubertooth.register.value.manand.rxbpf_pd",
2807 FT_BOOLEAN, 16, NULL, 0x0002,
2808 NULL, HFILL }
2809 },
2810 { &hf_cc2400_manand_lnamix_pd,
2811 { "Power Down control of LNA, down-conversion mixers and front-end bias", "ubertooth.register.value.manand.lnamix_pd",
2812 FT_BOOLEAN, 16, NULL, 0x0001,
2813 NULL, HFILL }
2814 },
2815 { &hf_cc2400_fsmstate_reserved_15_13,
2816 { "Reserved [15:13]", "ubertooth.register.value.fsmstate.reserved.15_13",
2817 FT_UINT16, BASE_DEC, NULL, 0xE000,
2818 NULL, HFILL }
2819 },
2820 { &hf_cc2400_fsmstate_fsm_state_bkpt,
2821 { "FSM breakpoint state", "ubertooth.register.value.fsmstate.fsm_state_bkpt",
2822 FT_UINT16, BASE_DEC, NULL, 0x1F00,
2823 NULL, HFILL }
2824 },
2825 { &hf_cc2400_fsmstate_reserved_7_5,
2826 { "Reserved [7:5]", "ubertooth.register.value.fsmstate.reserved.7_5",
2827 FT_UINT16, BASE_DEC, NULL, 0x00E0,
2828 NULL, HFILL }
2829 },
2830 { &hf_cc2400_fsmstate_fsm_cur_state,
2831 { "Current state of the finite state machine", "ubertooth.register.value.fsmstate.fsm_cur_state",
2832 FT_UINT16, BASE_DEC, NULL, 0x001F,
2833 NULL, HFILL }
2834 },
2835 { &hf_cc2400_adctst_reserved_15,
2836 { "Reserved [15]", "ubertooth.register.value.adctst.reserved.15",
2837 FT_BOOLEAN, 16, NULL, 0x8000,
2838 NULL, HFILL }
2839 },
2840 { &hf_cc2400_adctst_adc_i,
2841 { "Current ADC I-branch value", "ubertooth.register.value.adctst.adc_i",
2842 FT_UINT16, BASE_DEC, NULL, 0x7F00,
2843 NULL, HFILL }
2844 },
2845 { &hf_cc2400_adctst_reserved_7,
2846 { "Reserved [7]", "ubertooth.register.value.adctst.reserved.7",
2847 FT_BOOLEAN, 16, NULL, 0x0080,
2848 NULL, HFILL }
2849 },
2850 { &hf_cc2400_adctst_adc_q,
2851 { "Current ADC Q-branch value", "ubertooth.register.value.adctst.adc_q",
2852 FT_UINT16, BASE_DEC, NULL, 0x007F,
2853 NULL, HFILL }
2854 },
2855 { &hf_cc2400_rxbpftst_reserved,
2856 { "Reserved [15]", "ubertooth.register.value.rxbpftst.reserved.15",
2857 FT_BOOLEAN, 16, NULL, 0x8000,
2858 NULL, HFILL }
2859 },
2860 { &hf_cc2400_rxbpftst_rxbpf_cap_oe,
2861 { "RX band-pass filter capacitance calibration override enable", "ubertooth.register.value.rxbpftst.rxbpf_cap_oe",
2862 FT_BOOLEAN, 16, NULL, 0x4000,
2863 NULL, HFILL }
2864 },
2865 { &hf_cc2400_rxbpftst_rxbpf_cap_o,
2866 { "RX band-pass filter capacitance calibration override value", "ubertooth.register.value.rxbpftst.rxbpf_cap_o",
2867 FT_UINT16, BASE_DEC, NULL, 0x3F80,
2868 NULL, HFILL }
2869 },
2870 { &hf_cc2400_rxbpftst_rxbpf_cap_res,
2871 { "RX band-pass filter capacitance calibration result", "ubertooth.register.value.rxbpftst.rxbpf_cap_res",
2872 FT_UINT16, BASE_DEC, NULL, 0x007F,
2873 NULL, HFILL }
2874 },
2875 { &hf_cc2400_pamtst_reserved_15_13,
2876 { "Reserved [15:13]", "ubertooth.register.value.pamtst.reserved.15_13",
2877 FT_UINT16, BASE_DEC, NULL, 0xE000,
2878 NULL, HFILL }
2879 },
2880 { &hf_cc2400_pamtst_vc_in_test_en,
2881 { "VC in Test En", "ubertooth.register.value.pamtst.vc_in_test_en",
2882 FT_BOOLEAN, 16, NULL, 0x1000,
2883 NULL, HFILL }
2884 },
2885 { &hf_cc2400_pamtst_atestmod_pd,
2886 { "Power down of the analog test module", "ubertooth.register.value.pamtst.atestmod_pd",
2887 FT_BOOLEAN, 16, NULL, 0x0800,
2888 NULL, HFILL }
2889 },
2890 { &hf_cc2400_pamtst_atestmod_mode,
2891 { "Function of the Analog Test Module", "ubertooth.register.value.pamtst.atestmod_mode",
2892 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_pamtst_atestmod_mode_vals_ext, 0x0700,
2893 NULL, HFILL }
2894 },
2895 { &hf_cc2400_pamtst_reserved_7,
2896 { "Reserved [7]", "ubertooth.register.value.pamtst.reserved.7",
2897 FT_BOOLEAN, 16, NULL, 0x0080,
2898 NULL, HFILL }
2899 },
2900 { &hf_cc2400_pamtst_txmix_cap_array,
2901 { "Varactor array settings in the transmit mixers", "ubertooth.register.value.pamtst.txmix_cap_array",
2902 FT_UINT16, BASE_DEC, NULL, 0x0060,
2903 NULL, HFILL }
2904 },
2905 { &hf_cc2400_pamtst_txmix_current,
2906 { "Transmit Mixers Current", "ubertooth.register.value.pamtst.txmix_current",
2907 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_pamtst_txmix_current_vals_ext, 0x0018,
2908 NULL, HFILL }
2909 },
2910 { &hf_cc2400_pamtst_pa_current,
2911 { "Power Amplifier Current", "ubertooth.register.value.pamtst.pa_current",
2912 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_pamtst_pa_current_vals_ext, 0x0007,
2913 NULL, HFILL }
2914 },
2915 { &hf_cc2400_lmtst_reserved,
2916 { "Reserved [15:14]", "ubertooth.register.value.lmtst.reserved.15_14",
2917 FT_UINT16, BASE_DEC, NULL, 0xC000,
2918 NULL, HFILL }
2919 },
2920 { &hf_cc2400_lmtst_rxmix_hgm,
2921 { "Receiver Mixers High Gain Mode Enable", "ubertooth.register.value.lmtst.rxmix_hgm",
2922 FT_BOOLEAN, 16, NULL, 0x2000,
2923 NULL, HFILL }
2924 },
2925 { &hf_cc2400_lmtst_rxmix_tail,
2926 { "Receiver Mixers Output Current", "ubertooth.register.value.lmtst.rxmix_tail",
2927 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_rxmix_tail_vals_ext, 0x1800,
2928 NULL, HFILL }
2929 },
2930 { &hf_cc2400_lmtst_rxmix_vcm,
2931 { "Controls VCM level in the mixer feedback loop", "ubertooth.register.value.lmtst.rxmix_vcm",
2932 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_rxmix_vcm_vals_ext, 0x0600,
2933 NULL, HFILL }
2934 },
2935 { &hf_cc2400_lmtst_rxmix_current,
2936 { "Controls current in the mixer", "ubertooth.register.value.lmtst.rxmix_current",
2937 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_rxmix_current_vals_ext, 0x0180,
2938 NULL, HFILL }
2939 },
2940 { &hf_cc2400_lmtst_lna_cap_array,
2941 { "Varactor array setting in the LNA", "ubertooth.register.value.lmtst.lna_cap_array",
2942 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_lna_cap_array_vals_ext, 0x0060,
2943 NULL, HFILL }
2944 },
2945 { &hf_cc2400_lmtst_lna_lowgain,
2946 { "Low gain mode of the LNA", "ubertooth.register.value.lmtst.lna_lowgain",
2947 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_lna_lowgain_vals_ext, 0x0010,
2948 NULL, HFILL }
2949 },
2950 { &hf_cc2400_lmtst_lna_gain,
2951 { "Controls current in the LNA gain compensation branch", "ubertooth.register.value.lmtst.lna_gain",
2952 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_lna_gain_vals_ext, 0x000C,
2953 NULL, HFILL }
2954 },
2955 { &hf_cc2400_lmtst_lna_current,
2956 { "Main current in the LNA", "ubertooth.register.value.lmtst.lna_current",
2957 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_lmtst_lna_current_vals_ext, 0x003,
2958 NULL, HFILL }
2959 },
2960 { &hf_cc2400_manor_vga_reset_n,
2961 { "No VGA Reset", "ubertooth.register.value.manor.vga_reset_n",
2962 FT_BOOLEAN, 16, NULL, 0x8000,
2963 NULL, HFILL }
2964 },
2965 { &hf_cc2400_manor_lock_status,
2966 { "Lock Status", "ubertooth.register.value.manor.lock_status",
2967 FT_BOOLEAN, 16, NULL, 0x4000,
2968 NULL, HFILL }
2969 },
2970 { &hf_cc2400_manor_balun_ctrl,
2971 { "Balun Control", "ubertooth.register.value.manor.balun_ctrl",
2972 FT_BOOLEAN, 16, NULL, 0x2000,
2973 NULL, HFILL }
2974 },
2975 { &hf_cc2400_manor_rxtx,
2976 { "RxTx", "ubertooth.register.value.manor.rxtx",
2977 FT_BOOLEAN, 16, NULL, 0x1000,
2978 NULL, HFILL }
2979 },
2980 { &hf_cc2400_manor_pre_pd,
2981 { "Power Down of Prescaler", "ubertooth.register.value.manor.pre_pd",
2982 FT_BOOLEAN, 16, NULL, 0x0800,
2983 NULL, HFILL }
2984 },
2985 { &hf_cc2400_manor_pa_n_pd,
2986 { "Power Down of Power Amplifier (negative path)", "ubertooth.register.value.manor.pa_n_pd",
2987 FT_BOOLEAN, 16, NULL, 0x0400,
2988 NULL, HFILL }
2989 },
2990 { &hf_cc2400_manor_pa_p_pd,
2991 { "Power Down of Power Amplifier (positive path)", "ubertooth.register.value.manor.pa_p_pd",
2992 FT_BOOLEAN, 16, NULL, 0x0200,
2993 NULL, HFILL }
2994 },
2995 { &hf_cc2400_manor_dac_lpf_pd,
2996 { "Power Down of Tx DAC", "ubertooth.register.value.manor.dac_lpf_pd",
2997 FT_BOOLEAN, 16, NULL, 0x0100,
2998 NULL, HFILL }
2999 },
3000 { &hf_cc2400_manor_bias_pd,
3001 { "Power Down control of global bias generator + XOSC clock buffer", "ubertooth.register.value.manor.bias_pd",
3002 FT_BOOLEAN, 16, NULL, 0x0080,
3003 NULL, HFILL }
3004 },
3005 { &hf_cc2400_manor_xosc16m_pd,
3006 { "Power Down control of 16 MHz XOSC core", "ubertooth.register.value.manor.xosc16m_pd",
3007 FT_BOOLEAN, 16, NULL, 0x0040,
3008 NULL, HFILL }
3009 },
3010 { &hf_cc2400_manor_chp_pd,
3011 { "Power Down control of Charge Pump", "ubertooth.register.value.manor.chp_pd",
3012 FT_BOOLEAN, 16, NULL, 0x0020,
3013 NULL, HFILL }
3014 },
3015 { &hf_cc2400_manor_fs_pd,
3016 { "Power Down control of VCO, I/Q generator, LO buffers", "ubertooth.register.value.manor.fs_pd",
3017 FT_BOOLEAN, 16, NULL, 0x0010,
3018 NULL, HFILL }
3019 },
3020 { &hf_cc2400_manor_adc_pd,
3021 { "Power Down control of the ADC", "ubertooth.register.value.manor.adc_pd",
3022 FT_BOOLEAN, 16, NULL, 0x0008,
3023 NULL, HFILL }
3024 },
3025 { &hf_cc2400_manor_vga_pd,
3026 { "Power Down control of the VGA", "ubertooth.register.value.manor.vga_pd",
3027 FT_BOOLEAN, 16, NULL, 0x0004,
3028 NULL, HFILL }
3029 },
3030 { &hf_cc2400_manor_rxbpf_pd,
3031 { "Power Down control of complex band-pass receive filter", "ubertooth.register.value.manor.rxbpf_pd",
3032 FT_BOOLEAN, 16, NULL, 0x0002,
3033 NULL, HFILL }
3034 },
3035 { &hf_cc2400_manor_lnamix_pd,
3036 { "Power Down control of LNA, down-conversion mixers and front-end bias", "ubertooth.register.value.manor.lnamix_pd",
3037 FT_BOOLEAN, 16, NULL, 0x0001,
3038 NULL, HFILL }
3039 },
3040 { &hf_cc2400_mdmtst0_reserved,
3041 { "Reserved [15:14]", "ubertooth.register.value.mdmtst0.reserved.15_14",
3042 FT_UINT16, BASE_DEC, NULL, 0xC000,
3043 NULL, HFILL }
3044 },
3045 { &hf_cc2400_mdmtst0_tx_prng,
3046 { "Tx PRNG", "ubertooth.register.value.mdmtst0.tx_prng",
3047 FT_BOOLEAN, 16, NULL, 0x2000,
3048 NULL, HFILL }
3049 },
3050 { &hf_cc2400_mdmtst0_tx_1mhz_offset_n,
3051 { "Tx No 1MHz Offset", "ubertooth.register.value.mdmtst0.tx_1mhz_offset_n",
3052 FT_BOOLEAN, 16, NULL, 0x1000,
3053 NULL, HFILL }
3054 },
3055 { &hf_cc2400_mdmtst0_invert_data,
3056 { "Invert Data", "ubertooth.register.value.mdmtst0.invert_data",
3057 FT_BOOLEAN, 16, NULL, 0x0800,
3058 NULL, HFILL }
3059 },
3060 { &hf_cc2400_mdmtst0_afc_adjust_on_packet,
3061 { "AFC Adjust on Packet", "ubertooth.register.value.mdmtst0.afc_adjust_on_packet",
3062 FT_BOOLEAN, 16, NULL, 0x0400,
3063 NULL, HFILL }
3064 },
3065 { &hf_cc2400_mdmtst0_afc_settling,
3066 { "AFC Settling", "ubertooth.register.value.mdmtst0.afc_settling",
3067 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_mdmtst0_afc_settling_vals_ext, 0x0300,
3068 NULL, HFILL }
3069 },
3070 { &hf_cc2400_mdmtst0_afc_delta,
3071 { "AFC Delta", "ubertooth.register.value.mdmtst0.afc_delta",
3072 FT_UINT16, BASE_DEC, NULL, 0x00FF,
3073 NULL, HFILL }
3074 },
3075 { &hf_cc2400_mdmtst1_reserved,
3076 { "Reserved [15:7]", "ubertooth.register.value.mdmtst1.reserved.15_7",
3077 FT_UINT16, BASE_DEC, NULL, 0xFF80,
3078 NULL, HFILL }
3079 },
3080 { &hf_cc2400_mdmtst1_bsync_threshold,
3081 { "B-Sync Threshold", "ubertooth.register.value.mdmtst1.bsync_threshold",
3082 FT_UINT16, BASE_DEC, NULL, 0x07F,
3083 NULL, HFILL }
3084 },
3085 { &hf_cc2400_dactst_reserved,
3086 { "Reserved [15]", "ubertooth.register.value.dactst.reserved.15",
3087 FT_BOOLEAN, 16, NULL, 0x8000,
3088 NULL, HFILL }
3089 },
3090 { &hf_cc2400_dactst_dac_src,
3091 { "DAC Source", "ubertooth.register.value.dactst.dac_src",
3092 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_dactst_dac_src_vals_ext, 0x7000,
3093 NULL, HFILL }
3094 },
3095 { &hf_cc2400_dactst_dac_i_o,
3096 { "I-branch DAC Override Value", "ubertooth.register.value.dactst.dac_i_o",
3097 FT_UINT16, BASE_DEC, NULL, 0x0FC0,
3098 NULL, HFILL }
3099 },
3100 { &hf_cc2400_dactst_dac_q_o,
3101 { "Q-branch DAC Override Value", "ubertooth.register.value.dactst.dac_q_o",
3102 FT_UINT16, BASE_DEC, NULL, 0x003F,
3103 NULL, HFILL }
3104 },
3105 { &hf_cc2400_agctst0_agc_settle_blank_dn,
3106 { "AGC Settle Blank Down", "ubertooth.register.value.agctst0.agc_settle_blank_down",
3107 FT_UINT16, BASE_DEC, NULL, 0xE000,
3108 "Duration of blanking signal in 8 MHz clock cycles", HFILL }
3109 },
3110 { &hf_cc2400_agctst0_agc_win_size,
3111 { "AGC Window Size", "ubertooth.register.value.agctst0.agc_win_size",
3112 FT_UINT16, BASE_DEC, NULL, 0x1800,
3113 NULL, HFILL }
3114 },
3115 { &hf_cc2400_agctst0_agc_settle_peak,
3116 { "AGC Settle Peak Period", "ubertooth.register.value.agctst0.agc_settle_peak",
3117 FT_UINT16, BASE_DEC, NULL, 0x0780,
3118 NULL, HFILL }
3119 },
3120 { &hf_cc2400_agctst0_agc_settle_adc,
3121 { "AGC Settle ADC Period", "ubertooth.register.value.agctst0.agc_settle_adc",
3122 FT_UINT16, BASE_DEC, NULL, 0x0078,
3123 NULL, HFILL }
3124 },
3125 { &hf_cc2400_agctst0_agc_attempts,
3126 { "AGC Attempts", "ubertooth.register.value.agctst0.agc_attempts",
3127 FT_UINT16, BASE_DEC, NULL, 0x0007,
3128 NULL, HFILL }
3129 },
3130 { &hf_cc2400_agctst1_reserved,
3131 { "Reserved [15]", "ubertooth.register.value.agctst1.reserved.15",
3132 FT_BOOLEAN, 16, NULL, 0x8000,
3133 NULL, HFILL }
3134 },
3135 { &hf_cc2400_agctst1_agc_var_gain_sat,
3136 { "AGC Variable Gain Stage", "ubertooth.register.value.agctst1.agc_var_gain_sat",
3137 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_agctst1_agc_var_gain_sat_vals_ext, 0x4000,
3138 NULL, HFILL }
3139 },
3140 { &hf_cc2400_agctst1_agc_settle_blank_up,
3141 { "AGC Settle Bank Up", "ubertooth.register.value.agctst1.agc_settle_blank_up",
3142 FT_UINT16, BASE_DEC, NULL, 0x3800,
3143 "Duration of blanking signal in 8 MHz clock cycles", HFILL }
3144 },
3145 { &hf_cc2400_agctst1_peakdet_cur_boost,
3146 { "Current Peak Detectors Boost", "ubertooth.register.value.agctst1.peakdet_cur_boost",
3147 FT_BOOLEAN, 16, NULL, 0x0400,
3148 NULL, HFILL }
3149 },
3150 { &hf_cc2400_agctst1_agc_mult_slow,
3151 { "AGC Timing Multiplier Slow Mode", "ubertooth.register.value.agctst1.agc_mult_slow",
3152 FT_UINT16, BASE_DEC, NULL, 0x03C0,
3153 NULL, HFILL }
3154 },
3155 { &hf_cc2400_agctst1_agc_settle_fixed,
3156 { "AGC Settling Period Fixed Gain Step", "ubertooth.register.value.agctst1.agc_settle_fixed",
3157 FT_UINT16, BASE_DEC, NULL, 0x003C,
3158 NULL, HFILL }
3159 },
3160 { &hf_cc2400_agctst1_agc_settle_var,
3161 { "AGC Settling Period Variable Gain Step", "ubertooth.register.value.agctst1.agc_settle_var",
3162 FT_UINT16, BASE_DEC, NULL, 0x0003,
3163 NULL, HFILL }
3164 },
3165 { &hf_cc2400_agctst2_reserved,
3166 { "Reserved [15:14]", "ubertooth.register.value.agctst2.reserved.15_14",
3167 FT_UINT16, BASE_DEC, NULL, 0xC000,
3168 NULL, HFILL }
3169 },
3170 { &hf_cc2400_agctst2_agc_backend_blanking,
3171 { "AGC Backend Blanking", "ubertooth.register.value.agctst2.agc_backend_blanking",
3172 FT_UINT16, BASE_DEC, NULL, 0x3000,
3173 NULL, HFILL }
3174 },
3175 { &hf_cc2400_agctst2_agc_adjust_m3db,
3176 { "AGC Adjust -3db", "ubertooth.register.value.agctst2.agc_adjust_m3db",
3177 FT_UINT16, BASE_DEC, NULL, 0x0E00,
3178 NULL, HFILL }
3179 },
3180 { &hf_cc2400_agctst2_agc_adjust_m1db,
3181 { "AGC Adjust -1db", "ubertooth.register.value.agctst2.agc_adjust_m1db",
3182 FT_UINT16, BASE_DEC, NULL, 0x01C0,
3183 NULL, HFILL }
3184 },
3185 { &hf_cc2400_agctst2_agc_adjust_p3db,
3186 { "AGC Adjust +3db", "ubertooth.register.value.agctst2.agc_adjust_p3db",
3187 FT_UINT16, BASE_DEC, NULL, 0x0038,
3188 NULL, HFILL }
3189 },
3190 { &hf_cc2400_agctst2_agc_adjust_p1db,
3191 { "AGC Adjust +1db", "ubertooth.register.value.agctst2.agc_adjust_p1db",
3192 FT_UINT16, BASE_DEC, NULL, 0x0007,
3193 NULL, HFILL }
3194 },
3195 { &hf_cc2400_fstst0_rxmixbuf_cur,
3196 { "Rx Mixer Buffer Bias Current", "ubertooth.register.value.fstst0.rxmixbuf_cur",
3197 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst0_rxtxmixbuf_cur_vals_ext, 0xC000,
3198 NULL, HFILL }
3199 },
3200 { &hf_cc2400_fstst0_txmixbuf_cur,
3201 { "TX Mixer Buffer Bias Current", "ubertooth.register.value.fstst0.txmixbuf_cur",
3202 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst0_rxtxmixbuf_cur_vals_ext, 0x3000,
3203 NULL, HFILL }
3204 },
3205 { &hf_cc2400_fstst0_vco_array_settle_long,
3206 { "Voltage Controlled Oscillator Array Settle Long", "ubertooth.register.value.fstst0.vco_array_settle_lon",
3207 FT_BOOLEAN, 16, NULL, 0x0800,
3208 NULL, HFILL }
3209 },
3210 { &hf_cc2400_fstst0_vco_array_oe,
3211 { "Voltage Controlled Oscillator Array Manual Override Enable", "ubertooth.register.value.fstst0.vco_array_oe",
3212 FT_BOOLEAN, 16, NULL, 0x0400,
3213 NULL, HFILL }
3214 },
3215 { &hf_cc2400_fstst0_vco_array_o,
3216 { "Voltage Controlled Oscillator Array Override Value", "ubertooth.register.value.fstst0.vco_array_o",
3217 FT_UINT16, BASE_DEC, NULL, 0x03E0,
3218 NULL, HFILL }
3219 },
3220 { &hf_cc2400_fstst0_vco_array_res,
3221 { "Resulting VCO Array Setting from Last Calibration", "ubertooth.register.value.fstst0.vco_array_res",
3222 FT_UINT16, BASE_DEC, NULL, 0x001F,
3223 NULL, HFILL }
3224 },
3225 { &hf_cc2400_fstst1_rxbpf_locur,
3226 { "Rx Band-pass Filters LO Bias Current", "ubertooth.register.value.fstst1.rxbpf_locur",
3227 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst1_rxbpf_locur_vals_ext, 0x8000,
3228 NULL, HFILL }
3229 },
3230 { &hf_cc2400_fstst1_rxbpf_midcur,
3231 { "Rx Band-pass Filters MID Bias Current", "ubertooth.register.value.fstst1.rxbpf_midcur",
3232 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst1_rxbpf_midcur_vals_ext, 0x4000,
3233 NULL, HFILL }
3234 },
3235 { &hf_cc2400_fstst1_vco_current_ref,
3236 { "VCO Current Reference", "ubertooth.register.value.fstst1.vco_current_ref",
3237 FT_UINT16, BASE_DEC, NULL, 0x3C00,
3238 NULL, HFILL }
3239 },
3240 { &hf_cc2400_fstst1_vco_current_k,
3241 { "VCO Current Calibration Constant", "ubertooth.register.value.fstst1.vco_current_k",
3242 FT_UINT16, BASE_DEC, NULL, 0x03F0,
3243 NULL, HFILL }
3244 },
3245 { &hf_cc2400_fstst1_vc_dac_en,
3246 { "VCO Source", "ubertooth.register.value.fstst1.vc_dac_en",
3247 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst1_vc_dac_en_vals_ext, 0x0008,
3248 NULL, HFILL }
3249 },
3250 { &hf_cc2400_fstst1_vc_dac_val,
3251 { "VCO DAC Output Value", "ubertooth.register.value.fstst1.vc_dac_val",
3252 FT_UINT16, BASE_DEC, NULL, 0x0007,
3253 NULL, HFILL }
3254 },
3255 { &hf_cc2400_fstst2_reserved,
3256 { "Reserved [15]", "ubertooth.register.value.fstst2.reserved.15",
3257 FT_BOOLEAN, 16, NULL, 0x8000,
3258 NULL, HFILL }
3259 },
3260 { &hf_cc2400_fstst2_vco_curcal_speed,
3261 { "Voltage Controlled Oscillator Current Calibration", "ubertooth.register.value.fstst2.vco_curcal_speed",
3262 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst2_vco_curcal_speed_vals_ext, 0x6000,
3263 NULL, HFILL }
3264 },
3265 { &hf_cc2400_fstst2_vco_current_oe,
3266 { "Voltage Controlled Oscillator Current Manual Override Enable", "ubertooth.register.value.fstst2.vco_current_oe",
3267 FT_BOOLEAN, 16, NULL, 0x1000,
3268 NULL, HFILL }
3269 },
3270 { &hf_cc2400_fstst2_vco_current_o,
3271 { "Voltage Controlled Oscillator Current Override Value", "ubertooth.register.value.fstst2.vco_current_o",
3272 FT_UINT16, BASE_DEC, NULL, 0x0FC0,
3273 NULL, HFILL }
3274 },
3275 { &hf_cc2400_fstst2_vco_current_res,
3276 { "Resulting VCO Current Setting from Last Calibration", "ubertooth.register.value.fstst2.vco_current_res",
3277 FT_UINT16, BASE_DEC, NULL, 0x003F,
3278 NULL, HFILL }
3279 },
3280 { &hf_cc2400_fstst3_reserved,
3281 { "Reserved [15:14]", "ubertooth.register.value.fstst3.reserved.15_14",
3282 FT_UINT16, BASE_DEC, NULL, 0xC000,
3283 NULL, HFILL }
3284 },
3285 { &hf_cc2400_fstst3_chp_test_up,
3286 { "Charge Pump Test Up", "ubertooth.register.value.fstst3.chp_test_up",
3287 FT_BOOLEAN, 16, NULL, 0x2000,
3288 NULL, HFILL }
3289 },
3290 { &hf_cc2400_fstst3_chp_test_dn,
3291 { "Charge Pump Test Down", "ubertooth.register.value.fstst3.chp_test_down",
3292 FT_BOOLEAN, 16, NULL, 0x1000,
3293 NULL, HFILL }
3294 },
3295 { &hf_cc2400_fstst3_chp_disable,
3296 { "Charge Pump Disable", "ubertooth.register.value.fstst3.chp_disable",
3297 FT_BOOLEAN, 16, NULL, 0x0800,
3298 NULL, HFILL }
3299 },
3300 { &hf_cc2400_fstst3_pd_delay,
3301 { "Phase Detector Delay", "ubertooth.register.value.fstst3.pd_delay",
3302 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst3_pd_delay_vals_ext, 0x0400,
3303 NULL, HFILL }
3304 },
3305 { &hf_cc2400_fstst3_chp_step_period,
3306 { "Charge Pump Step Period", "ubertooth.register.value.fstst3.chp_step_period",
3307 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_fstst3_chp_step_period_vals_ext, 0x0300,
3308 NULL, HFILL }
3309 },
3310 { &hf_cc2400_fstst3_stop_chp_current,
3311 { "Stop Charge Pump Current", "ubertooth.register.value.fstst3.stop_chp_current",
3312 FT_UINT16, BASE_DEC, NULL, 0x00F0,
3313 NULL, HFILL }
3314 },
3315 { &hf_cc2400_fstst3_start_chp_current,
3316 { "Start Charge Pump Current", "ubertooth.register.value.fstst3.start_chp_current",
3317 FT_UINT16, BASE_DEC, NULL, 0x000F,
3318 NULL, HFILL }
3319 },
3320
3321 { &hf_cc2400_manfidl_partnum,
3322 { "Part Number [3:0]", "ubertooth.register.value.manfidl.partnum",
3323 FT_UINT16, BASE_DEC, NULL, 0xF000,
3324 NULL, HFILL }
3325 },
3326 { &hf_cc2400_manfidl_manfid,
3327 { "Manufacturer ID", "ubertooth.register.value.manfidl.manfid",
3328 FT_UINT16, BASE_HEX, NULL, 0x0FFF,
3329 NULL, HFILL }
3330 },
3331 { &hf_cc2400_manfidh_version,
3332 { "Version", "ubertooth.register.value.manfidh.version",
3333 FT_UINT16, BASE_DEC, NULL, 0xF000,
3334 NULL, HFILL }
3335 },
3336 { &hf_cc2400_manfidh_partnum,
3337 { "Part Number [15:4]", "ubertooth.register.value.manfidh.partnum",
3338 FT_UINT16, BASE_DEC, NULL, 0x0FFF,
3339 NULL, HFILL }
3340 },
3341 { &hf_cc2400_grmdm_reserved,
3342 { "Reserved [15]", "ubertooth.register.value.grmdm.reserved.15",
3343 FT_BOOLEAN, 16, NULL, 0x8000,
3344 NULL, HFILL }
3345 },
3346 { &hf_cc2400_grmdm_sync_errbits_allowed,
3347 { "Sync Error Bits Allowed", "ubertooth.register.value.grmdm.sync_errbits_allowed",
3348 FT_UINT16, BASE_DEC, NULL, 0x6000,
3349 NULL, HFILL }
3350 },
3351 { &hf_cc2400_grmdm_pin_mode,
3352 { "PIN Mode", "ubertooth.register.value.grmdm.pin_mode",
3353 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grmdm_pin_mode_vals_ext, 0x1800,
3354 NULL, HFILL }
3355 },
3356 { &hf_cc2400_grmdm_packet_mode,
3357 { "Packet Mode", "ubertooth.register.value.grmdm.packet_mode",
3358 FT_BOOLEAN, 16, NULL, 0x0400,
3359 NULL, HFILL }
3360 },
3361 { &hf_cc2400_grmdm_pre_bytes,
3362 { "Preamble Bytes", "ubertooth.register.value.grmdm.pre_bytes",
3363 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grmdm_pre_bytes_vals_ext, 0x0380,
3364 NULL, HFILL }
3365 },
3366 { &hf_cc2400_grmdm_sync_word_size,
3367 { "Sync Word Size", "ubertooth.register.value.grmdm.sync_word_size",
3368 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grmdm_sync_word_size_vals_ext, 0x0060,
3369 NULL, HFILL }
3370 },
3371 { &hf_cc2400_grmdm_crc_on,
3372 { "CRC On", "ubertooth.register.value.grmdm.crc_on",
3373 FT_BOOLEAN, 16, NULL, 0x0010,
3374 NULL, HFILL }
3375 },
3376 { &hf_cc2400_grmdm_data_format,
3377 { "Data Format", "ubertooth.register.value.grmdm.data_format",
3378 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grmdm_data_format_vals_ext, 0x000C,
3379 NULL, HFILL }
3380 },
3381 { &hf_cc2400_grmdm_modulation_format,
3382 { "Modulation Format", "ubertooth.register.value.grmdm.modulation_format",
3383 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grmdm_modulation_format_vals_ext, 0x0002,
3384 NULL, HFILL }
3385 },
3386 { &hf_cc2400_grmdm_tx_gaussian_filter,
3387 { "Tx Gaussian Filter", "ubertooth.register.value.grmdm.tx_gaussian_filter",
3388 FT_BOOLEAN, 16, NULL, 0x0001,
3389 NULL, HFILL }
3390 },
3391 { &hf_cc2400_grdec_reserved,
3392 { "Reserved [15:13]", "ubertooth.register.value.grdec.reserved.15_13",
3393 FT_UINT16, BASE_DEC, NULL, 0xE000,
3394 NULL, HFILL }
3395 },
3396 { &hf_cc2400_grdec_ind_saturation,
3397 { "Ind Saturation", "ubertooth.register.value.grdec.ind_saturation",
3398 FT_BOOLEAN, 16, NULL, 0x1000,
3399 NULL, HFILL }
3400 },
3401 { &hf_cc2400_grdec_dec_shift,
3402 { "Decimation Shift", "ubertooth.register.value.grdec.dec_shift",
3403 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grdec_dec_shift_vals_ext, 0x0C00,
3404 NULL, HFILL }
3405 },
3406 { &hf_cc2400_grdec_channel_dec,
3407 { "Channel Decimation", "ubertooth.register.value.grdec.channel_dec",
3408 FT_UINT16, BASE_DEC | BASE_EXT_STRING, &cc2400_grdec_channel_dec_vals_ext, 0x0300,
3409 NULL, HFILL }
3410 },
3411 { &hf_cc2400_grdec_dec_val,
3412 { "Decimation Value", "ubertooth.register.value.grdec.dec_val",
3413 FT_UINT16, BASE_DEC, NULL, 0x00FF,
3414 NULL, HFILL }
3415 },
3416 { &hf_cc2400_pktstatus_reserved_15_11,
3417 { "Reserved [15:11]", "ubertooth.register.value.pktstatus.reserved.15_11",
3418 FT_UINT16, BASE_DEC, NULL, 0xF800,
3419 NULL, HFILL }
3420 },
3421 { &hf_cc2400_pktstatus_sync_word_received,
3422 { "Sync Word Received", "ubertooth.register.value.pktstatus.sync_word_received",
3423 FT_BOOLEAN, 16, NULL, 0x0400,
3424 NULL, HFILL }
3425 },
3426 { &hf_cc2400_pktstatus_crc_ok,
3427 { "CRC OK", "ubertooth.register.value.pktstatus.crc_ok",
3428 FT_BOOLEAN, 16, NULL, 0x0200,
3429 NULL, HFILL }
3430 },
3431 { &hf_cc2400_pktstatus_reserved_8,
3432 { "Reserved [8]", "ubertooth.register.value.pktstatus.reserved.8",
3433 FT_BOOLEAN, 16, NULL, 0x0100,
3434 NULL, HFILL }
3435 },
3436 { &hf_cc2400_pktstatus_reserved_7_0,
3437 { "Reserved [7:0]", "ubertooth.register.value.pktstatus.reserved.7_0",
3438 FT_UINT16, BASE_DEC, NULL, 0x00FF,
3439 NULL, HFILL }
3440 },
3441 };
3442
3443 static ei_register_info ei[] = {
3444 { &ei_unexpected_response, { "ubertooth.unexpected_response", PI_PROTOCOL, PI_ERROR, "Unexpected response for this command", EXPFILL }},
3445 { &ei_unknown_data, { "ubertooth.unknown_data", PI_PROTOCOL, PI_NOTE, "Unknown data", EXPFILL }},
3446 { &ei_unexpected_data, { "ubertooth.unexpected_data", PI_PROTOCOL, PI_WARN, "Unexpected data", EXPFILL }},
3447 };
3448
3449 static gint *ett[] = {
3450 &ett_ubertooth,
3451 &ett_command,
3452 &ett_usb_rx_packet,
3453 &ett_usb_rx_packet_data,
3454 &ett_entry,
3455 &ett_register_value,
3456 &ett_fsdiv_frequency
3457 };
3458
3459 command_info = wmem_tree_new_autoreset(wmem_epan_scope(), wmem_file_scope());
3460
3461 proto_ubertooth = proto_register_protocol("Ubertooth", "UBERTOOTH", "ubertooth");
3462 proto_register_field_array(proto_ubertooth, hf, array_length(hf));
3463 proto_register_subtree_array(ett, array_length(ett));
3464 ubertooth_handle = register_dissector("ubertooth", dissect_ubertooth, proto_ubertooth);
3465
3466 expert_module = expert_register_protocol(proto_ubertooth);
3467 expert_register_field_array(expert_module, ei, array_length(ei));
3468
3469 module = prefs_register_protocol(proto_ubertooth, NULL);
3470 prefs_register_static_text_preference(module, "version",
3471 "Ubertooth Firmware: 2012-10-R1 (also latest version prior to: git-4470774)",
3472 "Version of protocol supported by this dissector.");
3473 }
3474
3475 void
proto_reg_handoff_ubertooth(void)3476 proto_reg_handoff_ubertooth(void)
3477 {
3478 bluetooth_ubertooth_handle = find_dissector_add_dependency("bluetooth_ubertooth", proto_ubertooth);
3479
3480 dissector_add_uint("usb.product", (0x1d50 << 16) | 0x6000, ubertooth_handle); /* Ubertooth Zero */
3481 dissector_add_uint("usb.product", (0x1d50 << 16) | 0x6002, ubertooth_handle); /* Ubertooth One */
3482
3483 dissector_add_for_decode_as("usb.device", ubertooth_handle);
3484 dissector_add_for_decode_as("usb.protocol", ubertooth_handle);
3485 }
3486
3487 /*
3488 * Editor modelines - https://www.wireshark.org/tools/modelines.html
3489 *
3490 * Local variables:
3491 * c-basic-offset: 4
3492 * tab-width: 8
3493 * indent-tabs-mode: nil
3494 * End:
3495 *
3496 * vi: set shiftwidth=4 tabstop=8 expandtab:
3497 * :indentSize=4:tabSize=8:noTabs=true:
3498 */
3499