1 /*
2  * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 #include <errno.h>
9 
10 #include <platform_def.h>
11 
12 #include <arch_helpers.h>
13 #include <common/debug.h>
14 #include <drivers/st/stm32mp_clkfunc.h>
15 #include <lib/xlat_tables/xlat_tables_v2.h>
16 #include <plat/common/platform.h>
17 
plat_get_ns_image_entrypoint(void)18 uintptr_t plat_get_ns_image_entrypoint(void)
19 {
20 	return BL33_BASE;
21 }
22 
plat_get_syscnt_freq2(void)23 unsigned int plat_get_syscnt_freq2(void)
24 {
25 	return read_cntfrq_el0();
26 }
27 
28 static uintptr_t boot_ctx_address;
29 
stm32mp_save_boot_ctx_address(uintptr_t address)30 void stm32mp_save_boot_ctx_address(uintptr_t address)
31 {
32 	boot_ctx_address = address;
33 }
34 
stm32mp_get_boot_ctx_address(void)35 uintptr_t stm32mp_get_boot_ctx_address(void)
36 {
37 	return boot_ctx_address;
38 }
39 
stm32mp_ddrctrl_base(void)40 uintptr_t stm32mp_ddrctrl_base(void)
41 {
42 	return DDRCTRL_BASE;
43 }
44 
stm32mp_ddrphyc_base(void)45 uintptr_t stm32mp_ddrphyc_base(void)
46 {
47 	return DDRPHYC_BASE;
48 }
49 
stm32mp_pwr_base(void)50 uintptr_t stm32mp_pwr_base(void)
51 {
52 	return PWR_BASE;
53 }
54 
stm32mp_rcc_base(void)55 uintptr_t stm32mp_rcc_base(void)
56 {
57 	return RCC_BASE;
58 }
59 
stm32mp_lock_available(void)60 bool stm32mp_lock_available(void)
61 {
62 	const uint32_t c_m_bits = SCTLR_M_BIT | SCTLR_C_BIT;
63 
64 	/* The spinlocks are used only when MMU and data cache are enabled */
65 	return (read_sctlr() & c_m_bits) == c_m_bits;
66 }
67 
stm32mp_check_header(boot_api_image_header_t * header,uintptr_t buffer)68 int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer)
69 {
70 	uint32_t i;
71 	uint32_t img_checksum = 0U;
72 
73 	/*
74 	 * Check header/payload validity:
75 	 *	- Header magic
76 	 *	- Header version
77 	 *	- Payload checksum
78 	 */
79 	if (header->magic != BOOT_API_IMAGE_HEADER_MAGIC_NB) {
80 		ERROR("Header magic\n");
81 		return -EINVAL;
82 	}
83 
84 	if (header->header_version != BOOT_API_HEADER_VERSION) {
85 		ERROR("Header version\n");
86 		return -EINVAL;
87 	}
88 
89 	for (i = 0U; i < header->image_length; i++) {
90 		img_checksum += *(uint8_t *)(buffer + i);
91 	}
92 
93 	if (header->payload_checksum != img_checksum) {
94 		ERROR("Checksum: 0x%x (awaited: 0x%x)\n", img_checksum,
95 		      header->payload_checksum);
96 		return -EINVAL;
97 	}
98 
99 	return 0;
100 }
101 
stm32mp_map_ddr_non_cacheable(void)102 int stm32mp_map_ddr_non_cacheable(void)
103 {
104 	return  mmap_add_dynamic_region(STM32MP_DDR_BASE, STM32MP_DDR_BASE,
105 					STM32MP_DDR_MAX_SIZE,
106 					MT_NON_CACHEABLE | MT_RW | MT_NS);
107 }
108 
stm32mp_unmap_ddr(void)109 int stm32mp_unmap_ddr(void)
110 {
111 	return  mmap_remove_dynamic_region(STM32MP_DDR_BASE,
112 					   STM32MP_DDR_MAX_SIZE);
113 }
114