1 /**
2 *
3 * Copyright (C) 2019, Marvell International Ltd. and its affiliates.
4 *
5 * SPDX-License-Identifier: BSD-2-Clause-Patent
6 *
7 **/
8
9 #include <Uefi.h>
10
11 #include <Library/ArmadaBoardDescLib.h>
12 #include <Library/BaseMemoryLib.h>
13 #include <Library/DebugLib.h>
14 #include <Library/IoLib.h>
15 #include <Library/MemoryAllocationLib.h>
16 #include <Library/MvGpioLib.h>
17 #include <Library/UefiBootServicesTableLib.h>
18
19 //
20 // GPIO Expander
21 //
22 STATIC MV_GPIO_EXPANDER mGpioExpander = {
23 PCA9555_ID,
24 0x21,
25 0x0,
26 };
27
28
29 EFI_STATUS
30 EFIAPI
ArmadaBoardGpioExpanderGet(IN OUT MV_GPIO_EXPANDER ** GpioExpanders,IN OUT UINTN * GpioExpanderCount)31 ArmadaBoardGpioExpanderGet (
32 IN OUT MV_GPIO_EXPANDER **GpioExpanders,
33 IN OUT UINTN *GpioExpanderCount
34 )
35 {
36 *GpioExpanderCount = 1;
37 *GpioExpanders = &mGpioExpander;
38
39 return EFI_SUCCESS;
40 }
41
42 //
43 // PCIE
44 //
45 STATIC
46 MV_PCIE_CONTROLLER mPcieController[] = {
47 { /* PCIE0 @0xF2640000 */
48 .PcieDbiAddress = 0xF2600000,
49 .ConfigSpaceAddress = 0xD0000000,
50 .HaveResetGpio = FALSE,
51 .PcieResetGpio = { 0 },
52 .PcieBusMin = 0,
53 .PcieBusMax = 0xFE,
54 .PcieIoTranslation = 0xDFF00000,
55 .PcieIoWinBase = 0x0,
56 .PcieIoWinSize = 0x10000,
57 .PcieMmio32Translation = 0,
58 .PcieMmio32WinBase = 0xC0000000,
59 .PcieMmio32WinSize = 0x10000000,
60 .PcieMmio64Translation = 0,
61 .PcieMmio64WinBase = MAX_UINT64,
62 .PcieMmio64WinSize = 0,
63 }
64 };
65
66 /**
67 Return the number and description of PCIE controllers used on the platform.
68
69 @param[in out] **PcieControllers Array containing PCIE controllers'
70 description.
71 @param[in out] *PcieControllerCount Amount of used PCIE controllers.
72
73 @retval EFI_SUCCESS The data were obtained successfully.
74 @retval other Return error status.
75
76 **/
77 EFI_STATUS
78 EFIAPI
ArmadaBoardPcieControllerGet(IN OUT MV_PCIE_CONTROLLER CONST ** PcieControllers,IN OUT UINTN * PcieControllerCount)79 ArmadaBoardPcieControllerGet (
80 IN OUT MV_PCIE_CONTROLLER CONST **PcieControllers,
81 IN OUT UINTN *PcieControllerCount
82 )
83 {
84 *PcieControllers = mPcieController;
85 *PcieControllerCount = ARRAY_SIZE (mPcieController);
86
87 return EFI_SUCCESS;
88 }
89
90 //
91 // Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
92 //
93 STATIC
94 MV_BOARD_SDMMC_DESC mSdMmcDescTemplate[] = {
95 { /* eMMC 0xF06E0000 */
96 0, /* SOC will be filled by MvBoardDescDxe */
97 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
98 FALSE, /* Xenon1v8Enabled */
99 TRUE, /* Xenon8BitBusEnabled */
100 FALSE, /* XenonSlowModeEnabled */
101 0x40, /* XenonTuningStepDivisor */
102 EmbeddedSlot /* SlotType */
103 },
104 { /* SD/MMC 0xF2780000 */
105 0, /* SOC will be filled by MvBoardDescDxe */
106 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
107 FALSE, /* Xenon1v8Enabled */
108 FALSE, /* Xenon8BitBusEnabled */
109 FALSE, /* XenonSlowModeEnabled */
110 0x19, /* XenonTuningStepDivisor */
111 EmbeddedSlot /* SlotType */
112 },
113 { /* SD/MMC 0xF6780000 */
114 0, /* SOC will be filled by MvBoardDescDxe */
115 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
116 FALSE, /* Xenon1v8Enabled */
117 FALSE, /* Xenon8BitBusEnabled */
118 FALSE, /* XenonSlowModeEnabled */
119 0x19, /* XenonTuningStepDivisor */
120 EmbeddedSlot /* SlotType */
121 }
122 };
123
124 EFI_STATUS
125 EFIAPI
ArmadaBoardDescSdMmcGet(OUT UINTN * SdMmcDevCount,OUT MV_BOARD_SDMMC_DESC ** SdMmcDesc)126 ArmadaBoardDescSdMmcGet (
127 OUT UINTN *SdMmcDevCount,
128 OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
129 )
130 {
131 *SdMmcDesc = mSdMmcDescTemplate;
132 *SdMmcDevCount = ARRAY_SIZE (mSdMmcDescTemplate);
133
134 return EFI_SUCCESS;
135 }
136