1 /** @file 2 ME config block for PEI phase 3 4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR> 5 SPDX-License-Identifier: BSD-2-Clause-Patent 6 7 **/ 8 #ifndef _ME_PEI_CONFIG_H_ 9 #define _ME_PEI_CONFIG_H_ 10 11 #define ME_PEI_PREMEM_CONFIG_REVISION 1 12 extern EFI_GUID gMePeiPreMemConfigGuid; 13 14 #ifndef PLATFORM_POR 15 #define PLATFORM_POR 0 16 #endif 17 #ifndef FORCE_ENABLE 18 #define FORCE_ENABLE 1 19 #endif 20 #ifndef FORCE_DISABLE 21 #define FORCE_DISABLE 2 22 #endif 23 24 #pragma pack (push,1) 25 /** 26 ME PEI Pre-Mem Configuration Structure. 27 28 <b>Revision 1</b>: 29 - Initial version. 30 **/ 31 typedef struct { 32 CONFIG_BLOCK_HEADER Header; ///< Config Block Header 33 34 UINT32 HeciTimeouts : 1; ///< 0: Disable; <b>1: Enable</b> - HECI Send/Receive Timeouts. 35 36 /** 37 <b>(Test)</b> 38 <b>0: Disabled</b> 39 1: ME DID init stat 0 - Success 40 2: ME DID init stat 1 - No Memory in Channels 41 3: ME DID init stat 2 - Memory Init Error 42 4: ME DID init stat 3 - Memory not preserved across reset 43 **/ 44 UINT32 DidInitStat : 8; 45 /** 46 <b>(Test)</b> 47 <b>0: Set to 0 to enable polling for CPU replacement</b> 48 1: Set to 1 will disable polling for CPU replacement 49 **/ 50 UINT32 DisableCpuReplacedPolling : 1; 51 UINT32 SendDidMsg : 1; ///< <b>(Test)</b> 0: Disable; <b>1: Enable</b> - Enable/Disable to send DID message. 52 /** 53 <b>(Test)</b> 54 <b>0: Set to 0 to enable retry mechanism for HECI APIs</b> 55 1: Set to 1 will disable retry mechanism for HECI APIs 56 **/ 57 UINT32 DisableHeciRetry : 1; 58 /** 59 <b>(Test)</b> 60 <b>0: ME BIOS will check each messages before sending</b> 61 1: ME BIOS always sends messages without checking 62 **/ 63 UINT32 DisableMessageCheck : 1; 64 /** 65 <b>(Test)</b> 66 The SkipMbpHob policy determines whether ME BIOS Payload data will be requested during boot 67 in a MBP message. If set to 1, BIOS will send the MBP message with SkipMbp flag 68 set causing CSME to respond with MKHI header only and no MBP data 69 <b>0: ME BIOS will keep MBP and create HOB for MBP data</b> 70 1: ME BIOS will skip MBP data 71 **/ 72 UINT32 SkipMbpHob : 1; 73 74 UINT32 HeciCommunication2 : 1; ///< <b>(Test)</b> <b>0: Disable</b>; 1: Enable - Enable/Disable HECI2. 75 UINT32 KtDeviceEnable : 1; ///< <b>(Test)</b> 0: Disable; <b>1: Enable</b> - Enable/Disable Kt Device. 76 UINT32 IderDeviceEnable : 1; ///< <b>(Test)</b> 0: Disable; <b>1: Enable</b> - Enable/Disable IDEr. 77 UINT32 RsvdBits : 15; ///< Reserved for future use & Config block alignment 78 79 UINT32 Heci1BarAddress; ///< HECI1 BAR address. 80 UINT32 Heci2BarAddress; ///< HECI2 BAR address. 81 UINT32 Heci3BarAddress; ///< HECI3 BAR address. 82 } ME_PEI_PREMEM_CONFIG; 83 #pragma pack (pop) 84 85 86 #define ME_PEI_CONFIG_REVISION 3 87 extern EFI_GUID gMePeiConfigGuid; 88 89 #pragma pack (push,1) 90 /** 91 ME Pei Post-Mem Configuration Structure. 92 93 <b>Revision 1:</b> 94 - Initial version. 95 <b>Revision 2:</b> 96 - Add MeUnconfigOnRtcClear policy. 97 <b>Revision 3:</b> 98 - Add MeUnconfigIsValid to indicate if MeUnconfigOnRtcClear item is valid. 99 **/ 100 typedef struct { 101 CONFIG_BLOCK_HEADER Header; ///< Config Block Header 102 103 UINT32 EndOfPostMessage : 2; ///< 0: Disabled; 1: Send in PEI; <b>2: Send in DXE</b> - Send EOP at specific phase. 104 /** 105 HECI3 state from Mbp for reference in S3 path only 106 <b>0: Disabled</b>; 1: Enabled 107 **/ 108 UINT32 Heci3Enabled : 1; 109 UINT32 DisableD0I3SettingForHeci : 1; ///< <b>(Test)</b> <b>0: Disable</b>; 1: Enable - Enable/Disable D0i3 for HECI. 110 /** 111 Enable/Disable Me Unconfig On Rtc Clear. If enabled, BIOS will send MeUnconfigOnRtcClearDisable Msg with parameter 0. 112 It will cause ME to unconfig if RTC is cleared. 113 - 0: Disable 114 - <b>1: Enable</b> 115 **/ 116 UINT32 MeUnconfigOnRtcClear : 1; 117 /** 118 Check if MeUnconfigOnRtcClear is valid. The item could be not valid due to CMOS is clear. 119 In that case, MeUnconfigOnRtcClear item will be ignored. 120 - 0: Cmos is clear. Not Valid. 121 - <b>1: Valid</b> 122 **/ 123 UINT32 MeUnconfigIsValid : 1; 124 UINT32 RsvdBits : 26; ///< Reserved for future use & Config block alignment 125 } ME_PEI_CONFIG; 126 127 #pragma pack (pop) 128 129 #endif // _ME_PEI_CONFIG_H_ 130