1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2019 NXP
4  */
5 
6 #include <common.h>
7 #include <fdt_support.h>
8 #include <asm/io.h>
9 #include <asm/arch/sys_proto.h>
10 #include <asm/arch/imx-regs.h>
11 #include <asm/mach-imx/module_fuse.h>
12 #include <linux/errno.h>
13 
14 static struct fuse_entry_desc mx6_fuse_descs[] = {
15 #if defined(CONFIG_MX6ULL)
16 	{MODULE_TSC, "/soc/aips-bus@2000000/tsc@2040000", 0x430, 22},
17 	{MODULE_ADC2, "/soc/aips-bus@2100000/adc@219c000", 0x430, 23},
18 	{MODULE_EPDC, "/soc/aips-bus@2200000/epdc@228c000", 0x430, 24},
19 	{MODULE_ESAI, "/soc/aips-bus@2000000/spba-bus@2000000/esai@2024000", 0x430, 25},
20 	{MODULE_FLEXCAN1, "/soc/aips-bus@2000000/can@2090000", 0x430, 26},
21 	{MODULE_FLEXCAN2, "/soc/aips-bus@2000000/can@2094000", 0x430, 27},
22 	{MODULE_SPDIF, "/soc/aips-bus@2000000/spba-bus@2000000/spdif@2004000", 0x440, 2},
23 	{MODULE_EIM, "/soc/aips-bus@2100000/weim@21b8000", 0x440, 3},
24 	{MODULE_SD1, "/soc/aips-bus@2100000/usdhc@2190000", 0x440, 4},
25 	{MODULE_SD2, "/soc/aips-bus@2100000/usdhc@2194000", 0x440, 5},
26 	{MODULE_QSPI1, "/soc/aips-bus@2100000/qspi@21e0000", 0x440, 6},
27 	{MODULE_GPMI, "/soc/gpmi-nand@1806000", 0x440, 7},
28 	{MODULE_APBHDMA, "/soc/dma-apbh@1804000", 0x440, 7},
29 	{MODULE_LCDIF, "/soc/aips-bus@2100000/lcdif@21c8000", 0x440, 8},
30 	{MODULE_PXP, "/soc/aips-bus@2100000/pxp@21cc000", 0x440, 9},
31 	{MODULE_CSI, "/soc/aips-bus@2100000/csi@21c4000", 0x440, 10},
32 	{MODULE_ADC1, "/soc/aips-bus@2100000/adc@2198000", 0x440, 11},
33 	{MODULE_ENET1, "/soc/aips-bus@2100000/ethernet@2188000", 0x440, 12},
34 	{MODULE_ENET2, "/soc/aips-bus@2000000/ethernet@20b4000", 0x440, 13},
35 	{MODULE_DCP, "/soc/aips-bus@2200000/dcp@2280000", 0x440, 14},
36 	{MODULE_USB_OTG2, "/soc/aips-bus@2100000/usb@2184200", 0x440, 15},
37 	{MODULE_SAI2, "/soc/aips-bus@2000000/spba-bus@2000000/sai@202c000", 0x440, 24},
38 	{MODULE_SAI3, "/soc/aips-bus@2000000/spba-bus@2000000/sai@2030000", 0x440, 24},
39 	{MODULE_DCP_CRYPTO, "/soc/aips-bus@2200000/dcp@2280000", 0x440, 25},
40 	{MODULE_UART5, "/soc/aips-bus@2100000/serial@21f4000", 0x440, 26},
41 	{MODULE_UART6, "/soc/aips-bus@2100000/serial@21fc000", 0x440, 26},
42 	{MODULE_UART7, "/soc/aips-bus@2000000/spba-bus@2000000/serial@2018000", 0x440, 26},
43 	{MODULE_UART8, "/soc/aips-bus@2200000/serial@2288000", 0x440, 26},
44 	{MODULE_PWM5, "/soc/aips-bus@2000000/pwm@20f0000", 0x440, 27},
45 	{MODULE_PWM6, "/soc/aips-bus@2000000/pwm@20f4000", 0x440, 27},
46 	{MODULE_PWM7, "/soc/aips-bus@2000000/pwm@20f8000", 0x440, 27},
47 	{MODULE_PWM8, "/soc/aips-bus@2000000/pwm@20fc000", 0x440, 27},
48 	{MODULE_ECSPI3, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2010000", 0x440, 28},
49 	{MODULE_ECSPI4, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000", 0x440, 28},
50 	{MODULE_I2C3, "/soc/aips-bus@2100000/i2c@21a8000", 0x440, 29},
51 	{MODULE_I2C4, "/soc/aips-bus@2100000/i2c@21f8000", 0x440, 29},
52 	{MODULE_GPT2, "/soc/aips-bus@2000000/gpt@20e8000", 0x440, 30},
53 	{MODULE_EPIT2, "/soc/aips-bus@2000000/epit@20d4000", 0x440, 31},
54 	/* Paths for older imx tree: */
55 	{MODULE_TSC, "/soc/aips-bus@02000000/tsc@02040000", 0x430, 22},
56 	{MODULE_ADC2, "/soc/aips-bus@02100000/adc@0219c000", 0x430, 23},
57 	{MODULE_EPDC, "/soc/aips-bus@02200000/epdc@0228c000", 0x430, 24},
58 	{MODULE_ESAI, "/soc/aips-bus@02000000/spba-bus@02000000/esai@02024000", 0x430, 25},
59 	{MODULE_FLEXCAN1, "/soc/aips-bus@02000000/can@02090000", 0x430, 26},
60 	{MODULE_FLEXCAN2, "/soc/aips-bus@02000000/can@02094000", 0x430, 27},
61 	{MODULE_SPDIF, "/soc/aips-bus@02000000/spba-bus@02000000/spdif@02004000", 0x440, 2},
62 	{MODULE_EIM, "/soc/aips-bus@02100000/weim@021b8000", 0x440, 3},
63 	{MODULE_SD1, "/soc/aips-bus@02100000/usdhc@02190000", 0x440, 4},
64 	{MODULE_SD2, "/soc/aips-bus@02100000/usdhc@02194000", 0x440, 5},
65 	{MODULE_QSPI1, "/soc/aips-bus@02100000/qspi@021e0000", 0x440, 6},
66 	{MODULE_GPMI, "/soc/gpmi-nand@01806000", 0x440, 7},
67 	{MODULE_APBHDMA, "/soc/dma-apbh@01804000", 0x440, 7},
68 	{MODULE_LCDIF, "/soc/aips-bus@02100000/lcdif@021c8000", 0x440, 8},
69 	{MODULE_PXP, "/soc/aips-bus@02100000/pxp@021cc000", 0x440, 9},
70 	{MODULE_CSI, "/soc/aips-bus@02100000/csi@021c4000", 0x440, 10},
71 	{MODULE_ADC1, "/soc/aips-bus@02100000/adc@02198000", 0x440, 11},
72 	{MODULE_ENET1, "/soc/aips-bus@02100000/ethernet@02188000", 0x440, 12},
73 	{MODULE_ENET2, "/soc/aips-bus@02000000/ethernet@020b4000", 0x440, 13},
74 	{MODULE_DCP, "/soc/aips-bus@02200000/dcp@02280000", 0x440, 14},
75 	{MODULE_USB_OTG2, "/soc/aips-bus@02100000/usb@02184200", 0x440, 15},
76 	{MODULE_SAI2, "/soc/aips-bus@02000000/spba-bus@02000000/sai@0202c000", 0x440, 24},
77 	{MODULE_SAI3, "/soc/aips-bus@02000000/spba-bus@02000000/sai@02030000", 0x440, 24},
78 	{MODULE_DCP_CRYPTO, "/soc/aips-bus@02200000/dcp@02280000", 0x440, 25},
79 	{MODULE_UART5, "/soc/aips-bus@02100000/serial@021f4000", 0x440, 26},
80 	{MODULE_UART6, "/soc/aips-bus@02100000/serial@021fc000", 0x440, 26},
81 	{MODULE_UART7, "/soc/aips-bus@02000000/spba-bus@02000000/serial@02018000", 0x440, 26},
82 	{MODULE_UART8, "/soc/aips-bus@02200000/serial@02288000", 0x440, 26},
83 	{MODULE_PWM5, "/soc/aips-bus@02000000/pwm@020f0000", 0x440, 27},
84 	{MODULE_PWM6, "/soc/aips-bus@02000000/pwm@020f4000", 0x440, 27},
85 	{MODULE_PWM7, "/soc/aips-bus@02000000/pwm@020f8000", 0x440, 27},
86 	{MODULE_PWM8, "/soc/aips-bus@02000000/pwm@020fc000", 0x440, 27},
87 	{MODULE_ECSPI3, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000", 0x440, 28},
88 	{MODULE_ECSPI4, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000", 0x440, 28},
89 	{MODULE_I2C3, "/soc/aips-bus@02100000/i2c@021a8000", 0x440, 29},
90 	{MODULE_I2C4, "/soc/aips-bus@02100000/i2c@021f8000", 0x440, 29},
91 	{MODULE_GPT2, "/soc/aips-bus@02000000/gpt@020e8000", 0x440, 30},
92 	{MODULE_EPIT2, "/soc/aips-bus@02000000/epit@020d4000", 0x440, 31},
93 #elif defined(CONFIG_MX6UL)
94 	{MODULE_TSC, "/soc/aips-bus@2000000/tsc@2040000", 0x430, 22},
95 	{MODULE_ADC2, "/soc/aips-bus@2100000/adc@219c000", 0x430, 23},
96 	{MODULE_SIM1, "/soc/aips-bus@2100000/sim@218c000", 0x430, 24},
97 	{MODULE_SIM2, "/soc/aips-bus@2100000/sim@21b4000", 0x430, 25},
98 	{MODULE_FLEXCAN1, "/soc/aips-bus@2000000/can@2090000", 0x430, 26},
99 	{MODULE_FLEXCAN2, "/soc/aips-bus@2000000/can@2094000", 0x430, 27},
100 	{MODULE_SPDIF, "/soc/aips-bus@2000000/spba-bus@2000000/spdif@2004000", 0x440, 2},
101 	{MODULE_EIM, "/soc/aips-bus@2100000/weim@21b8000", 0x440, 3},
102 	{MODULE_SD1, "/soc/aips-bus@2100000/usdhc@2190000", 0x440, 4},
103 	{MODULE_SD2, "/soc/aips-bus@2100000/usdhc@2194000", 0x440, 5},
104 	{MODULE_QSPI1, "/soc/aips-bus@2100000/qspi@21e0000", 0x440, 6},
105 	{MODULE_GPMI, "/soc/gpmi-nand@1806000", 0x440, 7},
106 	{MODULE_APBHDMA, "/soc/dma-apbh@1804000", 0x440, 7},
107 	{MODULE_LCDIF, "/soc/aips-bus@2100000/lcdif@21c8000", 0x440, 8},
108 	{MODULE_PXP, "/soc/aips-bus@2100000/pxp@21cc000", 0x440, 9},
109 	{MODULE_CSI, "/soc/aips-bus@2100000/csi@21c4000", 0x440, 10},
110 	{MODULE_ADC1, "/soc/aips-bus@2100000/adc@2198000", 0x440, 11},
111 	{MODULE_ENET1, "/soc/aips-bus@2100000/ethernet@2188000", 0x440, 12},
112 	{MODULE_ENET2, "/soc/aips-bus@2000000/ethernet@20b4000", 0x440, 13},
113 	{MODULE_CAAM, "/soc/aips-bus@2100000/caam@2140000", 0x440, 14},
114 	{MODULE_USB_OTG2, "/soc/aips-bus@2100000/usb@2184200", 0x440, 15},
115 	{MODULE_SAI2, "/soc/aips-bus@2000000/spba-bus@2000000/sai@202c000", 0x440, 24},
116 	{MODULE_SAI3, "/soc/aips-bus@2000000/spba-bus@2000000/sai@2030000", 0x440, 24},
117 	{MODULE_BEE, "/soc/aips-bus@2000000/bee@2044000", 0x440, 25},
118 	{MODULE_UART5, "/soc/aips-bus@2100000/serial@21f4000", 0x440, 26},
119 	{MODULE_UART6, "/soc/aips-bus@2100000/serial@21fc000", 0x440, 26},
120 	{MODULE_UART7, "/soc/aips-bus@2000000/spba-bus@2000000/serial@2018000", 0x440, 26},
121 	{MODULE_UART8, "/soc/aips-bus@2000000/spba-bus@2000000/serial@2024000", 0x440, 26},
122 	{MODULE_PWM5, "/soc/aips-bus@2000000/pwm@20f0000", 0x440, 27},
123 	{MODULE_PWM6, "/soc/aips-bus@2000000/pwm@20f4000", 0x440, 27},
124 	{MODULE_PWM7, "/soc/aips-bus@2000000/pwm@20f8000", 0x440, 27},
125 	{MODULE_PWM8, "/soc/aips-bus@2000000/pwm@20fc000", 0x440, 27},
126 	{MODULE_ECSPI3, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2010000", 0x440, 28},
127 	{MODULE_ECSPI4, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000", 0x440, 28},
128 	{MODULE_I2C3, "/soc/aips-bus@2100000/i2c@21a8000", 0x440, 29},
129 	{MODULE_I2C4, "/soc/aips-bus@2100000/i2c@21f8000", 0x440, 29},
130 	{MODULE_GPT2, "/soc/aips-bus@2000000/gpt@20e8000", 0x440, 30},
131 	{MODULE_EPIT2, "/soc/aips-bus@2000000/epit@20d4000", 0x440, 31},
132 	/* Paths for older imx tree: */
133 	{MODULE_TSC, "/soc/aips-bus@02000000/tsc@02040000", 0x430, 22},
134 	{MODULE_ADC2, "/soc/aips-bus@02100000/adc@0219c000", 0x430, 23},
135 	{MODULE_SIM1, "/soc/aips-bus@02100000/sim@0218c000", 0x430, 24},
136 	{MODULE_SIM2, "/soc/aips-bus@02100000/sim@021b4000", 0x430, 25},
137 	{MODULE_FLEXCAN1, "/soc/aips-bus@02000000/can@02090000", 0x430, 26},
138 	{MODULE_FLEXCAN2, "/soc/aips-bus@02000000/can@02094000", 0x430, 27},
139 	{MODULE_SPDIF, "/soc/aips-bus@02000000/spba-bus@02000000/spdif@02004000", 0x440, 2},
140 	{MODULE_EIM, "/soc/aips-bus@02100000/weim@021b8000", 0x440, 3},
141 	{MODULE_SD1, "/soc/aips-bus@02100000/usdhc@02190000", 0x440, 4},
142 	{MODULE_SD2, "/soc/aips-bus@02100000/usdhc@02194000", 0x440, 5},
143 	{MODULE_QSPI1, "/soc/aips-bus@02100000/qspi@021e0000", 0x440, 6},
144 	{MODULE_GPMI, "/soc/gpmi-nand@01806000", 0x440, 7},
145 	{MODULE_APBHDMA, "/soc/dma-apbh@01804000", 0x440, 7},
146 	{MODULE_LCDIF, "/soc/aips-bus@02100000/lcdif@021c8000", 0x440, 8},
147 	{MODULE_PXP, "/soc/aips-bus@02100000/pxp@021cc000", 0x440, 9},
148 	{MODULE_CSI, "/soc/aips-bus@02100000/csi@021c4000", 0x440, 10},
149 	{MODULE_ADC1, "/soc/aips-bus@02100000/adc@02198000", 0x440, 11},
150 	{MODULE_ENET1, "/soc/aips-bus@02100000/ethernet@02188000", 0x440, 12},
151 	{MODULE_ENET2, "/soc/aips-bus@02000000/ethernet@020b4000", 0x440, 13},
152 	{MODULE_CAAM, "/soc/aips-bus@02100000/caam@2140000", 0x440, 14},
153 	{MODULE_USB_OTG2, "/soc/aips-bus@02100000/usb@02184200", 0x440, 15},
154 	{MODULE_SAI2, "/soc/aips-bus@02000000/spba-bus@02000000/sai@0202c000", 0x440, 24},
155 	{MODULE_SAI3, "/soc/aips-bus@02000000/spba-bus@02000000/sai@02030000", 0x440, 24},
156 	{MODULE_BEE, "/soc/aips-bus@02000000/bee@02044000", 0x440, 25},
157 	{MODULE_UART5, "/soc/aips-bus@02100000/serial@021f4000", 0x440, 26},
158 	{MODULE_UART6, "/soc/aips-bus@02100000/serial@021fc000", 0x440, 26},
159 	{MODULE_UART7, "/soc/aips-bus@02000000/spba-bus@02000000/serial@02018000", 0x440, 26},
160 	{MODULE_UART8, "/soc/aips-bus@02000000/spba-bus@02000000/serial@02024000", 0x440, 26},
161 	{MODULE_PWM5, "/soc/aips-bus@02000000/pwm@020f0000", 0x440, 27},
162 	{MODULE_PWM6, "/soc/aips-bus@02000000/pwm@020f4000", 0x440, 27},
163 	{MODULE_PWM7, "/soc/aips-bus@02000000/pwm@020f8000", 0x440, 27},
164 	{MODULE_PWM8, "/soc/aips-bus@02000000/pwm@020fc000", 0x440, 27},
165 	{MODULE_ECSPI3, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000", 0x440, 28},
166 	{MODULE_ECSPI4, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000", 0x440, 28},
167 	{MODULE_I2C3, "/soc/aips-bus@02100000/i2c@021a8000", 0x440, 29},
168 	{MODULE_I2C4, "/soc/aips-bus@02100000/i2c@021f8000", 0x440, 29},
169 	{MODULE_GPT2, "/soc/aips-bus@02000000/gpt@020e8000", 0x440, 30},
170 	{MODULE_EPIT2, "/soc/aips-bus@02000000/epit@020d4000", 0x440, 31},
171 #endif
172 };
173 
check_module_fused(enum fuse_module_type module)174 u32 check_module_fused(enum fuse_module_type module)
175 {
176 	u32 i, reg;
177 
178 	for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) {
179 		if (mx6_fuse_descs[i].module == module) {
180 			reg = readl(OCOTP_BASE_ADDR +
181 				    mx6_fuse_descs[i].fuse_word_offset);
182 			if (reg & BIT(mx6_fuse_descs[i].fuse_bit_offset))
183 				return 1; /* disabled */
184 			else
185 				return 0; /* enabled */
186 		}
187 	}
188 
189 	return  0; /* Not has a fuse, always enabled */
190 }
191 
192 #ifdef CONFIG_OF_SYSTEM_SETUP
ft_system_setup(void * blob,struct bd_info * bd)193 int ft_system_setup(void *blob, struct bd_info *bd)
194 {
195 	const char *status = "disabled";
196 	u32 i, reg;
197 	int rc, off;
198 
199 	for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) {
200 		reg = readl(OCOTP_BASE_ADDR +
201 			    mx6_fuse_descs[i].fuse_word_offset);
202 		if (reg & BIT(mx6_fuse_descs[i].fuse_bit_offset)) {
203 			off = fdt_path_offset(blob,
204 					      mx6_fuse_descs[i].node_path);
205 
206 			if (off < 0)
207 				continue; /* Not found, skip it */
208 add_status:
209 			rc = fdt_setprop(blob, nodeoff, "status", status,
210 					 strlen(status) + 1);
211 			if (rc) {
212 				if (rc == -FDT_ERR_NOSPACE) {
213 					rc = fdt_increase_size(blob, 512);
214 					if (!rc)
215 						goto add_status;
216 				}
217 				printf("Unable to update property %s:%s, err=%s\n", mx6_fuse_descs[i].node_path, "status", fdt_strerror(rc));
218 			} else {
219 				printf("Modify %s disabled\n", mx6_fuse_descs[i].node_path);
220 			}
221 		}
222 	}
223 
224 	return 0;
225 }
226 #endif
227 
esdhc_fused(ulong base_addr)228 u32 esdhc_fused(ulong base_addr)
229 {
230 	switch (base_addr) {
231 	case USDHC1_BASE_ADDR:
232 		return check_module_fused(MODULE_SD1);
233 	case USDHC2_BASE_ADDR:
234 		return check_module_fused(MODULE_SD2);
235 #ifdef USDHC3_BASE_ADDR
236 	case USDHC3_BASE_ADDR:
237 		return check_module_fused(MODULE_SD3);
238 #endif
239 #ifdef USDHC4_BASE_ADDR
240 	case USDHC4_BASE_ADDR:
241 		return check_module_fused(MODULE_SD4);
242 #endif
243 	default:
244 		return 0;
245 	}
246 }
247 
ecspi_fused(ulong base_addr)248 u32 ecspi_fused(ulong base_addr)
249 {
250 	switch (base_addr) {
251 	case ECSPI1_BASE_ADDR:
252 		return check_module_fused(MODULE_ECSPI1);
253 	case ECSPI2_BASE_ADDR:
254 		return check_module_fused(MODULE_ECSPI2);
255 	case ECSPI3_BASE_ADDR:
256 		return check_module_fused(MODULE_ECSPI3);
257 	case ECSPI4_BASE_ADDR:
258 		return check_module_fused(MODULE_ECSPI4);
259 #ifdef ECSPI5_BASE_ADDR
260 	case ECSPI5_BASE_ADDR:
261 		return check_module_fused(MODULE_ECSPI5);
262 #endif
263 	default:
264 		return 0;
265 	}
266 }
267 
usb_fused(ulong base_addr)268 u32 usb_fused(ulong base_addr)
269 {
270 	int i = (base_addr - USB_BASE_ADDR) / 0x200;
271 
272 	return check_module_fused(MODULE_USB_OTG1 + i);
273 }
274 
qspi_fused(ulong base_addr)275 u32 qspi_fused(ulong base_addr)
276 {
277 	switch (base_addr) {
278 #ifdef QSPI1_BASE_ADDR
279 	case QSPI1_BASE_ADDR:
280 		return check_module_fused(MODULE_QSPI1);
281 #endif
282 
283 #ifdef QSPI2_BASE_ADDR
284 	case QSPI2_BASE_ADDR:
285 		return check_module_fused(MODULE_QSPI2);
286 #endif
287 	default:
288 		return 0;
289 	}
290 }
291 
i2c_fused(ulong base_addr)292 u32 i2c_fused(ulong base_addr)
293 {
294 	switch (base_addr) {
295 	case I2C1_BASE_ADDR:
296 		return check_module_fused(MODULE_I2C1);
297 	case I2C2_BASE_ADDR:
298 		return check_module_fused(MODULE_I2C2);
299 	case I2C3_BASE_ADDR:
300 		return check_module_fused(MODULE_I2C3);
301 #ifdef I2C4_BASE_ADDR
302 	case I2C4_BASE_ADDR:
303 		return check_module_fused(MODULE_I2C4);
304 #endif
305 	}
306 
307 	return 0;
308 }
309 
enet_fused(ulong base_addr)310 u32 enet_fused(ulong base_addr)
311 {
312 	switch (base_addr) {
313 	case ENET_BASE_ADDR:
314 		return check_module_fused(MODULE_ENET1);
315 #ifdef ENET2_BASE_ADDR
316 	case ENET2_BASE_ADDR:
317 		return check_module_fused(MODULE_ENET2);
318 #endif
319 	default:
320 		return 0;
321 	}
322 }
323