1// SPDX-License-Identifier: GPL-2.0+ 2 3#include <dt-bindings/memory/stm32-sdram.h> 4 5/{ 6 clocks { 7 u-boot,dm-pre-reloc; 8 }; 9 10 aliases { 11 gpio0 = &gpioa; 12 gpio1 = &gpiob; 13 gpio2 = &gpioc; 14 gpio3 = &gpiod; 15 gpio4 = &gpioe; 16 gpio5 = &gpiof; 17 gpio6 = &gpiog; 18 gpio7 = &gpioh; 19 gpio8 = &gpioi; 20 gpio9 = &gpioj; 21 gpio10 = &gpiok; 22 mmc0 = &sdmmc1; 23 pinctrl0 = &pinctrl; 24 }; 25 26 soc { 27 u-boot,dm-pre-reloc; 28 pin-controller { 29 u-boot,dm-pre-reloc; 30 }; 31 32 fmc: fmc@52004000 { 33 compatible = "st,stm32h7-fmc"; 34 reg = <0x52004000 0x1000>; 35 clocks = <&rcc FMC_CK>; 36 37 pinctrl-0 = <&fmc_pins>; 38 pinctrl-names = "default"; 39 status = "okay"; 40 }; 41 }; 42}; 43 44&clk_hse { 45 u-boot,dm-pre-reloc; 46}; 47 48&clk_i2s { 49 u-boot,dm-pre-reloc; 50}; 51 52&clk_lse { 53 u-boot,dm-pre-reloc; 54}; 55 56 57&fmc { 58 u-boot,dm-pre-reloc; 59}; 60 61&gpioa { 62 u-boot,dm-pre-reloc; 63 compatible = "st,stm32-gpio"; 64}; 65 66&gpiob { 67 u-boot,dm-pre-reloc; 68 compatible = "st,stm32-gpio"; 69}; 70 71&gpioc { 72 u-boot,dm-pre-reloc; 73 compatible = "st,stm32-gpio"; 74}; 75 76&gpiod { 77 u-boot,dm-pre-reloc; 78 compatible = "st,stm32-gpio"; 79}; 80 81&gpioe { 82 u-boot,dm-pre-reloc; 83 compatible = "st,stm32-gpio"; 84}; 85 86&gpiof { 87 u-boot,dm-pre-reloc; 88 compatible = "st,stm32-gpio"; 89}; 90 91&gpiog { 92 u-boot,dm-pre-reloc; 93 compatible = "st,stm32-gpio"; 94}; 95 96&gpioh { 97 u-boot,dm-pre-reloc; 98 compatible = "st,stm32-gpio"; 99}; 100 101&gpioi { 102 u-boot,dm-pre-reloc; 103 compatible = "st,stm32-gpio"; 104}; 105 106&gpioj { 107 u-boot,dm-pre-reloc; 108 compatible = "st,stm32-gpio"; 109}; 110 111&gpiok { 112 u-boot,dm-pre-reloc; 113 compatible = "st,stm32-gpio"; 114}; 115 116&pwrcfg { 117 u-boot,dm-pre-reloc; 118}; 119 120&rcc { 121 u-boot,dm-pre-reloc; 122}; 123 124&sdmmc1 { 125 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; 126}; 127 128&timer5 { 129 u-boot,dm-pre-reloc; 130}; 131 132&pinctrl { 133 u-boot,dm-pre-reloc; 134}; 135