1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (c) 2017 Intel Corporation
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/x86-gpio.h>
9#include <dt-bindings/interrupt-router/intel-irq.h>
10
11/include/ "skeleton.dtsi"
12/include/ "rtc.dtsi"
13/include/ "tsc_timer.dtsi"
14
15#include "smbios.dtsi"
16
17/ {
18	model = "Intel Edison";
19	compatible = "intel,edison", "intel,tangier";
20
21	aliases {
22		serial0 = &serial0;
23		serial1 = &serial1;
24		serial2 = &serial2;
25	};
26
27	binman: binman {
28		multiple-images;
29	};
30
31	chosen {
32		stdout-path = &serial2;
33	};
34
35	cpus {
36		#address-cells = <1>;
37		#size-cells = <0>;
38
39		cpu@0 {
40			device_type = "cpu";
41			compatible = "cpu-x86";
42			reg = <0>;
43			intel,apic-id = <0>;
44		};
45
46		cpu@1 {
47			device_type = "cpu";
48			compatible = "cpu-x86";
49			reg = <1>;
50			intel,apic-id = <2>;
51		};
52	};
53
54	pci {
55		compatible = "pci-x86";
56		#address-cells = <3>;
57		#size-cells = <2>;
58		u-boot,dm-pre-reloc;
59		ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
60			  0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
61			  0x01000000 0x0 0x2000 0x2000 0 0xe000>;
62	};
63
64	serial0: serial@ff010080 {
65		compatible = "intel,mid-uart";
66		reg = <0xff010080 0x100>;
67		reg-shift = <0>;
68		clock-frequency = <29491200>;
69		current-speed = <115200>;
70	};
71
72	serial1: serial@ff010100 {
73		compatible = "intel,mid-uart";
74		reg = <0xff010100 0x100>;
75		reg-shift = <0>;
76		clock-frequency = <29491200>;
77		current-speed = <115200>;
78	};
79
80	serial2: serial@ff010180 {
81		compatible = "intel,mid-uart";
82		reg = <0xff010180 0x100>;
83		reg-shift = <0>;
84		clock-frequency = <29491200>;
85		current-speed = <115200>;
86	};
87
88	emmc: mmc@ff3fc000 {
89		compatible = "intel,sdhci-tangier";
90		reg = <0xff3fc000 0x1000>;
91	};
92
93	sdcard: mmc@ff3fa000 {
94		compatible = "intel,sdhci-tangier";
95		reg = <0xff3fa000 0x1000>;
96	};
97
98	pmu: power@ff00b000 {
99		compatible = "intel,pmu-mid";
100		reg = <0xff00b000 0x1000>;
101	};
102
103	scu: ipc@ff009000 {
104		compatible = "intel,scu-ipc";
105		reg = <0xff009000 0x1000>;
106	};
107
108	usb: usb@f9100000 {
109		compatible = "intel,tangier-dwc3";
110		#address-cells = <1>;
111		#size-cells = <1>;
112
113		dwc3: dwc3 {
114			reg = <0xf9100000 0x100000>;
115			maximum-speed = "high-speed";
116			dr_mode = "peripheral";
117		};
118	};
119
120	watchdog: wdt@0 {
121		compatible = "intel,tangier-wdt";
122	};
123
124	reset {
125		compatible = "intel,reset-tangier";
126		u-boot,dm-pre-reloc;
127	};
128
129	pinctrl {
130		compatible = "intel,pinctrl-tangier";
131		reg = <0xff0c0000 0x8000>;
132
133		/*
134		 * Initial configuration came from the firmware.
135		 * Which quite likely has been used in the phones, where I2C #8,
136		 * that is not part of Atom peripheral, is in use.
137		 * Thus we need to override the leftover.
138		 */
139		i2c6_scl@0 {
140			pad-offset = <111>;
141			mode-func = <1>;
142			protected;
143		};
144		i2c6_sda@0 {
145			pad-offset = <112>;
146			mode-func = <1>;
147			protected;
148		};
149	};
150};
151
152&binman {
153	u-boot-edison {
154		filename = "u-boot-edison.img";
155
156		/* This is the OSIP */
157		blob {
158			filename = "edison-osip.dat";
159		};
160
161		u-boot {
162			offset = <0x200>;
163		};
164
165		u-boot-env {
166			offset = <0x200200>;
167			filename = "edison-environment.txt";
168			size = <0x10000>;
169			fill-byte = [ff];
170		};
171
172		u-boot-env2 {
173			type = "u-boot-env";
174			offset = <0x500200>;
175			filename = "edison-environment.txt";
176			size = <0x10000>;
177			fill-byte = [ff];
178		};
179	};
180};
181