1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2017-2019 SoMLabs
4 * Copyright (C) 2016 Freescale Semiconductor, Inc.
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/input/input.h>
10#include "imx6ull.dtsi"
11
12/ {
13	model = "SoMLabs VisionSOM-6ULL";
14	compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
15
16	chosen {
17		stdout-path = &uart1;
18	};
19
20	memory {
21		reg = <0x80000000 0x20000000>;
22	};
23
24	leds {
25		compatible = "gpio-leds";
26
27		usr0 {
28			label = "usr0";
29			gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
30			linux,default-trigger = "heartbeat";
31		};
32
33		usr1 {
34			label = "usr1";
35			gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
36			linux,default-trigger = "mmc0";
37		};
38
39		usr2 {
40			label = "usr2";
41			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
42			linux,default-trigger = "mmc1";
43		};
44
45		usr3 {
46			label = "usr3";
47			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
48		};
49	};
50
51	regulators {
52		compatible = "simple-bus";
53		#address-cells = <1>;
54		#size-cells = <0>;
55
56		reg_usb_otg1_vbus: regulator@2 {
57			compatible = "regulator-fixed";
58			reg = <2>;
59			pinctrl-names = "default";
60			pinctrl-0 = <&pinctrl_usb_otg1>;
61			regulator-name = "usb_otg1_vbus";
62			regulator-min-microvolt = <5000000>;
63			regulator-max-microvolt = <5000000>;
64			gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
65			enable-active-high;
66		};
67
68		reg_usb_otg2_vbus: regulator@3 {
69			compatible = "regulator-fixed";
70			reg = <3>;
71			pinctrl-names = "default";
72			pinctrl-0 = <&pinctrl_usb_otg2>;
73			regulator-name = "usb_otg2_vbus";
74			regulator-min-microvolt = <5000000>;
75			regulator-max-microvolt = <5000000>;
76			gpio = <&gpio2 8 GPIO_ACTIVE_HIGH>;
77			enable-active-high;
78		};
79
80	};
81};
82
83&cpu0 {
84	arm-supply = <&reg_arm>;
85	soc-supply = <&reg_soc>;
86};
87
88&clks {
89	assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
90	assigned-clock-rates = <786432000>;
91};
92
93&fec1 {
94	pinctrl-names = "default";
95	pinctrl-0 = <&pinctrl_enet1>;
96	phy-mode = "rmii";
97	phy-handle = <&ethphy0>;
98	status = "okay";
99
100	mdio {
101		#address-cells = <1>;
102		#size-cells = <0>;
103
104		ethphy0: ethernet-phy@1 {
105			compatible = "ethernet-phy-ieee802.3-c22";
106			reg = <1>;
107		};
108	};
109
110};
111
112&gpc {
113	fsl,cpu_pupscr_sw2iso = <0x1>;
114	fsl,cpu_pupscr_sw = <0x0>;
115	fsl,cpu_pdnscr_iso2sw = <0x1>;
116	fsl,cpu_pdnscr_iso = <0x1>;
117	fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
118};
119
120&i2c1 {
121	clock-frequency = <100000>;
122	pinctrl-names = "default";
123	pinctrl-0 = <&pinctrl_i2c1>;
124
125};
126
127&i2c2 {
128	clock_frequency = <100000>;
129	pinctrl-names = "default";
130	pinctrl-0 = <&pinctrl_i2c2>;
131};
132
133&iomuxc {
134	pinctrl-names = "default";
135	pinctrl-0 = <&pinctrl_hog_1>;
136
137	pinctrl_hog_1: hoggrp-1 {
138		fsl,pins = <
139			/* 32kHz low power reference clock for WiFi */
140			MX6UL_PAD_JTAG_TCK__OSC32K_32K_OUT	0x17099
141			/* LED 0..3 */
142			MX6UL_PAD_JTAG_MOD__GPIO1_IO10		0x17099
143			MX6UL_PAD_JTAG_TMS__GPIO1_IO11		0x17099
144			MX6UL_PAD_JTAG_TDI__GPIO1_IO13		0x17099
145			MX6UL_PAD_JTAG_TDO__GPIO1_IO12		0x17099
146		>;
147	};
148
149	pinctrl_enet1: enet1grp {
150		fsl,pins = <
151			MX6UL_PAD_GPIO1_IO07__ENET1_MDC		0x1b0b0
152			MX6UL_PAD_GPIO1_IO06__ENET1_MDIO	0x1F829
153
154			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0
155			MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	0x1b0b0
156			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x1b0b0
157			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x1b0b0
158			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0
159			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0
160			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0
161			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x400010a9
162		>;
163	};
164
165	pinctrl_i2c1: i2c1grp {
166		fsl,pins = <
167			MX6UL_PAD_UART4_TX_DATA__I2C1_SCL	0x4001b8b0
168			MX6UL_PAD_UART4_RX_DATA__I2C1_SDA	0x4001b8b0
169		>;
170	};
171
172	pinctrl_i2c2: i2c2grp {
173		fsl,pins = <
174			MX6UL_PAD_UART5_TX_DATA__I2C2_SCL	0x4001b8b0
175			MX6UL_PAD_UART5_RX_DATA__I2C2_SDA	0x4001b8b0
176		>;
177	};
178
179	pinctrl_tsc: tscgrp {
180		fsl,pins = <
181			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0xb0
182			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0xb0
183			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0xb0
184			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	0xb0
185		>;
186	};
187
188	pinctrl_uart1: uart1grp {
189		fsl,pins = <
190			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1
191			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1
192		>;
193	};
194
195	pinctrl_usdhc2: usdhc2grp {
196		fsl,pins = <
197			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x10069
198			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x17059
199			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x17059
200			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x17059
201			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x17059
202			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x17059
203		>;
204	};
205
206	pinctrl_wdog: wdoggrp {
207		fsl,pins = <
208			MX6UL_PAD_ENET2_RX_ER__WDOG1_WDOG_ANY	0x30b0
209		>;
210	};
211
212	pinctrl_usb_otg1: usbotg1grp {
213		fsl,pins = <
214			MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID	0x17059
215			MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12	0x10b0
216		>;
217	};
218
219	pinctrl_usb_otg2: usbotg2grp {
220		fsl,pins = <
221			MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	0x10b0
222		>;
223	};
224};
225
226&tsc {
227	pinctrl-names = "default";
228	pinctrl-0 = <&pinctrl_tsc>;
229	xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
230	measure-delay-time = <0xffff>;
231	pre-charge-time = <0xfff>;
232	status = "okay";
233};
234
235&uart1 {
236	pinctrl-names = "default";
237	pinctrl-0 = <&pinctrl_uart1>;
238	status = "okay";
239};
240
241&usbotg1 {
242	vbus-supply = <&reg_usb_otg1_vbus>;
243	pinctrl-names = "default";
244	pinctrl-0 = <&pinctrl_usb_otg1>;
245	dr_mode = "otg";
246	srp-disable;
247	hnp-disable;
248	adp-disable;
249	status = "okay";
250};
251
252&usbotg2 {
253	vbus-supply = <&reg_usb_otg2_vbus>;
254	dr_mode = "host";
255	status = "okay";
256};
257
258&usbphy1 {
259	tx-d-cal = <0x5>;
260};
261
262&usbphy2 {
263	tx-d-cal = <0x5>;
264};
265
266&usdhc2 {
267	non-removable;
268	disable-wp;
269	status = "okay";
270};
271
272&wdog1 {
273	pinctrl-names = "default";
274	pinctrl-0 = <&pinctrl_wdog>;
275	fsl,wdog_b;
276};
277