1// SPDX-License-Identifier:     GPL-2.0
2/*
3 * Copyright (C) 2014, 2020, Intel Corporation
4 */
5
6/ {
7	chosen {
8		tick-timer = &timer2;
9		u-boot,dm-pre-reloc;
10	};
11
12	memory@0 {
13		u-boot,dm-pre-reloc;
14	};
15
16	soc {
17		u-boot,dm-pre-reloc;
18	};
19};
20
21&clkmgr {
22	u-boot,dm-pre-reloc;
23
24	clocks {
25		u-boot,dm-pre-reloc;
26	};
27};
28
29&cb_intosc_hs_div2_clk {
30	u-boot,dm-pre-reloc;
31};
32
33&cb_intosc_ls_clk {
34	u-boot,dm-pre-reloc;
35};
36
37&f2s_free_clk {
38	u-boot,dm-pre-reloc;
39};
40
41&gmac0 {
42	compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
43	altr,sysmgr-syscon = <&sysmgr 0x44 0>;
44};
45
46&gmac1 {
47	compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
48	altr,sysmgr-syscon = <&sysmgr 0x48 0>;
49};
50
51&gmac2 {
52	compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
53	altr,sysmgr-syscon = <&sysmgr 0x4C 0>;
54};
55
56&i2c0 {
57	reset-names = "i2c";
58};
59
60&i2c1 {
61	reset-names = "i2c";
62};
63
64&i2c2 {
65	reset-names = "i2c";
66};
67
68&i2c3 {
69	reset-names = "i2c";
70};
71
72&i2c4 {
73	reset-names = "i2c";
74};
75
76&L2 {
77	u-boot,dm-pre-reloc;
78};
79
80&l4_mp_clk {
81	u-boot,dm-pre-reloc;
82};
83
84&l4_sp_clk {
85	u-boot,dm-pre-reloc;
86};
87
88&l4_sys_free_clk {
89	u-boot,dm-pre-reloc;
90};
91
92&main_periph_ref_clk {
93	u-boot,dm-pre-reloc;
94};
95
96&main_pll {
97	u-boot,dm-pre-reloc;
98};
99
100&main_noc_base_clk {
101	u-boot,dm-pre-reloc;
102};
103
104&noc_free_clk {
105	u-boot,dm-pre-reloc;
106};
107
108&osc1 {
109	u-boot,dm-pre-reloc;
110};
111
112&peri_noc_base_clk {
113	u-boot,dm-pre-reloc;
114};
115
116&periph_pll {
117	u-boot,dm-pre-reloc;
118};
119
120&porta {
121	bank-name = "porta";
122};
123
124&portb {
125	bank-name = "portb";
126};
127
128&portc {
129	bank-name = "portc";
130};
131
132&rst {
133	u-boot,dm-pre-reloc;
134};
135
136&sysmgr {
137	u-boot,dm-pre-reloc;
138};
139
140&timer2 {
141	u-boot,dm-pre-reloc;
142};
143