1/dts-v1/;
2
3/ {
4	model = "ST STV0991 application board";
5	compatible = "st,stv0991";
6	#address-cells = <1>;
7	#size-cells = <1>;
8
9	chosen {
10		stdout-path = &uart0;
11	};
12
13	memory {
14		device_type="memory";
15		reg = <0x0 0x198000>;
16	};
17
18	uart0: serial@0x80406000 {
19		compatible = "arm,pl011", "arm,primecell";
20		reg = <0x80406000 0x1000>;
21		clock = <2700000>;
22	};
23
24	aliases {
25		spi0 = "/spi@80203000";		/* QSPI */
26	};
27
28	qspi: spi@80203000 {
29			compatible = "cdns,qspi-nor";
30			#address-cells = <1>;
31			#size-cells = <0>;
32			reg = <0x80203000 0x100>,
33				<0x40000000 0x1000000>;
34			clocks = <3750000>;
35			cdns,fifo-depth = <256>;
36			cdns,fifo-width = <4>;
37			cdns,trigger-address = <0x40000000>;
38			status = "okay";
39
40			flash0: n25q32@0 {
41				#address-cells = <1>;
42				#size-cells = <1>;
43				compatible = "jedec,spi-nor";
44				reg = <0>;		/* chip select */
45				spi-max-frequency = <50000000>;
46				m25p,fast-read;
47				page-size = <256>;
48				block-size = <16>; 	/* 2^16, 64KB */
49				cdns,tshsl-ns = <50>;
50				cdns,tsd2d-ns = <50>;
51				cdns,tchsh-ns = <4>;
52				cdns,tslch-ns = <4>;
53			};
54	};
55};
56