1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * JZ4780 common routines 4 * 5 * Copyright (c) 2013 Imagination Technologies 6 * Author: Paul Burton <paul.burton@imgtec.com> 7 */ 8 9 #include <config.h> 10 #include <common.h> 11 #include <asm/io.h> 12 #include <linux/bitops.h> 13 #include <mach/jz4780.h> 14 15 /* WDT */ 16 #define WDT_TDR 0x00 17 #define WDT_TCER 0x04 18 #define WDT_TCNT 0x08 19 #define WDT_TCSR 0x0C 20 21 /* Register definition */ 22 #define WDT_TCSR_PRESCALE_BIT 3 23 #define WDT_TCSR_PRESCALE_MASK (0x7 << WDT_TCSR_PRESCALE_BIT) 24 #define WDT_TCSR_PRESCALE1 (0x0 << WDT_TCSR_PRESCALE_BIT) 25 #define WDT_TCSR_PRESCALE4 (0x1 << WDT_TCSR_PRESCALE_BIT) 26 #define WDT_TCSR_PRESCALE16 (0x2 << WDT_TCSR_PRESCALE_BIT) 27 #define WDT_TCSR_PRESCALE64 (0x3 << WDT_TCSR_PRESCALE_BIT) 28 #define WDT_TCSR_PRESCALE256 (0x4 << WDT_TCSR_PRESCALE_BIT) 29 #define WDT_TCSR_PRESCALE1024 (0x5 << WDT_TCSR_PRESCALE_BIT) 30 #define WDT_TCSR_EXT_EN BIT(2) 31 #define WDT_TCSR_RTC_EN BIT(1) 32 #define WDT_TCSR_PCK_EN BIT(0) 33 34 #define WDT_TCER_TCEN BIT(0) 35 _machine_restart(void)36void _machine_restart(void) 37 { 38 void __iomem *wdt_regs = (void __iomem *)WDT_BASE; 39 40 /* EXTAL as the timer clock input. */ 41 writew(WDT_TCSR_PRESCALE1 | WDT_TCSR_EXT_EN, wdt_regs + WDT_TCSR); 42 43 /* Reset the WDT counter and timeout. */ 44 writew(0, wdt_regs + WDT_TCNT); 45 writew(0, wdt_regs + WDT_TDR); 46 47 jz4780_tcu_wdt_start(); 48 49 /* WDT start */ 50 writeb(WDT_TCER_TCEN, wdt_regs + WDT_TCER); 51 52 for (;;) 53 ; 54 } 55