1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2020 Compass Electronics Group, LLC
4 */
5
6 #include <common.h>
7 #include <miiphy.h>
8 #include <netdev.h>
9
10 #include <asm/arch/clock.h>
11 #include <asm/arch/sys_proto.h>
12 #include <asm/global_data.h>
13 #include <asm/io.h>
14
15 DECLARE_GLOBAL_DATA_PTR;
16
17 #if IS_ENABLED(CONFIG_FEC_MXC)
setup_fec(void)18 static int setup_fec(void)
19 {
20 struct iomuxc_gpr_base_regs *gpr =
21 (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
22
23 /* Use 125M anatop REF_CLK1 for ENET1, not from external */
24 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
25
26 return 0;
27 }
28
board_phy_config(struct phy_device * phydev)29 int board_phy_config(struct phy_device *phydev)
30 {
31 /* enable rgmii rxc skew and phy mode select to RGMII copper */
32 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
33 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
34
35 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
36 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
37 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
38 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
39
40 if (phydev->drv->config)
41 phydev->drv->config(phydev);
42 return 0;
43 }
44 #endif
45
board_init(void)46 int board_init(void)
47 {
48 if (IS_ENABLED(CONFIG_FEC_MXC))
49 setup_fec();
50
51 return 0;
52 }
53
board_mmc_get_env_dev(int devno)54 int board_mmc_get_env_dev(int devno)
55 {
56 return CONFIG_SYS_MMC_ENV_DEV;
57 }
58