1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2007 - 2013 Tensilica Inc.
4 * (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
5 */
6
7 #include <common.h>
8 #include <command.h>
9 #include <dm.h>
10 #include <init.h>
11 #include <dm/platform_data/net_ethoc.h>
12 #include <env.h>
13 #include <linux/ctype.h>
14 #include <linux/string.h>
15 #include <linux/stringify.h>
16 #include <asm/global_data.h>
17
18 DECLARE_GLOBAL_DATA_PTR;
19
20 /*
21 * Check board idendity.
22 * (Print information about the board to stdout.)
23 */
24
25
26 #if defined(CONFIG_XTFPGA_LX60)
27 const char *board = "XT_AV60";
28 const char *description = "Avnet Xilinx LX60 FPGA Evaluation Board / ";
29 #elif defined(CONFIG_XTFPGA_LX110)
30 const char *board = "XT_AV110";
31 const char *description = "Avnet Xilinx Virtex-5 LX110 Evaluation Kit / ";
32 #elif defined(CONFIG_XTFPGA_LX200)
33 const char *board = "XT_AV200";
34 const char *description = "Avnet Xilinx Virtex-4 LX200 Evaluation Kit / ";
35 #elif defined(CONFIG_XTFPGA_ML605)
36 const char *board = "XT_ML605";
37 const char *description = "Xilinx Virtex-6 FPGA ML605 Evaluation Kit / ";
38 #elif defined(CONFIG_XTFPGA_KC705)
39 const char *board = "XT_KC705";
40 const char *description = "Xilinx Kintex-7 FPGA KC705 Evaluation Kit / ";
41 #else
42 const char *board = "<unknown>";
43 const char *description = "";
44 #endif
45
checkboard(void)46 int checkboard(void)
47 {
48 printf("Board: %s: %sTensilica bitstream\n", board, description);
49 return 0;
50 }
51
board_postclk_init(void)52 int board_postclk_init(void)
53 {
54 /*
55 * Obtain CPU clock frequency from board and cache in global
56 * data structure (Hz). Return 0 on success (OK to continue),
57 * else non-zero (hang).
58 */
59
60 #ifdef CONFIG_SYS_FPGAREG_FREQ
61 gd->cpu_clk = (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ);
62 #else
63 /* early Tensilica bitstreams lack this reg, but most run at 50 MHz */
64 gd->cpu_clk = 50000000UL;
65 #endif
66 return 0;
67 }
68
69 /*
70 * Miscellaneous late initializations.
71 * The environment has been set up, so we can set the Ethernet address.
72 */
73
misc_init_r(void)74 int misc_init_r(void)
75 {
76 #ifdef CONFIG_CMD_NET
77 /*
78 * Initialize ethernet environment variables and board info.
79 * Default MAC address comes from CONFIG_ETHADDR + DIP switches 1-6.
80 */
81
82 char *s = env_get("ethaddr");
83 if (s == 0) {
84 unsigned int x;
85 char s[] = __stringify(CONFIG_ETHBASE);
86 x = (*(volatile u32 *)CONFIG_SYS_FPGAREG_DIPSW)
87 & FPGAREG_MAC_MASK;
88 sprintf(&s[15], "%02x", x);
89 env_set("ethaddr", s);
90 }
91 #endif /* CONFIG_CMD_NET */
92
93 return 0;
94 }
95
96 U_BOOT_DRVINFO(sysreset) = {
97 .name = "xtfpga_sysreset",
98 };
99
100 static struct ethoc_eth_pdata ethoc_pdata = {
101 .eth_pdata = {
102 .iobase = CONFIG_SYS_ETHOC_BASE,
103 },
104 .packet_base = CONFIG_SYS_ETHOC_BUFFER_ADDR,
105 };
106
107 U_BOOT_DRVINFO(ethoc) = {
108 .name = "ethoc",
109 .plat = ðoc_pdata,
110 };
111