1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2017 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 */
6
7 #include <spl.h>
8 #include <linux/bitops.h>
9 #include <linux/io.h>
10 #include <linux/kernel.h>
11
12 #include "../sg-regs.h"
13 #include "boot-device.h"
14
15 const struct uniphier_boot_device uniphier_pxs3_boot_device_table[] = {
16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
24 {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"},
25 {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training On)"},
26 {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training Off)"},
27 {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training On)"},
28 {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"},
29 {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"},
30 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5, BBM Last Page)"},
31 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5, BBM Last Page)"},
32 };
33
34 const unsigned uniphier_pxs3_boot_device_count =
35 ARRAY_SIZE(uniphier_pxs3_boot_device_table);
36
uniphier_pxs3_boot_device_is_usb(u32 pinmon)37 int uniphier_pxs3_boot_device_is_usb(u32 pinmon)
38 {
39 return !!(readl(sg_base + SG_PINMON2) & BIT(31));
40 }
41