1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com> 4 */ 5 6 #ifndef __GX_H__ 7 #define __GX_H__ 8 9 #ifndef __ASSEMBLY__ 10 #include <linux/bitops.h> 11 #endif 12 13 #define GX_FIRMWARE_MEM_SIZE 0x1000000 14 15 #define GX_AOBUS_BASE 0xc8100000 16 #define GX_PERIPHS_BASE 0xc8834400 17 #define GX_HIU_BASE 0xc883c000 18 #define GX_ETH_BASE 0xc9410000 19 20 /* Always-On Peripherals registers */ 21 #define GX_AO_ADDR(off) (GX_AOBUS_BASE + ((off) << 2)) 22 23 #define GX_AO_SEC_GP_CFG0 GX_AO_ADDR(0x90) 24 #define GX_AO_SEC_GP_CFG3 GX_AO_ADDR(0x93) 25 #define GX_AO_SEC_GP_CFG4 GX_AO_ADDR(0x94) 26 #define GX_AO_SEC_GP_CFG5 GX_AO_ADDR(0x95) 27 28 #define GX_AO_BOOT_DEVICE 0xF 29 #define GX_AO_MEM_SIZE_MASK 0xFFFF0000 30 #define GX_AO_MEM_SIZE_SHIFT 16 31 #define GX_AO_BL31_RSVMEM_SIZE_MASK 0xFFFF0000 32 #define GX_AO_BL31_RSVMEM_SIZE_SHIFT 16 33 #define GX_AO_BL32_RSVMEM_SIZE_MASK 0xFFFF 34 35 /* Peripherals registers */ 36 #define GX_PERIPHS_ADDR(off) (GX_PERIPHS_BASE + ((off) << 2)) 37 38 /* GPIO registers 0 to 6 */ 39 #define _GX_GPIO_OFF(n) ((n) == 6 ? 0x08 : 0x0c + 3 * (n)) 40 #define GX_GPIO_EN(n) GX_PERIPHS_ADDR(_GX_GPIO_OFF(n) + 0) 41 #define GX_GPIO_IN(n) GX_PERIPHS_ADDR(_GX_GPIO_OFF(n) + 1) 42 #define GX_GPIO_OUT(n) GX_PERIPHS_ADDR(_GX_GPIO_OFF(n) + 2) 43 44 #endif /* __GX_H__ */ 45