1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2013 SAMSUNG Electronics
4 * Rajeshwari Shinde <rajeshwari.s@samsung.com>
5 */
6
7 #include <common.h>
8 #include <cros_ec.h>
9 #include <env.h>
10 #include <errno.h>
11 #include <fdtdec.h>
12 #include <hang.h>
13 #include <init.h>
14 #include <log.h>
15 #include <net.h>
16 #include <spi.h>
17 #include <tmu.h>
18 #include <netdev.h>
19 #include <asm/global_data.h>
20 #include <asm/io.h>
21 #include <asm/gpio.h>
22 #include <asm/arch/board.h>
23 #include <asm/arch/cpu.h>
24 #include <asm/arch/dwmmc.h>
25 #include <asm/arch/mmc.h>
26 #include <asm/arch/pinmux.h>
27 #include <asm/arch/power.h>
28 #include <asm/arch/system.h>
29 #include <asm/arch/sromc.h>
30 #include <lcd.h>
31 #include <i2c.h>
32 #include <mmc.h>
33 #include <stdio_dev.h>
34 #include <usb.h>
35 #include <dwc3-uboot.h>
36 #include <linux/delay.h>
37 #include <samsung/misc.h>
38 #include <dm/pinctrl.h>
39 #include <dm.h>
40
41 DECLARE_GLOBAL_DATA_PTR;
42
exynos_early_init_f(void)43 __weak int exynos_early_init_f(void)
44 {
45 return 0;
46 }
47
exynos_power_init(void)48 __weak int exynos_power_init(void)
49 {
50 return 0;
51 }
52
53 /**
54 * get_boot_mmc_dev() - read boot MMC device id from XOM[7:5] pins.
55 */
get_boot_mmc_dev(void)56 static int get_boot_mmc_dev(void)
57 {
58 u32 mode = readl(EXYNOS4_OP_MODE) & 0x1C;
59
60 if (mode == 0x04)
61 return 2; /* MMC2: SD */
62
63 /* MMC0: eMMC or unknown */
64 return 0;
65 }
66
67 #if defined CONFIG_EXYNOS_TMU
68 /* Boot Time Thermal Analysis for SoC temperature threshold breach */
boot_temp_check(void)69 static void boot_temp_check(void)
70 {
71 int temp;
72
73 switch (tmu_monitor(&temp)) {
74 case TMU_STATUS_NORMAL:
75 break;
76 case TMU_STATUS_TRIPPED:
77 /*
78 * Status TRIPPED ans WARNING means corresponding threshold
79 * breach
80 */
81 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
82 set_ps_hold_ctrl();
83 hang();
84 break;
85 case TMU_STATUS_WARNING:
86 puts("EXYNOS_TMU: WARNING! Temperature very high\n");
87 break;
88 case TMU_STATUS_INIT:
89 /*
90 * TMU_STATUS_INIT means something is wrong with temperature
91 * sensing and TMU status was changed back from NORMAL to INIT.
92 */
93 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n");
94 break;
95 default:
96 debug("EXYNOS_TMU: Unknown TMU state\n");
97 }
98 }
99 #endif
100
board_init(void)101 int board_init(void)
102 {
103 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
104 #if defined CONFIG_EXYNOS_TMU
105 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
106 debug("%s: Failed to init TMU\n", __func__);
107 return -1;
108 }
109 boot_temp_check();
110 #endif
111 #ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE
112 /* The last few MB of memory can be reserved for secure firmware */
113 ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE;
114
115 gd->ram_size -= size;
116 gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;
117 #endif
118 return exynos_init();
119 }
120
dram_init(void)121 int dram_init(void)
122 {
123 unsigned int i;
124 unsigned long addr;
125
126 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
127 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
128 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
129 }
130 return 0;
131 }
132
dram_init_banksize(void)133 int dram_init_banksize(void)
134 {
135 unsigned int i;
136 unsigned long addr, size;
137
138 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
139 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
140 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
141
142 gd->bd->bi_dram[i].start = addr;
143 gd->bd->bi_dram[i].size = size;
144 }
145
146 return 0;
147 }
148
board_uart_init(void)149 static int board_uart_init(void)
150 {
151 #ifndef CONFIG_PINCTRL_EXYNOS
152 int err, uart_id, ret = 0;
153
154 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
155 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
156 if (err) {
157 debug("UART%d not configured\n",
158 (uart_id - PERIPH_ID_UART0));
159 ret |= err;
160 }
161 }
162 return ret;
163 #else
164 return 0;
165 #endif
166 }
167
168 #ifdef CONFIG_BOARD_EARLY_INIT_F
board_early_init_f(void)169 int board_early_init_f(void)
170 {
171 int err;
172 #ifdef CONFIG_BOARD_TYPES
173 set_board_type();
174 #endif
175 err = board_uart_init();
176 if (err) {
177 debug("UART init failed\n");
178 return err;
179 }
180
181 #ifdef CONFIG_SYS_I2C_INIT_BOARD
182 board_i2c_init(gd->fdt_blob);
183 #endif
184
185 return exynos_early_init_f();
186 }
187 #endif
188
189 #if defined(CONFIG_POWER) || defined(CONFIG_DM_PMIC)
power_init_board(void)190 int power_init_board(void)
191 {
192 set_ps_hold_ctrl();
193
194 return exynos_power_init();
195 }
196 #endif
197
198 #ifdef CONFIG_SMC911X
decode_sromc(const void * blob,struct fdt_sromc * config)199 static int decode_sromc(const void *blob, struct fdt_sromc *config)
200 {
201 int err;
202 int node;
203
204 node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
205 if (node < 0) {
206 debug("Could not find SROMC node\n");
207 return node;
208 }
209
210 config->bank = fdtdec_get_int(blob, node, "bank", 0);
211 config->width = fdtdec_get_int(blob, node, "width", 2);
212
213 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
214 FDT_SROM_TIMING_COUNT);
215 if (err < 0) {
216 debug("Could not decode SROMC configuration Error: %s\n",
217 fdt_strerror(err));
218 return -FDT_ERR_NOTFOUND;
219 }
220 return 0;
221 }
222 #endif
223
board_eth_init(struct bd_info * bis)224 int board_eth_init(struct bd_info *bis)
225 {
226 #ifdef CONFIG_SMC911X
227 u32 smc_bw_conf, smc_bc_conf;
228 struct fdt_sromc config;
229 fdt_addr_t base_addr;
230 int node;
231
232 node = decode_sromc(gd->fdt_blob, &config);
233 if (node < 0) {
234 debug("%s: Could not find sromc configuration\n", __func__);
235 return 0;
236 }
237 node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
238 if (node < 0) {
239 debug("%s: Could not find lan9215 configuration\n", __func__);
240 return 0;
241 }
242
243 /* We now have a node, so any problems from now on are errors */
244 base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
245 if (base_addr == FDT_ADDR_T_NONE) {
246 debug("%s: Could not find lan9215 address\n", __func__);
247 return -1;
248 }
249
250 /* Ethernet needs data bus width of 16 bits */
251 if (config.width != 2) {
252 debug("%s: Unsupported bus width %d\n", __func__,
253 config.width);
254 return -1;
255 }
256 smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
257 | SROMC_BYTE_ENABLE(config.bank);
258
259 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
260 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
261 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
262 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
263 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
264 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
265 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
266
267 /* Select and configure the SROMC bank */
268 exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
269 s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
270 return smc911x_initialize(0, base_addr);
271 #endif
272 return 0;
273 }
274
275 #if defined(CONFIG_DISPLAY_BOARDINFO) || defined(CONFIG_DISPLAY_BOARDINFO_LATE)
checkboard(void)276 int checkboard(void)
277 {
278 if (IS_ENABLED(CONFIG_BOARD_TYPES)) {
279 const char *board_info;
280
281 if (IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
282 /*
283 * Printing type requires having revision, although
284 * this will succeed only if done late.
285 * Otherwise revision will be set in misc_init_r().
286 */
287 set_board_revision();
288 }
289
290 board_info = get_board_type();
291
292 if (board_info)
293 printf("Type: %s\n", board_info);
294 }
295
296 return 0;
297 }
298 #endif
299
300 #ifdef CONFIG_BOARD_LATE_INIT
board_late_init(void)301 int board_late_init(void)
302 {
303 struct udevice *dev;
304 int ret;
305 int mmcbootdev = get_boot_mmc_dev();
306 char mmcbootdev_str[16];
307
308 ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
309 if (ret && ret != -ENODEV) {
310 /* Force console on */
311 gd->flags &= ~GD_FLG_SILENT;
312
313 printf("cros-ec communications failure %d\n", ret);
314 puts("\nPlease reset with Power+Refresh\n\n");
315 panic("Cannot init cros-ec device");
316 return -1;
317 }
318
319 printf("Boot device: MMC(%u)\n", mmcbootdev);
320 sprintf(mmcbootdev_str, "%u", mmcbootdev);
321 env_set("mmcbootdev", mmcbootdev_str);
322
323 return 0;
324 }
325 #endif
326
327 #ifdef CONFIG_MISC_INIT_R
misc_init_r(void)328 int misc_init_r(void)
329 {
330 if (IS_ENABLED(CONFIG_BOARD_TYPES) &&
331 !IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
332 /*
333 * If revision was not set by late display boardinfo,
334 * set it here. At this point regulators should be already
335 * available.
336 */
337 set_board_revision();
338 }
339
340 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
341 set_board_info();
342 #endif
343 #ifdef CONFIG_LCD_MENU
344 keys_init();
345 check_boot_mode();
346 #endif
347 #ifdef CONFIG_CMD_BMP
348 if (panel_info.logo_on)
349 draw_logo();
350 #endif
351 return 0;
352 }
353 #endif
354
reset_misc(void)355 void reset_misc(void)
356 {
357 struct gpio_desc gpio = {};
358 int node;
359
360 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
361 "samsung,emmc-reset");
362 if (node < 0)
363 return;
364
365 gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpio", 0,
366 &gpio, GPIOD_IS_OUT);
367
368 if (dm_gpio_is_valid(&gpio)) {
369 /*
370 * Reset eMMC
371 *
372 * FIXME: Need to optimize delay time. Minimum 1usec pulse is
373 * required by 'JEDEC Standard No.84-A441' (eMMC)
374 * document but real delay time is expected to greater
375 * than 1usec.
376 */
377 dm_gpio_set_value(&gpio, 0);
378 mdelay(10);
379 dm_gpio_set_value(&gpio, 1);
380 }
381 }
382
board_usb_cleanup(int index,enum usb_init_type init)383 int board_usb_cleanup(int index, enum usb_init_type init)
384 {
385 #ifdef CONFIG_USB_DWC3
386 dwc3_uboot_exit(index);
387 #endif
388 return 0;
389 }
390
mmc_get_env_dev(void)391 int mmc_get_env_dev(void)
392 {
393 return get_boot_mmc_dev();
394 }
395